2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <asm/cache.h>
15 #include <asm/lowcore.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
56 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
57 STACK_SIZE = 1 << STACK_SHIFT
59 #define BASED(name) name-system_call(%r13)
61 #ifdef CONFIG_TRACE_IRQFLAGS
63 l %r1,BASED(.Ltrace_irq_on)
68 l %r1,BASED(.Ltrace_irq_off)
72 .macro LOCKDEP_SYS_EXIT
73 l %r1,BASED(.Llockdep_sys_exit)
78 #define TRACE_IRQS_OFF
79 #define LOCKDEP_SYS_EXIT
83 * Register usage in interrupt handlers:
84 * R9 - pointer to current task structure
85 * R13 - pointer to literal pool
86 * R14 - return register for function calls
87 * R15 - kernel stack pointer
90 .macro STORE_TIMER lc_offset
91 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
96 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
97 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
107 1: stm %r10,%r11,\lc_sum
111 .macro SAVE_ALL_BASE savearea
112 stm %r12,%r15,\savearea
113 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
116 .macro SAVE_ALL_SVC psworg,savearea
118 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
121 .macro SAVE_ALL_SYNC psworg,savearea
123 tm \psworg+1,0x01 # test problem state bit
124 bz BASED(2f) # skip stack setup save
125 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
126 #ifdef CONFIG_CHECK_STACK
128 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
129 bz BASED(stack_overflow)
135 .macro SAVE_ALL_ASYNC psworg,savearea
137 tm \psworg+1,0x01 # test problem state bit
138 bnz BASED(1f) # from user -> load async stack
139 clc \psworg+4(4),BASED(.Lcritical_end)
141 clc \psworg+4(4),BASED(.Lcritical_start)
143 l %r14,BASED(.Lcleanup_critical)
145 tm 1(%r12),0x01 # retest problem state after cleanup
147 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
151 1: l %r15,__LC_ASYNC_STACK
152 #ifdef CONFIG_CHECK_STACK
154 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
155 bz BASED(stack_overflow)
161 .macro CREATE_STACK_FRAME psworg,savearea
162 s %r15,BASED(.Lc_spsize) # make room for registers & psw
163 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
165 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
166 icm %r12,12,__LC_SVC_ILC
167 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
169 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
171 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
174 .macro RESTORE_ALL psworg,sync
175 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
177 ni \psworg+1,0xfd # clear wait state bit
179 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
180 STORE_TIMER __LC_EXIT_TIMER
181 lpsw \psworg # back to caller
185 * Scheduler resume function, called by switch_to
186 * gpr2 = (task_struct *) prev
187 * gpr3 = (task_struct *) next
195 tm __THREAD_per(%r3),0xe8 # new process is using per ?
196 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
197 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
198 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
199 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
200 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
202 l %r4,__THREAD_info(%r2) # get thread_info of prev
203 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
204 bz __switch_to_no_mcck-__switch_to_base(%r1)
205 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
206 l %r4,__THREAD_info(%r3) # get thread_info of next
207 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
209 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
210 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
211 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
212 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
213 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
214 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
215 l %r3,__THREAD_info(%r3) # load thread_info from task struct
216 st %r3,__LC_THREAD_INFO
218 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
223 * SVC interrupt handler routine. System calls are synchronous events and
224 * are executed with interrupts enabled.
229 STORE_TIMER __LC_SYNC_ENTER_TIMER
231 SAVE_ALL_BASE __LC_SAVE_AREA
232 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
233 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
234 lh %r7,0x8a # get svc number from lowcore
235 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
237 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
238 bz BASED(sysc_do_svc)
239 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
241 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
243 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
246 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
247 sla %r7,2 # *4 and test for svc 0
248 bnz BASED(sysc_nr_ok) # svc number > 0
249 # svc 0: system call number in %r1
250 cl %r1,BASED(.Lnr_syscalls)
251 bnl BASED(sysc_nr_ok)
252 lr %r7,%r1 # copy svc number to %r7
255 mvc SP_ARGS(4,%r15),SP_R7(%r15)
257 l %r8,BASED(.Lsysc_table)
258 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
259 l %r8,0(%r7,%r8) # get system call addr.
260 bnz BASED(sysc_tracesys)
261 basr %r14,%r8 # call sys_xxxx
262 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
265 tm SP_PSW+1(%r15),0x01 # returning to user ?
266 bno BASED(sysc_leave)
267 tm __TI_flags+3(%r9),_TIF_WORK_SVC
268 bnz BASED(sysc_work) # there is work to do (signals etc.)
271 RESTORE_ALL __LC_RETURN_PSW,1
274 # recheck if there is more work to do
277 tm __TI_flags+3(%r9),_TIF_WORK_SVC
278 bz BASED(sysc_leave) # there is no work to do
280 # One of the work bits is on. Find out which one.
283 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
284 bo BASED(sysc_mcck_pending)
285 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
286 bo BASED(sysc_reschedule)
287 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
288 bnz BASED(sysc_sigpending)
289 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
290 bo BASED(sysc_restart)
291 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
292 bo BASED(sysc_singlestep)
297 # _TIF_NEED_RESCHED is set, call schedule
300 l %r1,BASED(.Lschedule)
301 la %r14,BASED(sysc_work_loop)
302 br %r1 # call scheduler
305 # _TIF_MCCK_PENDING is set, call handler
308 l %r1,BASED(.Ls390_handle_mcck)
309 la %r14,BASED(sysc_work_loop)
310 br %r1 # TIF bit will be cleared by handler
313 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
316 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
317 la %r2,SP_PTREGS(%r15) # load pt_regs
318 l %r1,BASED(.Ldo_signal)
319 basr %r14,%r1 # call do_signal
320 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
321 bo BASED(sysc_restart)
322 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
323 bo BASED(sysc_singlestep)
324 b BASED(sysc_work_loop)
327 # _TIF_RESTART_SVC is set, set up registers and restart svc
330 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
331 l %r7,SP_R2(%r15) # load new svc number
333 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
334 lm %r2,%r6,SP_R2(%r15) # load svc arguments
335 b BASED(sysc_do_restart) # restart svc
338 # _TIF_SINGLE_STEP is set, call do_single_step
341 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
342 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
343 la %r2,SP_PTREGS(%r15) # address of register-save area
344 l %r1,BASED(.Lhandle_per) # load adr. of per handler
345 la %r14,BASED(sysc_return) # load adr. of system return
346 br %r1 # branch to do_single_step
349 # call trace before and after sys_call
353 la %r2,SP_PTREGS(%r15) # load pt_regs
358 clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
359 bnl BASED(sysc_tracenogo)
360 l %r8,BASED(.Lsysc_table)
361 l %r7,SP_R2(%r15) # strace might have changed the
362 sll %r7,2 # system call
365 lm %r3,%r6,SP_R3(%r15)
366 l %r2,SP_ORIG_R2(%r15)
367 basr %r14,%r8 # call sys_xxx
368 st %r2,SP_R2(%r15) # store return value
370 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
371 bz BASED(sysc_return)
373 la %r2,SP_PTREGS(%r15) # load pt_regs
375 la %r14,BASED(sysc_return)
379 # a new process exits the kernel with ret_from_fork
383 l %r13,__LC_SVC_NEW_PSW+4
384 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
385 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
387 st %r15,SP_R15(%r15) # store stack pointer for new kthread
388 0: l %r1,BASED(.Lschedtail)
391 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
395 # kernel_execve function needs to deal with pt_regs that is not
400 stm %r12,%r15,48(%r15)
402 l %r13,__LC_SVC_NEW_PSW+4
403 s %r15,BASED(.Lc_spsize)
404 st %r14,__SF_BACKCHAIN(%r15)
405 la %r12,SP_PTREGS(%r15)
406 xc 0(__PT_SIZE,%r12),0(%r12)
407 l %r1,BASED(.Ldo_execve)
412 a %r15,BASED(.Lc_spsize)
413 lm %r12,%r15,48(%r15)
416 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
417 l %r15,__LC_KERNEL_STACK # load ksp
418 s %r15,BASED(.Lc_spsize) # make room for registers & psw
419 l %r9,__LC_THREAD_INFO
420 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
421 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
422 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
423 l %r1,BASED(.Lexecve_tail)
428 * Program check handler routine
431 .globl pgm_check_handler
434 * First we need to check for a special case:
435 * Single stepping an instruction that disables the PER event mask will
436 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
437 * For a single stepped SVC the program check handler gets control after
438 * the SVC new PSW has been loaded. But we want to execute the SVC first and
439 * then handle the PER event. Therefore we update the SVC old PSW to point
440 * to the pgm_check_handler and branch to the SVC handler after we checked
441 * if we have to load the kernel stack register.
442 * For every other possible cause for PER event without the PER mask set
443 * we just ignore the PER event (FIXME: is there anything we have to do
446 STORE_TIMER __LC_SYNC_ENTER_TIMER
447 SAVE_ALL_BASE __LC_SAVE_AREA
448 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
449 bnz BASED(pgm_per) # got per exception -> special case
450 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
451 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
452 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
453 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
454 bz BASED(pgm_no_vtime)
455 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
456 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
457 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
460 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
461 l %r3,__LC_PGM_ILC # load program interruption code
465 l %r7,BASED(.Ljump_table)
467 l %r7,0(%r8,%r7) # load address of handler routine
468 la %r2,SP_PTREGS(%r15) # address of register-save area
469 la %r14,BASED(sysc_return)
470 br %r7 # branch to interrupt-handler
473 # handle per exception
476 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
477 bnz BASED(pgm_per_std) # ok, normal per event from user space
478 # ok its one of the special cases, now we need to find out which one
479 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
481 # no interesting special case, ignore PER event
482 lm %r12,%r15,__LC_SAVE_AREA
486 # Normal per exception
489 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
490 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
491 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
492 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
493 bz BASED(pgm_no_vtime2)
494 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
495 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
496 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
499 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
501 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
502 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
503 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
504 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
505 tm SP_PSW+1(%r15),0x01 # kernel per event ?
507 l %r3,__LC_PGM_ILC # load program interruption code
509 nr %r8,%r3 # clear per-event-bit and ilc
510 be BASED(sysc_return) # only per or per+check ?
514 # it was a single stepped SVC that is causing all the trouble
517 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
518 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
519 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
520 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
521 bz BASED(pgm_no_vtime3)
522 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
523 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
524 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
527 lh %r7,0x8a # get svc number from lowcore
528 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
530 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
531 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
532 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
533 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
535 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
539 # per was called from kernel, must be kprobes
542 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
543 la %r2,SP_PTREGS(%r15) # address of register-save area
544 l %r1,BASED(.Lhandle_per) # load adr. of per handler
545 la %r14,BASED(sysc_leave) # load adr. of system return
546 br %r1 # branch to do_single_step
549 * IO interrupt handler routine
552 .globl io_int_handler
554 STORE_TIMER __LC_ASYNC_ENTER_TIMER
556 SAVE_ALL_BASE __LC_SAVE_AREA+16
557 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
558 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
559 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
560 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
561 bz BASED(io_no_vtime)
562 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
563 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
564 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
567 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
569 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
570 la %r2,SP_PTREGS(%r15) # address of register-save area
571 basr %r14,%r1 # branch to standard irq handler
575 tm SP_PSW+1(%r15),0x01 # returning to user ?
576 #ifdef CONFIG_PREEMPT
577 bno BASED(io_preempt) # no -> check for preemptive scheduling
579 bno BASED(io_leave) # no-> skip resched & signal
581 tm __TI_flags+3(%r9),_TIF_WORK_INT
582 bnz BASED(io_work) # there is work to do (signals etc.)
585 RESTORE_ALL __LC_RETURN_PSW,0
588 #ifdef CONFIG_PREEMPT
590 icm %r0,15,__TI_precount(%r9)
593 s %r1,BASED(.Lc_spsize)
594 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
595 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
598 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
600 mvc __TI_precount(4,%r9),BASED(.Lc_pactive)
601 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
602 l %r1,BASED(.Lschedule)
603 basr %r14,%r1 # call schedule
604 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
605 xc __TI_precount(4,%r9),__TI_precount(%r9)
606 b BASED(io_resume_loop)
610 # switch to kernel stack, then check the TIF bits
613 l %r1,__LC_KERNEL_STACK
614 s %r1,BASED(.Lc_spsize)
615 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
616 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
619 # One of the work bits is on. Find out which one.
620 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED
621 # and _TIF_MCCK_PENDING
624 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
625 bo BASED(io_mcck_pending)
626 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
627 bo BASED(io_reschedule)
628 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
629 bnz BASED(io_sigpending)
634 # _TIF_MCCK_PENDING is set, call handler
638 l %r1,BASED(.Ls390_handle_mcck)
639 basr %r14,%r1 # TIF bit will be cleared by handler
641 b BASED(io_work_loop)
644 # _TIF_NEED_RESCHED is set, call schedule
647 l %r1,BASED(.Lschedule)
648 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
649 basr %r14,%r1 # call scheduler
650 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
651 tm __TI_flags+3(%r9),_TIF_WORK_INT
652 bz BASED(io_leave) # there is no work to do
653 b BASED(io_work_loop)
656 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
659 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
660 la %r2,SP_PTREGS(%r15) # load pt_regs
661 l %r1,BASED(.Ldo_signal)
662 basr %r14,%r1 # call do_signal
663 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
664 b BASED(io_work_loop)
667 * External interrupt handler routine
670 .globl ext_int_handler
672 STORE_TIMER __LC_ASYNC_ENTER_TIMER
674 SAVE_ALL_BASE __LC_SAVE_AREA+16
675 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
676 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
677 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
678 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
679 bz BASED(ext_no_vtime)
680 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
681 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
682 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
685 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
687 la %r2,SP_PTREGS(%r15) # address of register-save area
688 lh %r3,__LC_EXT_INT_CODE # get interruption code
689 l %r1,BASED(.Ldo_extint)
697 * Machine check handler routines
700 .globl mcck_int_handler
702 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
703 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
704 SAVE_ALL_BASE __LC_SAVE_AREA+32
705 la %r12,__LC_MCK_OLD_PSW
706 tm __LC_MCCK_CODE,0x80 # system damage?
707 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
708 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
709 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
710 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
711 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
713 la %r14,__LC_SYNC_ENTER_TIMER
714 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
716 la %r14,__LC_ASYNC_ENTER_TIMER
717 0: clc 0(8,%r14),__LC_EXIT_TIMER
719 la %r14,__LC_EXIT_TIMER
720 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
722 la %r14,__LC_LAST_UPDATE_TIMER
724 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
727 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
728 bno BASED(mcck_int_main) # no -> skip cleanup critical
729 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
730 bnz BASED(mcck_int_main) # from user -> load async stack
731 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
732 bhe BASED(mcck_int_main)
733 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
734 bl BASED(mcck_int_main)
735 l %r14,BASED(.Lcleanup_critical)
738 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
742 l %r15,__LC_PANIC_STACK # load panic stack
743 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
744 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
745 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
746 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
747 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
748 bz BASED(mcck_no_vtime)
749 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
750 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
751 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
754 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
755 la %r2,SP_PTREGS(%r15) # load pt_regs
756 l %r1,BASED(.Ls390_mcck)
757 basr %r14,%r1 # call machine check handler
758 tm SP_PSW+1(%r15),0x01 # returning to user ?
759 bno BASED(mcck_return)
760 l %r1,__LC_KERNEL_STACK # switch to kernel stack
761 s %r1,BASED(.Lc_spsize)
762 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
763 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
765 stosm __SF_EMPTY(%r15),0x04 # turn dat on
766 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
767 bno BASED(mcck_return)
769 l %r1,BASED(.Ls390_handle_mcck)
770 basr %r14,%r1 # call machine check handler
773 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
774 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
775 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
776 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
777 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
779 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
781 lpsw __LC_RETURN_MCCK_PSW # back to caller
784 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
785 lpsw __LC_RETURN_MCCK_PSW # back to caller
787 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
790 * Restart interruption handler, kick starter for additional CPUs
793 #ifndef CONFIG_HOTPLUG_CPU
794 .section .init.text,"ax"
796 .globl restart_int_handler
798 l %r15,__LC_SAVE_AREA+60 # load ksp
799 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
800 lam %a0,%a15,__LC_AREGS_SAVE_AREA
801 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
802 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
804 l %r14,restart_addr-.(%r14)
805 br %r14 # branch to start_secondary
807 .long start_secondary
808 #ifndef CONFIG_HOTPLUG_CPU
813 * If we do not run with SMP enabled, let the new CPU crash ...
815 .globl restart_int_handler
819 lpsw restart_crash-restart_base(%r1)
822 .long 0x000a0000,0x00000000
826 #ifdef CONFIG_CHECK_STACK
828 * The synchronous or the asynchronous stack overflowed. We are dead.
829 * No need to properly save the registers, we are going to panic anyway.
830 * Setup a pt_regs so that show_trace can provide a good call trace.
833 l %r15,__LC_PANIC_STACK # change to panic stack
834 sl %r15,BASED(.Lc_spsize)
835 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
836 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
837 la %r1,__LC_SAVE_AREA
838 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
840 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
842 la %r1,__LC_SAVE_AREA+16
843 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
844 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
845 l %r1,BASED(1f) # branch to kernel_stack_overflow
846 la %r2,SP_PTREGS(%r15) # load pt_regs
848 1: .long kernel_stack_overflow
851 cleanup_table_system_call:
852 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
853 cleanup_table_sysc_return:
854 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
855 cleanup_table_sysc_leave:
856 .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
857 cleanup_table_sysc_work_loop:
858 .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
859 cleanup_table_io_return:
860 .long io_return + 0x80000000, io_leave + 0x80000000
861 cleanup_table_io_leave:
862 .long io_leave + 0x80000000, io_done + 0x80000000
863 cleanup_table_io_work_loop:
864 .long io_work_loop + 0x80000000, io_mcck_pending + 0x80000000
867 clc 4(4,%r12),BASED(cleanup_table_system_call)
869 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
870 bl BASED(cleanup_system_call)
872 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
874 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
875 bl BASED(cleanup_sysc_return)
877 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
879 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
880 bl BASED(cleanup_sysc_leave)
882 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
884 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
885 bl BASED(cleanup_sysc_return)
887 clc 4(4,%r12),BASED(cleanup_table_io_return)
889 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
890 bl BASED(cleanup_io_return)
892 clc 4(4,%r12),BASED(cleanup_table_io_leave)
894 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
895 bl BASED(cleanup_io_leave)
897 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
899 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
900 bl BASED(cleanup_io_return)
905 mvc __LC_RETURN_PSW(8),0(%r12)
906 c %r12,BASED(.Lmck_old_psw)
908 la %r12,__LC_SAVE_AREA+16
910 0: la %r12,__LC_SAVE_AREA+32
912 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
913 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
915 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
916 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
917 bhe BASED(cleanup_vtime)
919 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
921 mvc __LC_SAVE_AREA(16),0(%r12)
923 st %r12,__LC_SAVE_AREA+48 # argh
924 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
925 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
926 l %r12,__LC_SAVE_AREA+48 # argh
929 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
931 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
932 bhe BASED(cleanup_stime)
933 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
934 bz BASED(cleanup_novtime)
935 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
937 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
938 bh BASED(cleanup_update)
939 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
941 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
944 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
945 la %r12,__LC_RETURN_PSW
947 cleanup_system_call_insn:
948 .long sysc_saveall + 0x80000000
949 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
950 .long system_call + 0x80000000
951 .long sysc_vtime + 0x80000000
952 .long sysc_stime + 0x80000000
953 .long sysc_update + 0x80000000
957 mvc __LC_RETURN_PSW(4),0(%r12)
958 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
959 la %r12,__LC_RETURN_PSW
963 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
965 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
966 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
967 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
970 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
971 c %r12,BASED(.Lmck_old_psw)
973 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
975 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
976 1: lm %r0,%r11,SP_R0(%r15)
978 2: la %r12,__LC_RETURN_PSW
980 cleanup_sysc_leave_insn:
981 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
982 .long sysc_leave + 14 + 0x80000000
984 .long sysc_leave + 10 + 0x80000000
987 mvc __LC_RETURN_PSW(4),0(%r12)
988 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
989 la %r12,__LC_RETURN_PSW
993 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
995 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
996 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
997 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1000 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1001 c %r12,BASED(.Lmck_old_psw)
1003 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1005 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1006 1: lm %r0,%r11,SP_R0(%r15)
1008 2: la %r12,__LC_RETURN_PSW
1010 cleanup_io_leave_insn:
1011 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1012 .long io_leave + 18 + 0x80000000
1014 .long io_leave + 14 + 0x80000000
1020 .Lc_spsize: .long SP_SIZE
1021 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1022 .Lc_pactive: .long PREEMPT_ACTIVE
1023 .Lnr_syscalls: .long NR_syscalls
1024 .L0x018: .short 0x018
1025 .L0x020: .short 0x020
1026 .L0x028: .short 0x028
1027 .L0x030: .short 0x030
1028 .L0x038: .short 0x038
1034 .Ls390_mcck: .long s390_do_machine_check
1036 .long s390_handle_mcck
1037 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1038 .Ldo_IRQ: .long do_IRQ
1039 .Ldo_extint: .long do_extint
1040 .Ldo_signal: .long do_signal
1041 .Lhandle_per: .long do_single_step
1042 .Ldo_execve: .long do_execve
1043 .Lexecve_tail: .long execve_tail
1044 .Ljump_table: .long pgm_check_table
1045 .Lschedule: .long schedule
1046 .Ltrace: .long syscall_trace
1047 .Lschedtail: .long schedule_tail
1048 .Lsysc_table: .long sys_call_table
1049 #ifdef CONFIG_TRACE_IRQFLAGS
1050 .Ltrace_irq_on: .long trace_hardirqs_on
1052 .long trace_hardirqs_off
1054 .long lockdep_sys_exit
1057 .long __critical_start + 0x80000000
1059 .long __critical_end + 0x80000000
1061 .long cleanup_critical
1063 .section .rodata, "a"
1064 #define SYSCALL(esa,esame,emu) .long esa
1066 #include "syscalls.S"