2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Unified implementation of memcpy, memmove and the __copy_user backend.
8 * Copyright (C) 1998, 99, 2000, 01, 2002 Ralf Baechle (ralf@gnu.org)
9 * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc.
10 * Copyright (C) 2002 Broadcom, Inc.
11 * memcpy/copy_user author: Mark Vandevoorde
13 * Mnemonic names for arguments to memcpy/__copy_user
17 * Hack to resolve longstanding prefetch issue
19 * Prefetching may be fatal on some systems if we're prefetching beyond the
20 * end of memory on some systems. It's also a seriously bad idea on non
21 * dma-coherent systems.
23 #if !defined(CONFIG_DMA_COHERENT) || !defined(CONFIG_DMA_IP27)
24 #undef CONFIG_CPU_HAS_PREFETCH
26 #ifdef CONFIG_MIPS_MALTA
27 #undef CONFIG_CPU_HAS_PREFETCH
31 #include <asm/asm-offsets.h>
32 #include <asm/regdef.h>
41 * memcpy copies len bytes from src to dst and sets v0 to dst.
43 * - src and dst don't overlap
46 * memcpy uses the standard calling convention
48 * __copy_user copies up to len bytes from src to dst and sets a2 (len) to
49 * the number of uncopied bytes due to an exception caused by a read or write.
50 * __copy_user assumes that src and dst don't overlap, and that the call is
51 * implementing one of the following:
53 * - src is readable (no exceptions when reading src)
55 * - dst is writable (no exceptions when writing dst)
56 * __copy_user uses a non-standard calling convention; see
57 * include/asm-mips/uaccess.h
59 * When an exception happens on a load, the handler must
60 # ensure that all of the destination buffer is overwritten to prevent
61 * leaking information to user mode programs.
69 * The exception handler for loads requires that:
70 * 1- AT contain the address of the byte just past the end of the source
72 * 2- src_entry <= src < AT, and
73 * 3- (dst - src) == (dst_entry - src_entry),
74 * The _entry suffix denotes values when __copy_user was called.
76 * (1) is set up up by uaccess.h and maintained by not writing AT in copy_user
77 * (2) is met by incrementing src by the number of bytes copied
78 * (3) is met by not doing loads between a pair of increments of dst and src
80 * The exception handlers for stores adjust len (if necessary) and return.
81 * These handlers do not need to overwrite any data.
83 * For __rmemcpy and memmove an exception is always a kernel bug, therefore
84 * they're not protected.
87 #define EXC(inst_reg,addr,handler) \
89 .section __ex_table,"a"; \
94 * Only on the 64-bit kernel we can made use of 64-bit registers.
119 * As we are sharing code base with the mips32 tree (which use the o32 ABI
120 * register definitions). We need to redefine the register definitions from
121 * the n64 ABI register naming to the o32 ABI register naming.
154 #endif /* USE_DOUBLE */
156 #ifdef CONFIG_CPU_LITTLE_ENDIAN
157 #define LDFIRST LOADR
159 #define STFIRST STORER
160 #define STREST STOREL
161 #define SHIFT_DISCARD SLLV
163 #define LDFIRST LOADL
165 #define STFIRST STOREL
166 #define STREST STORER
167 #define SHIFT_DISCARD SRLV
170 #define FIRST(unit) ((unit)*NBYTES)
171 #define REST(unit) (FIRST(unit)+NBYTES-1)
172 #define UNIT(unit) FIRST(unit)
174 #define ADDRMASK (NBYTES-1)
181 * A combined memcpy/__copy_user
182 * __copy_user sets len to 0 for success; else to an upper bound of
183 * the number of uncopied bytes.
184 * memcpy sets v0 to dst.
187 LEAF(__copy_user_inatomic)
189 * Note: dst & src may be unaligned, len may be 0
195 * The "issue break"s below are very approximate.
196 * Issue delays for dcache fills will perturb the schedule, as will
197 * load queue full replay traps, etc.
199 * If len < NBYTES use byte operations.
204 and t1, dst, ADDRMASK
207 bnez t2, copy_bytes_checklen
208 and t0, src, ADDRMASK
211 bnez t1, dst_unaligned
213 bnez t0, src_unaligned_dst_aligned
215 * use delay slot for fall-through
216 * src and dst are aligned; need to compute rem
219 SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter
220 beqz t0, cleanup_both_aligned # len < 8*NBYTES
221 and rem, len, (8*NBYTES-1) # rem = len % (8*NBYTES)
226 EXC( LOAD t0, UNIT(0)(src), l_exc)
227 EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
228 EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
229 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
230 SUB len, len, 8*NBYTES
231 EXC( LOAD t4, UNIT(4)(src), l_exc_copy)
232 EXC( LOAD t7, UNIT(5)(src), l_exc_copy)
233 STORE t0, UNIT(0)(dst)
234 STORE t1, UNIT(1)(dst)
235 EXC( LOAD t0, UNIT(6)(src), l_exc_copy)
236 EXC( LOAD t1, UNIT(7)(src), l_exc_copy)
237 ADD src, src, 8*NBYTES
238 ADD dst, dst, 8*NBYTES
239 STORE t2, UNIT(-6)(dst)
240 STORE t3, UNIT(-5)(dst)
241 STORE t4, UNIT(-4)(dst)
242 STORE t7, UNIT(-3)(dst)
243 STORE t0, UNIT(-2)(dst)
244 STORE t1, UNIT(-1)(dst)
251 * len == rem == the number of bytes left to copy < 8*NBYTES
253 cleanup_both_aligned:
255 sltu t0, len, 4*NBYTES
256 bnez t0, less_than_4units
257 and rem, len, (NBYTES-1) # rem = len % NBYTES
261 EXC( LOAD t0, UNIT(0)(src), l_exc)
262 EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
263 EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
264 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
265 SUB len, len, 4*NBYTES
266 ADD src, src, 4*NBYTES
267 STORE t0, UNIT(0)(dst)
268 STORE t1, UNIT(1)(dst)
269 STORE t2, UNIT(2)(dst)
270 STORE t3, UNIT(3)(dst)
272 ADD dst, dst, 4*NBYTES
277 beq rem, len, copy_bytes
280 EXC( LOAD t0, 0(src), l_exc)
288 * src and dst are aligned, need to copy rem bytes (rem < NBYTES)
289 * A loop would do only a byte at a time with possible branch
290 * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE
291 * because can't assume read-access to dst. Instead, use
292 * STREST dst, which doesn't require read access to dst.
294 * This code should perform better than a simple loop on modern,
295 * wide-issue mips processors because the code has fewer branches and
296 * more instruction-level parallelism.
300 ADD t1, dst, len # t1 is just past last byte of dst
302 SLL rem, len, 3 # rem = number of bits to keep
303 EXC( LOAD t0, 0(src), l_exc)
304 SUB bits, bits, rem # bits = number of bits to discard
305 SHIFT_DISCARD t0, t0, bits
312 * t0 = src & ADDRMASK
313 * t1 = dst & ADDRMASK; T1 > 0
316 * Copy enough bytes to align dst
317 * Set match = (src and dst have same alignment)
320 EXC( LDFIRST t3, FIRST(0)(src), l_exc)
322 EXC( LDREST t3, REST(0)(src), l_exc_copy)
323 SUB t2, t2, t1 # t2 = number of bytes copied
325 STFIRST t3, FIRST(0)(dst)
329 beqz match, both_aligned
332 src_unaligned_dst_aligned:
333 SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter
335 beqz t0, cleanup_src_unaligned
336 and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES
340 * Avoid consecutive LD*'s to the same register since some mips
341 * implementations can't issue them in the same cycle.
342 * It's OK to load FIRST(N+1) before REST(N) because the two addresses
343 * are to the same unit (unless src is aligned, but it's not).
345 EXC( LDFIRST t0, FIRST(0)(src), l_exc)
346 EXC( LDFIRST t1, FIRST(1)(src), l_exc_copy)
347 SUB len, len, 4*NBYTES
348 EXC( LDREST t0, REST(0)(src), l_exc_copy)
349 EXC( LDREST t1, REST(1)(src), l_exc_copy)
350 EXC( LDFIRST t2, FIRST(2)(src), l_exc_copy)
351 EXC( LDFIRST t3, FIRST(3)(src), l_exc_copy)
352 EXC( LDREST t2, REST(2)(src), l_exc_copy)
353 EXC( LDREST t3, REST(3)(src), l_exc_copy)
354 PREF( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed)
355 ADD src, src, 4*NBYTES
356 #ifdef CONFIG_CPU_SB1
357 nop # improves slotting
359 STORE t0, UNIT(0)(dst)
360 STORE t1, UNIT(1)(dst)
361 STORE t2, UNIT(2)(dst)
362 STORE t3, UNIT(3)(dst)
363 PREF( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed)
365 ADD dst, dst, 4*NBYTES
367 cleanup_src_unaligned:
369 and rem, len, NBYTES-1 # rem = len % NBYTES
370 beq rem, len, copy_bytes
373 EXC( LDFIRST t0, FIRST(0)(src), l_exc)
374 EXC( LDREST t0, REST(0)(src), l_exc_copy)
385 /* 0 < len < NBYTES */
386 #define COPY_BYTE(N) \
387 EXC( lb t0, N(src), l_exc); \
400 EXC( lb t0, NBYTES-2(src), l_exc)
407 END(__copy_user_inatomic)
411 * Copy bytes from src until faulting load address (or until a
414 * When reached by a faulting LDFIRST/LDREST, THREAD_BUADDR($28)
415 * may be more than a byte beyond the last address.
416 * Hence, the lb below may get an exception.
418 * Assumes src < THREAD_BUADDR($28)
420 LOAD t0, TI_TASK($28)
422 LOAD t0, THREAD_BUADDR(t0)
424 EXC( lb t1, 0(src), l_exc)
426 sb t1, 0(dst) # can't fault -- we're copy_from_user
430 LOAD t0, TI_TASK($28)
432 LOAD t0, THREAD_BUADDR(t0) # t0 is just past last good address
434 SUB len, AT, t0 # len number of uncopied bytes