2 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
9 #include <linux/types.h>
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/ioport.h>
13 #include <linux/pci.h>
14 #include <linux/hdreg.h>
15 #include <linux/ide.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
21 #define ATIIXP_IDE_PIO_TIMING 0x40
22 #define ATIIXP_IDE_MDMA_TIMING 0x44
23 #define ATIIXP_IDE_PIO_CONTROL 0x48
24 #define ATIIXP_IDE_PIO_MODE 0x4a
25 #define ATIIXP_IDE_UDMA_CONTROL 0x54
26 #define ATIIXP_IDE_UDMA_MODE 0x56
33 static atiixp_ide_timing pio_timing[] = {
41 static atiixp_ide_timing mdma_timing[] = {
47 static int save_mdma_mode[4];
49 static DEFINE_SPINLOCK(atiixp_lock);
52 * atiixp_ratemask - compute rate mask for ATIIXP IDE
53 * @drive: IDE drive to compute for
55 * Returns the available modes for the ATIIXP IDE controller.
58 static u8 atiixp_ratemask(ide_drive_t *drive)
62 if (!eighty_ninty_three(drive))
63 mode = min(mode, (u8)1);
68 * atiixp_dma_2_pio - return the PIO mode matching DMA
69 * @xfer_rate: transfer speed
71 * Returns the nearest equivalent PIO timing for the PIO or DMA
72 * mode requested by the controller.
75 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
104 static void atiixp_dma_host_on(ide_drive_t *drive)
106 struct pci_dev *dev = drive->hwif->pci_dev;
110 spin_lock_irqsave(&atiixp_lock, flags);
112 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
113 if (save_mdma_mode[drive->dn])
114 tmp16 &= ~(1 << drive->dn);
116 tmp16 |= (1 << drive->dn);
117 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
119 spin_unlock_irqrestore(&atiixp_lock, flags);
121 ide_dma_host_on(drive);
124 static void atiixp_dma_host_off(ide_drive_t *drive)
126 struct pci_dev *dev = drive->hwif->pci_dev;
130 spin_lock_irqsave(&atiixp_lock, flags);
132 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
133 tmp16 &= ~(1 << drive->dn);
134 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
136 spin_unlock_irqrestore(&atiixp_lock, flags);
138 ide_dma_host_off(drive);
142 * atiixp_tune_drive - tune a drive attached to a ATIIXP
143 * @drive: drive to tune
144 * @pio: desired PIO mode
146 * Set the interface PIO mode.
149 static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
151 struct pci_dev *dev = drive->hwif->pci_dev;
153 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
157 spin_lock_irqsave(&atiixp_lock, flags);
159 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
160 pio_mode_data &= ~(0x07 << (drive->dn * 4));
161 pio_mode_data |= (pio << (drive->dn * 4));
162 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
164 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
165 pio_timing_data &= ~(0xff << timing_shift);
166 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
167 (pio_timing[pio].command_width << (timing_shift + 4));
168 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
170 spin_unlock_irqrestore(&atiixp_lock, flags);
174 * atiixp_tune_chipset - tune a ATIIXP interface
175 * @drive: IDE drive to tune
176 * @xferspeed: speed to configure
178 * Set a ATIIXP interface channel to the desired speeds. This involves
179 * requires the right timing data into the ATIIXP configuration space
180 * then setting the drive parameters appropriately
183 static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
185 struct pci_dev *dev = drive->hwif->pci_dev;
187 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
192 speed = ide_rate_filter(atiixp_ratemask(drive), xferspeed);
194 spin_lock_irqsave(&atiixp_lock, flags);
196 save_mdma_mode[drive->dn] = 0;
197 if (speed >= XFER_UDMA_0) {
198 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
199 tmp16 &= ~(0x07 << (drive->dn * 4));
200 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
201 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
203 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
204 save_mdma_mode[drive->dn] = speed;
205 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
206 tmp32 &= ~(0xff << timing_shift);
207 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
208 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
209 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
213 spin_unlock_irqrestore(&atiixp_lock, flags);
215 if (speed >= XFER_SW_DMA_0)
216 pio = atiixp_dma_2_pio(speed);
218 pio = speed - XFER_PIO_0;
220 atiixp_tuneproc(drive, pio);
222 return ide_config_drive_speed(drive, speed);
226 * atiixp_config_drive_for_dma - configure drive for DMA
227 * @drive: IDE drive to configure
229 * Set up a ATIIXP interface channel for the best available speed.
230 * We prefer UDMA if it is available and then MWDMA. If DMA is
231 * not available we switch to PIO and return 0.
234 static int atiixp_config_drive_for_dma(ide_drive_t *drive)
236 u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
241 (void) atiixp_speedproc(drive, speed);
242 return ide_dma_enable(drive);
246 * atiixp_dma_check - set up an IDE device
247 * @drive: IDE drive to configure
249 * Set up the ATIIXP interface for the best available speed on this
250 * interface, preferring DMA to PIO.
253 static int atiixp_dma_check(ide_drive_t *drive)
257 drive->init_speed = 0;
259 if (ide_use_dma(drive) && atiixp_config_drive_for_dma(drive))
262 if (ide_use_fast_pio(drive)) {
263 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
264 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
265 atiixp_speedproc(drive, speed);
272 * init_hwif_atiixp - fill in the hwif for the ATIIXP
273 * @hwif: IDE interface
275 * Set up the ide_hwif_t for the ATIIXP interface according to the
276 * capabilities of the hardware.
279 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
282 u8 ch = hwif->channel;
283 struct pci_dev *pdev = hwif->pci_dev;
286 hwif->irq = ch ? 15 : 14;
289 hwif->tuneproc = &atiixp_tuneproc;
290 hwif->speedproc = &atiixp_speedproc;
291 hwif->drives[0].autotune = 1;
292 hwif->drives[1].autotune = 1;
298 hwif->ultra_mask = 0x3f;
299 hwif->mwdma_mask = 0x06;
300 hwif->swdma_mask = 0x04;
302 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
303 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
308 hwif->dma_host_on = &atiixp_dma_host_on;
309 hwif->dma_host_off = &atiixp_dma_host_off;
310 hwif->ide_dma_check = &atiixp_dma_check;
314 hwif->drives[1].autodma = hwif->autodma;
315 hwif->drives[0].autodma = hwif->autodma;
319 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
322 .init_hwif = init_hwif_atiixp,
325 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
326 .bootable = ON_BOARD,
328 .name = "SB600_PATA",
329 .init_hwif = init_hwif_atiixp,
332 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
333 .bootable = ON_BOARD,
338 * atiixp_init_one - called when a ATIIXP is found
339 * @dev: the atiixp device
340 * @id: the matching pci id
342 * Called when the PCI registration layer (or the IDE initialization)
343 * finds a device matching our IDE device tables.
346 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
348 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
351 static struct pci_device_id atiixp_pci_tbl[] = {
352 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
353 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
354 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
355 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
358 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
360 static struct pci_driver driver = {
361 .name = "ATIIXP_IDE",
362 .id_table = atiixp_pci_tbl,
363 .probe = atiixp_init_one,
366 static int __init atiixp_ide_init(void)
368 return ide_pci_register_driver(&driver);
371 module_init(atiixp_ide_init);
373 MODULE_AUTHOR("HUI YU");
374 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
375 MODULE_LICENSE("GPL");