3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
28 * 04/16/05 Dustin McIntire Initial version
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/crc32.h>
68 #include <linux/device.h>
69 #include <linux/platform_device.h>
70 #include <linux/spinlock.h>
71 #include <linux/ethtool.h>
72 #include <linux/mii.h>
73 #include <linux/workqueue.h>
75 #include <linux/netdevice.h>
76 #include <linux/etherdevice.h>
77 #include <linux/skbuff.h>
84 * Transmit timeout, default 5 seconds.
86 static int watchdog = 5000;
87 module_param(watchdog, int, 0400);
88 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90 static int tx_fifo_kb=8;
91 module_param(tx_fifo_kb, int, 0400);
92 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94 MODULE_LICENSE("GPL");
95 MODULE_ALIAS("platform:smc911x");
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
102 #define CARDNAME "smc911x"
105 * Use power-down feature of the chip
110 /* store this information for the driver.. */
111 struct smc911x_local {
113 * If I have to wait until the DMA is finished and ready to reload a
114 * packet, I will store the skbuff here. Then, the DMA will send it
117 struct sk_buff *pending_tx_skb;
119 /* version/revision of the SMC911x chip */
129 /* Contains the current active receive/phy mode */
135 struct mii_if_info mii;
138 struct work_struct phy_configure;
144 struct net_device *netdev;
147 /* DMA needs the physical address of the chip */
153 struct sk_buff *current_rx_skb;
154 struct sk_buff *current_tx_skb;
160 #define DBG(n, args...) \
162 if (SMC_DEBUG & (n)) \
166 #define PRINTK(args...) printk(args)
168 #define DBG(n, args...) do { } while (0)
169 #define PRINTK(args...) printk(KERN_DEBUG args)
172 #if SMC_DEBUG_PKTS > 0
173 static void PRINT_PKT(u_char *buf, int length)
180 remainder = length % 16;
182 for (i = 0; i < lines ; i ++) {
184 for (cur = 0; cur < 8; cur++) {
188 printk("%02x%02x ", a, b);
192 for (i = 0; i < remainder/2 ; i++) {
196 printk("%02x%02x ", a, b);
201 #define PRINT_PKT(x...) do { } while (0)
205 /* this enables an interrupt in the interrupt mask register */
206 #define SMC_ENABLE_INT(x) do { \
207 unsigned int __mask; \
208 unsigned long __flags; \
209 spin_lock_irqsave(&lp->lock, __flags); \
210 __mask = SMC_GET_INT_EN(); \
212 SMC_SET_INT_EN(__mask); \
213 spin_unlock_irqrestore(&lp->lock, __flags); \
216 /* this disables an interrupt from the interrupt mask register */
217 #define SMC_DISABLE_INT(x) do { \
218 unsigned int __mask; \
219 unsigned long __flags; \
220 spin_lock_irqsave(&lp->lock, __flags); \
221 __mask = SMC_GET_INT_EN(); \
223 SMC_SET_INT_EN(__mask); \
224 spin_unlock_irqrestore(&lp->lock, __flags); \
228 * this does a soft reset on the device
230 static void smc911x_reset(struct net_device *dev)
232 unsigned long ioaddr = dev->base_addr;
233 struct smc911x_local *lp = netdev_priv(dev);
234 unsigned int reg, timeout=0, resets=1;
237 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
239 /* Take out of PM setting first */
240 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
241 /* Write to the bytetest will take out of powerdown */
242 SMC_SET_BYTE_TEST(0);
246 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
247 } while (--timeout && !reg);
249 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
254 /* Disable all interrupts */
255 spin_lock_irqsave(&lp->lock, flags);
257 spin_unlock_irqrestore(&lp->lock, flags);
260 SMC_SET_HW_CFG(HW_CFG_SRST_);
264 reg = SMC_GET_HW_CFG();
265 /* If chip indicates reset timeout then try again */
266 if (reg & HW_CFG_SRST_TO_) {
267 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
271 } while (--timeout && (reg & HW_CFG_SRST_));
274 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
278 /* make sure EEPROM has finished loading before setting GPIO_CFG */
280 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
284 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
288 /* Initialize interrupts */
292 /* Reset the FIFO level and flow control settings */
293 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
294 //TODO: Figure out what appropriate pause time is
295 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
296 SMC_SET_AFC_CFG(lp->afc_cfg);
299 /* Set to LED outputs */
300 SMC_SET_GPIO_CFG(0x70070000);
303 * Deassert IRQ for 1*10us for edge type interrupts
304 * and drive IRQ pin push-pull
306 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
308 /* clear anything saved */
309 if (lp->pending_tx_skb != NULL) {
310 dev_kfree_skb (lp->pending_tx_skb);
311 lp->pending_tx_skb = NULL;
312 dev->stats.tx_errors++;
313 dev->stats.tx_aborted_errors++;
318 * Enable Interrupts, Receive, and Transmit
320 static void smc911x_enable(struct net_device *dev)
322 unsigned long ioaddr = dev->base_addr;
323 struct smc911x_local *lp = netdev_priv(dev);
324 unsigned mask, cfg, cr;
327 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
329 SMC_SET_MAC_ADDR(dev->dev_addr);
332 cfg = SMC_GET_HW_CFG();
333 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
336 SMC_SET_FIFO_TDA(0xFF);
337 /* Update TX stats on every 64 packets received or every 1 sec */
338 SMC_SET_FIFO_TSL(64);
339 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
341 spin_lock_irqsave(&lp->lock, flags);
343 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
345 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
346 spin_unlock_irqrestore(&lp->lock, flags);
348 /* Add 2 byte padding to start of packets */
349 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
351 /* Turn on receiver and enable RX */
352 if (cr & MAC_CR_RXEN_)
353 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
355 spin_lock_irqsave(&lp->lock, flags);
356 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
357 spin_unlock_irqrestore(&lp->lock, flags);
359 /* Interrupt on every received packet */
360 SMC_SET_FIFO_RSA(0x01);
361 SMC_SET_FIFO_RSL(0x00);
363 /* now, enable interrupts */
364 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
365 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
367 if (IS_REV_A(lp->revision))
368 mask|=INT_EN_RDFL_EN_;
370 mask|=INT_EN_RDFO_EN_;
372 SMC_ENABLE_INT(mask);
376 * this puts the device in an inactive state
378 static void smc911x_shutdown(struct net_device *dev)
380 unsigned long ioaddr = dev->base_addr;
381 struct smc911x_local *lp = netdev_priv(dev);
385 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
390 /* Turn of Rx and TX */
391 spin_lock_irqsave(&lp->lock, flags);
393 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
395 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
396 spin_unlock_irqrestore(&lp->lock, flags);
399 static inline void smc911x_drop_pkt(struct net_device *dev)
401 unsigned long ioaddr = dev->base_addr;
402 unsigned int fifo_count, timeout, reg;
404 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
405 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
406 if (fifo_count <= 4) {
407 /* Manually dump the packet data */
411 /* Fast forward through the bad packet */
412 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
416 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
417 } while (--timeout && reg);
419 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
425 * This is the procedure to handle the receipt of a packet.
426 * It should be called after checking for packet presence in
427 * the RX status FIFO. It must be called with the spin lock
430 static inline void smc911x_rcv(struct net_device *dev)
432 unsigned long ioaddr = dev->base_addr;
433 unsigned int pkt_len, status;
437 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
438 dev->name, __FUNCTION__);
439 status = SMC_GET_RX_STS_FIFO();
440 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
441 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
442 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
443 if (status & RX_STS_ES_) {
444 /* Deal with a bad packet */
445 dev->stats.rx_errors++;
446 if (status & RX_STS_CRC_ERR_)
447 dev->stats.rx_crc_errors++;
449 if (status & RX_STS_LEN_ERR_)
450 dev->stats.rx_length_errors++;
451 if (status & RX_STS_MCAST_)
452 dev->stats.multicast++;
454 /* Remove the bad packet data from the RX FIFO */
455 smc911x_drop_pkt(dev);
457 /* Receive a valid packet */
458 /* Alloc a buffer with extra room for DMA alignment */
459 skb=dev_alloc_skb(pkt_len+32);
460 if (unlikely(skb == NULL)) {
461 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
463 dev->stats.rx_dropped++;
464 smc911x_drop_pkt(dev);
467 /* Align IP header to 32 bits
468 * Note that the device is configured to add a 2
469 * byte padding to the packet start, so we really
470 * want to write to the orignal data pointer */
473 skb_put(skb,pkt_len-4);
476 struct smc911x_local *lp = netdev_priv(dev);
478 /* Lower the FIFO threshold if possible */
479 fifo = SMC_GET_FIFO_INT();
480 if (fifo & 0xFF) fifo--;
481 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
482 dev->name, fifo & 0xff);
483 SMC_SET_FIFO_INT(fifo);
485 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
486 lp->rxdma_active = 1;
487 lp->current_rx_skb = skb;
488 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
489 /* Packet processing deferred to DMA RX interrupt */
492 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
493 SMC_PULL_DATA(data, pkt_len+2+3);
495 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
496 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
497 dev->last_rx = jiffies;
498 skb->protocol = eth_type_trans(skb, dev);
500 dev->stats.rx_packets++;
501 dev->stats.rx_bytes += pkt_len-4;
507 * This is called to actually send a packet to the chip.
509 static void smc911x_hardware_send_pkt(struct net_device *dev)
511 struct smc911x_local *lp = netdev_priv(dev);
512 unsigned long ioaddr = dev->base_addr;
514 unsigned int cmdA, cmdB, len;
518 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
519 BUG_ON(lp->pending_tx_skb == NULL);
521 skb = lp->pending_tx_skb;
522 lp->pending_tx_skb = NULL;
524 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
525 /* cmdB {31:16] pkt tag [10:0] length */
527 /* 16 byte buffer alignment mode */
528 buf = (char*)((u32)(skb->data) & ~0xF);
529 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
530 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
531 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
534 buf = (char*)((u32)skb->data & ~0x3);
535 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
536 cmdA = (((u32)skb->data & 0x3) << 16) |
537 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
540 /* tag is packet length so we can use this in stats update later */
541 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
543 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
544 dev->name, len, len, buf, cmdA, cmdB);
545 SMC_SET_TX_FIFO(cmdA);
546 SMC_SET_TX_FIFO(cmdB);
548 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
549 PRINT_PKT(buf, len <= 64 ? len : 64);
551 /* Send pkt via PIO or DMA */
553 lp->current_tx_skb = skb;
554 SMC_PUSH_DATA(buf, len);
555 /* DMA complete IRQ will free buffer and set jiffies */
557 SMC_PUSH_DATA(buf, len);
558 dev->trans_start = jiffies;
561 spin_lock_irqsave(&lp->lock, flags);
562 if (!lp->tx_throttle) {
563 netif_wake_queue(dev);
565 spin_unlock_irqrestore(&lp->lock, flags);
566 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
570 * Since I am not sure if I will have enough room in the chip's ram
571 * to store the packet, I call this routine which either sends it
572 * now, or set the card to generates an interrupt when ready
575 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
577 struct smc911x_local *lp = netdev_priv(dev);
578 unsigned long ioaddr = dev->base_addr;
582 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
583 dev->name, __FUNCTION__);
585 BUG_ON(lp->pending_tx_skb != NULL);
587 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
588 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
590 /* Turn off the flow when running out of space in FIFO */
591 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
592 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
594 spin_lock_irqsave(&lp->lock, flags);
595 /* Reenable when at least 1 packet of size MTU present */
596 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
598 netif_stop_queue(dev);
599 spin_unlock_irqrestore(&lp->lock, flags);
602 /* Drop packets when we run out of space in TX FIFO
603 * Account for overhead required for:
605 * Tx command words 8 bytes
606 * Start offset 15 bytes
607 * End padding 15 bytes
609 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
610 printk("%s: No Tx free space %d < %d\n",
611 dev->name, free, skb->len);
612 lp->pending_tx_skb = NULL;
613 dev->stats.tx_errors++;
614 dev->stats.tx_dropped++;
621 /* If the DMA is already running then defer this packet Tx until
622 * the DMA IRQ starts it
624 spin_lock_irqsave(&lp->lock, flags);
625 if (lp->txdma_active) {
626 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
627 lp->pending_tx_skb = skb;
628 netif_stop_queue(dev);
629 spin_unlock_irqrestore(&lp->lock, flags);
632 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
633 lp->txdma_active = 1;
635 spin_unlock_irqrestore(&lp->lock, flags);
638 lp->pending_tx_skb = skb;
639 smc911x_hardware_send_pkt(dev);
645 * This handles a TX status interrupt, which is only called when:
646 * - a TX error occurred, or
647 * - TX of a packet completed.
649 static void smc911x_tx(struct net_device *dev)
651 unsigned long ioaddr = dev->base_addr;
652 struct smc911x_local *lp = netdev_priv(dev);
653 unsigned int tx_status;
655 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
656 dev->name, __FUNCTION__);
658 /* Collect the TX status */
659 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
660 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
662 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
663 tx_status = SMC_GET_TX_STS_FIFO();
664 dev->stats.tx_packets++;
665 dev->stats.tx_bytes+=tx_status>>16;
666 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
667 dev->name, (tx_status & 0xffff0000) >> 16,
668 tx_status & 0x0000ffff);
669 /* count Tx errors, but ignore lost carrier errors when in
670 * full-duplex mode */
671 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
672 !(tx_status & 0x00000306))) {
673 dev->stats.tx_errors++;
675 if (tx_status & TX_STS_MANY_COLL_) {
676 dev->stats.collisions+=16;
677 dev->stats.tx_aborted_errors++;
679 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
681 /* carrier error only has meaning for half-duplex communication */
682 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
684 dev->stats.tx_carrier_errors++;
686 if (tx_status & TX_STS_LATE_COLL_) {
687 dev->stats.collisions++;
688 dev->stats.tx_aborted_errors++;
694 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
696 * Reads a register from the MII Management serial interface
699 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
701 unsigned long ioaddr = dev->base_addr;
702 unsigned int phydata;
704 SMC_GET_MII(phyreg, phyaddr, phydata);
706 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
707 __FUNCTION__, phyaddr, phyreg, phydata);
713 * Writes a register to the MII Management serial interface
715 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
718 unsigned long ioaddr = dev->base_addr;
720 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
721 __FUNCTION__, phyaddr, phyreg, phydata);
723 SMC_SET_MII(phyreg, phyaddr, phydata);
727 * Finds and reports the PHY address (115 and 117 have external
728 * PHY interface 118 has internal only
730 static void smc911x_phy_detect(struct net_device *dev)
732 unsigned long ioaddr = dev->base_addr;
733 struct smc911x_local *lp = netdev_priv(dev);
735 unsigned int cfg, id1, id2;
737 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
742 * Scan all 32 PHY addresses if necessary, starting at
743 * PHY#1 to PHY#31, and then PHY#0 last.
745 switch(lp->version) {
748 cfg = SMC_GET_HW_CFG();
749 if (cfg & HW_CFG_EXT_PHY_DET_) {
750 cfg &= ~HW_CFG_PHY_CLK_SEL_;
751 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
753 udelay(10); /* Wait for clocks to stop */
755 cfg |= HW_CFG_EXT_PHY_EN_;
757 udelay(10); /* Wait for clocks to stop */
759 cfg &= ~HW_CFG_PHY_CLK_SEL_;
760 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
762 udelay(10); /* Wait for clocks to stop */
764 cfg |= HW_CFG_SMI_SEL_;
767 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
769 /* Read the PHY identifiers */
770 SMC_GET_PHY_ID1(phyaddr & 31, id1);
771 SMC_GET_PHY_ID2(phyaddr & 31, id2);
773 /* Make sure it is a valid identifier */
774 if (id1 != 0x0000 && id1 != 0xffff &&
775 id1 != 0x8000 && id2 != 0x0000 &&
776 id2 != 0xffff && id2 != 0x8000) {
777 /* Save the PHY's address */
778 lp->mii.phy_id = phyaddr & 31;
779 lp->phy_type = id1 << 16 | id2;
785 /* Internal media only */
786 SMC_GET_PHY_ID1(1, id1);
787 SMC_GET_PHY_ID2(1, id2);
788 /* Save the PHY's address */
790 lp->phy_type = id1 << 16 | id2;
793 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
794 dev->name, id1, id2, lp->mii.phy_id);
798 * Sets the PHY to a configuration as determined by the user.
799 * Called with spin_lock held.
801 static int smc911x_phy_fixed(struct net_device *dev)
803 struct smc911x_local *lp = netdev_priv(dev);
804 unsigned long ioaddr = dev->base_addr;
805 int phyaddr = lp->mii.phy_id;
808 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
810 /* Enter Link Disable state */
811 SMC_GET_PHY_BMCR(phyaddr, bmcr);
813 SMC_SET_PHY_BMCR(phyaddr, bmcr);
816 * Set our fixed capabilities
817 * Disable auto-negotiation
819 bmcr &= ~BMCR_ANENABLE;
821 bmcr |= BMCR_FULLDPLX;
823 if (lp->ctl_rspeed == 100)
824 bmcr |= BMCR_SPEED100;
826 /* Write our capabilities to the phy control register */
827 SMC_SET_PHY_BMCR(phyaddr, bmcr);
829 /* Re-Configure the Receive/Phy Control register */
831 SMC_SET_PHY_BMCR(phyaddr, bmcr);
837 * smc911x_phy_reset - reset the phy
841 * Issue a software reset for the specified PHY and
842 * wait up to 100ms for the reset to complete. We should
843 * not access the PHY for 50ms after issuing the reset.
845 * The time to wait appears to be dependent on the PHY.
848 static int smc911x_phy_reset(struct net_device *dev, int phy)
850 struct smc911x_local *lp = netdev_priv(dev);
851 unsigned long ioaddr = dev->base_addr;
856 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
858 spin_lock_irqsave(&lp->lock, flags);
859 reg = SMC_GET_PMT_CTRL();
861 reg |= PMT_CTRL_PHY_RST_;
862 SMC_SET_PMT_CTRL(reg);
863 spin_unlock_irqrestore(&lp->lock, flags);
864 for (timeout = 2; timeout; timeout--) {
866 spin_lock_irqsave(&lp->lock, flags);
867 reg = SMC_GET_PMT_CTRL();
868 spin_unlock_irqrestore(&lp->lock, flags);
869 if (!(reg & PMT_CTRL_PHY_RST_)) {
870 /* extra delay required because the phy may
871 * not be completed with its reset
872 * when PHY_BCR_RESET_ is cleared. 256us
873 * should suffice, but use 500us to be safe
880 return reg & PMT_CTRL_PHY_RST_;
884 * smc911x_phy_powerdown - powerdown phy
888 * Power down the specified PHY
890 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
892 unsigned long ioaddr = dev->base_addr;
895 /* Enter Link Disable state */
896 SMC_GET_PHY_BMCR(phy, bmcr);
898 SMC_SET_PHY_BMCR(phy, bmcr);
902 * smc911x_phy_check_media - check the media status and adjust BMCR
904 * @init: set true for initialisation
906 * Select duplex mode depending on negotiation state. This
907 * also updates our carrier state.
909 static void smc911x_phy_check_media(struct net_device *dev, int init)
911 struct smc911x_local *lp = netdev_priv(dev);
912 unsigned long ioaddr = dev->base_addr;
913 int phyaddr = lp->mii.phy_id;
914 unsigned int bmcr, cr;
916 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
918 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
919 /* duplex state has changed */
920 SMC_GET_PHY_BMCR(phyaddr, bmcr);
922 if (lp->mii.full_duplex) {
923 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
924 bmcr |= BMCR_FULLDPLX;
925 cr |= MAC_CR_RCVOWN_;
927 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
928 bmcr &= ~BMCR_FULLDPLX;
929 cr &= ~MAC_CR_RCVOWN_;
931 SMC_SET_PHY_BMCR(phyaddr, bmcr);
937 * Configures the specified PHY through the MII management interface
938 * using Autonegotiation.
939 * Calls smc911x_phy_fixed() if the user has requested a certain config.
940 * If RPC ANEG bit is set, the media selection is dependent purely on
941 * the selection by the MII (either in the MII BMCR reg or the result
942 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
943 * is controlled by the RPC SPEED and RPC DPLX bits.
945 static void smc911x_phy_configure(struct work_struct *work)
947 struct smc911x_local *lp = container_of(work, struct smc911x_local,
949 struct net_device *dev = lp->netdev;
950 unsigned long ioaddr = dev->base_addr;
951 int phyaddr = lp->mii.phy_id;
952 int my_phy_caps; /* My PHY capabilities */
953 int my_ad_caps; /* My Advertised capabilities */
957 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
960 * We should not be called if phy_type is zero.
962 if (lp->phy_type == 0)
963 goto smc911x_phy_configure_exit_nolock;
965 if (smc911x_phy_reset(dev, phyaddr)) {
966 printk("%s: PHY reset timed out\n", dev->name);
967 goto smc911x_phy_configure_exit_nolock;
969 spin_lock_irqsave(&lp->lock, flags);
972 * Enable PHY Interrupts (for register 18)
973 * Interrupts listed here are enabled
975 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
976 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
977 PHY_INT_MASK_LINK_DOWN_);
979 /* If the user requested no auto neg, then go set his request */
980 if (lp->mii.force_media) {
981 smc911x_phy_fixed(dev);
982 goto smc911x_phy_configure_exit;
985 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
986 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
987 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
988 printk(KERN_INFO "Auto negotiation NOT supported\n");
989 smc911x_phy_fixed(dev);
990 goto smc911x_phy_configure_exit;
993 /* CSMA capable w/ both pauses */
994 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
996 if (my_phy_caps & BMSR_100BASE4)
997 my_ad_caps |= ADVERTISE_100BASE4;
998 if (my_phy_caps & BMSR_100FULL)
999 my_ad_caps |= ADVERTISE_100FULL;
1000 if (my_phy_caps & BMSR_100HALF)
1001 my_ad_caps |= ADVERTISE_100HALF;
1002 if (my_phy_caps & BMSR_10FULL)
1003 my_ad_caps |= ADVERTISE_10FULL;
1004 if (my_phy_caps & BMSR_10HALF)
1005 my_ad_caps |= ADVERTISE_10HALF;
1007 /* Disable capabilities not selected by our user */
1008 if (lp->ctl_rspeed != 100)
1009 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1011 if (!lp->ctl_rfduplx)
1012 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1014 /* Update our Auto-Neg Advertisement Register */
1015 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1016 lp->mii.advertising = my_ad_caps;
1019 * Read the register back. Without this, it appears that when
1020 * auto-negotiation is restarted, sometimes it isn't ready and
1021 * the link does not come up.
1024 SMC_GET_PHY_MII_ADV(phyaddr, status);
1026 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1027 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1029 /* Restart auto-negotiation process in order to advertise my caps */
1030 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1032 smc911x_phy_check_media(dev, 1);
1034 smc911x_phy_configure_exit:
1035 spin_unlock_irqrestore(&lp->lock, flags);
1036 smc911x_phy_configure_exit_nolock:
1037 lp->work_pending = 0;
1041 * smc911x_phy_interrupt
1043 * Purpose: Handle interrupts relating to PHY register 18. This is
1044 * called from the "hard" interrupt handler under our private spinlock.
1046 static void smc911x_phy_interrupt(struct net_device *dev)
1048 struct smc911x_local *lp = netdev_priv(dev);
1049 unsigned long ioaddr = dev->base_addr;
1050 int phyaddr = lp->mii.phy_id;
1053 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1055 if (lp->phy_type == 0)
1058 smc911x_phy_check_media(dev, 0);
1059 /* read to clear status bits */
1060 SMC_GET_PHY_INT_SRC(phyaddr,status);
1061 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
1062 dev->name, status & 0xffff);
1063 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
1064 dev->name, SMC_GET_AFC_CFG());
1067 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1070 * This is the main routine of the driver, to handle the device when
1071 * it needs some attention.
1073 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1075 struct net_device *dev = dev_id;
1076 unsigned long ioaddr = dev->base_addr;
1077 struct smc911x_local *lp = netdev_priv(dev);
1078 unsigned int status, mask, timeout;
1079 unsigned int rx_overrun=0, cr, pkts;
1080 unsigned long flags;
1082 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1084 spin_lock_irqsave(&lp->lock, flags);
1086 /* Spurious interrupt check */
1087 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1088 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1089 spin_unlock_irqrestore(&lp->lock, flags);
1093 mask = SMC_GET_INT_EN();
1096 /* set a timeout value, so I don't stay here forever */
1101 status = SMC_GET_INT();
1103 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1104 dev->name, status, mask, status & ~mask);
1110 /* Handle SW interrupt condition */
1111 if (status & INT_STS_SW_INT_) {
1112 SMC_ACK_INT(INT_STS_SW_INT_);
1113 mask &= ~INT_EN_SW_INT_EN_;
1115 /* Handle various error conditions */
1116 if (status & INT_STS_RXE_) {
1117 SMC_ACK_INT(INT_STS_RXE_);
1118 dev->stats.rx_errors++;
1120 if (status & INT_STS_RXDFH_INT_) {
1121 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1122 dev->stats.rx_dropped+=SMC_GET_RX_DROP();
1124 /* Undocumented interrupt-what is the right thing to do here? */
1125 if (status & INT_STS_RXDF_INT_) {
1126 SMC_ACK_INT(INT_STS_RXDF_INT_);
1129 /* Rx Data FIFO exceeds set level */
1130 if (status & INT_STS_RDFL_) {
1131 if (IS_REV_A(lp->revision)) {
1134 cr &= ~MAC_CR_RXEN_;
1136 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1137 dev->stats.rx_errors++;
1138 dev->stats.rx_fifo_errors++;
1140 SMC_ACK_INT(INT_STS_RDFL_);
1142 if (status & INT_STS_RDFO_) {
1143 if (!IS_REV_A(lp->revision)) {
1145 cr &= ~MAC_CR_RXEN_;
1148 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1149 dev->stats.rx_errors++;
1150 dev->stats.rx_fifo_errors++;
1152 SMC_ACK_INT(INT_STS_RDFO_);
1154 /* Handle receive condition */
1155 if ((status & INT_STS_RSFL_) || rx_overrun) {
1157 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1158 fifo = SMC_GET_RX_FIFO_INF();
1159 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1160 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1161 dev->name, pkts, fifo & 0xFFFF );
1165 if (lp->rxdma_active){
1166 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1167 "%s: RX DMA active\n", dev->name);
1168 /* The DMA is already running so up the IRQ threshold */
1169 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1170 fifo |= pkts & 0xFF;
1172 "%s: Setting RX stat FIFO threshold to %d\n",
1173 dev->name, fifo & 0xff);
1174 SMC_SET_FIFO_INT(fifo);
1179 SMC_ACK_INT(INT_STS_RSFL_);
1181 /* Handle transmit FIFO available */
1182 if (status & INT_STS_TDFA_) {
1183 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1184 SMC_SET_FIFO_TDA(0xFF);
1185 lp->tx_throttle = 0;
1187 if (!lp->txdma_active)
1189 netif_wake_queue(dev);
1190 SMC_ACK_INT(INT_STS_TDFA_);
1192 /* Handle transmit done condition */
1194 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1195 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1196 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1197 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1199 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1200 SMC_ACK_INT(INT_STS_TSFL_);
1201 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1204 if (status & INT_STS_TSFL_) {
1205 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1207 SMC_ACK_INT(INT_STS_TSFL_);
1210 if (status & INT_STS_GPT_INT_) {
1211 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1216 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1217 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1219 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1220 SMC_GET_RX_FIFO_INF() & 0xffff,
1221 SMC_GET_RX_STS_FIFO_PEEK());
1222 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1223 SMC_ACK_INT(INT_STS_GPT_INT_);
1227 /* Handle PHY interrupt condition */
1228 if (status & INT_STS_PHY_INT_) {
1229 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1230 smc911x_phy_interrupt(dev);
1231 SMC_ACK_INT(INT_STS_PHY_INT_);
1233 } while (--timeout);
1235 /* restore mask state */
1236 SMC_SET_INT_EN(mask);
1238 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1239 dev->name, 8-timeout);
1241 spin_unlock_irqrestore(&lp->lock, flags);
1243 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1250 smc911x_tx_dma_irq(int dma, void *data)
1252 struct net_device *dev = (struct net_device *)data;
1253 struct smc911x_local *lp = netdev_priv(dev);
1254 struct sk_buff *skb = lp->current_tx_skb;
1255 unsigned long flags;
1257 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1259 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1260 /* Clear the DMA interrupt sources */
1261 SMC_DMA_ACK_IRQ(dev, dma);
1262 BUG_ON(skb == NULL);
1263 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1264 dev->trans_start = jiffies;
1265 dev_kfree_skb_irq(skb);
1266 lp->current_tx_skb = NULL;
1267 if (lp->pending_tx_skb != NULL)
1268 smc911x_hardware_send_pkt(dev);
1270 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1271 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1272 spin_lock_irqsave(&lp->lock, flags);
1273 lp->txdma_active = 0;
1274 if (!lp->tx_throttle) {
1275 netif_wake_queue(dev);
1277 spin_unlock_irqrestore(&lp->lock, flags);
1280 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1281 "%s: TX DMA irq completed\n", dev->name);
1284 smc911x_rx_dma_irq(int dma, void *data)
1286 struct net_device *dev = (struct net_device *)data;
1287 unsigned long ioaddr = dev->base_addr;
1288 struct smc911x_local *lp = netdev_priv(dev);
1289 struct sk_buff *skb = lp->current_rx_skb;
1290 unsigned long flags;
1293 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1294 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1295 /* Clear the DMA interrupt sources */
1296 SMC_DMA_ACK_IRQ(dev, dma);
1297 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1298 BUG_ON(skb == NULL);
1299 lp->current_rx_skb = NULL;
1300 PRINT_PKT(skb->data, skb->len);
1301 dev->last_rx = jiffies;
1302 skb->protocol = eth_type_trans(skb, dev);
1303 dev->stats.rx_packets++;
1304 dev->stats.rx_bytes += skb->len;
1307 spin_lock_irqsave(&lp->lock, flags);
1308 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
1312 lp->rxdma_active = 0;
1314 spin_unlock_irqrestore(&lp->lock, flags);
1315 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1316 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1319 #endif /* SMC_USE_DMA */
1321 #ifdef CONFIG_NET_POLL_CONTROLLER
1323 * Polling receive - used by netconsole and other diagnostic tools
1324 * to allow network i/o with interrupts disabled.
1326 static void smc911x_poll_controller(struct net_device *dev)
1328 disable_irq(dev->irq);
1329 smc911x_interrupt(dev->irq, dev);
1330 enable_irq(dev->irq);
1334 /* Our watchdog timed out. Called by the networking layer */
1335 static void smc911x_timeout(struct net_device *dev)
1337 struct smc911x_local *lp = netdev_priv(dev);
1338 unsigned long ioaddr = dev->base_addr;
1340 unsigned long flags;
1342 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1344 spin_lock_irqsave(&lp->lock, flags);
1345 status = SMC_GET_INT();
1346 mask = SMC_GET_INT_EN();
1347 spin_unlock_irqrestore(&lp->lock, flags);
1348 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1349 dev->name, status, mask);
1351 /* Dump the current TX FIFO contents and restart */
1352 mask = SMC_GET_TX_CFG();
1353 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1355 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1356 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1357 * which calls schedule(). Hence we use a work queue.
1359 if (lp->phy_type != 0) {
1360 if (schedule_work(&lp->phy_configure)) {
1361 lp->work_pending = 1;
1365 /* We can accept TX packets again */
1366 dev->trans_start = jiffies;
1367 netif_wake_queue(dev);
1371 * This routine will, depending on the values passed to it,
1372 * either make it accept multicast packets, go into
1373 * promiscuous mode (for TCPDUMP and cousins) or accept
1374 * a select set of multicast packets
1376 static void smc911x_set_multicast_list(struct net_device *dev)
1378 struct smc911x_local *lp = netdev_priv(dev);
1379 unsigned long ioaddr = dev->base_addr;
1380 unsigned int multicast_table[2];
1381 unsigned int mcr, update_multicast = 0;
1382 unsigned long flags;
1384 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1386 spin_lock_irqsave(&lp->lock, flags);
1387 SMC_GET_MAC_CR(mcr);
1388 spin_unlock_irqrestore(&lp->lock, flags);
1390 if (dev->flags & IFF_PROMISC) {
1392 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1393 mcr |= MAC_CR_PRMS_;
1396 * Here, I am setting this to accept all multicast packets.
1397 * I don't need to zero the multicast table, because the flag is
1398 * checked before the table is
1400 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1401 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1402 mcr |= MAC_CR_MCPAS_;
1406 * This sets the internal hardware table to filter out unwanted
1407 * multicast packets before they take up memory.
1409 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1410 * address are the offset into the table. If that bit is 1, then the
1411 * multicast packet is accepted. Otherwise, it's dropped silently.
1413 * To use the 6 bits as an offset into the table, the high 1 bit is
1414 * the number of the 32 bit register, while the low 5 bits are the bit
1415 * within that register.
1417 else if (dev->mc_count) {
1419 struct dev_mc_list *cur_addr;
1421 /* Set the Hash perfec mode */
1422 mcr |= MAC_CR_HPFILT_;
1424 /* start with a table of all zeros: reject all */
1425 memset(multicast_table, 0, sizeof(multicast_table));
1427 cur_addr = dev->mc_list;
1428 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1431 /* do we have a pointer here? */
1434 /* make sure this is a multicast address -
1435 shouldn't this be a given if we have it here ? */
1436 if (!(*cur_addr->dmi_addr & 1))
1439 /* upper 6 bits are used as hash index */
1440 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
1442 multicast_table[position>>5] |= 1 << (position&0x1f);
1445 /* be sure I get rid of flags I might have set */
1446 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1448 /* now, the table can be loaded into the chipset */
1449 update_multicast = 1;
1451 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1453 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1456 * since I'm disabling all multicast entirely, I need to
1457 * clear the multicast list
1459 memset(multicast_table, 0, sizeof(multicast_table));
1460 update_multicast = 1;
1463 spin_lock_irqsave(&lp->lock, flags);
1464 SMC_SET_MAC_CR(mcr);
1465 if (update_multicast) {
1467 "%s: update mcast hash table 0x%08x 0x%08x\n",
1468 dev->name, multicast_table[0], multicast_table[1]);
1469 SMC_SET_HASHL(multicast_table[0]);
1470 SMC_SET_HASHH(multicast_table[1]);
1472 spin_unlock_irqrestore(&lp->lock, flags);
1477 * Open and Initialize the board
1479 * Set up everything, reset the card, etc..
1482 smc911x_open(struct net_device *dev)
1484 struct smc911x_local *lp = netdev_priv(dev);
1486 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1489 * Check that the address is valid. If its not, refuse
1490 * to bring the device up. The user must specify an
1491 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1493 if (!is_valid_ether_addr(dev->dev_addr)) {
1494 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1498 /* reset the hardware */
1501 /* Configure the PHY, initialize the link state */
1502 smc911x_phy_configure(&lp->phy_configure);
1504 /* Turn on Tx + Rx */
1505 smc911x_enable(dev);
1507 netif_start_queue(dev);
1515 * this makes the board clean up everything that it can
1516 * and not talk to the outside world. Caused by
1517 * an 'ifconfig ethX down'
1519 static int smc911x_close(struct net_device *dev)
1521 struct smc911x_local *lp = netdev_priv(dev);
1523 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1525 netif_stop_queue(dev);
1526 netif_carrier_off(dev);
1528 /* clear everything */
1529 smc911x_shutdown(dev);
1531 if (lp->phy_type != 0) {
1532 /* We need to ensure that no calls to
1533 * smc911x_phy_configure are pending.
1535 * flush_scheduled_work() cannot be called because we
1536 * are running with the netlink semaphore held (from
1537 * devinet_ioctl()) and the pending work queue
1538 * contains linkwatch_event() (scheduled by
1539 * netif_carrier_off() above). linkwatch_event() also
1540 * wants the netlink semaphore.
1542 while (lp->work_pending)
1544 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1547 if (lp->pending_tx_skb) {
1548 dev_kfree_skb(lp->pending_tx_skb);
1549 lp->pending_tx_skb = NULL;
1559 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1561 struct smc911x_local *lp = netdev_priv(dev);
1562 unsigned long ioaddr = dev->base_addr;
1564 unsigned long flags;
1566 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1570 if (lp->phy_type != 0) {
1571 spin_lock_irqsave(&lp->lock, flags);
1572 ret = mii_ethtool_gset(&lp->mii, cmd);
1573 spin_unlock_irqrestore(&lp->lock, flags);
1575 cmd->supported = SUPPORTED_10baseT_Half |
1576 SUPPORTED_10baseT_Full |
1577 SUPPORTED_TP | SUPPORTED_AUI;
1579 if (lp->ctl_rspeed == 10)
1580 cmd->speed = SPEED_10;
1581 else if (lp->ctl_rspeed == 100)
1582 cmd->speed = SPEED_100;
1584 cmd->autoneg = AUTONEG_DISABLE;
1585 if (lp->mii.phy_id==1)
1586 cmd->transceiver = XCVR_INTERNAL;
1588 cmd->transceiver = XCVR_EXTERNAL;
1590 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
1592 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1593 DUPLEX_FULL : DUPLEX_HALF;
1601 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1603 struct smc911x_local *lp = netdev_priv(dev);
1605 unsigned long flags;
1607 if (lp->phy_type != 0) {
1608 spin_lock_irqsave(&lp->lock, flags);
1609 ret = mii_ethtool_sset(&lp->mii, cmd);
1610 spin_unlock_irqrestore(&lp->lock, flags);
1612 if (cmd->autoneg != AUTONEG_DISABLE ||
1613 cmd->speed != SPEED_10 ||
1614 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1615 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1618 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1627 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1629 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1630 strncpy(info->version, version, sizeof(info->version));
1631 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1634 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1636 struct smc911x_local *lp = netdev_priv(dev);
1638 unsigned long flags;
1640 if (lp->phy_type != 0) {
1641 spin_lock_irqsave(&lp->lock, flags);
1642 ret = mii_nway_restart(&lp->mii);
1643 spin_unlock_irqrestore(&lp->lock, flags);
1649 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1651 struct smc911x_local *lp = netdev_priv(dev);
1652 return lp->msg_enable;
1655 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1657 struct smc911x_local *lp = netdev_priv(dev);
1658 lp->msg_enable = level;
1661 static int smc911x_ethtool_getregslen(struct net_device *dev)
1663 /* System regs + MAC regs + PHY regs */
1664 return (((E2P_CMD - ID_REV)/4 + 1) +
1665 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1668 static void smc911x_ethtool_getregs(struct net_device *dev,
1669 struct ethtool_regs* regs, void *buf)
1671 unsigned long ioaddr = dev->base_addr;
1672 struct smc911x_local *lp = netdev_priv(dev);
1673 unsigned long flags;
1675 u32 *data = (u32*)buf;
1677 regs->version = lp->version;
1678 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1679 data[j++] = SMC_inl(ioaddr,i);
1681 for(i=MAC_CR;i<=WUCSR;i++) {
1682 spin_lock_irqsave(&lp->lock, flags);
1683 SMC_GET_MAC_CSR(i, reg);
1684 spin_unlock_irqrestore(&lp->lock, flags);
1687 for(i=0;i<=31;i++) {
1688 spin_lock_irqsave(&lp->lock, flags);
1689 SMC_GET_MII(i, lp->mii.phy_id, reg);
1690 spin_unlock_irqrestore(&lp->lock, flags);
1691 data[j++] = reg & 0xFFFF;
1695 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1697 unsigned long ioaddr = dev->base_addr;
1698 unsigned int timeout;
1701 e2p_cmd = SMC_GET_E2P_CMD();
1702 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1703 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1704 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1705 dev->name, __FUNCTION__);
1709 e2p_cmd = SMC_GET_E2P_CMD();
1712 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1713 dev->name, __FUNCTION__);
1719 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1722 unsigned long ioaddr = dev->base_addr;
1725 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1727 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1728 ((cmd) & (0x7<<28)) |
1733 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1736 unsigned long ioaddr = dev->base_addr;
1739 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1741 *data = SMC_GET_E2P_DATA();
1745 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1748 unsigned long ioaddr = dev->base_addr;
1751 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1753 SMC_SET_E2P_DATA(data);
1757 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1758 struct ethtool_eeprom *eeprom, u8 *data)
1760 u8 eebuf[SMC911X_EEPROM_LEN];
1763 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1764 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1766 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1769 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1773 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1774 struct ethtool_eeprom *eeprom, u8 *data)
1779 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1781 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1783 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1786 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1788 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1794 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1796 return SMC911X_EEPROM_LEN;
1799 static const struct ethtool_ops smc911x_ethtool_ops = {
1800 .get_settings = smc911x_ethtool_getsettings,
1801 .set_settings = smc911x_ethtool_setsettings,
1802 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1803 .get_msglevel = smc911x_ethtool_getmsglevel,
1804 .set_msglevel = smc911x_ethtool_setmsglevel,
1805 .nway_reset = smc911x_ethtool_nwayreset,
1806 .get_link = ethtool_op_get_link,
1807 .get_regs_len = smc911x_ethtool_getregslen,
1808 .get_regs = smc911x_ethtool_getregs,
1809 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1810 .get_eeprom = smc911x_ethtool_geteeprom,
1811 .set_eeprom = smc911x_ethtool_seteeprom,
1817 * This routine has a simple purpose -- make the SMC chip generate an
1818 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1820 static int __init smc911x_findirq(unsigned long ioaddr)
1823 unsigned long cookie;
1825 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1827 cookie = probe_irq_on();
1830 * Force a SW interrupt
1833 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1836 * Wait until positive that the interrupt has been generated
1841 int_status = SMC_GET_INT_EN();
1842 if (int_status & INT_EN_SW_INT_EN_)
1843 break; /* got the interrupt */
1844 } while (--timeout);
1847 * there is really nothing that I can do here if timeout fails,
1848 * as autoirq_report will return a 0 anyway, which is what I
1849 * want in this case. Plus, the clean up is needed in both
1853 /* and disable all interrupts again */
1856 /* and return what I found */
1857 return probe_irq_off(cookie);
1861 * Function: smc911x_probe(unsigned long ioaddr)
1864 * Tests to see if a given ioaddr points to an SMC911x chip.
1865 * Returns a 0 on success
1868 * (1) see if the endian word is OK
1869 * (1) see if I recognize the chip ID in the appropriate register
1871 * Here I do typical initialization tasks.
1873 * o Initialize the structure if needed
1874 * o print out my vanity message if not done so already
1875 * o print out what type of hardware is detected
1876 * o print out the ethernet address
1878 * o set up my private data
1879 * o configure the dev structure with my subroutines
1880 * o actually GRAB the irq.
1883 static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1885 struct smc911x_local *lp = netdev_priv(dev);
1887 unsigned int val, chip_id, revision;
1888 const char *version_string;
1890 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1892 /* First, see if the endian word is recognized */
1893 val = SMC_GET_BYTE_TEST();
1894 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1895 if (val != 0x87654321) {
1896 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1902 * check if the revision register is something that I
1903 * recognize. These might need to be added to later,
1904 * as future revisions could be added.
1906 chip_id = SMC_GET_PN();
1907 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1908 for(i=0;chip_ids[i].id != 0; i++) {
1909 if (chip_ids[i].id == chip_id) break;
1911 if (!chip_ids[i].id) {
1912 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1916 version_string = chip_ids[i].name;
1918 revision = SMC_GET_REV();
1919 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1921 /* At this point I'll assume that the chip is an SMC911x. */
1922 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1924 /* Validate the TX FIFO size requested */
1925 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1926 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1931 /* fill in some of the fields */
1932 dev->base_addr = ioaddr;
1933 lp->version = chip_ids[i].id;
1934 lp->revision = revision;
1935 lp->tx_fifo_kb = tx_fifo_kb;
1936 /* Reverse calculate the RX FIFO size from the TX */
1937 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1938 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1940 /* Set the automatic flow control values */
1941 switch(lp->tx_fifo_kb) {
1943 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1944 * AFC_LO is AFC_HI/2
1945 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1947 case 2:/* 13440 Rx Data Fifo Size */
1948 lp->afc_cfg=0x008C46AF;break;
1949 case 3:/* 12480 Rx Data Fifo Size */
1950 lp->afc_cfg=0x0082419F;break;
1951 case 4:/* 11520 Rx Data Fifo Size */
1952 lp->afc_cfg=0x00783C9F;break;
1953 case 5:/* 10560 Rx Data Fifo Size */
1954 lp->afc_cfg=0x006E374F;break;
1955 case 6:/* 9600 Rx Data Fifo Size */
1956 lp->afc_cfg=0x0064328F;break;
1957 case 7:/* 8640 Rx Data Fifo Size */
1958 lp->afc_cfg=0x005A2D7F;break;
1959 case 8:/* 7680 Rx Data Fifo Size */
1960 lp->afc_cfg=0x0050287F;break;
1961 case 9:/* 6720 Rx Data Fifo Size */
1962 lp->afc_cfg=0x0046236F;break;
1963 case 10:/* 5760 Rx Data Fifo Size */
1964 lp->afc_cfg=0x003C1E6F;break;
1965 case 11:/* 4800 Rx Data Fifo Size */
1966 lp->afc_cfg=0x0032195F;break;
1968 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1969 * AFC_LO is AFC_HI/2
1970 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1972 case 12:/* 3840 Rx Data Fifo Size */
1973 lp->afc_cfg=0x0024124F;break;
1974 case 13:/* 2880 Rx Data Fifo Size */
1975 lp->afc_cfg=0x0015073F;break;
1976 case 14:/* 1920 Rx Data Fifo Size */
1977 lp->afc_cfg=0x0006032F;break;
1979 PRINTK("%s: ERROR -- no AFC_CFG setting found",
1984 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1985 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1986 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1988 spin_lock_init(&lp->lock);
1990 /* Get the MAC address */
1991 SMC_GET_MAC_ADDR(dev->dev_addr);
1993 /* now, reset the chip, and put it into a known state */
1997 * If dev->irq is 0, then the device has to be banged on to see
2000 * Specifying an IRQ is done with the assumption that the user knows
2001 * what (s)he is doing. No checking is done!!!!
2008 dev->irq = smc911x_findirq(ioaddr);
2011 /* kick the card and try again */
2015 if (dev->irq == 0) {
2016 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2021 dev->irq = irq_canonicalize(dev->irq);
2023 /* Fill in the fields of the device structure with ethernet values. */
2026 dev->open = smc911x_open;
2027 dev->stop = smc911x_close;
2028 dev->hard_start_xmit = smc911x_hard_start_xmit;
2029 dev->tx_timeout = smc911x_timeout;
2030 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2031 dev->set_multicast_list = smc911x_set_multicast_list;
2032 dev->ethtool_ops = &smc911x_ethtool_ops;
2033 #ifdef CONFIG_NET_POLL_CONTROLLER
2034 dev->poll_controller = smc911x_poll_controller;
2037 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
2038 lp->mii.phy_id_mask = 0x1f;
2039 lp->mii.reg_num_mask = 0x1f;
2040 lp->mii.force_media = 0;
2041 lp->mii.full_duplex = 0;
2043 lp->mii.mdio_read = smc911x_phy_read;
2044 lp->mii.mdio_write = smc911x_phy_write;
2047 * Locate the phy, if any.
2049 smc911x_phy_detect(dev);
2051 /* Set default parameters */
2052 lp->msg_enable = NETIF_MSG_LINK;
2053 lp->ctl_rfduplx = 1;
2054 lp->ctl_rspeed = 100;
2057 retval = request_irq(dev->irq, &smc911x_interrupt,
2058 IRQF_SHARED | SMC_IRQ_SENSE, dev->name, dev);
2063 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2064 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2065 lp->rxdma_active = 0;
2066 lp->txdma_active = 0;
2067 dev->dma = lp->rxdma;
2070 retval = register_netdev(dev);
2072 /* now, print out the card info, in a short format.. */
2073 printk("%s: %s (rev %d) at %#lx IRQ %d",
2074 dev->name, version_string, lp->revision,
2075 dev->base_addr, dev->irq);
2078 if (lp->rxdma != -1)
2079 printk(" RXDMA %d ", lp->rxdma);
2081 if (lp->txdma != -1)
2082 printk("TXDMA %d", lp->txdma);
2085 if (!is_valid_ether_addr(dev->dev_addr)) {
2086 printk("%s: Invalid ethernet MAC address. Please "
2087 "set using ifconfig\n", dev->name);
2089 /* Print the Ethernet address */
2090 printk("%s: Ethernet addr: ", dev->name);
2091 for (i = 0; i < 5; i++)
2092 printk("%2.2x:", dev->dev_addr[i]);
2093 printk("%2.2x\n", dev->dev_addr[5]);
2096 if (lp->phy_type == 0) {
2097 PRINTK("%s: No PHY found\n", dev->name);
2098 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2099 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2101 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2108 if (lp->rxdma != -1) {
2109 SMC_DMA_FREE(dev, lp->rxdma);
2111 if (lp->txdma != -1) {
2112 SMC_DMA_FREE(dev, lp->txdma);
2120 * smc911x_init(void)
2123 * 0 --> there is a device
2124 * anything else, error
2126 static int smc911x_drv_probe(struct platform_device *pdev)
2128 struct net_device *ndev;
2129 struct resource *res;
2130 struct smc911x_local *lp;
2134 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2135 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2142 * Request the regions.
2144 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2149 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2151 printk("%s: could not allocate device.\n", CARDNAME);
2155 SET_NETDEV_DEV(ndev, &pdev->dev);
2157 ndev->dma = (unsigned char)-1;
2158 ndev->irq = platform_get_irq(pdev, 0);
2159 lp = netdev_priv(ndev);
2162 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2168 platform_set_drvdata(pdev, ndev);
2169 ret = smc911x_probe(ndev, (unsigned long)addr);
2171 platform_set_drvdata(pdev, NULL);
2176 release_mem_region(res->start, SMC911X_IO_EXTENT);
2178 printk("%s: not found (%d).\n", CARDNAME, ret);
2182 lp->physaddr = res->start;
2183 lp->dev = &pdev->dev;
2190 static int smc911x_drv_remove(struct platform_device *pdev)
2192 struct net_device *ndev = platform_get_drvdata(pdev);
2193 struct resource *res;
2195 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2196 platform_set_drvdata(pdev, NULL);
2198 unregister_netdev(ndev);
2200 free_irq(ndev->irq, ndev);
2204 struct smc911x_local *lp = netdev_priv(ndev);
2205 if (lp->rxdma != -1) {
2206 SMC_DMA_FREE(dev, lp->rxdma);
2208 if (lp->txdma != -1) {
2209 SMC_DMA_FREE(dev, lp->txdma);
2213 iounmap((void *)ndev->base_addr);
2214 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2215 release_mem_region(res->start, SMC911X_IO_EXTENT);
2221 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2223 struct net_device *ndev = platform_get_drvdata(dev);
2224 unsigned long ioaddr = ndev->base_addr;
2226 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2228 if (netif_running(ndev)) {
2229 netif_device_detach(ndev);
2230 smc911x_shutdown(ndev);
2232 /* Set D2 - Energy detect only setting */
2233 SMC_SET_PMT_CTRL(2<<12);
2240 static int smc911x_drv_resume(struct platform_device *dev)
2242 struct net_device *ndev = platform_get_drvdata(dev);
2244 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2246 struct smc911x_local *lp = netdev_priv(ndev);
2248 if (netif_running(ndev)) {
2249 smc911x_reset(ndev);
2250 smc911x_enable(ndev);
2251 if (lp->phy_type != 0)
2252 smc911x_phy_configure(&lp->phy_configure);
2253 netif_device_attach(ndev);
2259 static struct platform_driver smc911x_driver = {
2260 .probe = smc911x_drv_probe,
2261 .remove = smc911x_drv_remove,
2262 .suspend = smc911x_drv_suspend,
2263 .resume = smc911x_drv_resume,
2266 .owner = THIS_MODULE,
2270 static int __init smc911x_init(void)
2272 return platform_driver_register(&smc911x_driver);
2275 static void __exit smc911x_cleanup(void)
2277 platform_driver_unregister(&smc911x_driver);
2280 module_init(smc911x_init);
2281 module_exit(smc911x_cleanup);