2 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
5 * This driver is a port from stlc45xx:
6 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
34 #include "p54spi_eeprom.h"
37 #include "p54common.h"
39 MODULE_FIRMWARE("3826.arm");
40 MODULE_ALIAS("stlc45xx");
43 * gpios should be handled in board files and provided via platform data,
44 * but because it's currently impossible for p54spi to have a header file
45 * in include/linux, let's use module paramaters for now
48 static int p54spi_gpio_power = 97;
49 module_param(p54spi_gpio_power, int, 0444);
50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
52 static int p54spi_gpio_irq = 87;
53 module_param(p54spi_gpio_irq, int, 0444);
54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
57 void *buf, size_t len)
59 struct spi_transfer t[2];
63 /* We first push the address */
64 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
67 memset(t, 0, sizeof(t));
70 t[0].len = sizeof(addr);
71 spi_message_add_tail(&t[0], &m);
75 spi_message_add_tail(&t[1], &m);
77 spi_sync(priv->spi, &m);
81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
82 const void *buf, size_t len)
84 struct spi_transfer t[3];
88 /* We first push the address */
89 addr = cpu_to_le16(address << 8);
92 memset(t, 0, sizeof(t));
95 t[0].len = sizeof(addr);
96 spi_message_add_tail(&t[0], &m);
100 spi_message_add_tail(&t[1], &m);
104 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
106 t[2].tx_buf = &last_word;
107 t[2].len = sizeof(last_word);
108 spi_message_add_tail(&t[2], &m);
111 spi_sync(priv->spi, &m);
114 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
118 p54spi_spi_read(priv, addr, &val, sizeof(val));
120 return le16_to_cpu(val);
123 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
127 p54spi_spi_read(priv, addr, &val, sizeof(val));
129 return le32_to_cpu(val);
132 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
134 p54spi_spi_write(priv, addr, &val, sizeof(val));
137 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
139 p54spi_spi_write(priv, addr, &val, sizeof(val));
142 struct p54spi_spi_reg {
143 u16 address; /* __le16 ? */
148 static const struct p54spi_spi_reg p54spi_registers_array[] =
150 { SPI_ADRS_ARM_INTERRUPTS, 32, "ARM_INT " },
151 { SPI_ADRS_ARM_INT_EN, 32, "ARM_INT_ENA " },
152 { SPI_ADRS_HOST_INTERRUPTS, 32, "HOST_INT " },
153 { SPI_ADRS_HOST_INT_EN, 32, "HOST_INT_ENA" },
154 { SPI_ADRS_HOST_INT_ACK, 32, "HOST_INT_ACK" },
155 { SPI_ADRS_GEN_PURP_1, 32, "GP1_COMM " },
156 { SPI_ADRS_GEN_PURP_2, 32, "GP2_COMM " },
157 { SPI_ADRS_DEV_CTRL_STAT, 32, "DEV_CTRL_STA" },
158 { SPI_ADRS_DMA_DATA, 16, "DMA_DATA " },
159 { SPI_ADRS_DMA_WRITE_CTRL, 16, "DMA_WR_CTRL " },
160 { SPI_ADRS_DMA_WRITE_LEN, 16, "DMA_WR_LEN " },
161 { SPI_ADRS_DMA_WRITE_BASE, 32, "DMA_WR_BASE " },
162 { SPI_ADRS_DMA_READ_CTRL, 16, "DMA_RD_CTRL " },
163 { SPI_ADRS_DMA_READ_LEN, 16, "DMA_RD_LEN " },
164 { SPI_ADRS_DMA_WRITE_BASE, 32, "DMA_RD_BASE " }
167 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
171 for (i = 0; i < 2000; i++) {
172 __le32 buffer = p54spi_read32(priv, reg);
173 if ((buffer & bits) == bits)
179 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
180 const void *buf, size_t len)
182 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
183 cpu_to_le32(HOST_ALLOWED))) {
184 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
189 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
190 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
192 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
193 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
194 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
198 static int p54spi_request_firmware(struct ieee80211_hw *dev)
200 struct p54s_priv *priv = dev->priv;
203 /* FIXME: should driver use it's own struct device? */
204 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
207 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
211 ret = p54_parse_firmware(dev, priv->firmware);
213 release_firmware(priv->firmware);
220 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
222 struct p54s_priv *priv = dev->priv;
223 const struct firmware *eeprom;
227 * allow users to customize their eeprom.
230 ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
232 dev_info(&priv->spi->dev, "loading default eeprom...\n");
233 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
234 sizeof(p54spi_eeprom));
236 dev_info(&priv->spi->dev, "loading user eeprom...\n");
237 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
239 release_firmware(eeprom);
244 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
246 struct p54s_priv *priv = dev->priv;
247 unsigned long fw_len, _fw_len;
248 unsigned int offset = 0;
252 fw_len = priv->firmware->size;
253 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
257 /* stop the device */
258 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
259 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
260 SPI_CTRL_STAT_START_HALTED));
262 msleep(TARGET_BOOT_SLEEP);
264 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
265 SPI_CTRL_STAT_HOST_OVERRIDE |
266 SPI_CTRL_STAT_START_HALTED));
268 msleep(TARGET_BOOT_SLEEP);
271 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
273 err = p54spi_spi_write_dma(priv, cpu_to_le32(
274 ISL38XX_DEV_FIRMWARE_ADDR + offset),
275 (fw + offset), _fw_len);
285 /* enable host interrupts */
286 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
287 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
289 /* boot the device */
290 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
291 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
292 SPI_CTRL_STAT_RAM_BOOT));
294 msleep(TARGET_BOOT_SLEEP);
296 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
297 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
298 msleep(TARGET_BOOT_SLEEP);
305 static void p54spi_power_off(struct p54s_priv *priv)
307 disable_irq(gpio_to_irq(p54spi_gpio_irq));
308 gpio_set_value(p54spi_gpio_power, 0);
311 static void p54spi_power_on(struct p54s_priv *priv)
313 gpio_set_value(p54spi_gpio_power, 1);
314 enable_irq(gpio_to_irq(p54spi_gpio_irq));
317 * need to wait a while before device can be accessed, the lenght
323 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
325 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
328 static int p54spi_wakeup(struct p54s_priv *priv)
331 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
332 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
334 /* And wait for the READY interrupt */
335 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
336 cpu_to_le32(SPI_HOST_INT_READY))) {
337 dev_err(&priv->spi->dev, "INT_READY timeout\n");
341 p54spi_int_ack(priv, SPI_HOST_INT_READY);
345 static inline void p54spi_sleep(struct p54s_priv *priv)
347 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
348 cpu_to_le32(SPI_TARGET_INT_SLEEP));
351 static void p54spi_int_ready(struct p54s_priv *priv)
353 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
354 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
356 switch (priv->fw_state) {
357 case FW_STATE_BOOTING:
358 priv->fw_state = FW_STATE_READY;
359 complete(&priv->fw_comp);
361 case FW_STATE_RESETTING:
362 priv->fw_state = FW_STATE_READY;
363 /* TODO: reinitialize state */
370 static int p54spi_rx(struct p54s_priv *priv)
375 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
377 if (p54spi_wakeup(priv) < 0)
380 /* Read data size and first data word in one SPI transaction
381 * This is workaround for firmware/DMA bug,
382 * when first data word gets lost under high load.
384 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
389 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
393 /* Firmware may insert up to 4 padding bytes after the lmac header,
394 * but it does not amend the size of SPI data transfer.
395 * Such packets has correct data size in header, thus referencing
396 * past the end of allocated skb. Reserve extra 4 bytes for this case */
397 skb = dev_alloc_skb(len + 4);
400 dev_err(&priv->spi->dev, "could not alloc skb");
404 if (len <= READAHEAD_SZ) {
405 memcpy(skb_put(skb, len), rx_head + 1, len);
407 memcpy(skb_put(skb, READAHEAD_SZ), rx_head + 1, READAHEAD_SZ);
408 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
409 skb_put(skb, len - READAHEAD_SZ),
413 /* Put additional bytes to compensate for the possible
414 * alignment-caused truncation */
417 if (p54_rx(priv->hw, skb) == 0)
424 static irqreturn_t p54spi_interrupt(int irq, void *config)
426 struct spi_device *spi = config;
427 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
429 queue_work(priv->hw->workqueue, &priv->work);
434 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
436 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
439 if (p54spi_wakeup(priv) < 0)
442 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
446 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
447 cpu_to_le32(SPI_HOST_INT_WR_READY))) {
448 dev_err(&priv->spi->dev, "WR_READY timeout\n");
453 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
455 if (FREE_AFTER_TX(skb))
456 p54_free_skb(priv->hw, skb);
462 static int p54spi_wq_tx(struct p54s_priv *priv)
464 struct p54s_tx_info *entry;
466 struct ieee80211_tx_info *info;
467 struct p54_tx_info *minfo;
468 struct p54s_tx_info *dinfo;
472 spin_lock_irqsave(&priv->tx_lock, flags);
474 while (!list_empty(&priv->tx_pending)) {
475 entry = list_entry(priv->tx_pending.next,
476 struct p54s_tx_info, tx_list);
478 list_del_init(&entry->tx_list);
480 spin_unlock_irqrestore(&priv->tx_lock, flags);
482 dinfo = container_of((void *) entry, struct p54s_tx_info,
484 minfo = container_of((void *) dinfo, struct p54_tx_info,
486 info = container_of((void *) minfo, struct ieee80211_tx_info,
488 skb = container_of((void *) info, struct sk_buff, cb);
490 ret = p54spi_tx_frame(priv, skb);
493 p54_free_skb(priv->hw, skb);
497 spin_lock_irqsave(&priv->tx_lock, flags);
499 spin_unlock_irqrestore(&priv->tx_lock, flags);
503 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
505 struct p54s_priv *priv = dev->priv;
506 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
507 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
508 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
511 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
513 spin_lock_irqsave(&priv->tx_lock, flags);
514 list_add_tail(&di->tx_list, &priv->tx_pending);
515 spin_unlock_irqrestore(&priv->tx_lock, flags);
517 queue_work(priv->hw->workqueue, &priv->work);
520 static void p54spi_work(struct work_struct *work)
522 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
526 mutex_lock(&priv->mutex);
528 if (priv->fw_state == FW_STATE_OFF)
531 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
533 if (ints & SPI_HOST_INT_READY) {
534 p54spi_int_ready(priv);
535 p54spi_int_ack(priv, SPI_HOST_INT_READY);
538 if (priv->fw_state != FW_STATE_READY)
541 if (ints & SPI_HOST_INT_UPDATE) {
542 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
543 ret = p54spi_rx(priv);
547 if (ints & SPI_HOST_INT_SW_UPDATE) {
548 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
549 ret = p54spi_rx(priv);
554 ret = p54spi_wq_tx(priv);
556 mutex_unlock(&priv->mutex);
559 static int p54spi_op_start(struct ieee80211_hw *dev)
561 struct p54s_priv *priv = dev->priv;
562 unsigned long timeout;
565 if (mutex_lock_interruptible(&priv->mutex)) {
570 priv->fw_state = FW_STATE_BOOTING;
572 p54spi_power_on(priv);
574 ret = p54spi_upload_firmware(dev);
576 p54spi_power_off(priv);
580 mutex_unlock(&priv->mutex);
582 timeout = msecs_to_jiffies(2000);
583 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
586 dev_err(&priv->spi->dev, "firmware boot failed");
587 p54spi_power_off(priv);
592 if (mutex_lock_interruptible(&priv->mutex)) {
594 p54spi_power_off(priv);
598 WARN_ON(priv->fw_state != FW_STATE_READY);
601 mutex_unlock(&priv->mutex);
607 static void p54spi_op_stop(struct ieee80211_hw *dev)
609 struct p54s_priv *priv = dev->priv;
612 if (mutex_lock_interruptible(&priv->mutex)) {
613 /* FIXME: how to handle this error? */
617 WARN_ON(priv->fw_state != FW_STATE_READY);
619 cancel_work_sync(&priv->work);
621 p54spi_power_off(priv);
622 spin_lock_irqsave(&priv->tx_lock, flags);
623 INIT_LIST_HEAD(&priv->tx_pending);
624 spin_unlock_irqrestore(&priv->tx_lock, flags);
626 priv->fw_state = FW_STATE_OFF;
627 mutex_unlock(&priv->mutex);
630 static int __devinit p54spi_probe(struct spi_device *spi)
632 struct p54s_priv *priv = NULL;
633 struct ieee80211_hw *hw;
636 hw = p54_init_common(sizeof(*priv));
638 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
644 dev_set_drvdata(&spi->dev, priv);
647 spi->bits_per_word = 16;
648 spi->max_speed_hz = 24000000;
650 ret = spi_setup(spi);
652 dev_err(&priv->spi->dev, "spi_setup failed");
653 goto err_free_common;
656 ret = gpio_request(p54spi_gpio_power, "p54spi power");
658 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
659 goto err_free_common;
662 ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
664 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
665 goto err_free_common;
668 gpio_direction_output(p54spi_gpio_power, 0);
669 gpio_direction_input(p54spi_gpio_irq);
671 ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
672 p54spi_interrupt, IRQF_DISABLED, "p54spi",
675 dev_err(&priv->spi->dev, "request_irq() failed");
676 goto err_free_common;
679 set_irq_type(gpio_to_irq(p54spi_gpio_irq),
680 IRQ_TYPE_EDGE_RISING);
682 disable_irq(gpio_to_irq(p54spi_gpio_irq));
684 INIT_WORK(&priv->work, p54spi_work);
685 init_completion(&priv->fw_comp);
686 INIT_LIST_HEAD(&priv->tx_pending);
687 mutex_init(&priv->mutex);
688 SET_IEEE80211_DEV(hw, &spi->dev);
689 priv->common.open = p54spi_op_start;
690 priv->common.stop = p54spi_op_stop;
691 priv->common.tx = p54spi_op_tx;
693 ret = p54spi_request_firmware(hw);
695 goto err_free_common;
697 ret = p54spi_request_eeprom(hw);
699 goto err_free_common;
701 ret = p54_register_common(hw, &priv->spi->dev);
703 goto err_free_common;
708 p54_free_common(priv->hw);
712 static int __devexit p54spi_remove(struct spi_device *spi)
714 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
716 ieee80211_unregister_hw(priv->hw);
718 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
720 gpio_free(p54spi_gpio_power);
721 gpio_free(p54spi_gpio_irq);
722 release_firmware(priv->firmware);
724 mutex_destroy(&priv->mutex);
726 p54_free_common(priv->hw);
727 ieee80211_free_hw(priv->hw);
733 static struct spi_driver p54spi_driver = {
735 /* use cx3110x name because board-n800.c uses that for the
738 .bus = &spi_bus_type,
739 .owner = THIS_MODULE,
742 .probe = p54spi_probe,
743 .remove = __devexit_p(p54spi_remove),
746 static int __init p54spi_init(void)
750 ret = spi_register_driver(&p54spi_driver);
752 printk(KERN_ERR "failed to register SPI driver: %d", ret);
760 static void __exit p54spi_exit(void)
762 spi_unregister_driver(&p54spi_driver);
765 module_init(p54spi_init);
766 module_exit(p54spi_exit);
768 MODULE_LICENSE("GPL");
769 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");