Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
[linux-2.6] / include / asm-s390 / lowcore.h
1 /*
2  *  include/asm-s390/lowcore.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9  */
10
11 #ifndef _ASM_S390_LOWCORE_H
12 #define _ASM_S390_LOWCORE_H
13
14 #ifndef __s390x__
15 #define __LC_EXT_OLD_PSW                0x018
16 #define __LC_SVC_OLD_PSW                0x020
17 #define __LC_PGM_OLD_PSW                0x028
18 #define __LC_MCK_OLD_PSW                0x030
19 #define __LC_IO_OLD_PSW                 0x038
20 #define __LC_EXT_NEW_PSW                0x058
21 #define __LC_SVC_NEW_PSW                0x060
22 #define __LC_PGM_NEW_PSW                0x068
23 #define __LC_MCK_NEW_PSW                0x070
24 #define __LC_IO_NEW_PSW                 0x078
25 #else /* !__s390x__ */
26 #define __LC_EXT_OLD_PSW                0x0130
27 #define __LC_SVC_OLD_PSW                0x0140
28 #define __LC_PGM_OLD_PSW                0x0150
29 #define __LC_MCK_OLD_PSW                0x0160
30 #define __LC_IO_OLD_PSW                 0x0170
31 #define __LC_EXT_NEW_PSW                0x01b0
32 #define __LC_SVC_NEW_PSW                0x01c0
33 #define __LC_PGM_NEW_PSW                0x01d0
34 #define __LC_MCK_NEW_PSW                0x01e0
35 #define __LC_IO_NEW_PSW                 0x01f0
36 #endif /* !__s390x__ */
37
38 #define __LC_EXT_PARAMS                 0x080
39 #define __LC_CPU_ADDRESS                0x084
40 #define __LC_EXT_INT_CODE               0x086
41
42 #define __LC_SVC_ILC                    0x088
43 #define __LC_SVC_INT_CODE               0x08A
44 #define __LC_PGM_ILC                    0x08C
45 #define __LC_PGM_INT_CODE               0x08E
46
47 #define __LC_PER_ATMID                  0x096
48 #define __LC_PER_ADDRESS                0x098
49 #define __LC_PER_ACCESS_ID              0x0A1
50
51 #define __LC_SUBCHANNEL_ID              0x0B8
52 #define __LC_SUBCHANNEL_NR              0x0BA
53 #define __LC_IO_INT_PARM                0x0BC
54 #define __LC_IO_INT_WORD                0x0C0
55 #define __LC_MCCK_CODE                  0x0E8
56
57 #define __LC_RETURN_PSW                 0x200
58
59 #define __LC_SAVE_AREA                  0xC00
60
61 #ifndef __s390x__
62 #define __LC_IRB                        0x208
63 #define __LC_SYNC_ENTER_TIMER           0x248
64 #define __LC_ASYNC_ENTER_TIMER          0x250
65 #define __LC_EXIT_TIMER                 0x258
66 #define __LC_LAST_UPDATE_TIMER          0x260
67 #define __LC_USER_TIMER                 0x268
68 #define __LC_SYSTEM_TIMER               0x270
69 #define __LC_LAST_UPDATE_CLOCK          0x278
70 #define __LC_STEAL_CLOCK                0x280
71 #define __LC_RETURN_MCCK_PSW            0x288
72 #define __LC_KERNEL_STACK               0xC40
73 #define __LC_THREAD_INFO                0xC44
74 #define __LC_ASYNC_STACK                0xC48
75 #define __LC_KERNEL_ASCE                0xC4C
76 #define __LC_USER_ASCE                  0xC50
77 #define __LC_PANIC_STACK                0xC54
78 #define __LC_CPUID                      0xC60
79 #define __LC_CPUADDR                    0xC68
80 #define __LC_IPLDEV                     0xC7C
81 #define __LC_JIFFY_TIMER                0xC80
82 #define __LC_CURRENT                    0xC90
83 #define __LC_INT_CLOCK                  0xC98
84 #else /* __s390x__ */
85 #define __LC_IRB                        0x210
86 #define __LC_SYNC_ENTER_TIMER           0x250
87 #define __LC_ASYNC_ENTER_TIMER          0x258
88 #define __LC_EXIT_TIMER                 0x260
89 #define __LC_LAST_UPDATE_TIMER          0x268
90 #define __LC_USER_TIMER                 0x270
91 #define __LC_SYSTEM_TIMER               0x278
92 #define __LC_LAST_UPDATE_CLOCK          0x280
93 #define __LC_STEAL_CLOCK                0x288
94 #define __LC_RETURN_MCCK_PSW            0x290
95 #define __LC_KERNEL_STACK               0xD40
96 #define __LC_THREAD_INFO                0xD48
97 #define __LC_ASYNC_STACK                0xD50
98 #define __LC_KERNEL_ASCE                0xD58
99 #define __LC_USER_ASCE                  0xD60
100 #define __LC_PANIC_STACK                0xD68
101 #define __LC_CPUID                      0xD90
102 #define __LC_CPUADDR                    0xD98
103 #define __LC_IPLDEV                     0xDB8
104 #define __LC_JIFFY_TIMER                0xDC0
105 #define __LC_CURRENT                    0xDD8
106 #define __LC_INT_CLOCK                  0xDE8
107 #endif /* __s390x__ */
108
109 #define __LC_PANIC_MAGIC                0xE00
110
111 #ifndef __s390x__
112 #define __LC_PFAULT_INTPARM             0x080
113 #define __LC_CPU_TIMER_SAVE_AREA        0x0D8
114 #define __LC_AREGS_SAVE_AREA            0x120
115 #define __LC_GPREGS_SAVE_AREA           0x180
116 #define __LC_CREGS_SAVE_AREA            0x1C0
117 #else /* __s390x__ */
118 #define __LC_PFAULT_INTPARM             0x11B8
119 #define __LC_GPREGS_SAVE_AREA           0x1280
120 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
121 #define __LC_AREGS_SAVE_AREA            0x1340
122 #define __LC_CREGS_SAVE_AREA            0x1380
123 #endif /* __s390x__ */
124
125 #ifndef __ASSEMBLY__
126
127 #include <linux/config.h>
128 #include <asm/processor.h>
129 #include <linux/types.h>
130 #include <asm/sigp.h>
131
132 void restart_int_handler(void);
133 void ext_int_handler(void);
134 void system_call(void);
135 void pgm_check_handler(void);
136 void mcck_int_handler(void);
137 void io_int_handler(void);
138
139 struct _lowcore
140 {
141 #ifndef __s390x__
142         /* prefix area: defined by architecture */
143         psw_t        restart_psw;              /* 0x000 */
144         __u32        ccw2[4];                  /* 0x008 */
145         psw_t        external_old_psw;         /* 0x018 */
146         psw_t        svc_old_psw;              /* 0x020 */
147         psw_t        program_old_psw;          /* 0x028 */
148         psw_t        mcck_old_psw;             /* 0x030 */
149         psw_t        io_old_psw;               /* 0x038 */
150         __u8         pad1[0x58-0x40];          /* 0x040 */
151         psw_t        external_new_psw;         /* 0x058 */
152         psw_t        svc_new_psw;              /* 0x060 */
153         psw_t        program_new_psw;          /* 0x068 */
154         psw_t        mcck_new_psw;             /* 0x070 */
155         psw_t        io_new_psw;               /* 0x078 */
156         __u32        ext_params;               /* 0x080 */
157         __u16        cpu_addr;                 /* 0x084 */
158         __u16        ext_int_code;             /* 0x086 */
159         __u16        svc_ilc;                  /* 0x088 */
160         __u16        svc_code;                 /* 0x08a */
161         __u16        pgm_ilc;                  /* 0x08c */
162         __u16        pgm_code;                 /* 0x08e */
163         __u32        trans_exc_code;           /* 0x090 */
164         __u16        mon_class_num;            /* 0x094 */
165         __u16        per_perc_atmid;           /* 0x096 */
166         __u32        per_address;              /* 0x098 */
167         __u32        monitor_code;             /* 0x09c */
168         __u8         exc_access_id;            /* 0x0a0 */
169         __u8         per_access_id;            /* 0x0a1 */
170         __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
171         __u16        subchannel_id;            /* 0x0b8 */
172         __u16        subchannel_nr;            /* 0x0ba */
173         __u32        io_int_parm;              /* 0x0bc */
174         __u32        io_int_word;              /* 0x0c0 */
175         __u8         pad3[0xD4-0xC4];          /* 0x0c4 */
176         __u32        extended_save_area_addr;  /* 0x0d4 */
177         __u32        cpu_timer_save_area[2];   /* 0x0d8 */
178         __u32        clock_comp_save_area[2];  /* 0x0e0 */
179         __u32        mcck_interruption_code[2]; /* 0x0e8 */
180         __u8         pad4[0xf4-0xf0];          /* 0x0f0 */
181         __u32        external_damage_code;     /* 0x0f4 */
182         __u32        failing_storage_address;  /* 0x0f8 */
183         __u8         pad5[0x100-0xfc];         /* 0x0fc */
184         __u32        st_status_fixed_logout[4];/* 0x100 */
185         __u8         pad6[0x120-0x110];        /* 0x110 */
186         __u32        access_regs_save_area[16];/* 0x120 */
187         __u32        floating_pt_save_area[8]; /* 0x160 */
188         __u32        gpregs_save_area[16];     /* 0x180 */
189         __u32        cregs_save_area[16];      /* 0x1c0 */      
190
191         psw_t        return_psw;               /* 0x200 */
192         __u8         irb[64];                  /* 0x208 */
193         __u64        sync_enter_timer;         /* 0x248 */
194         __u64        async_enter_timer;        /* 0x250 */
195         __u64        exit_timer;               /* 0x258 */
196         __u64        last_update_timer;        /* 0x260 */
197         __u64        user_timer;               /* 0x268 */
198         __u64        system_timer;             /* 0x270 */
199         __u64        last_update_clock;        /* 0x278 */
200         __u64        steal_clock;              /* 0x280 */
201         psw_t        return_mcck_psw;          /* 0x288 */
202         __u8         pad8[0xc00-0x290];        /* 0x290 */
203
204         /* System info area */
205         __u32        save_area[16];            /* 0xc00 */
206         __u32        kernel_stack;             /* 0xc40 */
207         __u32        thread_info;              /* 0xc44 */
208         __u32        async_stack;              /* 0xc48 */
209         __u32        kernel_asce;              /* 0xc4c */
210         __u32        user_asce;                /* 0xc50 */
211         __u32        panic_stack;              /* 0xc54 */
212         __u8         pad10[0xc60-0xc58];       /* 0xc58 */
213         /* entry.S sensitive area start */
214         struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
215         __u32        ipl_device;               /* 0xc7c */
216         /* entry.S sensitive area end */
217
218         /* SMP info area: defined by DJB */
219         __u64        jiffy_timer;              /* 0xc80 */
220         __u32        ext_call_fast;            /* 0xc88 */
221         __u32        percpu_offset;            /* 0xc8c */
222         __u32        current_task;             /* 0xc90 */
223         __u32        softirq_pending;          /* 0xc94 */
224         __u64        int_clock;                /* 0xc98 */
225         __u8         pad11[0xe00-0xca0];       /* 0xca0 */
226
227         /* 0xe00 is used as indicator for dump tools */
228         /* whether the kernel died with panic() or not */
229         __u32        panic_magic;              /* 0xe00 */
230
231         /* Align to the top 1k of prefix area */
232         __u8         pad12[0x1000-0xe04];      /* 0xe04 */
233 #else /* !__s390x__ */
234         /* prefix area: defined by architecture */
235         __u32        ccw1[2];                  /* 0x000 */
236         __u32        ccw2[4];                  /* 0x008 */
237         __u8         pad1[0x80-0x18];          /* 0x018 */
238         __u32        ext_params;               /* 0x080 */
239         __u16        cpu_addr;                 /* 0x084 */
240         __u16        ext_int_code;             /* 0x086 */
241         __u16        svc_ilc;                  /* 0x088 */
242         __u16        svc_code;                 /* 0x08a */
243         __u16        pgm_ilc;                  /* 0x08c */
244         __u16        pgm_code;                 /* 0x08e */
245         __u32        data_exc_code;            /* 0x090 */
246         __u16        mon_class_num;            /* 0x094 */
247         __u16        per_perc_atmid;           /* 0x096 */
248         addr_t       per_address;              /* 0x098 */
249         __u8         exc_access_id;            /* 0x0a0 */
250         __u8         per_access_id;            /* 0x0a1 */
251         __u8         op_access_id;             /* 0x0a2 */
252         __u8         ar_access_id;             /* 0x0a3 */
253         __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
254         addr_t       trans_exc_code;           /* 0x0A0 */
255         addr_t       monitor_code;             /* 0x09c */
256         __u16        subchannel_id;            /* 0x0b8 */
257         __u16        subchannel_nr;            /* 0x0ba */
258         __u32        io_int_parm;              /* 0x0bc */
259         __u32        io_int_word;              /* 0x0c0 */
260         __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
261         __u32        stfl_fac_list;            /* 0x0c8 */
262         __u8         pad4[0xe8-0xcc];          /* 0x0cc */
263         __u32        mcck_interruption_code[2]; /* 0x0e8 */
264         __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
265         __u32        external_damage_code;     /* 0x0f4 */
266         addr_t       failing_storage_address;  /* 0x0f8 */
267         __u8         pad6[0x120-0x100];        /* 0x100 */
268         psw_t        restart_old_psw;          /* 0x120 */
269         psw_t        external_old_psw;         /* 0x130 */
270         psw_t        svc_old_psw;              /* 0x140 */
271         psw_t        program_old_psw;          /* 0x150 */
272         psw_t        mcck_old_psw;             /* 0x160 */
273         psw_t        io_old_psw;               /* 0x170 */
274         __u8         pad7[0x1a0-0x180];        /* 0x180 */
275         psw_t        restart_psw;              /* 0x1a0 */
276         psw_t        external_new_psw;         /* 0x1b0 */
277         psw_t        svc_new_psw;              /* 0x1c0 */
278         psw_t        program_new_psw;          /* 0x1d0 */
279         psw_t        mcck_new_psw;             /* 0x1e0 */
280         psw_t        io_new_psw;               /* 0x1f0 */
281         psw_t        return_psw;               /* 0x200 */
282         __u8         irb[64];                  /* 0x210 */
283         __u64        sync_enter_timer;         /* 0x250 */
284         __u64        async_enter_timer;        /* 0x258 */
285         __u64        exit_timer;               /* 0x260 */
286         __u64        last_update_timer;        /* 0x268 */
287         __u64        user_timer;               /* 0x270 */
288         __u64        system_timer;             /* 0x278 */
289         __u64        last_update_clock;        /* 0x280 */
290         __u64        steal_clock;              /* 0x288 */
291         psw_t        return_mcck_psw;          /* 0x290 */
292         __u8         pad8[0xc00-0x2a0];        /* 0x2a0 */
293         /* System info area */
294         __u64        save_area[16];            /* 0xc00 */
295         __u8         pad9[0xd40-0xc80];        /* 0xc80 */
296         __u64        kernel_stack;             /* 0xd40 */
297         __u64        thread_info;              /* 0xd48 */
298         __u64        async_stack;              /* 0xd50 */
299         __u64        kernel_asce;              /* 0xd58 */
300         __u64        user_asce;                /* 0xd60 */
301         __u64        panic_stack;              /* 0xd68 */
302         __u8         pad10[0xd80-0xd70];       /* 0xd70 */
303         /* entry.S sensitive area start */
304         struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
305         __u32        ipl_device;               /* 0xdb8 */
306         __u32        pad11;                    /* 0xdbc */
307         /* entry.S sensitive area end */
308
309         /* SMP info area: defined by DJB */
310         __u64        jiffy_timer;              /* 0xdc0 */
311         __u64        ext_call_fast;            /* 0xdc8 */
312         __u64        percpu_offset;            /* 0xdd0 */
313         __u64        current_task;             /* 0xdd8 */
314         __u64        softirq_pending;          /* 0xde0 */
315         __u64        int_clock;                /* 0xde8 */
316         __u8         pad12[0xe00-0xdf0];       /* 0xdf0 */
317
318         /* 0xe00 is used as indicator for dump tools */
319         /* whether the kernel died with panic() or not */
320         __u32        panic_magic;              /* 0xe00 */
321
322         __u8         pad13[0x1200-0xe04];      /* 0xe04 */
323
324         /* System info area */ 
325
326         __u64        floating_pt_save_area[16]; /* 0x1200 */
327         __u64        gpregs_save_area[16];      /* 0x1280 */
328         __u32        st_status_fixed_logout[4]; /* 0x1300 */
329         __u8         pad14[0x1318-0x1310];      /* 0x1310 */
330         __u32        prefixreg_save_area;       /* 0x1318 */
331         __u32        fpt_creg_save_area;        /* 0x131c */
332         __u8         pad15[0x1324-0x1320];      /* 0x1320 */
333         __u32        tod_progreg_save_area;     /* 0x1324 */
334         __u32        cpu_timer_save_area[2];    /* 0x1328 */
335         __u32        clock_comp_save_area[2];   /* 0x1330 */
336         __u8         pad16[0x1340-0x1338];      /* 0x1338 */ 
337         __u32        access_regs_save_area[16]; /* 0x1340 */ 
338         __u64        cregs_save_area[16];       /* 0x1380 */
339
340         /* align to the top of the prefix area */
341
342         __u8         pad17[0x2000-0x1400];      /* 0x1400 */
343 #endif /* !__s390x__ */
344 } __attribute__((packed)); /* End structure*/
345
346 #define S390_lowcore (*((struct _lowcore *) 0))
347 extern struct _lowcore *lowcore_ptr[];
348
349 static inline void set_prefix(__u32 address)
350 {
351         __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
352 }
353
354 #define __PANIC_MAGIC           0xDEADC0DE
355
356 #endif
357
358 #endif