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   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/jiffies.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/onenand.h>
  19 #include <linux/mtd/partitions.h>
  20
  21 #include <asm/io.h>
  22
  23 /**
  24  * onenand_oob_64 - oob info for large (2KB) page
  25  */
  26 static struct nand_oobinfo onenand_oob_64 = {
  27         .useecc         = MTD_NANDECC_AUTOPLACE,
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {24, 3}, {46, 2}, {40, 3}, {62, 2} }
  38 };
  39
  40 /**
  41  * onenand_oob_32 - oob info for middle (1KB) page
  42  */
  43 static struct nand_oobinfo onenand_oob_32 = {
  44         .useecc         = MTD_NANDECC_AUTOPLACE,
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  98                 /* Device Flash Core select, NAND Flash Block Address */
  99                 int dfs = 0;
 100
 101                 if (block & this->density_mask)
 102                         dfs = 1;
 103
 104                 return (dfs << ONENAND_DDP_SHIFT) |
 105                         (block & (this->density_mask - 1));
 106         }
 107
 108         return block;
 109 }
 110
 111 /**
 112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 113  * @param this          onenand chip data structure
 114  * @param block         the block
 115  * @return              set DBS value if DDP, otherwise 0
 116  *
 117  * Setup Start Address 2 Register (F101h) for DDP
 118  */
 119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 120 {
 121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
 122                 /* Device BufferRAM Select */
 123                 int dbs = 0;
 124
 125                 if (block & this->density_mask)
 126                         dbs = 1;
 127
 128                 return (dbs << ONENAND_DDP_SHIFT);
 129         }
 130
 131         return 0;
 132 }
 133
 134 /**
 135  * onenand_page_address - [DEFAULT] Get page address
 136  * @param page          the page address
 137  * @param sector        the sector address
 138  * @return              combined page and sector address
 139  *
 140  * Setup Start Address 8 Register (F107h)
 141  */
 142 static int onenand_page_address(int page, int sector)
 143 {
 144         /* Flash Page Address, Flash Sector Address */
 145         int fpa, fsa;
 146
 147         fpa = page & ONENAND_FPA_MASK;
 148         fsa = sector & ONENAND_FSA_MASK;
 149
 150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 151 }
 152
 153 /**
 154  * onenand_buffer_address - [DEFAULT] Get buffer address
 155  * @param dataram1      DataRAM index
 156  * @param sectors       the sector address
 157  * @param count         the number of sectors
 158  * @return              the start buffer value
 159  *
 160  * Setup Start Buffer Register (F200h)
 161  */
 162 static int onenand_buffer_address(int dataram1, int sectors, int count)
 163 {
 164         int bsa, bsc;
 165
 166         /* BufferRAM Sector Address */
 167         bsa = sectors & ONENAND_BSA_MASK;
 168
 169         if (dataram1)
 170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 171         else
 172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 173
 174         /* BufferRAM Sector Count */
 175         bsc = count & ONENAND_BSC_MASK;
 176
 177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 178 }
 179
 180 /**
 181  * onenand_command - [DEFAULT] Send command to OneNAND device
 182  * @param mtd           MTD device structure
 183  * @param cmd           the command to be sent
 184  * @param addr          offset to read from or write to
 185  * @param len           number of bytes to read or write
 186  *
 187  * Send command to OneNAND device. This function is used for middle/large page
 188  * devices (1KB/2KB Bytes per page)
 189  */
 190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 191 {
 192         struct onenand_chip *this = mtd->priv;
 193         int value, readcmd = 0;
 194         int block, page;
 195         /* Now we use page size operation */
 196         int sectors = 4, count = 4;
 197
 198         /* Address translation */
 199         switch (cmd) {
 200         case ONENAND_CMD_UNLOCK:
 201         case ONENAND_CMD_LOCK:
 202         case ONENAND_CMD_LOCK_TIGHT:
 203                 block = -1;
 204                 page = -1;
 205                 break;
 206
 207         case ONENAND_CMD_ERASE:
 208         case ONENAND_CMD_BUFFERRAM:
 209                 block = (int) (addr >> this->erase_shift);
 210                 page = -1;
 211                 break;
 212
 213         default:
 214                 block = (int) (addr >> this->erase_shift);
 215                 page = (int) (addr >> this->page_shift);
 216                 page &= this->page_mask;
 217                 break;
 218         }
 219
 220         /* NOTE: The setting order of the registers is very important! */
 221         if (cmd == ONENAND_CMD_BUFFERRAM) {
 222                 /* Select DataRAM for DDP */
 223                 value = onenand_bufferram_address(this, block);
 224                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 225
 226                 /* Switch to the next data buffer */
 227                 ONENAND_SET_NEXT_BUFFERRAM(this);
 228
 229                 return 0;
 230         }
 231
 232         if (block != -1) {
 233                 /* Write 'DFS, FBA' of Flash */
 234                 value = onenand_block_address(this, block);
 235                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 236         }
 237
 238         if (page != -1) {
 239                 int dataram;
 240
 241                 switch (cmd) {
 242                 case ONENAND_CMD_READ:
 243                 case ONENAND_CMD_READOOB:
 244                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 245                         readcmd = 1;
 246                         break;
 247
 248                 default:
 249                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 250                         break;
 251                 }
 252
 253                 /* Write 'FPA, FSA' of Flash */
 254                 value = onenand_page_address(page, sectors);
 255                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 256
 257                 /* Write 'BSA, BSC' of DataRAM */
 258                 value = onenand_buffer_address(dataram, sectors, count);
 259                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 260
 261                 if (readcmd) {
 262                         /* Select DataRAM for DDP */
 263                         value = onenand_bufferram_address(this, block);
 264                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 265                 }
 266         }
 267
 268         /* Interrupt clear */
 269         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 270
 271         /* Write command */
 272         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 273
 274         return 0;
 275 }
 276
 277 /**
 278  * onenand_wait - [DEFAULT] wait until the command is done
 279  * @param mtd           MTD device structure
 280  * @param state         state to select the max. timeout value
 281  *
 282  * Wait for command done. This applies to all OneNAND command
 283  * Read can take up to 30us, erase up to 2ms and program up to 350us
 284  * according to general OneNAND specs
 285  */
 286 static int onenand_wait(struct mtd_info *mtd, int state)
 287 {
 288         struct onenand_chip * this = mtd->priv;
 289         unsigned long timeout;
 290         unsigned int flags = ONENAND_INT_MASTER;
 291         unsigned int interrupt = 0;
 292         unsigned int ctrl, ecc;
 293
 294         /* The 20 msec is enough */
 295         timeout = jiffies + msecs_to_jiffies(20);
 296         while (time_before(jiffies, timeout)) {
 297                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 298
 299                 if (interrupt & flags)
 300                         break;
 301
 302                 if (state != FL_READING)
 303                         cond_resched();
 304         }
 305         /* To get correct interrupt status in timeout case */
 306         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 307
 308         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 309
 310         if (ctrl & ONENAND_CTRL_ERROR) {
 311                 /* It maybe occur at initial bad block */
 312                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 313                 /* Clear other interrupt bits for preventing ECC error */
 314                 interrupt &= ONENAND_INT_MASTER;
 315         }
 316
 317         if (ctrl & ONENAND_CTRL_LOCK) {
 318                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
 319                 return -EACCES;
 320         }
 321
 322         if (interrupt & ONENAND_INT_READ) {
 323                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 324                 if (ecc & ONENAND_ECC_2BIT_ALL) {
 325                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 326                         return -EBADMSG;
 327                 }
 328         }
 329
 330         return 0;
 331 }
 332
 333 /**
 334  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 335  * @param mtd           MTD data structure
 336  * @param area          BufferRAM area
 337  * @return              offset given area
 338  *
 339  * Return BufferRAM offset given area
 340  */
 341 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 342 {
 343         struct onenand_chip *this = mtd->priv;
 344
 345         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 346                 if (area == ONENAND_DATARAM)
 347                         return mtd->oobblock;
 348                 if (area == ONENAND_SPARERAM)
 349                         return mtd->oobsize;
 350         }
 351
 352         return 0;
 353 }
 354
 355 /**
 356  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 357  * @param mtd           MTD data structure
 358  * @param area          BufferRAM area
 359  * @param buffer        the databuffer to put/get data
 360  * @param offset        offset to read from or write to
 361  * @param count         number of bytes to read/write
 362  *
 363  * Read the BufferRAM area
 364  */
 365 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 366                 unsigned char *buffer, int offset, size_t count)
 367 {
 368         struct onenand_chip *this = mtd->priv;
 369         void __iomem *bufferram;
 370
 371         bufferram = this->base + area;
 372
 373         bufferram += onenand_bufferram_offset(mtd, area);
 374
 375         memcpy(buffer, bufferram + offset, count);
 376
 377         return 0;
 378 }
 379
 380 /**
 381  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 382  * @param mtd           MTD data structure
 383  * @param area          BufferRAM area
 384  * @param buffer        the databuffer to put/get data
 385  * @param offset        offset to read from or write to
 386  * @param count         number of bytes to read/write
 387  *
 388  * Read the BufferRAM area with Sync. Burst Mode
 389  */
 390 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 391                 unsigned char *buffer, int offset, size_t count)
 392 {
 393         struct onenand_chip *this = mtd->priv;
 394         void __iomem *bufferram;
 395
 396         bufferram = this->base + area;
 397
 398         bufferram += onenand_bufferram_offset(mtd, area);
 399
 400         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 401
 402         memcpy(buffer, bufferram + offset, count);
 403
 404         this->mmcontrol(mtd, 0);
 405
 406         return 0;
 407 }
 408
 409 /**
 410  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 411  * @param mtd           MTD data structure
 412  * @param area          BufferRAM area
 413  * @param buffer        the databuffer to put/get data
 414  * @param offset        offset to read from or write to
 415  * @param count         number of bytes to read/write
 416  *
 417  * Write the BufferRAM area
 418  */
 419 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 420                 const unsigned char *buffer, int offset, size_t count)
 421 {
 422         struct onenand_chip *this = mtd->priv;
 423         void __iomem *bufferram;
 424
 425         bufferram = this->base + area;
 426
 427         bufferram += onenand_bufferram_offset(mtd, area);
 428
 429         memcpy(bufferram + offset, buffer, count);
 430
 431         return 0;
 432 }
 433
 434 /**
 435  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 436  * @param mtd           MTD data structure
 437  * @param addr          address to check
 438  * @return              1 if there are valid data, otherwise 0
 439  *
 440  * Check bufferram if there is data we required
 441  */
 442 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 443 {
 444         struct onenand_chip *this = mtd->priv;
 445         int block, page;
 446         int i;
 447
 448         block = (int) (addr >> this->erase_shift);
 449         page = (int) (addr >> this->page_shift);
 450         page &= this->page_mask;
 451
 452         i = ONENAND_CURRENT_BUFFERRAM(this);
 453
 454         /* Is there valid data? */
 455         if (this->bufferram[i].block == block &&
 456             this->bufferram[i].page == page &&
 457             this->bufferram[i].valid)
 458                 return 1;
 459
 460         return 0;
 461 }
 462
 463 /**
 464  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 465  * @param mtd           MTD data structure
 466  * @param addr          address to update
 467  * @param valid         valid flag
 468  *
 469  * Update BufferRAM information
 470  */
 471 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 472                 int valid)
 473 {
 474         struct onenand_chip *this = mtd->priv;
 475         int block, page;
 476         int i;
 477
 478         block = (int) (addr >> this->erase_shift);
 479         page = (int) (addr >> this->page_shift);
 480         page &= this->page_mask;
 481
 482         /* Invalidate BufferRAM */
 483         for (i = 0; i < MAX_BUFFERRAM; i++) {
 484                 if (this->bufferram[i].block == block &&
 485                     this->bufferram[i].page == page)
 486                         this->bufferram[i].valid = 0;
 487         }
 488
 489         /* Update BufferRAM */
 490         i = ONENAND_CURRENT_BUFFERRAM(this);
 491         this->bufferram[i].block = block;
 492         this->bufferram[i].page = page;
 493         this->bufferram[i].valid = valid;
 494
 495         return 0;
 496 }
 497
 498 /**
 499  * onenand_get_device - [GENERIC] Get chip for selected access
 500  * @param mtd           MTD device structure
 501  * @param new_state     the state which is requested
 502  *
 503  * Get the device and lock it for exclusive access
 504  */
 505 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 506 {
 507         struct onenand_chip *this = mtd->priv;
 508         DECLARE_WAITQUEUE(wait, current);
 509
 510         /*
 511          * Grab the lock and see if the device is available
 512          */
 513         while (1) {
 514                 spin_lock(&this->chip_lock);
 515                 if (this->state == FL_READY) {
 516                         this->state = new_state;
 517                         spin_unlock(&this->chip_lock);
 518                         break;
 519                 }
 520                 if (new_state == FL_PM_SUSPENDED) {
 521                         spin_unlock(&this->chip_lock);
 522                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 523                 }
 524                 set_current_state(TASK_UNINTERRUPTIBLE);
 525                 add_wait_queue(&this->wq, &wait);
 526                 spin_unlock(&this->chip_lock);
 527                 schedule();
 528                 remove_wait_queue(&this->wq, &wait);
 529         }
 530
 531         return 0;
 532 }
 533
 534 /**
 535  * onenand_release_device - [GENERIC] release chip
 536  * @param mtd           MTD device structure
 537  *
 538  * Deselect, release chip lock and wake up anyone waiting on the device
 539  */
 540 static void onenand_release_device(struct mtd_info *mtd)
 541 {
 542         struct onenand_chip *this = mtd->priv;
 543
 544         /* Release the chip */
 545         spin_lock(&this->chip_lock);
 546         this->state = FL_READY;
 547         wake_up(&this->wq);
 548         spin_unlock(&this->chip_lock);
 549 }
 550
 551 /**
 552  * onenand_read_ecc - [MTD Interface] Read data with ECC
 553  * @param mtd           MTD device structure
 554  * @param from          offset to read from
 555  * @param len           number of bytes to read
 556  * @param retlen        pointer to variable to store the number of read bytes
 557  * @param buf           the databuffer to put data
 558  * @param oob_buf       filesystem supplied oob data buffer
 559  * @param oobsel        oob selection structure
 560  *
 561  * OneNAND read with ECC
 562  */
 563 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
 564         size_t *retlen, u_char *buf,
 565         u_char *oob_buf, struct nand_oobinfo *oobsel)
 566 {
 567         struct onenand_chip *this = mtd->priv;
 568         int read = 0, column;
 569         int thislen;
 570         int ret = 0;
 571
 572         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 573
 574         /* Do not allow reads past end of device */
 575         if ((from + len) > mtd->size) {
 576                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n");
 577                 *retlen = 0;
 578                 return -EINVAL;
 579         }
 580
 581         /* Grab the lock and see if the device is available */
 582         onenand_get_device(mtd, FL_READING);
 583
 584         /* TODO handling oob */
 585
 586         while (read < len) {
 587                 thislen = min_t(int, mtd->oobblock, len - read);
 588
 589                 column = from & (mtd->oobblock - 1);
 590                 if (column + thislen > mtd->oobblock)
 591                         thislen = mtd->oobblock - column;
 592
 593                 if (!onenand_check_bufferram(mtd, from)) {
 594                         this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock);
 595
 596                         ret = this->wait(mtd, FL_READING);
 597                         /* First copy data and check return value for ECC handling */
 598                         onenand_update_bufferram(mtd, from, 1);
 599                 }
 600
 601                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 602
 603                 read += thislen;
 604
 605                 if (read == len)
 606                         break;
 607
 608                 if (ret) {
 609                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret);
 610                         goto out;
 611                 }
 612
 613                 from += thislen;
 614                 buf += thislen;
 615         }
 616
 617 out:
 618         /* Deselect and wake up anyone waiting on the device */
 619         onenand_release_device(mtd);
 620
 621         /*
 622          * Return success, if no ECC failures, else -EBADMSG
 623          * fs driver will take care of that, because
 624          * retlen == desired len and result == -EBADMSG
 625          */
 626         *retlen = read;
 627         return ret;
 628 }
 629
 630 /**
 631  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
 632  * @param mtd           MTD device structure
 633  * @param from          offset to read from
 634  * @param len           number of bytes to read
 635  * @param retlen        pointer to variable to store the number of read bytes
 636  * @param buf           the databuffer to put data
 637  *
 638  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
 639 */
 640 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 641         size_t *retlen, u_char *buf)
 642 {
 643         return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
 644 }
 645
 646 /**
 647  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
 648  * @param mtd           MTD device structure
 649  * @param from          offset to read from
 650  * @param len           number of bytes to read
 651  * @param retlen        pointer to variable to store the number of read bytes
 652  * @param buf           the databuffer to put data
 653  *
 654  * OneNAND read out-of-band data from the spare area
 655  */
 656 static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 657         size_t *retlen, u_char *buf)
 658 {
 659         struct onenand_chip *this = mtd->priv;
 660         int read = 0, thislen, column;
 661         int ret = 0;
 662
 663         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 664
 665         /* Initialize return length value */
 666         *retlen = 0;
 667
 668         /* Do not allow reads past end of device */
 669         if (unlikely((from + len) > mtd->size)) {
 670                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
 671                 return -EINVAL;
 672         }
 673
 674         /* Grab the lock and see if the device is available */
 675         onenand_get_device(mtd, FL_READING);
 676
 677         column = from & (mtd->oobsize - 1);
 678
 679         while (read < len) {
 680                 thislen = mtd->oobsize - column;
 681                 thislen = min_t(int, thislen, len);
 682
 683                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 684
 685                 onenand_update_bufferram(mtd, from, 0);
 686
 687                 ret = this->wait(mtd, FL_READING);
 688                 /* First copy data and check return value for ECC handling */
 689
 690                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 691
 692                 read += thislen;
 693
 694                 if (read == len)
 695                         break;
 696
 697                 if (ret) {
 698                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
 699                         goto out;
 700                 }
 701
 702                 buf += thislen;
 703
 704                 /* Read more? */
 705                 if (read < len) {
 706                         /* Page size */
 707                         from += mtd->oobblock;
 708                         column = 0;
 709                 }
 710         }
 711
 712 out:
 713         /* Deselect and wake up anyone waiting on the device */
 714         onenand_release_device(mtd);
 715
 716         *retlen = read;
 717         return ret;
 718 }
 719
 720 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 721 /**
 722  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 723  * @param mtd           MTD device structure
 724  * @param buf           the databuffer to verify
 725  *
 726  * Check DataRAM area directly
 727  */
 728 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
 729 {
 730         struct onenand_chip *this = mtd->priv;
 731         void __iomem *dataram0, *dataram1;
 732         int ret = 0;
 733
 734         this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
 735
 736         ret = this->wait(mtd, FL_READING);
 737         if (ret)
 738                 return ret;
 739
 740         onenand_update_bufferram(mtd, addr, 1);
 741
 742         /* Check, if the two dataram areas are same */
 743         dataram0 = this->base + ONENAND_DATARAM;
 744         dataram1 = dataram0 + mtd->oobblock;
 745
 746         if (memcmp(dataram0, dataram1, mtd->oobblock))
 747                 return -EBADMSG;
 748
 749         return 0;
 750 }
 751 #else
 752 #define onenand_verify_page(...)        (0)
 753 #endif
 754
 755 #define NOTALIGNED(x)   ((x & (mtd->oobblock - 1)) != 0)
 756
 757 /**
 758  * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
 759  * @param mtd           MTD device structure
 760  * @param to            offset to write to
 761  * @param len           number of bytes to write
 762  * @param retlen        pointer to variable to store the number of written bytes
 763  * @param buf           the data to write
 764  * @param eccbuf        filesystem supplied oob data buffer
 765  * @param oobsel        oob selection structure
 766  *
 767  * OneNAND write with ECC
 768  */
 769 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
 770         size_t *retlen, const u_char *buf,
 771         u_char *eccbuf, struct nand_oobinfo *oobsel)
 772 {
 773         struct onenand_chip *this = mtd->priv;
 774         int written = 0;
 775         int ret = 0;
 776
 777         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 778
 779         /* Initialize retlen, in case of early exit */
 780         *retlen = 0;
 781
 782         /* Do not allow writes past end of device */
 783         if (unlikely((to + len) > mtd->size)) {
 784                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n");
 785                 return -EINVAL;
 786         }
 787
 788         /* Reject writes, which are not page aligned */
 789         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 790                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n");
 791                 return -EINVAL;
 792         }
 793
 794         /* Grab the lock and see if the device is available */
 795         onenand_get_device(mtd, FL_WRITING);
 796
 797         /* Loop until all data write */
 798         while (written < len) {
 799                 int thislen = min_t(int, mtd->oobblock, len - written);
 800
 801                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
 802
 803                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
 804                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
 805
 806                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
 807
 808                 onenand_update_bufferram(mtd, to, 1);
 809
 810                 ret = this->wait(mtd, FL_WRITING);
 811                 if (ret) {
 812                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret);
 813                         goto out;
 814                 }
 815
 816                 written += thislen;
 817
 818                 /* Only check verify write turn on */
 819                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
 820                 if (ret) {
 821                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);
 822                         goto out;
 823                 }
 824
 825                 if (written == len)
 826                         break;
 827
 828                 to += thislen;
 829                 buf += thislen;
 830         }
 831
 832 out:
 833         /* Deselect and wake up anyone waiting on the device */
 834         onenand_release_device(mtd);
 835
 836         *retlen = written;
 837
 838         return ret;
 839 }
 840
 841 /**
 842  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
 843  * @param mtd           MTD device structure
 844  * @param to            offset to write to
 845  * @param len           number of bytes to write
 846  * @param retlen        pointer to variable to store the number of written bytes
 847  * @param buf           the data to write
 848  *
 849  * This function simply calls onenand_write_ecc
 850  * with oob buffer and oobsel = NULL
 851  */
 852 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 853         size_t *retlen, const u_char *buf)
 854 {
 855         return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
 856 }
 857
 858 /**
 859  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
 860  * @param mtd           MTD device structure
 861  * @param to            offset to write to
 862  * @param len           number of bytes to write
 863  * @param retlen        pointer to variable to store the number of written bytes
 864  * @param buf           the data to write
 865  *
 866  * OneNAND write out-of-band
 867  */
 868 static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
 869         size_t *retlen, const u_char *buf)
 870 {
 871         struct onenand_chip *this = mtd->priv;
 872         int column, status;
 873         int written = 0;
 874
 875         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 876
 877         /* Initialize retlen, in case of early exit */
 878         *retlen = 0;
 879
 880         /* Do not allow writes past end of device */
 881         if (unlikely((to + len) > mtd->size)) {
 882                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
 883                 return -EINVAL;
 884         }
 885
 886         /* Grab the lock and see if the device is available */
 887         onenand_get_device(mtd, FL_WRITING);
 888
 889         /* Loop until all data write */
 890         while (written < len) {
 891                 int thislen = min_t(int, mtd->oobsize, len - written);
 892
 893                 column = to & (mtd->oobsize - 1);
 894
 895                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
 896
 897                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
 898                 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 899
 900                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
 901
 902                 onenand_update_bufferram(mtd, to, 0);
 903
 904                 status = this->wait(mtd, FL_WRITING);
 905                 if (status)
 906                         goto out;
 907
 908                 written += thislen;
 909
 910                 if (written == len)
 911                         break;
 912
 913                 to += thislen;
 914                 buf += thislen;
 915         }
 916
 917 out:
 918         /* Deselect and wake up anyone waiting on the device */
 919         onenand_release_device(mtd);
 920
 921         *retlen = written;
 922
 923         return 0;
 924 }
 925
 926 /**
 927  * onenand_writev_ecc - [MTD Interface] write with iovec with ecc
 928  * @param mtd           MTD device structure
 929  * @param vecs          the iovectors to write
 930  * @param count         number of vectors
 931  * @param to            offset to write to
 932  * @param retlen        pointer to variable to store the number of written bytes
 933  * @param eccbuf        filesystem supplied oob data buffer
 934  * @param oobsel        oob selection structure
 935  *
 936  * OneNAND write with iovec with ecc
 937  */
 938 static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
 939         unsigned long count, loff_t to, size_t *retlen,
 940         u_char *eccbuf, struct nand_oobinfo *oobsel)
 941 {
 942         struct onenand_chip *this = mtd->priv;
 943         unsigned char *pbuf;
 944         size_t total_len, len;
 945         int i, written = 0;
 946         int ret = 0;
 947
 948         /* Preset written len for early exit */
 949         *retlen = 0;
 950
 951         /* Calculate total length of data */
 952         total_len = 0;
 953         for (i = 0; i < count; i++)
 954                 total_len += vecs[i].iov_len;
 955
 956         DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
 957
 958         /* Do not allow write past end of the device */
 959         if (unlikely((to + total_len) > mtd->size)) {
 960                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n");
 961                 return -EINVAL;
 962         }
 963
 964         /* Reject writes, which are not page aligned */
 965         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) {
 966                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n");
 967                 return -EINVAL;
 968         }
 969
 970         /* Grab the lock and see if the device is available */
 971         onenand_get_device(mtd, FL_WRITING);
 972
 973         /* TODO handling oob */
 974
 975         /* Loop until all keve's data has been written */
 976         len = 0;
 977         while (count) {
 978                 pbuf = this->page_buf;
 979                 /*
 980                  * If the given tuple is >= pagesize then
 981                  * write it out from the iov
 982                  */
 983                 if ((vecs->iov_len - len) >= mtd->oobblock) {
 984                         pbuf = vecs->iov_base + len;
 985
 986                         len += mtd->oobblock;
 987
 988                         /* Check, if we have to switch to the next tuple */
 989                         if (len >= (int) vecs->iov_len) {
 990                                 vecs++;
 991                                 len = 0;
 992                                 count--;
 993                         }
 994                 } else {
 995                         int cnt = 0, thislen;
 996                         while (cnt < mtd->oobblock) {
 997                                 thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len);
 998                                 memcpy(this->page_buf + cnt, vecs->iov_base + len, thislen);
 999                                 cnt += thislen;
1000                                 len += thislen;
1001
1002                                 /* Check, if we have to switch to the next tuple */
1003                                 if (len >= (int) vecs->iov_len) {
1004                                         vecs++;
1005                                         len = 0;
1006                                         count--;
1007                                 }
1008                         }
1009                 }
1010
1011                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
1012
1013                 this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock);
1014                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1015
1016                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
1017
1018                 onenand_update_bufferram(mtd, to, 1);
1019
1020                 ret = this->wait(mtd, FL_WRITING);
1021                 if (ret) {
1022                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret);
1023                         goto out;
1024                 }
1025
1026
1027                 /* Only check verify write turn on */
1028                 ret = onenand_verify_page(mtd, (u_char *) pbuf, to);
1029                 if (ret) {
1030                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret);
1031                         goto out;
1032                 }
1033
1034                 written += mtd->oobblock;
1035
1036                 to += mtd->oobblock;
1037         }
1038
1039 out:
1040         /* Deselect and wakt up anyone waiting on the device */
1041         onenand_release_device(mtd);
1042
1043         *retlen = written;
1044
1045         return 0;
1046 }
1047
1048 /**
1049  * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc
1050  * @param mtd           MTD device structure
1051  * @param vecs          the iovectors to write
1052  * @param count         number of vectors
1053  * @param to            offset to write to
1054  * @param retlen        pointer to variable to store the number of written bytes
1055  *
1056  * OneNAND write with kvec. This just calls the ecc function
1057  */
1058 static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs,
1059         unsigned long count, loff_t to, size_t *retlen)
1060 {
1061         return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL);
1062 }
1063
1064 /**
1065  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1066  * @param mtd           MTD device structure
1067  * @param ofs           offset from device start
1068  * @param getchip       0, if the chip is already selected
1069  * @param allowbbt      1, if its allowed to access the bbt area
1070  *
1071  * Check, if the block is bad. Either by reading the bad block table or
1072  * calling of the scan function.
1073  */
1074 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1075 {
1076         struct onenand_chip *this = mtd->priv;
1077         struct bbm_info *bbm = this->bbm;
1078
1079         /* Return info from the table */
1080         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1081 }
1082
1083 /**
1084  * onenand_erase - [MTD Interface] erase block(s)
1085  * @param mtd           MTD device structure
1086  * @param instr         erase instruction
1087  *
1088  * Erase one ore more blocks
1089  */
1090 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1091 {
1092         struct onenand_chip *this = mtd->priv;
1093         unsigned int block_size;
1094         loff_t addr;
1095         int len;
1096         int ret = 0;
1097
1098         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1099
1100         block_size = (1 << this->erase_shift);
1101
1102         /* Start address must align on block boundary */
1103         if (unlikely(instr->addr & (block_size - 1))) {
1104                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1105                 return -EINVAL;
1106         }
1107
1108         /* Length must align on block boundary */
1109         if (unlikely(instr->len & (block_size - 1))) {
1110                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1111                 return -EINVAL;
1112         }
1113
1114         /* Do not allow erase past end of device */
1115         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1116                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1117                 return -EINVAL;
1118         }
1119
1120         instr->fail_addr = 0xffffffff;
1121
1122         /* Grab the lock and see if the device is available */
1123         onenand_get_device(mtd, FL_ERASING);
1124
1125         /* Loop throught the pages */
1126         len = instr->len;
1127         addr = instr->addr;
1128
1129         instr->state = MTD_ERASING;
1130
1131         while (len) {
1132
1133                 /* Check if we have a bad block, we do not erase bad blocks */
1134                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1135                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1136                         instr->state = MTD_ERASE_FAILED;
1137                         goto erase_exit;
1138                 }
1139
1140                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1141
1142                 ret = this->wait(mtd, FL_ERASING);
1143                 /* Check, if it is write protected */
1144                 if (ret) {
1145                         if (ret == -EPERM)
1146                                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1147                         else
1148                                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1149                         instr->state = MTD_ERASE_FAILED;
1150                         instr->fail_addr = addr;
1151                         goto erase_exit;
1152                 }
1153
1154                 len -= block_size;
1155                 addr += block_size;
1156         }
1157
1158         instr->state = MTD_ERASE_DONE;
1159
1160 erase_exit:
1161
1162         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1163         /* Do call back function */
1164         if (!ret)
1165                 mtd_erase_callback(instr);
1166
1167         /* Deselect and wake up anyone waiting on the device */
1168         onenand_release_device(mtd);
1169
1170         return ret;
1171 }
1172
1173 /**
1174  * onenand_sync - [MTD Interface] sync
1175  * @param mtd           MTD device structure
1176  *
1177  * Sync is actually a wait for chip ready function
1178  */
1179 static void onenand_sync(struct mtd_info *mtd)
1180 {
1181         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1182
1183         /* Grab the lock and see if the device is available */
1184         onenand_get_device(mtd, FL_SYNCING);
1185
1186         /* Release it and go back */
1187         onenand_release_device(mtd);
1188 }
1189
1190
1191 /**
1192  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1193  * @param mtd           MTD device structure
1194  * @param ofs           offset relative to mtd start
1195  *
1196  * Check whether the block is bad
1197  */
1198 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1199 {
1200         /* Check for invalid offset */
1201         if (ofs > mtd->size)
1202                 return -EINVAL;
1203
1204         return onenand_block_checkbad(mtd, ofs, 1, 0);
1205 }
1206
1207 /**
1208  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1209  * @param mtd           MTD device structure
1210  * @param ofs           offset from device start
1211  *
1212  * This is the default implementation, which can be overridden by
1213  * a hardware specific driver.
1214  */
1215 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1216 {
1217         struct onenand_chip *this = mtd->priv;
1218         struct bbm_info *bbm = this->bbm;
1219         u_char buf[2] = {0, 0};
1220         size_t retlen;
1221         int block;
1222
1223         /* Get block number */
1224         block = ((int) ofs) >> bbm->bbt_erase_shift;
1225         if (bbm->bbt)
1226                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1227
1228         /* We write two bytes, so we dont have to mess with 16 bit access */
1229         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1230         return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
1231 }
1232
1233 /**
1234  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1235  * @param mtd           MTD device structure
1236  * @param ofs           offset relative to mtd start
1237  *
1238  * Mark the block as bad
1239  */
1240 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1241 {
1242         struct onenand_chip *this = mtd->priv;
1243         int ret;
1244
1245         ret = onenand_block_isbad(mtd, ofs);
1246         if (ret) {
1247                 /* If it was bad already, return success and do nothing */
1248                 if (ret > 0)
1249                         return 0;
1250                 return ret;
1251         }
1252
1253         return this->block_markbad(mtd, ofs);
1254 }
1255
1256 /**
1257  * onenand_unlock - [MTD Interface] Unlock block(s)
1258  * @param mtd           MTD device structure
1259  * @param ofs           offset relative to mtd start
1260  * @param len           number of bytes to unlock
1261  *
1262  * Unlock one or more blocks
1263  */
1264 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1265 {
1266         struct onenand_chip *this = mtd->priv;
1267         int start, end, block, value, status;
1268
1269         start = ofs >> this->erase_shift;
1270         end = len >> this->erase_shift;
1271
1272         /* Continuous lock scheme */
1273         if (this->options & ONENAND_CONT_LOCK) {
1274                 /* Set start block address */
1275                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1276                 /* Set end block address */
1277                 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1278                 /* Write unlock command */
1279                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1280
1281                 /* There's no return value */
1282                 this->wait(mtd, FL_UNLOCKING);
1283
1284                 /* Sanity check */
1285                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1286                     & ONENAND_CTRL_ONGO)
1287                         continue;
1288
1289                 /* Check lock status */
1290                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1291                 if (!(status & ONENAND_WP_US))
1292                         printk(KERN_ERR "wp status = 0x%x\n", status);
1293
1294                 return 0;
1295         }
1296
1297         /* Block lock scheme */
1298         for (block = start; block < end; block++) {
1299                 /* Set block address */
1300                 value = onenand_block_address(this, block);
1301                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1302                 /* Select DataRAM for DDP */
1303                 value = onenand_bufferram_address(this, block);
1304                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1305                 /* Set start block address */
1306                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1307                 /* Write unlock command */
1308                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1309
1310                 /* There's no return value */
1311                 this->wait(mtd, FL_UNLOCKING);
1312
1313                 /* Sanity check */
1314                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1315                     & ONENAND_CTRL_ONGO)
1316                         continue;
1317
1318                 /* Check lock status */
1319                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1320                 if (!(status & ONENAND_WP_US))
1321                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1322         }
1323
1324         return 0;
1325 }
1326
1327 /**
1328  * onenand_print_device_info - Print device ID
1329  * @param device        device ID
1330  *
1331  * Print device ID
1332  */
1333 static void onenand_print_device_info(int device)
1334 {
1335         int vcc, demuxed, ddp, density;
1336
1337         vcc = device & ONENAND_DEVICE_VCC_MASK;
1338         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1339         ddp = device & ONENAND_DEVICE_IS_DDP;
1340         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1341         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1342                 demuxed ? "" : "Muxed ",
1343                 ddp ? "(DDP)" : "",
1344                 (16 << density),
1345                 vcc ? "2.65/3.3" : "1.8",
1346                 device);
1347 }
1348
1349 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1350         {ONENAND_MFR_SAMSUNG, "Samsung"},
1351 };
1352
1353 /**
1354  * onenand_check_maf - Check manufacturer ID
1355  * @param manuf         manufacturer ID
1356  *
1357  * Check manufacturer ID
1358  */
1359 static int onenand_check_maf(int manuf)
1360 {
1361         int size = ARRAY_SIZE(onenand_manuf_ids);
1362         char *name;
1363         int i;
1364
1365         for (i = 0; i < size; i++)
1366                 if (manuf == onenand_manuf_ids[i].id)
1367                         break;
1368
1369         if (i < size)
1370                 name = onenand_manuf_ids[i].name;
1371         else
1372                 name = "Unknown";
1373
1374         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1375
1376         return (i == size);
1377 }
1378
1379 /**
1380  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1381  * @param mtd           MTD device structure
1382  *
1383  * OneNAND detection method:
1384  *   Compare the the values from command with ones from register
1385  */
1386 static int onenand_probe(struct mtd_info *mtd)
1387 {
1388         struct onenand_chip *this = mtd->priv;
1389         int bram_maf_id, bram_dev_id, maf_id, dev_id;
1390         int version_id;
1391         int density;
1392
1393         /* Send the command for reading device ID from BootRAM */
1394         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1395
1396         /* Read manufacturer and device IDs from BootRAM */
1397         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1398         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1399
1400         /* Check manufacturer ID */
1401         if (onenand_check_maf(bram_maf_id))
1402                 return -ENXIO;
1403
1404         /* Reset OneNAND to read default register values */
1405         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1406
1407         /* Read manufacturer and device IDs from Register */
1408         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1409         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1410
1411         /* Check OneNAND device */
1412         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1413                 return -ENXIO;
1414
1415         /* Flash device information */
1416         onenand_print_device_info(dev_id);
1417         this->device_id = dev_id;
1418
1419         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1420         this->chipsize = (16 << density) << 20;
1421         /* Set density mask. it is used for DDP */
1422         this->density_mask = (1 << (density + 6));
1423
1424         /* OneNAND page size & block size */
1425         /* The data buffer size is equal to page size */
1426         mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1427         mtd->oobsize = mtd->oobblock >> 5;
1428         /* Pagers per block is always 64 in OneNAND */
1429         mtd->erasesize = mtd->oobblock << 6;
1430
1431         this->erase_shift = ffs(mtd->erasesize) - 1;
1432         this->page_shift = ffs(mtd->oobblock) - 1;
1433         this->ppb_shift = (this->erase_shift - this->page_shift);
1434         this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1435
1436         /* REVIST: Multichip handling */
1437
1438         mtd->size = this->chipsize;
1439
1440         /* Version ID */
1441         version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1442         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1443
1444         /* Lock scheme */
1445         if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1446             !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1447                 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1448                 this->options |= ONENAND_CONT_LOCK;
1449         }
1450
1451         return 0;
1452 }
1453
1454 /**
1455  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1456  * @param mtd           MTD device structure
1457  */
1458 static int onenand_suspend(struct mtd_info *mtd)
1459 {
1460         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1461 }
1462
1463 /**
1464  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1465  * @param mtd           MTD device structure
1466  */
1467 static void onenand_resume(struct mtd_info *mtd)
1468 {
1469         struct onenand_chip *this = mtd->priv;
1470
1471         if (this->state == FL_PM_SUSPENDED)
1472                 onenand_release_device(mtd);
1473         else
1474                 printk(KERN_ERR "resume() called for the chip which is not"
1475                                 "in suspended state\n");
1476 }
1477
1478
1479 /**
1480  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1481  * @param mtd           MTD device structure
1482  * @param maxchips      Number of chips to scan for
1483  *
1484  * This fills out all the not initialized function pointers
1485  * with the defaults.
1486  * The flash ID is read and the mtd/chip structures are
1487  * filled with the appropriate values.
1488  */
1489 int onenand_scan(struct mtd_info *mtd, int maxchips)
1490 {
1491         struct onenand_chip *this = mtd->priv;
1492
1493         if (!this->read_word)
1494                 this->read_word = onenand_readw;
1495         if (!this->write_word)
1496                 this->write_word = onenand_writew;
1497
1498         if (!this->command)
1499                 this->command = onenand_command;
1500         if (!this->wait)
1501                 this->wait = onenand_wait;
1502
1503         if (!this->read_bufferram)
1504                 this->read_bufferram = onenand_read_bufferram;
1505         if (!this->write_bufferram)
1506                 this->write_bufferram = onenand_write_bufferram;
1507
1508         if (!this->block_markbad)
1509                 this->block_markbad = onenand_default_block_markbad;
1510         if (!this->scan_bbt)
1511                 this->scan_bbt = onenand_default_bbt;
1512
1513         if (onenand_probe(mtd))
1514                 return -ENXIO;
1515
1516         /* Set Sync. Burst Read after probing */
1517         if (this->mmcontrol) {
1518                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1519                 this->read_bufferram = onenand_sync_read_bufferram;
1520         }
1521
1522         /* Allocate buffers, if necessary */
1523         if (!this->page_buf) {
1524                 size_t len;
1525                 len = mtd->oobblock + mtd->oobsize;
1526                 this->page_buf = kmalloc(len, GFP_KERNEL);
1527                 if (!this->page_buf) {
1528                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
1529                         return -ENOMEM;
1530                 }
1531                 this->options |= ONENAND_PAGEBUF_ALLOC;
1532         }
1533
1534         this->state = FL_READY;
1535         init_waitqueue_head(&this->wq);
1536         spin_lock_init(&this->chip_lock);
1537
1538         switch (mtd->oobsize) {
1539         case 64:
1540                 this->autooob = &onenand_oob_64;
1541                 break;
1542
1543         case 32:
1544                 this->autooob = &onenand_oob_32;
1545                 break;
1546
1547         default:
1548                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1549                         mtd->oobsize);
1550                 /* To prevent kernel oops */
1551                 this->autooob = &onenand_oob_32;
1552                 break;
1553         }
1554
1555         memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
1556
1557         /* Fill in remaining MTD driver data */
1558         mtd->type = MTD_NANDFLASH;
1559         mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1560         mtd->ecctype = MTD_ECC_SW;
1561         mtd->erase = onenand_erase;
1562         mtd->point = NULL;
1563         mtd->unpoint = NULL;
1564         mtd->read = onenand_read;
1565         mtd->write = onenand_write;
1566         mtd->read_ecc = onenand_read_ecc;
1567         mtd->write_ecc = onenand_write_ecc;
1568         mtd->read_oob = onenand_read_oob;
1569         mtd->write_oob = onenand_write_oob;
1570         mtd->readv = NULL;
1571         mtd->readv_ecc = NULL;
1572         mtd->writev = onenand_writev;
1573         mtd->writev_ecc = onenand_writev_ecc;
1574         mtd->sync = onenand_sync;
1575         mtd->lock = NULL;
1576         mtd->unlock = onenand_unlock;
1577         mtd->suspend = onenand_suspend;
1578         mtd->resume = onenand_resume;
1579         mtd->block_isbad = onenand_block_isbad;
1580         mtd->block_markbad = onenand_block_markbad;
1581         mtd->owner = THIS_MODULE;
1582
1583         /* Unlock whole block */
1584         mtd->unlock(mtd, 0x0, this->chipsize);
1585
1586         return this->scan_bbt(mtd);
1587 }
1588
1589 /**
1590  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1591  * @param mtd           MTD device structure
1592  */
1593 void onenand_release(struct mtd_info *mtd)
1594 {
1595         struct onenand_chip *this = mtd->priv;
1596
1597 #ifdef CONFIG_MTD_PARTITIONS
1598         /* Deregister partitions */
1599         del_mtd_partitions (mtd);
1600 #endif
1601         /* Deregister the device */
1602         del_mtd_device (mtd);
1603
1604         /* Free bad block table memory, if allocated */
1605         if (this->bbm)
1606                 kfree(this->bbm);
1607         /* Buffer allocated by onenand_scan */
1608         if (this->options & ONENAND_PAGEBUF_ALLOC)
1609                 kfree(this->page_buf);
1610 }
1611
1612 EXPORT_SYMBOL_GPL(onenand_scan);
1613 EXPORT_SYMBOL_GPL(onenand_release);
1614
1615 MODULE_LICENSE("GPL");
1616 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1617 MODULE_DESCRIPTION("Generic OneNAND flash driver code");