Merge branch 'for-2.6.30' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[linux-2.6] / arch / arm / plat-omap / mcbsp.c
1 /*
2  * linux/arch/arm/plat-omap/mcbsp.c
3  *
4  * Copyright (C) 2004 Nokia Corporation
5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
6  *
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Multichannel mode not supported.
13  */
14
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/completion.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
25 #include <linux/io.h>
26
27 #include <mach/dma.h>
28 #include <mach/mcbsp.h>
29
30 struct omap_mcbsp **mcbsp_ptr;
31 int omap_mcbsp_count;
32
33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
34 {
35         if (cpu_class_is_omap1() || cpu_is_omap2420())
36                 __raw_writew((u16)val, io_base + reg);
37         else
38                 __raw_writel(val, io_base + reg);
39 }
40
41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
42 {
43         if (cpu_class_is_omap1() || cpu_is_omap2420())
44                 return __raw_readw(io_base + reg);
45         else
46                 return __raw_readl(io_base + reg);
47 }
48
49 #define OMAP_MCBSP_READ(base, reg) \
50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51 #define OMAP_MCBSP_WRITE(base, reg, val) \
52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
53
54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
56
57 static void omap_mcbsp_dump_reg(u8 id)
58 {
59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
60
61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88         dev_dbg(mcbsp->dev, "***********************\n");
89 }
90
91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
92 {
93         struct omap_mcbsp *mcbsp_tx = dev_id;
94
95         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
96                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
97
98         complete(&mcbsp_tx->tx_irq_completion);
99
100         return IRQ_HANDLED;
101 }
102
103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
104 {
105         struct omap_mcbsp *mcbsp_rx = dev_id;
106
107         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
108                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
109
110         complete(&mcbsp_rx->rx_irq_completion);
111
112         return IRQ_HANDLED;
113 }
114
115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
116 {
117         struct omap_mcbsp *mcbsp_dma_tx = data;
118
119         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
120                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
121
122         /* We can free the channels */
123         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
124         mcbsp_dma_tx->dma_tx_lch = -1;
125
126         complete(&mcbsp_dma_tx->tx_dma_completion);
127 }
128
129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
130 {
131         struct omap_mcbsp *mcbsp_dma_rx = data;
132
133         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
134                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
135
136         /* We can free the channels */
137         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
138         mcbsp_dma_rx->dma_rx_lch = -1;
139
140         complete(&mcbsp_dma_rx->rx_dma_completion);
141 }
142
143 /*
144  * omap_mcbsp_config simply write a config to the
145  * appropriate McBSP.
146  * You either call this function or set the McBSP registers
147  * by yourself before calling omap_mcbsp_start().
148  */
149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
150 {
151         struct omap_mcbsp *mcbsp;
152         void __iomem *io_base;
153
154         if (!omap_mcbsp_check_valid_id(id)) {
155                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
156                 return;
157         }
158         mcbsp = id_to_mcbsp_ptr(id);
159
160         io_base = mcbsp->io_base;
161         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
162                         mcbsp->id, mcbsp->phys_base);
163
164         /* We write the given config */
165         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
166         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
167         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
168         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
169         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
170         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
171         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
172         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
173         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
174         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
175         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
176         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
177                 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
178                 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
179         }
180 }
181 EXPORT_SYMBOL(omap_mcbsp_config);
182
183 /*
184  * We can choose between IRQ based or polled IO.
185  * This needs to be called before omap_mcbsp_request().
186  */
187 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
188 {
189         struct omap_mcbsp *mcbsp;
190
191         if (!omap_mcbsp_check_valid_id(id)) {
192                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
193                 return -ENODEV;
194         }
195         mcbsp = id_to_mcbsp_ptr(id);
196
197         spin_lock(&mcbsp->lock);
198
199         if (!mcbsp->free) {
200                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
201                         mcbsp->id);
202                 spin_unlock(&mcbsp->lock);
203                 return -EINVAL;
204         }
205
206         mcbsp->io_type = io_type;
207
208         spin_unlock(&mcbsp->lock);
209
210         return 0;
211 }
212 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
213
214 int omap_mcbsp_request(unsigned int id)
215 {
216         struct omap_mcbsp *mcbsp;
217         int err;
218
219         if (!omap_mcbsp_check_valid_id(id)) {
220                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
221                 return -ENODEV;
222         }
223         mcbsp = id_to_mcbsp_ptr(id);
224
225         spin_lock(&mcbsp->lock);
226         if (!mcbsp->free) {
227                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
228                         mcbsp->id);
229                 spin_unlock(&mcbsp->lock);
230                 return -EBUSY;
231         }
232
233         mcbsp->free = 0;
234         spin_unlock(&mcbsp->lock);
235
236         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
237                 mcbsp->pdata->ops->request(id);
238
239         clk_enable(mcbsp->iclk);
240         clk_enable(mcbsp->fclk);
241
242         /*
243          * Make sure that transmitter, receiver and sample-rate generator are
244          * not running before activating IRQs.
245          */
246         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
247         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
248
249         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
250                 /* We need to get IRQs here */
251                 init_completion(&mcbsp->tx_irq_completion);
252                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
253                                         0, "McBSP", (void *)mcbsp);
254                 if (err != 0) {
255                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
256                                         "for McBSP%d\n", mcbsp->tx_irq,
257                                         mcbsp->id);
258                         return err;
259                 }
260
261                 init_completion(&mcbsp->rx_irq_completion);
262                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
263                                         0, "McBSP", (void *)mcbsp);
264                 if (err != 0) {
265                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
266                                         "for McBSP%d\n", mcbsp->rx_irq,
267                                         mcbsp->id);
268                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
269                         return err;
270                 }
271         }
272
273         return 0;
274 }
275 EXPORT_SYMBOL(omap_mcbsp_request);
276
277 void omap_mcbsp_free(unsigned int id)
278 {
279         struct omap_mcbsp *mcbsp;
280
281         if (!omap_mcbsp_check_valid_id(id)) {
282                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
283                 return;
284         }
285         mcbsp = id_to_mcbsp_ptr(id);
286
287         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
288                 mcbsp->pdata->ops->free(id);
289
290         clk_disable(mcbsp->fclk);
291         clk_disable(mcbsp->iclk);
292
293         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
294                 /* Free IRQs */
295                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
296                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
297         }
298
299         spin_lock(&mcbsp->lock);
300         if (mcbsp->free) {
301                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
302                         mcbsp->id);
303                 spin_unlock(&mcbsp->lock);
304                 return;
305         }
306
307         mcbsp->free = 1;
308         spin_unlock(&mcbsp->lock);
309 }
310 EXPORT_SYMBOL(omap_mcbsp_free);
311
312 /*
313  * Here we start the McBSP, by enabling the sample
314  * generator, both transmitter and receivers,
315  * and the frame sync.
316  */
317 void omap_mcbsp_start(unsigned int id)
318 {
319         struct omap_mcbsp *mcbsp;
320         void __iomem *io_base;
321         u16 w;
322
323         if (!omap_mcbsp_check_valid_id(id)) {
324                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
325                 return;
326         }
327         mcbsp = id_to_mcbsp_ptr(id);
328         io_base = mcbsp->io_base;
329
330         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
331         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
332
333         /* Start the sample generator */
334         w = OMAP_MCBSP_READ(io_base, SPCR2);
335         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
336
337         /* Enable transmitter and receiver */
338         w = OMAP_MCBSP_READ(io_base, SPCR2);
339         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
340
341         w = OMAP_MCBSP_READ(io_base, SPCR1);
342         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
343
344         udelay(100);
345
346         /* Start frame sync */
347         w = OMAP_MCBSP_READ(io_base, SPCR2);
348         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
349
350         /* Dump McBSP Regs */
351         omap_mcbsp_dump_reg(id);
352 }
353 EXPORT_SYMBOL(omap_mcbsp_start);
354
355 void omap_mcbsp_stop(unsigned int id)
356 {
357         struct omap_mcbsp *mcbsp;
358         void __iomem *io_base;
359         u16 w;
360
361         if (!omap_mcbsp_check_valid_id(id)) {
362                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
363                 return;
364         }
365
366         mcbsp = id_to_mcbsp_ptr(id);
367         io_base = mcbsp->io_base;
368
369         /* Reset transmitter */
370         w = OMAP_MCBSP_READ(io_base, SPCR2);
371         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
372
373         /* Reset receiver */
374         w = OMAP_MCBSP_READ(io_base, SPCR1);
375         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
376
377         /* Reset the sample rate generator */
378         w = OMAP_MCBSP_READ(io_base, SPCR2);
379         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
380 }
381 EXPORT_SYMBOL(omap_mcbsp_stop);
382
383 /* polled mcbsp i/o operations */
384 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
385 {
386         struct omap_mcbsp *mcbsp;
387         void __iomem *base;
388
389         if (!omap_mcbsp_check_valid_id(id)) {
390                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
391                 return -ENODEV;
392         }
393
394         mcbsp = id_to_mcbsp_ptr(id);
395         base = mcbsp->io_base;
396
397         writew(buf, base + OMAP_MCBSP_REG_DXR1);
398         /* if frame sync error - clear the error */
399         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
400                 /* clear error */
401                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
402                        base + OMAP_MCBSP_REG_SPCR2);
403                 /* resend */
404                 return -1;
405         } else {
406                 /* wait for transmit confirmation */
407                 int attemps = 0;
408                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
409                         if (attemps++ > 1000) {
410                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
411                                        (~XRST),
412                                        base + OMAP_MCBSP_REG_SPCR2);
413                                 udelay(10);
414                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
415                                        (XRST),
416                                        base + OMAP_MCBSP_REG_SPCR2);
417                                 udelay(10);
418                                 dev_err(mcbsp->dev, "Could not write to"
419                                         " McBSP%d Register\n", mcbsp->id);
420                                 return -2;
421                         }
422                 }
423         }
424
425         return 0;
426 }
427 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
428
429 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
430 {
431         struct omap_mcbsp *mcbsp;
432         void __iomem *base;
433
434         if (!omap_mcbsp_check_valid_id(id)) {
435                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
436                 return -ENODEV;
437         }
438         mcbsp = id_to_mcbsp_ptr(id);
439
440         base = mcbsp->io_base;
441         /* if frame sync error - clear the error */
442         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
443                 /* clear error */
444                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
445                        base + OMAP_MCBSP_REG_SPCR1);
446                 /* resend */
447                 return -1;
448         } else {
449                 /* wait for recieve confirmation */
450                 int attemps = 0;
451                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
452                         if (attemps++ > 1000) {
453                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
454                                        (~RRST),
455                                        base + OMAP_MCBSP_REG_SPCR1);
456                                 udelay(10);
457                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
458                                        (RRST),
459                                        base + OMAP_MCBSP_REG_SPCR1);
460                                 udelay(10);
461                                 dev_err(mcbsp->dev, "Could not read from"
462                                         " McBSP%d Register\n", mcbsp->id);
463                                 return -2;
464                         }
465                 }
466         }
467         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
468
469         return 0;
470 }
471 EXPORT_SYMBOL(omap_mcbsp_pollread);
472
473 /*
474  * IRQ based word transmission.
475  */
476 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
477 {
478         struct omap_mcbsp *mcbsp;
479         void __iomem *io_base;
480         omap_mcbsp_word_length word_length;
481
482         if (!omap_mcbsp_check_valid_id(id)) {
483                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
484                 return;
485         }
486
487         mcbsp = id_to_mcbsp_ptr(id);
488         io_base = mcbsp->io_base;
489         word_length = mcbsp->tx_word_length;
490
491         wait_for_completion(&mcbsp->tx_irq_completion);
492
493         if (word_length > OMAP_MCBSP_WORD_16)
494                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
495         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
496 }
497 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
498
499 u32 omap_mcbsp_recv_word(unsigned int id)
500 {
501         struct omap_mcbsp *mcbsp;
502         void __iomem *io_base;
503         u16 word_lsb, word_msb = 0;
504         omap_mcbsp_word_length word_length;
505
506         if (!omap_mcbsp_check_valid_id(id)) {
507                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
508                 return -ENODEV;
509         }
510         mcbsp = id_to_mcbsp_ptr(id);
511
512         word_length = mcbsp->rx_word_length;
513         io_base = mcbsp->io_base;
514
515         wait_for_completion(&mcbsp->rx_irq_completion);
516
517         if (word_length > OMAP_MCBSP_WORD_16)
518                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
519         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
520
521         return (word_lsb | (word_msb << 16));
522 }
523 EXPORT_SYMBOL(omap_mcbsp_recv_word);
524
525 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
526 {
527         struct omap_mcbsp *mcbsp;
528         void __iomem *io_base;
529         omap_mcbsp_word_length tx_word_length;
530         omap_mcbsp_word_length rx_word_length;
531         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
532
533         if (!omap_mcbsp_check_valid_id(id)) {
534                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
535                 return -ENODEV;
536         }
537         mcbsp = id_to_mcbsp_ptr(id);
538         io_base = mcbsp->io_base;
539         tx_word_length = mcbsp->tx_word_length;
540         rx_word_length = mcbsp->rx_word_length;
541
542         if (tx_word_length != rx_word_length)
543                 return -EINVAL;
544
545         /* First we wait for the transmitter to be ready */
546         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
547         while (!(spcr2 & XRDY)) {
548                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
549                 if (attempts++ > 1000) {
550                         /* We must reset the transmitter */
551                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
552                         udelay(10);
553                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
554                         udelay(10);
555                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
556                                 "ready\n", mcbsp->id);
557                         return -EAGAIN;
558                 }
559         }
560
561         /* Now we can push the data */
562         if (tx_word_length > OMAP_MCBSP_WORD_16)
563                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
564         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
565
566         /* We wait for the receiver to be ready */
567         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
568         while (!(spcr1 & RRDY)) {
569                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
570                 if (attempts++ > 1000) {
571                         /* We must reset the receiver */
572                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
573                         udelay(10);
574                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
575                         udelay(10);
576                         dev_err(mcbsp->dev, "McBSP%d receiver not "
577                                 "ready\n", mcbsp->id);
578                         return -EAGAIN;
579                 }
580         }
581
582         /* Receiver is ready, let's read the dummy data */
583         if (rx_word_length > OMAP_MCBSP_WORD_16)
584                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
585         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
586
587         return 0;
588 }
589 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
590
591 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
592 {
593         struct omap_mcbsp *mcbsp;
594         u32 clock_word = 0;
595         void __iomem *io_base;
596         omap_mcbsp_word_length tx_word_length;
597         omap_mcbsp_word_length rx_word_length;
598         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
599
600         if (!omap_mcbsp_check_valid_id(id)) {
601                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
602                 return -ENODEV;
603         }
604
605         mcbsp = id_to_mcbsp_ptr(id);
606         io_base = mcbsp->io_base;
607
608         tx_word_length = mcbsp->tx_word_length;
609         rx_word_length = mcbsp->rx_word_length;
610
611         if (tx_word_length != rx_word_length)
612                 return -EINVAL;
613
614         /* First we wait for the transmitter to be ready */
615         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
616         while (!(spcr2 & XRDY)) {
617                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
618                 if (attempts++ > 1000) {
619                         /* We must reset the transmitter */
620                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
621                         udelay(10);
622                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
623                         udelay(10);
624                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
625                                 "ready\n", mcbsp->id);
626                         return -EAGAIN;
627                 }
628         }
629
630         /* We first need to enable the bus clock */
631         if (tx_word_length > OMAP_MCBSP_WORD_16)
632                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
633         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
634
635         /* We wait for the receiver to be ready */
636         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
637         while (!(spcr1 & RRDY)) {
638                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
639                 if (attempts++ > 1000) {
640                         /* We must reset the receiver */
641                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
642                         udelay(10);
643                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
644                         udelay(10);
645                         dev_err(mcbsp->dev, "McBSP%d receiver not "
646                                 "ready\n", mcbsp->id);
647                         return -EAGAIN;
648                 }
649         }
650
651         /* Receiver is ready, there is something for us */
652         if (rx_word_length > OMAP_MCBSP_WORD_16)
653                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
654         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
655
656         word[0] = (word_lsb | (word_msb << 16));
657
658         return 0;
659 }
660 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
661
662 /*
663  * Simple DMA based buffer rx/tx routines.
664  * Nothing fancy, just a single buffer tx/rx through DMA.
665  * The DMA resources are released once the transfer is done.
666  * For anything fancier, you should use your own customized DMA
667  * routines and callbacks.
668  */
669 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
670                                 unsigned int length)
671 {
672         struct omap_mcbsp *mcbsp;
673         int dma_tx_ch;
674         int src_port = 0;
675         int dest_port = 0;
676         int sync_dev = 0;
677
678         if (!omap_mcbsp_check_valid_id(id)) {
679                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
680                 return -ENODEV;
681         }
682         mcbsp = id_to_mcbsp_ptr(id);
683
684         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
685                                 omap_mcbsp_tx_dma_callback,
686                                 mcbsp,
687                                 &dma_tx_ch)) {
688                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
689                                 "McBSP%d TX. Trying IRQ based TX\n",
690                                 mcbsp->id);
691                 return -EAGAIN;
692         }
693         mcbsp->dma_tx_lch = dma_tx_ch;
694
695         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
696                 dma_tx_ch);
697
698         init_completion(&mcbsp->tx_dma_completion);
699
700         if (cpu_class_is_omap1()) {
701                 src_port = OMAP_DMA_PORT_TIPB;
702                 dest_port = OMAP_DMA_PORT_EMIFF;
703         }
704         if (cpu_class_is_omap2())
705                 sync_dev = mcbsp->dma_tx_sync;
706
707         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
708                                      OMAP_DMA_DATA_TYPE_S16,
709                                      length >> 1, 1,
710                                      OMAP_DMA_SYNC_ELEMENT,
711          sync_dev, 0);
712
713         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
714                                  src_port,
715                                  OMAP_DMA_AMODE_CONSTANT,
716                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
717                                  0, 0);
718
719         omap_set_dma_src_params(mcbsp->dma_tx_lch,
720                                 dest_port,
721                                 OMAP_DMA_AMODE_POST_INC,
722                                 buffer,
723                                 0, 0);
724
725         omap_start_dma(mcbsp->dma_tx_lch);
726         wait_for_completion(&mcbsp->tx_dma_completion);
727
728         return 0;
729 }
730 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
731
732 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
733                                 unsigned int length)
734 {
735         struct omap_mcbsp *mcbsp;
736         int dma_rx_ch;
737         int src_port = 0;
738         int dest_port = 0;
739         int sync_dev = 0;
740
741         if (!omap_mcbsp_check_valid_id(id)) {
742                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
743                 return -ENODEV;
744         }
745         mcbsp = id_to_mcbsp_ptr(id);
746
747         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
748                                 omap_mcbsp_rx_dma_callback,
749                                 mcbsp,
750                                 &dma_rx_ch)) {
751                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
752                                 "McBSP%d RX. Trying IRQ based RX\n",
753                                 mcbsp->id);
754                 return -EAGAIN;
755         }
756         mcbsp->dma_rx_lch = dma_rx_ch;
757
758         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
759                 dma_rx_ch);
760
761         init_completion(&mcbsp->rx_dma_completion);
762
763         if (cpu_class_is_omap1()) {
764                 src_port = OMAP_DMA_PORT_TIPB;
765                 dest_port = OMAP_DMA_PORT_EMIFF;
766         }
767         if (cpu_class_is_omap2())
768                 sync_dev = mcbsp->dma_rx_sync;
769
770         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
771                                         OMAP_DMA_DATA_TYPE_S16,
772                                         length >> 1, 1,
773                                         OMAP_DMA_SYNC_ELEMENT,
774                                         sync_dev, 0);
775
776         omap_set_dma_src_params(mcbsp->dma_rx_lch,
777                                 src_port,
778                                 OMAP_DMA_AMODE_CONSTANT,
779                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
780                                 0, 0);
781
782         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
783                                         dest_port,
784                                         OMAP_DMA_AMODE_POST_INC,
785                                         buffer,
786                                         0, 0);
787
788         omap_start_dma(mcbsp->dma_rx_lch);
789         wait_for_completion(&mcbsp->rx_dma_completion);
790
791         return 0;
792 }
793 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
794
795 /*
796  * SPI wrapper.
797  * Since SPI setup is much simpler than the generic McBSP one,
798  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
799  * Once this is done, you can call omap_mcbsp_start().
800  */
801 void omap_mcbsp_set_spi_mode(unsigned int id,
802                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
803 {
804         struct omap_mcbsp *mcbsp;
805         struct omap_mcbsp_reg_cfg mcbsp_cfg;
806
807         if (!omap_mcbsp_check_valid_id(id)) {
808                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
809                 return;
810         }
811         mcbsp = id_to_mcbsp_ptr(id);
812
813         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
814
815         /* SPI has only one frame */
816         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
817         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
818
819         /* Clock stop mode */
820         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
821                 mcbsp_cfg.spcr1 |= (1 << 12);
822         else
823                 mcbsp_cfg.spcr1 |= (3 << 11);
824
825         /* Set clock parities */
826         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
827                 mcbsp_cfg.pcr0 |= CLKRP;
828         else
829                 mcbsp_cfg.pcr0 &= ~CLKRP;
830
831         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
832                 mcbsp_cfg.pcr0 &= ~CLKXP;
833         else
834                 mcbsp_cfg.pcr0 |= CLKXP;
835
836         /* Set SCLKME to 0 and CLKSM to 1 */
837         mcbsp_cfg.pcr0 &= ~SCLKME;
838         mcbsp_cfg.srgr2 |= CLKSM;
839
840         /* Set FSXP */
841         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
842                 mcbsp_cfg.pcr0 &= ~FSXP;
843         else
844                 mcbsp_cfg.pcr0 |= FSXP;
845
846         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
847                 mcbsp_cfg.pcr0 |= CLKXM;
848                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
849                 mcbsp_cfg.pcr0 |= FSXM;
850                 mcbsp_cfg.srgr2 &= ~FSGM;
851                 mcbsp_cfg.xcr2 |= XDATDLY(1);
852                 mcbsp_cfg.rcr2 |= RDATDLY(1);
853         } else {
854                 mcbsp_cfg.pcr0 &= ~CLKXM;
855                 mcbsp_cfg.srgr1 |= CLKGDV(1);
856                 mcbsp_cfg.pcr0 &= ~FSXM;
857                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
858                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
859         }
860
861         mcbsp_cfg.xcr2 &= ~XPHASE;
862         mcbsp_cfg.rcr2 &= ~RPHASE;
863
864         omap_mcbsp_config(id, &mcbsp_cfg);
865 }
866 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
867
868 /*
869  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
870  * 730 has only 2 McBSP, and both of them are MPU peripherals.
871  */
872 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
873 {
874         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
875         struct omap_mcbsp *mcbsp;
876         int id = pdev->id - 1;
877         int ret = 0;
878
879         if (!pdata) {
880                 dev_err(&pdev->dev, "McBSP device initialized without"
881                                 "platform data\n");
882                 ret = -EINVAL;
883                 goto exit;
884         }
885
886         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
887
888         if (id >= omap_mcbsp_count) {
889                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
890                 ret = -EINVAL;
891                 goto exit;
892         }
893
894         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
895         if (!mcbsp) {
896                 ret = -ENOMEM;
897                 goto exit;
898         }
899
900         spin_lock_init(&mcbsp->lock);
901         mcbsp->id = id + 1;
902         mcbsp->free = 1;
903         mcbsp->dma_tx_lch = -1;
904         mcbsp->dma_rx_lch = -1;
905
906         mcbsp->phys_base = pdata->phys_base;
907         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
908         if (!mcbsp->io_base) {
909                 ret = -ENOMEM;
910                 goto err_ioremap;
911         }
912
913         /* Default I/O is IRQ based */
914         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
915         mcbsp->tx_irq = pdata->tx_irq;
916         mcbsp->rx_irq = pdata->rx_irq;
917         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
918         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
919
920         mcbsp->iclk = clk_get(&pdev->dev, "ick");
921         if (IS_ERR(mcbsp->iclk)) {
922                 ret = PTR_ERR(mcbsp->iclk);
923                 dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
924                 goto err_iclk;
925         }
926
927         mcbsp->fclk = clk_get(&pdev->dev, "fck");
928         if (IS_ERR(mcbsp->fclk)) {
929                 ret = PTR_ERR(mcbsp->fclk);
930                 dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
931                 goto err_fclk;
932         }
933
934         mcbsp->pdata = pdata;
935         mcbsp->dev = &pdev->dev;
936         mcbsp_ptr[id] = mcbsp;
937         platform_set_drvdata(pdev, mcbsp);
938         return 0;
939
940 err_fclk:
941         clk_put(mcbsp->iclk);
942 err_iclk:
943         iounmap(mcbsp->io_base);
944 err_ioremap:
945         kfree(mcbsp);
946 exit:
947         return ret;
948 }
949
950 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
951 {
952         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
953
954         platform_set_drvdata(pdev, NULL);
955         if (mcbsp) {
956
957                 if (mcbsp->pdata && mcbsp->pdata->ops &&
958                                 mcbsp->pdata->ops->free)
959                         mcbsp->pdata->ops->free(mcbsp->id);
960
961                 clk_disable(mcbsp->fclk);
962                 clk_disable(mcbsp->iclk);
963                 clk_put(mcbsp->fclk);
964                 clk_put(mcbsp->iclk);
965
966                 iounmap(mcbsp->io_base);
967
968                 mcbsp->fclk = NULL;
969                 mcbsp->iclk = NULL;
970                 mcbsp->free = 0;
971                 mcbsp->dev = NULL;
972         }
973
974         return 0;
975 }
976
977 static struct platform_driver omap_mcbsp_driver = {
978         .probe          = omap_mcbsp_probe,
979         .remove         = __devexit_p(omap_mcbsp_remove),
980         .driver         = {
981                 .name   = "omap-mcbsp",
982         },
983 };
984
985 int __init omap_mcbsp_init(void)
986 {
987         /* Register the McBSP driver */
988         return platform_driver_register(&omap_mcbsp_driver);
989 }