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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/types.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/string.h>
  34 #include <linux/in.h>
  35 #include <linux/ip.h>
  36 #include <linux/tcp.h>
  37 #include <linux/ipv6.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_vlan.h>
  42
  43 #include "ixgbe.h"
  44 #include "ixgbe_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49
  50 #define DRV_VERSION "2.0.8-k2"
  51 const char ixgbe_driver_version[] = DRV_VERSION;
  52 static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation.";
  53
  54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  55         [board_82598] = &ixgbe_82598_info,
  56         [board_82599] = &ixgbe_82599_info,
  57 };
  58
  59 /* ixgbe_pci_tbl - PCI Device ID Table
  60  *
  61  * Wildcard entries (PCI_ANY_ID) should come last
  62  * Last entry must be all 0s
  63  *
  64  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  65  *   Class, Class Mask, private data (not used) }
  66  */
  67 static struct pci_device_id ixgbe_pci_tbl[] = {
  68         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
  69          board_82598 },
  70         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  71          board_82598 },
  72         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  73          board_82598 },
  74         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
  75          board_82598 },
  76         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  77          board_82598 },
  78         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  79          board_82598 },
  80         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
  81          board_82598 },
  82         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
  83          board_82598 },
  84         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
  85          board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
  87          board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
  89          board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
  91          board_82599 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
  93          board_82599 },
  94
  95         /* required last entry */
  96         {0, }
  97 };
  98 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  99
 100 #ifdef CONFIG_IXGBE_DCA
 101 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 102                             void *p);
 103 static struct notifier_block dca_notifier = {
 104         .notifier_call = ixgbe_notify_dca,
 105         .next          = NULL,
 106         .priority      = 0
 107 };
 108 #endif
 109
 110 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 111 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 112 MODULE_LICENSE("GPL");
 113 MODULE_VERSION(DRV_VERSION);
 114
 115 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
 116
 117 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 118 {
 119         u32 ctrl_ext;
 120
 121         /* Let firmware take over control of h/w */
 122         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 123         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 124                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 125 }
 126
 127 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 128 {
 129         u32 ctrl_ext;
 130
 131         /* Let firmware know the driver has taken over */
 132         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 133         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 134                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 135 }
 136
 137 /*
 138  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 139  * @adapter: pointer to adapter struct
 140  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 141  * @queue: queue to map the corresponding interrupt to
 142  * @msix_vector: the vector to map to the corresponding queue
 143  *
 144  */
 145 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 146                            u8 queue, u8 msix_vector)
 147 {
 148         u32 ivar, index;
 149         struct ixgbe_hw *hw = &adapter->hw;
 150         switch (hw->mac.type) {
 151         case ixgbe_mac_82598EB:
 152                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 153                 if (direction == -1)
 154                         direction = 0;
 155                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 156                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 157                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 158                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 159                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 160                 break;
 161         case ixgbe_mac_82599EB:
 162                 if (direction == -1) {
 163                         /* other causes */
 164                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 165                         index = ((queue & 1) * 8);
 166                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 167                         ivar &= ~(0xFF << index);
 168                         ivar |= (msix_vector << index);
 169                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 170                         break;
 171                 } else {
 172                         /* tx or rx causes */
 173                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 174                         index = ((16 * (queue & 1)) + (8 * direction));
 175                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 176                         ivar &= ~(0xFF << index);
 177                         ivar |= (msix_vector << index);
 178                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 179                         break;
 180                 }
 181         default:
 182                 break;
 183         }
 184 }
 185
 186 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 187                                              struct ixgbe_tx_buffer
 188                                              *tx_buffer_info)
 189 {
 190         if (tx_buffer_info->dma) {
 191                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 192                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 193                 tx_buffer_info->dma = 0;
 194         }
 195         if (tx_buffer_info->skb) {
 196                 dev_kfree_skb_any(tx_buffer_info->skb);
 197                 tx_buffer_info->skb = NULL;
 198         }
 199         /* tx_buffer_info must be completely set up in the transmit path */
 200 }
 201
 202 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 203                                        struct ixgbe_ring *tx_ring,
 204                                        unsigned int eop)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u32 head, tail;
 208
 209         /* Detect a transmit hang in hardware, this serializes the
 210          * check with the clearing of time_stamp and movement of eop */
 211         head = IXGBE_READ_REG(hw, tx_ring->head);
 212         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 213         adapter->detect_tx_hung = false;
 214         if ((head != tail) &&
 215             tx_ring->tx_buffer_info[eop].time_stamp &&
 216             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 217             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 218                 /* detected Tx unit hang */
 219                 union ixgbe_adv_tx_desc *tx_desc;
 220                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 221                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 222                         "  Tx Queue             <%d>\n"
 223                         "  TDH, TDT             <%x>, <%x>\n"
 224                         "  next_to_use          <%x>\n"
 225                         "  next_to_clean        <%x>\n"
 226                         "tx_buffer_info[next_to_clean]\n"
 227                         "  time_stamp           <%lx>\n"
 228                         "  jiffies              <%lx>\n",
 229                         tx_ring->queue_index,
 230                         head, tail,
 231                         tx_ring->next_to_use, eop,
 232                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 233                 return true;
 234         }
 235
 236         return false;
 237 }
 238
 239 #define IXGBE_MAX_TXD_PWR       14
 240 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 241
 242 /* Tx Descriptors needed, worst case */
 243 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 244                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 245 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 246         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
 247
 248 static void ixgbe_tx_timeout(struct net_device *netdev);
 249
 250 /**
 251  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 252  * @adapter: board private structure
 253  * @tx_ring: tx ring to clean
 254  *
 255  * returns true if transmit work is done
 256  **/
 257 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 258                                struct ixgbe_ring *tx_ring)
 259 {
 260         struct net_device *netdev = adapter->netdev;
 261         union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
 262         struct ixgbe_tx_buffer *tx_buffer_info;
 263         unsigned int i, eop, count = 0;
 264         unsigned int total_bytes = 0, total_packets = 0;
 265
 266         i = tx_ring->next_to_clean;
 267         eop = tx_ring->tx_buffer_info[i].next_to_watch;
 268         eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 269
 270         while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
 271                (count < tx_ring->work_limit)) {
 272                 bool cleaned = false;
 273                 for ( ; !cleaned; count++) {
 274                         struct sk_buff *skb;
 275                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 276                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 277                         cleaned = (i == eop);
 278                         skb = tx_buffer_info->skb;
 279
 280                         if (cleaned && skb) {
 281                                 unsigned int segs, bytecount;
 282
 283                                 /* gso_segs is currently only valid for tcp */
 284                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 285                                 /* multiply data chunks by size of headers */
 286                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 287                                             skb->len;
 288                                 total_packets += segs;
 289                                 total_bytes += bytecount;
 290                         }
 291
 292                         ixgbe_unmap_and_free_tx_resource(adapter,
 293                                                          tx_buffer_info);
 294
 295                         tx_desc->wb.status = 0;
 296
 297                         i++;
 298                         if (i == tx_ring->count)
 299                                 i = 0;
 300                 }
 301
 302                 eop = tx_ring->tx_buffer_info[i].next_to_watch;
 303                 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 304         }
 305
 306         tx_ring->next_to_clean = i;
 307
 308 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 309         if (unlikely(count && netif_carrier_ok(netdev) &&
 310                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 311                 /* Make sure that anybody stopping the queue after this
 312                  * sees the new next_to_clean.
 313                  */
 314                 smp_mb();
 315                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 316                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 317                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 318                         ++adapter->restart_queue;
 319                 }
 320         }
 321
 322         if (adapter->detect_tx_hung) {
 323                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 324                         /* schedule immediate reset if we believe we hung */
 325                         DPRINTK(PROBE, INFO,
 326                                 "tx hang %d detected, resetting adapter\n",
 327                                 adapter->tx_timeout_count + 1);
 328                         ixgbe_tx_timeout(adapter->netdev);
 329                 }
 330         }
 331
 332         /* re-arm the interrupt */
 333         if (count >= tx_ring->work_limit)
 334                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 335
 336         tx_ring->total_bytes += total_bytes;
 337         tx_ring->total_packets += total_packets;
 338         tx_ring->stats.packets += total_packets;
 339         tx_ring->stats.bytes += total_bytes;
 340         adapter->net_stats.tx_bytes += total_bytes;
 341         adapter->net_stats.tx_packets += total_packets;
 342         return (count < tx_ring->work_limit);
 343 }
 344
 345 #ifdef CONFIG_IXGBE_DCA
 346 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 347                                 struct ixgbe_ring *rx_ring)
 348 {
 349         u32 rxctrl;
 350         int cpu = get_cpu();
 351         int q = rx_ring - adapter->rx_ring;
 352
 353         if (rx_ring->cpu != cpu) {
 354                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 355                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
 356                         rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 357                         rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 358                 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
 359                         rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
 360                         rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
 361                                    IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
 362                 }
 363                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 364                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 365                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
 366                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
 367                             IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
 368                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 369                 rx_ring->cpu = cpu;
 370         }
 371         put_cpu();
 372 }
 373
 374 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 375                                 struct ixgbe_ring *tx_ring)
 376 {
 377         u32 txctrl;
 378         int cpu = get_cpu();
 379         int q = tx_ring - adapter->tx_ring;
 380
 381         if (tx_ring->cpu != cpu) {
 382                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 383                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
 384                         txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 385                         txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 386                 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
 387                         txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
 388                         txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
 389                                    IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
 390                 }
 391                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 392                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 393                 tx_ring->cpu = cpu;
 394         }
 395         put_cpu();
 396 }
 397
 398 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 399 {
 400         int i;
 401
 402         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 403                 return;
 404
 405         for (i = 0; i < adapter->num_tx_queues; i++) {
 406                 adapter->tx_ring[i].cpu = -1;
 407                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 408         }
 409         for (i = 0; i < adapter->num_rx_queues; i++) {
 410                 adapter->rx_ring[i].cpu = -1;
 411                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 412         }
 413 }
 414
 415 static int __ixgbe_notify_dca(struct device *dev, void *data)
 416 {
 417         struct net_device *netdev = dev_get_drvdata(dev);
 418         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 419         unsigned long event = *(unsigned long *)data;
 420
 421         switch (event) {
 422         case DCA_PROVIDER_ADD:
 423                 /* if we're already enabled, don't do it again */
 424                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 425                         break;
 426                 /* Always use CB2 mode, difference is masked
 427                  * in the CB driver. */
 428                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 429                 if (dca_add_requester(dev) == 0) {
 430                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 431                         ixgbe_setup_dca(adapter);
 432                         break;
 433                 }
 434                 /* Fall Through since DCA is disabled. */
 435         case DCA_PROVIDER_REMOVE:
 436                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 437                         dca_remove_requester(dev);
 438                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 439                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 440                 }
 441                 break;
 442         }
 443
 444         return 0;
 445 }
 446
 447 #endif /* CONFIG_IXGBE_DCA */
 448 /**
 449  * ixgbe_receive_skb - Send a completed packet up the stack
 450  * @adapter: board private structure
 451  * @skb: packet to send up
 452  * @status: hardware indication of status of receive
 453  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 454  * @rx_desc: rx descriptor
 455  **/
 456 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
 457                               struct sk_buff *skb, u8 status,
 458                               union ixgbe_adv_rx_desc *rx_desc)
 459 {
 460         struct ixgbe_adapter *adapter = q_vector->adapter;
 461         struct napi_struct *napi = &q_vector->napi;
 462         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 463         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 464
 465         skb_record_rx_queue(skb, q_vector - &adapter->q_vector[0]);
 466         if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
 467                 if (adapter->vlgrp && is_vlan && (tag != 0))
 468                         vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
 469                 else
 470                         napi_gro_receive(napi, skb);
 471         } else {
 472                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 473                         if (adapter->vlgrp && is_vlan && (tag != 0))
 474                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 475                         else
 476                                 netif_receive_skb(skb);
 477                 } else {
 478                         if (adapter->vlgrp && is_vlan && (tag != 0))
 479                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 480                         else
 481                                 netif_rx(skb);
 482                 }
 483         }
 484 }
 485
 486 /**
 487  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 488  * @adapter: address of board private structure
 489  * @status_err: hardware indication of status of receive
 490  * @skb: skb currently being received and modified
 491  **/
 492 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 493                                      u32 status_err, struct sk_buff *skb)
 494 {
 495         skb->ip_summed = CHECKSUM_NONE;
 496
 497         /* Rx csum disabled */
 498         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 499                 return;
 500
 501         /* if IP and error */
 502         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 503             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 504                 adapter->hw_csum_rx_error++;
 505                 return;
 506         }
 507
 508         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 509                 return;
 510
 511         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 512                 adapter->hw_csum_rx_error++;
 513                 return;
 514         }
 515
 516         /* It must be a TCP or UDP packet with a valid checksum */
 517         skb->ip_summed = CHECKSUM_UNNECESSARY;
 518         adapter->hw_csum_rx_good++;
 519 }
 520
 521 static inline void ixgbe_release_rx_desc(struct ixgbe_hw *hw,
 522                                          struct ixgbe_ring *rx_ring, u32 val)
 523 {
 524         /*
 525          * Force memory writes to complete before letting h/w
 526          * know there are new descriptors to fetch.  (Only
 527          * applicable for weak-ordered memory model archs,
 528          * such as IA-64).
 529          */
 530         wmb();
 531         IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->reg_idx), val);
 532 }
 533
 534 /**
 535  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 536  * @adapter: address of board private structure
 537  **/
 538 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 539                                    struct ixgbe_ring *rx_ring,
 540                                    int cleaned_count)
 541 {
 542         struct pci_dev *pdev = adapter->pdev;
 543         union ixgbe_adv_rx_desc *rx_desc;
 544         struct ixgbe_rx_buffer *bi;
 545         unsigned int i;
 546         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
 547
 548         i = rx_ring->next_to_use;
 549         bi = &rx_ring->rx_buffer_info[i];
 550
 551         while (cleaned_count--) {
 552                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 553
 554                 if (!bi->page_dma &&
 555                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 556                         if (!bi->page) {
 557                                 bi->page = alloc_page(GFP_ATOMIC);
 558                                 if (!bi->page) {
 559                                         adapter->alloc_rx_page_failed++;
 560                                         goto no_buffers;
 561                                 }
 562                                 bi->page_offset = 0;
 563                         } else {
 564                                 /* use a half page if we're re-using */
 565                                 bi->page_offset ^= (PAGE_SIZE / 2);
 566                         }
 567
 568                         bi->page_dma = pci_map_page(pdev, bi->page,
 569                                                     bi->page_offset,
 570                                                     (PAGE_SIZE / 2),
 571                                                     PCI_DMA_FROMDEVICE);
 572                 }
 573
 574                 if (!bi->skb) {
 575                         struct sk_buff *skb;
 576                         skb = netdev_alloc_skb(adapter->netdev, bufsz);
 577
 578                         if (!skb) {
 579                                 adapter->alloc_rx_buff_failed++;
 580                                 goto no_buffers;
 581                         }
 582
 583                         /*
 584                          * Make buffer alignment 2 beyond a 16 byte boundary
 585                          * this will result in a 16 byte aligned IP header after
 586                          * the 14 byte MAC header is removed
 587                          */
 588                         skb_reserve(skb, NET_IP_ALIGN);
 589
 590                         bi->skb = skb;
 591                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 592                                                  PCI_DMA_FROMDEVICE);
 593                 }
 594                 /* Refresh the desc even if buffer_addrs didn't change because
 595                  * each write-back erases this info. */
 596                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 597                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 598                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 599                 } else {
 600                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 601                 }
 602
 603                 i++;
 604                 if (i == rx_ring->count)
 605                         i = 0;
 606                 bi = &rx_ring->rx_buffer_info[i];
 607         }
 608
 609 no_buffers:
 610         if (rx_ring->next_to_use != i) {
 611                 rx_ring->next_to_use = i;
 612                 if (i-- == 0)
 613                         i = (rx_ring->count - 1);
 614
 615                 ixgbe_release_rx_desc(&adapter->hw, rx_ring, i);
 616         }
 617 }
 618
 619 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 620 {
 621         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 622 }
 623
 624 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 625 {
 626         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 627 }
 628
 629 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
 630                                struct ixgbe_ring *rx_ring,
 631                                int *work_done, int work_to_do)
 632 {
 633         struct ixgbe_adapter *adapter = q_vector->adapter;
 634         struct pci_dev *pdev = adapter->pdev;
 635         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 636         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 637         struct sk_buff *skb;
 638         unsigned int i;
 639         u32 len, staterr;
 640         u16 hdr_info;
 641         bool cleaned = false;
 642         int cleaned_count = 0;
 643         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 644
 645         i = rx_ring->next_to_clean;
 646         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 647         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 648         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 649
 650         while (staterr & IXGBE_RXD_STAT_DD) {
 651                 u32 upper_len = 0;
 652                 if (*work_done >= work_to_do)
 653                         break;
 654                 (*work_done)++;
 655
 656                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 657                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 658                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 659                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 660                         if (hdr_info & IXGBE_RXDADV_SPH)
 661                                 adapter->rx_hdr_split++;
 662                         if (len > IXGBE_RX_HDR_SIZE)
 663                                 len = IXGBE_RX_HDR_SIZE;
 664                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 665                 } else {
 666                         len = le16_to_cpu(rx_desc->wb.upper.length);
 667                 }
 668
 669                 cleaned = true;
 670                 skb = rx_buffer_info->skb;
 671                 prefetch(skb->data - NET_IP_ALIGN);
 672                 rx_buffer_info->skb = NULL;
 673
 674                 if (len && !skb_shinfo(skb)->nr_frags) {
 675                         pci_unmap_single(pdev, rx_buffer_info->dma,
 676                                          rx_ring->rx_buf_len,
 677                                          PCI_DMA_FROMDEVICE);
 678                         skb_put(skb, len);
 679                 }
 680
 681                 if (upper_len) {
 682                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 683                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
 684                         rx_buffer_info->page_dma = 0;
 685                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 686                                            rx_buffer_info->page,
 687                                            rx_buffer_info->page_offset,
 688                                            upper_len);
 689
 690                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
 691                             (page_count(rx_buffer_info->page) != 1))
 692                                 rx_buffer_info->page = NULL;
 693                         else
 694                                 get_page(rx_buffer_info->page);
 695
 696                         skb->len += upper_len;
 697                         skb->data_len += upper_len;
 698                         skb->truesize += upper_len;
 699                 }
 700
 701                 i++;
 702                 if (i == rx_ring->count)
 703                         i = 0;
 704                 next_buffer = &rx_ring->rx_buffer_info[i];
 705
 706                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 707                 prefetch(next_rxd);
 708
 709                 cleaned_count++;
 710                 if (staterr & IXGBE_RXD_STAT_EOP) {
 711                         rx_ring->stats.packets++;
 712                         rx_ring->stats.bytes += skb->len;
 713                 } else {
 714                         rx_buffer_info->skb = next_buffer->skb;
 715                         rx_buffer_info->dma = next_buffer->dma;
 716                         next_buffer->skb = skb;
 717                         next_buffer->dma = 0;
 718                         adapter->non_eop_descs++;
 719                         goto next_desc;
 720                 }
 721
 722                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 723                         dev_kfree_skb_irq(skb);
 724                         goto next_desc;
 725                 }
 726
 727                 ixgbe_rx_checksum(adapter, staterr, skb);
 728
 729                 /* probably a little skewed due to removing CRC */
 730                 total_rx_bytes += skb->len;
 731                 total_rx_packets++;
 732
 733                 skb->protocol = eth_type_trans(skb, adapter->netdev);
 734                 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc);
 735
 736 next_desc:
 737                 rx_desc->wb.upper.status_error = 0;
 738
 739                 /* return some buffers to hardware, one at a time is too slow */
 740                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 741                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 742                         cleaned_count = 0;
 743                 }
 744
 745                 /* use prefetched values */
 746                 rx_desc = next_rxd;
 747                 rx_buffer_info = next_buffer;
 748
 749                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 750         }
 751
 752         rx_ring->next_to_clean = i;
 753         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 754
 755         if (cleaned_count)
 756                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 757
 758         rx_ring->total_packets += total_rx_packets;
 759         rx_ring->total_bytes += total_rx_bytes;
 760         adapter->net_stats.rx_bytes += total_rx_bytes;
 761         adapter->net_stats.rx_packets += total_rx_packets;
 762
 763         return cleaned;
 764 }
 765
 766 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 767 /**
 768  * ixgbe_configure_msix - Configure MSI-X hardware
 769  * @adapter: board private structure
 770  *
 771  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 772  * interrupts.
 773  **/
 774 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 775 {
 776         struct ixgbe_q_vector *q_vector;
 777         int i, j, q_vectors, v_idx, r_idx;
 778         u32 mask;
 779
 780         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 781
 782         /* Populate the IVAR table and set the ITR values to the
 783          * corresponding register.
 784          */
 785         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 786                 q_vector = &adapter->q_vector[v_idx];
 787                 /* XXX for_each_bit(...) */
 788                 r_idx = find_first_bit(q_vector->rxr_idx,
 789                                        adapter->num_rx_queues);
 790
 791                 for (i = 0; i < q_vector->rxr_count; i++) {
 792                         j = adapter->rx_ring[r_idx].reg_idx;
 793                         ixgbe_set_ivar(adapter, 0, j, v_idx);
 794                         r_idx = find_next_bit(q_vector->rxr_idx,
 795                                               adapter->num_rx_queues,
 796                                               r_idx + 1);
 797                 }
 798                 r_idx = find_first_bit(q_vector->txr_idx,
 799                                        adapter->num_tx_queues);
 800
 801                 for (i = 0; i < q_vector->txr_count; i++) {
 802                         j = adapter->tx_ring[r_idx].reg_idx;
 803                         ixgbe_set_ivar(adapter, 1, j, v_idx);
 804                         r_idx = find_next_bit(q_vector->txr_idx,
 805                                               adapter->num_tx_queues,
 806                                               r_idx + 1);
 807                 }
 808
 809                 /* if this is a tx only vector halve the interrupt rate */
 810                 if (q_vector->txr_count && !q_vector->rxr_count)
 811                         q_vector->eitr = (adapter->eitr_param >> 1);
 812                 else if (q_vector->rxr_count)
 813                         /* rx only */
 814                         q_vector->eitr = adapter->eitr_param;
 815
 816                 /*
 817                  * since ths is initial set up don't need to call
 818                  * ixgbe_write_eitr helper
 819                  */
 820                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 821                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 822         }
 823
 824         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
 825                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
 826                                v_idx);
 827         else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 828                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
 829         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 830
 831         /* set up to autoclear timer, and the vectors */
 832         mask = IXGBE_EIMS_ENABLE_MASK;
 833         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 834         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 835 }
 836
 837 enum latency_range {
 838         lowest_latency = 0,
 839         low_latency = 1,
 840         bulk_latency = 2,
 841         latency_invalid = 255
 842 };
 843
 844 /**
 845  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 846  * @adapter: pointer to adapter
 847  * @eitr: eitr setting (ints per sec) to give last timeslice
 848  * @itr_setting: current throttle rate in ints/second
 849  * @packets: the number of packets during this measurement interval
 850  * @bytes: the number of bytes during this measurement interval
 851  *
 852  *      Stores a new ITR value based on packets and byte
 853  *      counts during the last interrupt.  The advantage of per interrupt
 854  *      computation is faster updates and more accurate ITR for the current
 855  *      traffic pattern.  Constants in this function were computed
 856  *      based on theoretical maximum wire speed and thresholds were set based
 857  *      on testing data as well as attempting to minimize response time
 858  *      while increasing bulk throughput.
 859  *      this functionality is controlled by the InterruptThrottleRate module
 860  *      parameter (see ixgbe_param.c)
 861  **/
 862 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 863                            u32 eitr, u8 itr_setting,
 864                            int packets, int bytes)
 865 {
 866         unsigned int retval = itr_setting;
 867         u32 timepassed_us;
 868         u64 bytes_perint;
 869
 870         if (packets == 0)
 871                 goto update_itr_done;
 872
 873
 874         /* simple throttlerate management
 875          *    0-20MB/s lowest (100000 ints/s)
 876          *   20-100MB/s low   (20000 ints/s)
 877          *  100-1249MB/s bulk (8000 ints/s)
 878          */
 879         /* what was last interrupt timeslice? */
 880         timepassed_us = 1000000/eitr;
 881         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 882
 883         switch (itr_setting) {
 884         case lowest_latency:
 885                 if (bytes_perint > adapter->eitr_low)
 886                         retval = low_latency;
 887                 break;
 888         case low_latency:
 889                 if (bytes_perint > adapter->eitr_high)
 890                         retval = bulk_latency;
 891                 else if (bytes_perint <= adapter->eitr_low)
 892                         retval = lowest_latency;
 893                 break;
 894         case bulk_latency:
 895                 if (bytes_perint <= adapter->eitr_high)
 896                         retval = low_latency;
 897                 break;
 898         }
 899
 900 update_itr_done:
 901         return retval;
 902 }
 903
 904 /**
 905  * ixgbe_write_eitr - write EITR register in hardware specific way
 906  * @adapter: pointer to adapter struct
 907  * @v_idx: vector index into q_vector array
 908  * @itr_reg: new value to be written in *register* format, not ints/s
 909  *
 910  * This function is made to be called by ethtool and by the driver
 911  * when it needs to update EITR registers at runtime.  Hardware
 912  * specific quirks/differences are taken care of here.
 913  */
 914 void ixgbe_write_eitr(struct ixgbe_adapter *adapter, int v_idx, u32 itr_reg)
 915 {
 916         struct ixgbe_hw *hw = &adapter->hw;
 917         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
 918                 /* must write high and low 16 bits to reset counter */
 919                 itr_reg |= (itr_reg << 16);
 920         } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
 921                 /*
 922                  * set the WDIS bit to not clear the timer bits and cause an
 923                  * immediate assertion of the interrupt
 924                  */
 925                 itr_reg |= IXGBE_EITR_CNT_WDIS;
 926         }
 927         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
 928 }
 929
 930 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 931 {
 932         struct ixgbe_adapter *adapter = q_vector->adapter;
 933         u32 new_itr;
 934         u8 current_itr, ret_itr;
 935         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 936                                sizeof(struct ixgbe_q_vector);
 937         struct ixgbe_ring *rx_ring, *tx_ring;
 938
 939         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 940         for (i = 0; i < q_vector->txr_count; i++) {
 941                 tx_ring = &(adapter->tx_ring[r_idx]);
 942                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 943                                            q_vector->tx_itr,
 944                                            tx_ring->total_packets,
 945                                            tx_ring->total_bytes);
 946                 /* if the result for this queue would decrease interrupt
 947                  * rate for this vector then use that result */
 948                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 949                                     q_vector->tx_itr - 1 : ret_itr);
 950                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 951                                       r_idx + 1);
 952         }
 953
 954         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 955         for (i = 0; i < q_vector->rxr_count; i++) {
 956                 rx_ring = &(adapter->rx_ring[r_idx]);
 957                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 958                                            q_vector->rx_itr,
 959                                            rx_ring->total_packets,
 960                                            rx_ring->total_bytes);
 961                 /* if the result for this queue would decrease interrupt
 962                  * rate for this vector then use that result */
 963                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 964                                     q_vector->rx_itr - 1 : ret_itr);
 965                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 966                                       r_idx + 1);
 967         }
 968
 969         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 970
 971         switch (current_itr) {
 972         /* counts and packets in update_itr are dependent on these numbers */
 973         case lowest_latency:
 974                 new_itr = 100000;
 975                 break;
 976         case low_latency:
 977                 new_itr = 20000; /* aka hwitr = ~200 */
 978                 break;
 979         case bulk_latency:
 980         default:
 981                 new_itr = 8000;
 982                 break;
 983         }
 984
 985         if (new_itr != q_vector->eitr) {
 986                 u32 itr_reg;
 987
 988                 /* save the algorithm value here, not the smoothed one */
 989                 q_vector->eitr = new_itr;
 990                 /* do an exponential smoothing */
 991                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 992                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 993                 ixgbe_write_eitr(adapter, v_idx, itr_reg);
 994         }
 995
 996         return;
 997 }
 998
 999 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
1000 {
1001         struct ixgbe_hw *hw = &adapter->hw;
1002
1003         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
1004             (eicr & IXGBE_EICR_GPI_SDP1)) {
1005                 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
1006                 /* write to clear the interrupt */
1007                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1008         }
1009 }
1010
1011 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
1012 {
1013         struct ixgbe_hw *hw = &adapter->hw;
1014
1015         if (eicr & IXGBE_EICR_GPI_SDP1) {
1016                 /* Clear the interrupt */
1017                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1018                 schedule_work(&adapter->multispeed_fiber_task);
1019         } else if (eicr & IXGBE_EICR_GPI_SDP2) {
1020                 /* Clear the interrupt */
1021                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1022                 schedule_work(&adapter->sfp_config_module_task);
1023         } else {
1024                 /* Interrupt isn't for us... */
1025                 return;
1026         }
1027 }
1028
1029 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
1030 {
1031         struct ixgbe_hw *hw = &adapter->hw;
1032
1033         adapter->lsc_int++;
1034         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1035         adapter->link_check_timeout = jiffies;
1036         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1037                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
1038                 schedule_work(&adapter->watchdog_task);
1039         }
1040 }
1041
1042 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
1043 {
1044         struct net_device *netdev = data;
1045         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1046         struct ixgbe_hw *hw = &adapter->hw;
1047         u32 eicr;
1048
1049         /*
1050          * Workaround for Silicon errata.  Use clear-by-write instead
1051          * of clear-by-read.  Reading with EICS will return the
1052          * interrupt causes without clearing, which later be done
1053          * with the write to EICR.
1054          */
1055         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1056         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
1057
1058         if (eicr & IXGBE_EICR_LSC)
1059                 ixgbe_check_lsc(adapter);
1060
1061         if (hw->mac.type == ixgbe_mac_82598EB)
1062                 ixgbe_check_fan_failure(adapter, eicr);
1063
1064         if (hw->mac.type == ixgbe_mac_82599EB)
1065                 ixgbe_check_sfp_event(adapter, eicr);
1066         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1067                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
1068
1069         return IRQ_HANDLED;
1070 }
1071
1072 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
1073 {
1074         struct ixgbe_q_vector *q_vector = data;
1075         struct ixgbe_adapter  *adapter = q_vector->adapter;
1076         struct ixgbe_ring     *tx_ring;
1077         int i, r_idx;
1078
1079         if (!q_vector->txr_count)
1080                 return IRQ_HANDLED;
1081
1082         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1083         for (i = 0; i < q_vector->txr_count; i++) {
1084                 tx_ring = &(adapter->tx_ring[r_idx]);
1085 #ifdef CONFIG_IXGBE_DCA
1086                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1087                         ixgbe_update_tx_dca(adapter, tx_ring);
1088 #endif
1089                 tx_ring->total_bytes = 0;
1090                 tx_ring->total_packets = 0;
1091                 ixgbe_clean_tx_irq(adapter, tx_ring);
1092                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1093                                       r_idx + 1);
1094         }
1095
1096         return IRQ_HANDLED;
1097 }
1098
1099 /**
1100  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1101  * @irq: unused
1102  * @data: pointer to our q_vector struct for this interrupt vector
1103  **/
1104 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1105 {
1106         struct ixgbe_q_vector *q_vector = data;
1107         struct ixgbe_adapter  *adapter = q_vector->adapter;
1108         struct ixgbe_ring  *rx_ring;
1109         int r_idx;
1110         int i;
1111
1112         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1113         for (i = 0;  i < q_vector->rxr_count; i++) {
1114                 rx_ring = &(adapter->rx_ring[r_idx]);
1115                 rx_ring->total_bytes = 0;
1116                 rx_ring->total_packets = 0;
1117                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1118                                       r_idx + 1);
1119         }
1120
1121         if (!q_vector->rxr_count)
1122                 return IRQ_HANDLED;
1123
1124         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1125         rx_ring = &(adapter->rx_ring[r_idx]);
1126         /* disable interrupts on this vector only */
1127         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1128         napi_schedule(&q_vector->napi);
1129
1130         return IRQ_HANDLED;
1131 }
1132
1133 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1134 {
1135         ixgbe_msix_clean_rx(irq, data);
1136         ixgbe_msix_clean_tx(irq, data);
1137
1138         return IRQ_HANDLED;
1139 }
1140
1141 /**
1142  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1143  * @napi: napi struct with our devices info in it
1144  * @budget: amount of work driver is allowed to do this pass, in packets
1145  *
1146  * This function is optimized for cleaning one queue only on a single
1147  * q_vector!!!
1148  **/
1149 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1150 {
1151         struct ixgbe_q_vector *q_vector =
1152                                container_of(napi, struct ixgbe_q_vector, napi);
1153         struct ixgbe_adapter *adapter = q_vector->adapter;
1154         struct ixgbe_ring *rx_ring = NULL;
1155         int work_done = 0;
1156         long r_idx;
1157
1158         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1159         rx_ring = &(adapter->rx_ring[r_idx]);
1160 #ifdef CONFIG_IXGBE_DCA
1161         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1162                 ixgbe_update_rx_dca(adapter, rx_ring);
1163 #endif
1164
1165         ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1166
1167         /* If all Rx work done, exit the polling mode */
1168         if (work_done < budget) {
1169                 napi_complete(napi);
1170                 if (adapter->itr_setting & 1)
1171                         ixgbe_set_itr_msix(q_vector);
1172                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1173                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1174         }
1175
1176         return work_done;
1177 }
1178
1179 /**
1180  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1181  * @napi: napi struct with our devices info in it
1182  * @budget: amount of work driver is allowed to do this pass, in packets
1183  *
1184  * This function will clean more than one rx queue associated with a
1185  * q_vector.
1186  **/
1187 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1188 {
1189         struct ixgbe_q_vector *q_vector =
1190                                container_of(napi, struct ixgbe_q_vector, napi);
1191         struct ixgbe_adapter *adapter = q_vector->adapter;
1192         struct ixgbe_ring *rx_ring = NULL;
1193         int work_done = 0, i;
1194         long r_idx;
1195         u16 enable_mask = 0;
1196
1197         /* attempt to distribute budget to each queue fairly, but don't allow
1198          * the budget to go below 1 because we'll exit polling */
1199         budget /= (q_vector->rxr_count ?: 1);
1200         budget = max(budget, 1);
1201         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1202         for (i = 0; i < q_vector->rxr_count; i++) {
1203                 rx_ring = &(adapter->rx_ring[r_idx]);
1204 #ifdef CONFIG_IXGBE_DCA
1205                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1206                         ixgbe_update_rx_dca(adapter, rx_ring);
1207 #endif
1208                 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1209                 enable_mask |= rx_ring->v_idx;
1210                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1211                                       r_idx + 1);
1212         }
1213
1214         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1215         rx_ring = &(adapter->rx_ring[r_idx]);
1216         /* If all Rx work done, exit the polling mode */
1217         if (work_done < budget) {
1218                 napi_complete(napi);
1219                 if (adapter->itr_setting & 1)
1220                         ixgbe_set_itr_msix(q_vector);
1221                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1222                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1223                 return 0;
1224         }
1225
1226         return work_done;
1227 }
1228 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1229                                      int r_idx)
1230 {
1231         a->q_vector[v_idx].adapter = a;
1232         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1233         a->q_vector[v_idx].rxr_count++;
1234         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1235 }
1236
1237 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1238                                      int r_idx)
1239 {
1240         a->q_vector[v_idx].adapter = a;
1241         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1242         a->q_vector[v_idx].txr_count++;
1243         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1244 }
1245
1246 /**
1247  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1248  * @adapter: board private structure to initialize
1249  * @vectors: allotted vector count for descriptor rings
1250  *
1251  * This function maps descriptor rings to the queue-specific vectors
1252  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1253  * one vector per ring/queue, but on a constrained vector budget, we
1254  * group the rings as "efficiently" as possible.  You would add new
1255  * mapping configurations in here.
1256  **/
1257 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1258                                       int vectors)
1259 {
1260         int v_start = 0;
1261         int rxr_idx = 0, txr_idx = 0;
1262         int rxr_remaining = adapter->num_rx_queues;
1263         int txr_remaining = adapter->num_tx_queues;
1264         int i, j;
1265         int rqpv, tqpv;
1266         int err = 0;
1267
1268         /* No mapping required if MSI-X is disabled. */
1269         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1270                 goto out;
1271
1272         /*
1273          * The ideal configuration...
1274          * We have enough vectors to map one per queue.
1275          */
1276         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1277                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1278                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1279
1280                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1281                         map_vector_to_txq(adapter, v_start, txr_idx);
1282
1283                 goto out;
1284         }
1285
1286         /*
1287          * If we don't have enough vectors for a 1-to-1
1288          * mapping, we'll have to group them so there are
1289          * multiple queues per vector.
1290          */
1291         /* Re-adjusting *qpv takes care of the remainder. */
1292         for (i = v_start; i < vectors; i++) {
1293                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1294                 for (j = 0; j < rqpv; j++) {
1295                         map_vector_to_rxq(adapter, i, rxr_idx);
1296                         rxr_idx++;
1297                         rxr_remaining--;
1298                 }
1299         }
1300         for (i = v_start; i < vectors; i++) {
1301                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1302                 for (j = 0; j < tqpv; j++) {
1303                         map_vector_to_txq(adapter, i, txr_idx);
1304                         txr_idx++;
1305                         txr_remaining--;
1306                 }
1307         }
1308
1309 out:
1310         return err;
1311 }
1312
1313 /**
1314  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1315  * @adapter: board private structure
1316  *
1317  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1318  * interrupts from the kernel.
1319  **/
1320 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1321 {
1322         struct net_device *netdev = adapter->netdev;
1323         irqreturn_t (*handler)(int, void *);
1324         int i, vector, q_vectors, err;
1325         int ri=0, ti=0;
1326
1327         /* Decrement for Other and TCP Timer vectors */
1328         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1329
1330         /* Map the Tx/Rx rings to the vectors we were allotted. */
1331         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1332         if (err)
1333                 goto out;
1334
1335 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1336                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1337                          &ixgbe_msix_clean_many)
1338         for (vector = 0; vector < q_vectors; vector++) {
1339                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1340
1341                 if(handler == &ixgbe_msix_clean_rx) {
1342                         sprintf(adapter->name[vector], "%s-%s-%d",
1343                                 netdev->name, "rx", ri++);
1344                 }
1345                 else if(handler == &ixgbe_msix_clean_tx) {
1346                         sprintf(adapter->name[vector], "%s-%s-%d",
1347                                 netdev->name, "tx", ti++);
1348                 }
1349                 else
1350                         sprintf(adapter->name[vector], "%s-%s-%d",
1351                                 netdev->name, "TxRx", vector);
1352
1353                 err = request_irq(adapter->msix_entries[vector].vector,
1354                                   handler, 0, adapter->name[vector],
1355                                   &(adapter->q_vector[vector]));
1356                 if (err) {
1357                         DPRINTK(PROBE, ERR,
1358                                 "request_irq failed for MSIX interrupt "
1359                                 "Error: %d\n", err);
1360                         goto free_queue_irqs;
1361                 }
1362         }
1363
1364         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1365         err = request_irq(adapter->msix_entries[vector].vector,
1366                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1367         if (err) {
1368                 DPRINTK(PROBE, ERR,
1369                         "request_irq for msix_lsc failed: %d\n", err);
1370                 goto free_queue_irqs;
1371         }
1372
1373         return 0;
1374
1375 free_queue_irqs:
1376         for (i = vector - 1; i >= 0; i--)
1377                 free_irq(adapter->msix_entries[--vector].vector,
1378                          &(adapter->q_vector[i]));
1379         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1380         pci_disable_msix(adapter->pdev);
1381         kfree(adapter->msix_entries);
1382         adapter->msix_entries = NULL;
1383 out:
1384         return err;
1385 }
1386
1387 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1388 {
1389         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1390         u8 current_itr;
1391         u32 new_itr = q_vector->eitr;
1392         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1393         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1394
1395         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1396                                             q_vector->tx_itr,
1397                                             tx_ring->total_packets,
1398                                             tx_ring->total_bytes);
1399         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1400                                             q_vector->rx_itr,
1401                                             rx_ring->total_packets,
1402                                             rx_ring->total_bytes);
1403
1404         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1405
1406         switch (current_itr) {
1407         /* counts and packets in update_itr are dependent on these numbers */
1408         case lowest_latency:
1409                 new_itr = 100000;
1410                 break;
1411         case low_latency:
1412                 new_itr = 20000; /* aka hwitr = ~200 */
1413                 break;
1414         case bulk_latency:
1415                 new_itr = 8000;
1416                 break;
1417         default:
1418                 break;
1419         }
1420
1421         if (new_itr != q_vector->eitr) {
1422                 u32 itr_reg;
1423
1424                 /* save the algorithm value here, not the smoothed one */
1425                 q_vector->eitr = new_itr;
1426                 /* do an exponential smoothing */
1427                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1428                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1429                 ixgbe_write_eitr(adapter, 0, itr_reg);
1430         }
1431
1432         return;
1433 }
1434
1435 /**
1436  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1437  * @adapter: board private structure
1438  **/
1439 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1440 {
1441         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1442         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1443                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
1444                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(2), ~0);
1445         }
1446         IXGBE_WRITE_FLUSH(&adapter->hw);
1447         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1448                 int i;
1449                 for (i = 0; i < adapter->num_msix_vectors; i++)
1450                         synchronize_irq(adapter->msix_entries[i].vector);
1451         } else {
1452                 synchronize_irq(adapter->pdev->irq);
1453         }
1454 }
1455
1456 /**
1457  * ixgbe_irq_enable - Enable default interrupt generation settings
1458  * @adapter: board private structure
1459  **/
1460 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1461 {
1462         u32 mask;
1463         mask = IXGBE_EIMS_ENABLE_MASK;
1464         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1465                 mask |= IXGBE_EIMS_GPI_SDP1;
1466         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1467                 mask |= IXGBE_EIMS_ECC;
1468                 mask |= IXGBE_EIMS_GPI_SDP1;
1469                 mask |= IXGBE_EIMS_GPI_SDP2;
1470         }
1471
1472         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1473         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1474                 /* enable the rest of the queue vectors */
1475                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1),
1476                                 (IXGBE_EIMS_RTX_QUEUE << 16));
1477                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(2),
1478                                 ((IXGBE_EIMS_RTX_QUEUE << 16) |
1479                                   IXGBE_EIMS_RTX_QUEUE));
1480         }
1481         IXGBE_WRITE_FLUSH(&adapter->hw);
1482 }
1483
1484 /**
1485  * ixgbe_intr - legacy mode Interrupt Handler
1486  * @irq: interrupt number
1487  * @data: pointer to a network interface device structure
1488  **/
1489 static irqreturn_t ixgbe_intr(int irq, void *data)
1490 {
1491         struct net_device *netdev = data;
1492         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1493         struct ixgbe_hw *hw = &adapter->hw;
1494         u32 eicr;
1495
1496         /*
1497          * Workaround for silicon errata.  Mask the interrupts
1498          * before the read of EICR.
1499          */
1500         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
1501
1502         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1503          * therefore no explict interrupt disable is necessary */
1504         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1505         if (!eicr) {
1506                 /* shared interrupt alert!
1507                  * make sure interrupts are enabled because the read will
1508                  * have disabled interrupts due to EIAM */
1509                 ixgbe_irq_enable(adapter);
1510                 return IRQ_NONE;        /* Not our interrupt */
1511         }
1512
1513         if (eicr & IXGBE_EICR_LSC)
1514                 ixgbe_check_lsc(adapter);
1515
1516         if (hw->mac.type == ixgbe_mac_82599EB)
1517                 ixgbe_check_sfp_event(adapter, eicr);
1518
1519         ixgbe_check_fan_failure(adapter, eicr);
1520
1521         if (napi_schedule_prep(&adapter->q_vector[0].napi)) {
1522                 adapter->tx_ring[0].total_packets = 0;
1523                 adapter->tx_ring[0].total_bytes = 0;
1524                 adapter->rx_ring[0].total_packets = 0;
1525                 adapter->rx_ring[0].total_bytes = 0;
1526                 /* would disable interrupts here but EIAM disabled it */
1527                 __napi_schedule(&adapter->q_vector[0].napi);
1528         }
1529
1530         return IRQ_HANDLED;
1531 }
1532
1533 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1534 {
1535         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1536
1537         for (i = 0; i < q_vectors; i++) {
1538                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1539                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1540                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1541                 q_vector->rxr_count = 0;
1542                 q_vector->txr_count = 0;
1543         }
1544 }
1545
1546 /**
1547  * ixgbe_request_irq - initialize interrupts
1548  * @adapter: board private structure
1549  *
1550  * Attempts to configure interrupts using the best available
1551  * capabilities of the hardware and kernel.
1552  **/
1553 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1554 {
1555         struct net_device *netdev = adapter->netdev;
1556         int err;
1557
1558         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1559                 err = ixgbe_request_msix_irqs(adapter);
1560         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1561                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1562                                   netdev->name, netdev);
1563         } else {
1564                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1565                                   netdev->name, netdev);
1566         }
1567
1568         if (err)
1569                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1570
1571         return err;
1572 }
1573
1574 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1575 {
1576         struct net_device *netdev = adapter->netdev;
1577
1578         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1579                 int i, q_vectors;
1580
1581                 q_vectors = adapter->num_msix_vectors;
1582
1583                 i = q_vectors - 1;
1584                 free_irq(adapter->msix_entries[i].vector, netdev);
1585
1586                 i--;
1587                 for (; i >= 0; i--) {
1588                         free_irq(adapter->msix_entries[i].vector,
1589                                  &(adapter->q_vector[i]));
1590                 }
1591
1592                 ixgbe_reset_q_vectors(adapter);
1593         } else {
1594                 free_irq(adapter->pdev->irq, netdev);
1595         }
1596 }
1597
1598 /**
1599  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1600  *
1601  **/
1602 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1603 {
1604         struct ixgbe_hw *hw = &adapter->hw;
1605
1606         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1607                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1608
1609         ixgbe_set_ivar(adapter, 0, 0, 0);
1610         ixgbe_set_ivar(adapter, 1, 0, 0);
1611
1612         map_vector_to_rxq(adapter, 0, 0);
1613         map_vector_to_txq(adapter, 0, 0);
1614
1615         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1616 }
1617
1618 /**
1619  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1620  * @adapter: board private structure
1621  *
1622  * Configure the Tx unit of the MAC after a reset.
1623  **/
1624 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1625 {
1626         u64 tdba;
1627         struct ixgbe_hw *hw = &adapter->hw;
1628         u32 i, j, tdlen, txctrl;
1629
1630         /* Setup the HW Tx Head and Tail descriptor pointers */
1631         for (i = 0; i < adapter->num_tx_queues; i++) {
1632                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1633                 j = ring->reg_idx;
1634                 tdba = ring->dma;
1635                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1636                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1637                                 (tdba & DMA_32BIT_MASK));
1638                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1639                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1640                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1641                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1642                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1643                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1644                 /* Disable Tx Head Writeback RO bit, since this hoses
1645                  * bookkeeping if things aren't delivered in order.
1646                  */
1647                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1648                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1649                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1650         }
1651         if (hw->mac.type == ixgbe_mac_82599EB) {
1652                 /* We enable 8 traffic classes, DCB only */
1653                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
1654                         IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
1655                                         IXGBE_MTQC_8TC_8TQ));
1656         }
1657 }
1658
1659 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1660
1661 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1662 {
1663         struct ixgbe_ring *rx_ring;
1664         u32 srrctl;
1665         int queue0 = 0;
1666         unsigned long mask;
1667
1668         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1669                 queue0 = index;
1670         } else {
1671                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1672                 queue0 = index & mask;
1673                 index = index & mask;
1674         }
1675
1676         rx_ring = &adapter->rx_ring[queue0];
1677
1678         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1679
1680         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1681         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1682
1683         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1684                 u16 bufsz = IXGBE_RXBUFFER_2048;
1685                 /* grow the amount we can receive on large page machines */
1686                 if (bufsz < (PAGE_SIZE / 2))
1687                         bufsz = (PAGE_SIZE / 2);
1688                 /* cap the bufsz at our largest descriptor size */
1689                 bufsz = min((u16)IXGBE_MAX_RXBUFFER, bufsz);
1690
1691                 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1692                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1693                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1694                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1695                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1696         } else {
1697                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1698
1699                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1700                         srrctl |= IXGBE_RXBUFFER_2048 >>
1701                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1702                 else
1703                         srrctl |= rx_ring->rx_buf_len >>
1704                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1705         }
1706
1707         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1708 }
1709
1710 /**
1711  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1712  * @adapter: board private structure
1713  *
1714  * Configure the Rx unit of the MAC after a reset.
1715  **/
1716 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1717 {
1718         u64 rdba;
1719         struct ixgbe_hw *hw = &adapter->hw;
1720         struct net_device *netdev = adapter->netdev;
1721         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1722         int i, j;
1723         u32 rdlen, rxctrl, rxcsum;
1724         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1725                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1726                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1727         u32 fctrl, hlreg0;
1728         u32 reta = 0, mrqc = 0;
1729         u32 rdrxctl;
1730         int rx_buf_len;
1731
1732         /* Decide whether to use packet split mode or not */
1733         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1734
1735         /* Set the RX buffer length according to the mode */
1736         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1737                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1738                 if (hw->mac.type == ixgbe_mac_82599EB) {
1739                         /* PSRTYPE must be initialized in 82599 */
1740                         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1741                                       IXGBE_PSRTYPE_UDPHDR |
1742                                       IXGBE_PSRTYPE_IPV4HDR |
1743                                       IXGBE_PSRTYPE_IPV6HDR;
1744                         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
1745                 }
1746         } else {
1747                 if (netdev->mtu <= ETH_DATA_LEN)
1748                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1749                 else
1750                         rx_buf_len = ALIGN(max_frame, 1024);
1751         }
1752
1753         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1754         fctrl |= IXGBE_FCTRL_BAM;
1755         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1756         fctrl |= IXGBE_FCTRL_PMCF;
1757         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1758
1759         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1760         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1761                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1762         else
1763                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1764         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1765
1766         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1767         /* disable receives while setting up the descriptors */
1768         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1769         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1770
1771         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1772          * the Base and Length of the Rx Descriptor Ring */
1773         for (i = 0; i < adapter->num_rx_queues; i++) {
1774                 rdba = adapter->rx_ring[i].dma;
1775                 j = adapter->rx_ring[i].reg_idx;
1776                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1777                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1778                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1779                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1780                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1781                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1782                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1783                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1784
1785                 ixgbe_configure_srrctl(adapter, j);
1786         }
1787
1788         if (hw->mac.type == ixgbe_mac_82598EB) {
1789                 /*
1790                  * For VMDq support of different descriptor types or
1791                  * buffer sizes through the use of multiple SRRCTL
1792                  * registers, RDRXCTL.MVMEN must be set to 1
1793                  *
1794                  * also, the manual doesn't mention it clearly but DCA hints
1795                  * will only use queue 0's tags unless this bit is set.  Side
1796                  * effects of setting this bit are only that SRRCTL must be
1797                  * fully programmed [0..15]
1798                  */
1799                 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1800                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1801                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1802         }
1803
1804         /* Program MRQC for the distribution of queues */
1805         if (hw->mac.type == ixgbe_mac_82599EB) {
1806                 int mask = adapter->flags & (
1807                                 IXGBE_FLAG_RSS_ENABLED
1808                                 | IXGBE_FLAG_DCB_ENABLED
1809                                 );
1810
1811                 switch (mask) {
1812                 case (IXGBE_FLAG_RSS_ENABLED):
1813                         mrqc = IXGBE_MRQC_RSSEN;
1814                         break;
1815                 case (IXGBE_FLAG_DCB_ENABLED):
1816                         mrqc = IXGBE_MRQC_RT8TCEN;
1817                         break;
1818                 default:
1819                         break;
1820                 }
1821         }
1822         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1823                 /* Fill out redirection table */
1824                 for (i = 0, j = 0; i < 128; i++, j++) {
1825                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1826                                 j = 0;
1827                         /* reta = 4-byte sliding window of
1828                          * 0x00..(indices-1)(indices-1)00..etc. */
1829                         reta = (reta << 8) | (j * 0x11);
1830                         if ((i & 3) == 3)
1831                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1832                 }
1833
1834                 /* Fill out hash function seeds */
1835                 for (i = 0; i < 10; i++)
1836                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1837
1838                 if (hw->mac.type == ixgbe_mac_82598EB)
1839                         mrqc |= IXGBE_MRQC_RSSEN;
1840                     /* Perform hash on these packet types */
1841                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
1842                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1843                       | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1844                       | IXGBE_MRQC_RSS_FIELD_IPV6
1845                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1846                       | IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
1847         }
1848         IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1849
1850         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1851
1852         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1853             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1854                 /* Disable indicating checksum in descriptor, enables
1855                  * RSS hash */
1856                 rxcsum |= IXGBE_RXCSUM_PCSD;
1857         }
1858         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1859                 /* Enable IPv4 payload checksum for UDP fragments
1860                  * if PCSD is not set */
1861                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1862         }
1863
1864         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1865
1866         if (hw->mac.type == ixgbe_mac_82599EB) {
1867                 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1868                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
1869                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1870         }
1871 }
1872
1873 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1874 {
1875         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1876         struct ixgbe_hw *hw = &adapter->hw;
1877
1878         /* add VID to filter table */
1879         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1880 }
1881
1882 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1883 {
1884         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1885         struct ixgbe_hw *hw = &adapter->hw;
1886
1887         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1888                 ixgbe_irq_disable(adapter);
1889
1890         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1891
1892         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1893                 ixgbe_irq_enable(adapter);
1894
1895         /* remove VID from filter table */
1896         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1897 }
1898
1899 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1900                                    struct vlan_group *grp)
1901 {
1902         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1903         u32 ctrl;
1904         int i, j;
1905
1906         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1907                 ixgbe_irq_disable(adapter);
1908         adapter->vlgrp = grp;
1909
1910         /*
1911          * For a DCB driver, always enable VLAN tag stripping so we can
1912          * still receive traffic from a DCB-enabled host even if we're
1913          * not in DCB mode.
1914          */
1915         ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1916         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1917                 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1918                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1919                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1920         } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1921                 ctrl |= IXGBE_VLNCTRL_VFE;
1922                 /* enable VLAN tag insert/strip */
1923                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1924                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1925                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1926                 for (i = 0; i < adapter->num_rx_queues; i++) {
1927                         j = adapter->rx_ring[i].reg_idx;
1928                         ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(j));
1929                         ctrl |= IXGBE_RXDCTL_VME;
1930                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(j), ctrl);
1931                 }
1932         }
1933         ixgbe_vlan_rx_add_vid(netdev, 0);
1934
1935         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1936                 ixgbe_irq_enable(adapter);
1937 }
1938
1939 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1940 {
1941         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1942
1943         if (adapter->vlgrp) {
1944                 u16 vid;
1945                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1946                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1947                                 continue;
1948                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1949                 }
1950         }
1951 }
1952
1953 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1954 {
1955         struct dev_mc_list *mc_ptr;
1956         u8 *addr = *mc_addr_ptr;
1957         *vmdq = 0;
1958
1959         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1960         if (mc_ptr->next)
1961                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1962         else
1963                 *mc_addr_ptr = NULL;
1964
1965         return addr;
1966 }
1967
1968 /**
1969  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1970  * @netdev: network interface device structure
1971  *
1972  * The set_rx_method entry point is called whenever the unicast/multicast
1973  * address list or the network interface flags are updated.  This routine is
1974  * responsible for configuring the hardware for proper unicast, multicast and
1975  * promiscuous mode.
1976  **/
1977 static void ixgbe_set_rx_mode(struct net_device *netdev)
1978 {
1979         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1980         struct ixgbe_hw *hw = &adapter->hw;
1981         u32 fctrl, vlnctrl;
1982         u8 *addr_list = NULL;
1983         int addr_count = 0;
1984
1985         /* Check for Promiscuous and All Multicast modes */
1986
1987         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1988         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1989
1990         if (netdev->flags & IFF_PROMISC) {
1991                 hw->addr_ctrl.user_set_promisc = 1;
1992                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1993                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1994         } else {
1995                 if (netdev->flags & IFF_ALLMULTI) {
1996                         fctrl |= IXGBE_FCTRL_MPE;
1997                         fctrl &= ~IXGBE_FCTRL_UPE;
1998                 } else {
1999                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2000                 }
2001                 vlnctrl |= IXGBE_VLNCTRL_VFE;
2002                 hw->addr_ctrl.user_set_promisc = 0;
2003         }
2004
2005         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
2006         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2007
2008         /* reprogram secondary unicast list */
2009         addr_count = netdev->uc_count;
2010         if (addr_count)
2011                 addr_list = netdev->uc_list->dmi_addr;
2012         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
2013                                           ixgbe_addr_list_itr);
2014
2015         /* reprogram multicast list */
2016         addr_count = netdev->mc_count;
2017         if (addr_count)
2018                 addr_list = netdev->mc_list->dmi_addr;
2019         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
2020                                         ixgbe_addr_list_itr);
2021 }
2022
2023 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
2024 {
2025         int q_idx;
2026         struct ixgbe_q_vector *q_vector;
2027         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2028
2029         /* legacy and MSI only use one vector */
2030         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2031                 q_vectors = 1;
2032
2033         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2034                 struct napi_struct *napi;
2035                 q_vector = &adapter->q_vector[q_idx];
2036                 if (!q_vector->rxr_count)
2037                         continue;
2038                 napi = &q_vector->napi;
2039                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
2040                     (q_vector->rxr_count > 1))
2041                         napi->poll = &ixgbe_clean_rxonly_many;
2042
2043                 napi_enable(napi);
2044         }
2045 }
2046
2047 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
2048 {
2049         int q_idx;
2050         struct ixgbe_q_vector *q_vector;
2051         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2052
2053         /* legacy and MSI only use one vector */
2054         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2055                 q_vectors = 1;
2056
2057         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2058                 q_vector = &adapter->q_vector[q_idx];
2059                 if (!q_vector->rxr_count)
2060                         continue;
2061                 napi_disable(&q_vector->napi);
2062         }
2063 }
2064
2065 #ifdef CONFIG_IXGBE_DCB
2066 /*
2067  * ixgbe_configure_dcb - Configure DCB hardware
2068  * @adapter: ixgbe adapter struct
2069  *
2070  * This is called by the driver on open to configure the DCB hardware.
2071  * This is also called by the gennetlink interface when reconfiguring
2072  * the DCB state.
2073  */
2074 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
2075 {
2076         struct ixgbe_hw *hw = &adapter->hw;
2077         u32 txdctl, vlnctrl;
2078         int i, j;
2079
2080         ixgbe_dcb_check_config(&adapter->dcb_cfg);
2081         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
2082         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
2083
2084         /* reconfigure the hardware */
2085         ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
2086
2087         for (i = 0; i < adapter->num_tx_queues; i++) {
2088                 j = adapter->tx_ring[i].reg_idx;
2089                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2090                 /* PThresh workaround for Tx hang with DFP enabled. */
2091                 txdctl |= 32;
2092                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2093         }
2094         /* Enable VLAN tag insert/strip */
2095         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2096         if (hw->mac.type == ixgbe_mac_82598EB) {
2097                 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
2098                 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2099                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2100         } else if (hw->mac.type == ixgbe_mac_82599EB) {
2101                 vlnctrl |= IXGBE_VLNCTRL_VFE;
2102                 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2103                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2104                 for (i = 0; i < adapter->num_rx_queues; i++) {
2105                         j = adapter->rx_ring[i].reg_idx;
2106                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2107                         vlnctrl |= IXGBE_RXDCTL_VME;
2108                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2109                 }
2110         }
2111         hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
2112 }
2113
2114 #endif
2115 static void ixgbe_configure(struct ixgbe_adapter *adapter)
2116 {
2117         struct net_device *netdev = adapter->netdev;
2118         int i;
2119
2120         ixgbe_set_rx_mode(netdev);
2121
2122         ixgbe_restore_vlan(adapter);
2123 #ifdef CONFIG_IXGBE_DCB
2124         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2125                 netif_set_gso_max_size(netdev, 32768);
2126                 ixgbe_configure_dcb(adapter);
2127         } else {
2128                 netif_set_gso_max_size(netdev, 65536);
2129         }
2130 #else
2131         netif_set_gso_max_size(netdev, 65536);
2132 #endif
2133
2134         ixgbe_configure_tx(adapter);
2135         ixgbe_configure_rx(adapter);
2136         for (i = 0; i < adapter->num_rx_queues; i++)
2137                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
2138                                        (adapter->rx_ring[i].count - 1));
2139 }
2140
2141 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2142 {
2143         switch (hw->phy.type) {
2144         case ixgbe_phy_sfp_avago:
2145         case ixgbe_phy_sfp_ftl:
2146         case ixgbe_phy_sfp_intel:
2147         case ixgbe_phy_sfp_unknown:
2148         case ixgbe_phy_tw_tyco:
2149         case ixgbe_phy_tw_unknown:
2150                 return true;
2151         default:
2152                 return false;
2153         }
2154 }
2155
2156 /**
2157  * ixgbe_sfp_link_config - set up SFP+ link
2158  * @adapter: pointer to private adapter struct
2159  **/
2160 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
2161 {
2162         struct ixgbe_hw *hw = &adapter->hw;
2163
2164                 if (hw->phy.multispeed_fiber) {
2165                         /*
2166                          * In multispeed fiber setups, the device may not have
2167                          * had a physical connection when the driver loaded.
2168                          * If that's the case, the initial link configuration
2169                          * couldn't get the MAC into 10G or 1G mode, so we'll
2170                          * never have a link status change interrupt fire.
2171                          * We need to try and force an autonegotiation
2172                          * session, then bring up link.
2173                          */
2174                         hw->mac.ops.setup_sfp(hw);
2175                         if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
2176                                 schedule_work(&adapter->multispeed_fiber_task);
2177                 } else {
2178                         /*
2179                          * Direct Attach Cu and non-multispeed fiber modules
2180                          * still need to be configured properly prior to
2181                          * attempting link.
2182                          */
2183                         if (!(adapter->flags & IXGBE_FLAG_IN_SFP_MOD_TASK))
2184                                 schedule_work(&adapter->sfp_config_module_task);
2185                 }
2186 }
2187
2188 /**
2189  * ixgbe_non_sfp_link_config - set up non-SFP+ link
2190  * @hw: pointer to private hardware struct
2191  *
2192  * Returns 0 on success, negative on failure
2193  **/
2194 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
2195 {
2196         u32 autoneg;
2197         bool link_up = false;
2198         u32 ret = IXGBE_ERR_LINK_SETUP;
2199
2200         if (hw->mac.ops.check_link)
2201                 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2202
2203         if (ret)
2204                 goto link_cfg_out;
2205
2206         if (hw->mac.ops.get_link_capabilities)
2207                 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
2208                                                         &hw->mac.autoneg);
2209         if (ret)
2210                 goto link_cfg_out;
2211
2212         if (hw->mac.ops.setup_link_speed)
2213                 ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, link_up);
2214 link_cfg_out:
2215         return ret;
2216 }
2217
2218 #define IXGBE_MAX_RX_DESC_POLL 10
2219 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2220                                               int rxr)
2221 {
2222         int j = adapter->rx_ring[rxr].reg_idx;
2223         int k;
2224
2225         for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
2226                 if (IXGBE_READ_REG(&adapter->hw,
2227                                    IXGBE_RXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
2228                         break;
2229                 else
2230                         msleep(1);
2231         }
2232         if (k >= IXGBE_MAX_RX_DESC_POLL) {
2233                 DPRINTK(DRV, ERR, "RXDCTL.ENABLE on Rx queue %d "
2234                         "not set within the polling period\n", rxr);
2235         }
2236         ixgbe_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
2237                               (adapter->rx_ring[rxr].count - 1));
2238 }
2239
2240 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
2241 {
2242         struct net_device *netdev = adapter->netdev;
2243         struct ixgbe_hw *hw = &adapter->hw;
2244         int i, j = 0;
2245         int num_rx_rings = adapter->num_rx_queues;
2246         int err;
2247         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2248         u32 txdctl, rxdctl, mhadd;
2249         u32 dmatxctl;
2250         u32 gpie;
2251
2252         ixgbe_get_hw_control(adapter);
2253
2254         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2255             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2256                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2257                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2258                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2259                 } else {
2260                         /* MSI only */
2261                         gpie = 0;
2262                 }
2263                 /* XXX: to interrupt immediately for EICS writes, enable this */
2264                 /* gpie |= IXGBE_GPIE_EIMEN; */
2265                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2266         }
2267
2268         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2269                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2270                  * specifically only auto mask tx and rx interrupts */
2271                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2272         }
2273
2274         /* Enable fan failure interrupt if media type is copper */
2275         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2276                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2277                 gpie |= IXGBE_SDP1_GPIEN;
2278                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2279         }
2280
2281         if (hw->mac.type == ixgbe_mac_82599EB) {
2282                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2283                 gpie |= IXGBE_SDP1_GPIEN;
2284                 gpie |= IXGBE_SDP2_GPIEN;
2285                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2286         }
2287
2288         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2289         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2290                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2291                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2292
2293                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2294         }
2295
2296         for (i = 0; i < adapter->num_tx_queues; i++) {
2297                 j = adapter->tx_ring[i].reg_idx;
2298                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2299                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2300                 txdctl |= (8 << 16);
2301                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2302         }
2303
2304         if (hw->mac.type == ixgbe_mac_82599EB) {
2305                 /* DMATXCTL.EN must be set after all Tx queue config is done */
2306                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2307                 dmatxctl |= IXGBE_DMATXCTL_TE;
2308                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2309         }
2310         for (i = 0; i < adapter->num_tx_queues; i++) {
2311                 j = adapter->tx_ring[i].reg_idx;
2312                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2313                 txdctl |= IXGBE_TXDCTL_ENABLE;
2314                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2315         }
2316
2317         for (i = 0; i < num_rx_rings; i++) {
2318                 j = adapter->rx_ring[i].reg_idx;
2319                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2320                 /* enable PTHRESH=32 descriptors (half the internal cache)
2321                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
2322                  * this also removes a pesky rx_no_buffer_count increment */
2323                 rxdctl |= 0x0020;
2324                 rxdctl |= IXGBE_RXDCTL_ENABLE;
2325                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2326                 if (hw->mac.type == ixgbe_mac_82599EB)
2327                         ixgbe_rx_desc_queue_enable(adapter, i);
2328         }
2329         /* enable all receives */
2330         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2331         if (hw->mac.type == ixgbe_mac_82598EB)
2332                 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2333         else
2334                 rxdctl |= IXGBE_RXCTRL_RXEN;
2335         hw->mac.ops.enable_rx_dma(hw, rxdctl);
2336
2337         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2338                 ixgbe_configure_msix(adapter);
2339         else
2340                 ixgbe_configure_msi_and_legacy(adapter);
2341
2342         clear_bit(__IXGBE_DOWN, &adapter->state);
2343         ixgbe_napi_enable_all(adapter);
2344
2345         /* clear any pending interrupts, may auto mask */
2346         IXGBE_READ_REG(hw, IXGBE_EICR);
2347
2348         ixgbe_irq_enable(adapter);
2349
2350         /*
2351          * For hot-pluggable SFP+ devices, a new SFP+ module may have
2352          * arrived before interrupts were enabled.  We need to kick off
2353          * the SFP+ module setup first, then try to bring up link.
2354          * If we're not hot-pluggable SFP+, we just need to configure link
2355          * and bring it up.
2356          */
2357         err = hw->phy.ops.identify(hw);
2358         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2359                 DPRINTK(PROBE, ERR, "PHY not supported on this NIC %d\n", err);
2360                 ixgbe_down(adapter);
2361                 return err;
2362         }
2363
2364         if (ixgbe_is_sfp(hw)) {
2365                 ixgbe_sfp_link_config(adapter);
2366         } else {
2367                 err = ixgbe_non_sfp_link_config(hw);
2368                 if (err)
2369                         DPRINTK(PROBE, ERR, "link_config FAILED %d\n", err);
2370         }
2371
2372         /* enable transmits */
2373         netif_tx_start_all_queues(netdev);
2374
2375         /* bring the link up in the watchdog, this could race with our first
2376          * link up interrupt but shouldn't be a problem */
2377         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2378         adapter->link_check_timeout = jiffies;
2379         mod_timer(&adapter->watchdog_timer, jiffies);
2380         return 0;
2381 }
2382
2383 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2384 {
2385         WARN_ON(in_interrupt());
2386         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2387                 msleep(1);
2388         ixgbe_down(adapter);
2389         ixgbe_up(adapter);
2390         clear_bit(__IXGBE_RESETTING, &adapter->state);
2391 }
2392
2393 int ixgbe_up(struct ixgbe_adapter *adapter)
2394 {
2395         /* hardware has been reset, we need to reload some things */
2396         ixgbe_configure(adapter);
2397
2398         ixgbe_napi_add_all(adapter);
2399
2400         return ixgbe_up_complete(adapter);
2401 }
2402
2403 void ixgbe_reset(struct ixgbe_adapter *adapter)
2404 {
2405         struct ixgbe_hw *hw = &adapter->hw;
2406         if (hw->mac.ops.init_hw(hw))
2407                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2408
2409         /* reprogram the RAR[0] in case user changed it. */
2410         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2411
2412 }
2413
2414 /**
2415  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2416  * @adapter: board private structure
2417  * @rx_ring: ring to free buffers from
2418  **/
2419 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2420                                 struct ixgbe_ring *rx_ring)
2421 {
2422         struct pci_dev *pdev = adapter->pdev;
2423         unsigned long size;
2424         unsigned int i;
2425
2426         /* Free all the Rx ring sk_buffs */
2427
2428         for (i = 0; i < rx_ring->count; i++) {
2429                 struct ixgbe_rx_buffer *rx_buffer_info;
2430
2431                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2432                 if (rx_buffer_info->dma) {
2433                         pci_unmap_single(pdev, rx_buffer_info->dma,
2434                                          rx_ring->rx_buf_len,
2435                                          PCI_DMA_FROMDEVICE);
2436                         rx_buffer_info->dma = 0;
2437                 }
2438                 if (rx_buffer_info->skb) {
2439                         dev_kfree_skb(rx_buffer_info->skb);
2440                         rx_buffer_info->skb = NULL;
2441                 }
2442                 if (!rx_buffer_info->page)
2443                         continue;
2444                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2445                                PCI_DMA_FROMDEVICE);
2446                 rx_buffer_info->page_dma = 0;
2447                 put_page(rx_buffer_info->page);
2448                 rx_buffer_info->page = NULL;
2449                 rx_buffer_info->page_offset = 0;
2450         }
2451
2452         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2453         memset(rx_ring->rx_buffer_info, 0, size);
2454
2455         /* Zero out the descriptor ring */
2456         memset(rx_ring->desc, 0, rx_ring->size);
2457
2458         rx_ring->next_to_clean = 0;
2459         rx_ring->next_to_use = 0;
2460
2461         if (rx_ring->head)
2462                 writel(0, adapter->hw.hw_addr + rx_ring->head);
2463         if (rx_ring->tail)
2464                 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2465 }
2466
2467 /**
2468  * ixgbe_clean_tx_ring - Free Tx Buffers
2469  * @adapter: board private structure
2470  * @tx_ring: ring to be cleaned
2471  **/
2472 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2473                                 struct ixgbe_ring *tx_ring)
2474 {
2475         struct ixgbe_tx_buffer *tx_buffer_info;
2476         unsigned long size;
2477         unsigned int i;
2478
2479         /* Free all the Tx ring sk_buffs */
2480
2481         for (i = 0; i < tx_ring->count; i++) {
2482                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2483                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2484         }
2485
2486         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2487         memset(tx_ring->tx_buffer_info, 0, size);
2488
2489         /* Zero out the descriptor ring */
2490         memset(tx_ring->desc, 0, tx_ring->size);
2491
2492         tx_ring->next_to_use = 0;
2493         tx_ring->next_to_clean = 0;
2494
2495         if (tx_ring->head)
2496                 writel(0, adapter->hw.hw_addr + tx_ring->head);
2497         if (tx_ring->tail)
2498                 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2499 }
2500
2501 /**
2502  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2503  * @adapter: board private structure
2504  **/
2505 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2506 {
2507         int i;
2508
2509         for (i = 0; i < adapter->num_rx_queues; i++)
2510                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2511 }
2512
2513 /**
2514  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2515  * @adapter: board private structure
2516  **/
2517 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2518 {
2519         int i;
2520
2521         for (i = 0; i < adapter->num_tx_queues; i++)
2522                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2523 }
2524
2525 void ixgbe_down(struct ixgbe_adapter *adapter)
2526 {
2527         struct net_device *netdev = adapter->netdev;
2528         struct ixgbe_hw *hw = &adapter->hw;
2529         u32 rxctrl;
2530         u32 txdctl;
2531         int i, j;
2532
2533         /* signal that we are down to the interrupt handler */
2534         set_bit(__IXGBE_DOWN, &adapter->state);
2535
2536         /* disable receives */
2537         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2538         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2539
2540         netif_tx_disable(netdev);
2541
2542         IXGBE_WRITE_FLUSH(hw);
2543         msleep(10);
2544
2545         netif_tx_stop_all_queues(netdev);
2546
2547         ixgbe_irq_disable(adapter);
2548
2549         ixgbe_napi_disable_all(adapter);
2550
2551         del_timer_sync(&adapter->watchdog_timer);
2552         cancel_work_sync(&adapter->watchdog_task);
2553
2554         /* disable transmits in the hardware now that interrupts are off */
2555         for (i = 0; i < adapter->num_tx_queues; i++) {
2556                 j = adapter->tx_ring[i].reg_idx;
2557                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2558                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2559                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2560         }
2561
2562         netif_carrier_off(netdev);
2563
2564 #ifdef CONFIG_IXGBE_DCA
2565         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2566                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2567                 dca_remove_requester(&adapter->pdev->dev);
2568         }
2569
2570 #endif
2571         if (!pci_channel_offline(adapter->pdev))
2572                 ixgbe_reset(adapter);
2573         ixgbe_clean_all_tx_rings(adapter);
2574         ixgbe_clean_all_rx_rings(adapter);
2575
2576 #ifdef CONFIG_IXGBE_DCA
2577         /* since we reset the hardware DCA settings were cleared */
2578         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2579                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2580                 /* always use CB2 mode, difference is masked
2581                  * in the CB driver */
2582                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2583                 ixgbe_setup_dca(adapter);
2584         }
2585 #endif
2586 }
2587
2588 /**
2589  * ixgbe_poll - NAPI Rx polling callback
2590  * @napi: structure for representing this polling device
2591  * @budget: how many packets driver is allowed to clean
2592  *
2593  * This function is used for legacy and MSI, NAPI mode
2594  **/
2595 static int ixgbe_poll(struct napi_struct *napi, int budget)
2596 {
2597         struct ixgbe_q_vector *q_vector =
2598                                 container_of(napi, struct ixgbe_q_vector, napi);
2599         struct ixgbe_adapter *adapter = q_vector->adapter;
2600         int tx_clean_complete, work_done = 0;
2601
2602 #ifdef CONFIG_IXGBE_DCA
2603         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2604                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2605                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2606         }
2607 #endif
2608
2609         tx_clean_complete = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2610         ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
2611
2612         if (!tx_clean_complete)
2613                 work_done = budget;
2614
2615         /* If budget not fully consumed, exit the polling mode */
2616         if (work_done < budget) {
2617                 napi_complete(napi);
2618                 if (adapter->itr_setting & 1)
2619                         ixgbe_set_itr(adapter);
2620                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2621                         ixgbe_irq_enable(adapter);
2622         }
2623         return work_done;
2624 }
2625
2626 /**
2627  * ixgbe_tx_timeout - Respond to a Tx Hang
2628  * @netdev: network interface device structure
2629  **/
2630 static void ixgbe_tx_timeout(struct net_device *netdev)
2631 {
2632         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2633
2634         /* Do the reset outside of interrupt context */
2635         schedule_work(&adapter->reset_task);
2636 }
2637
2638 static void ixgbe_reset_task(struct work_struct *work)
2639 {
2640         struct ixgbe_adapter *adapter;
2641         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2642
2643         /* If we're already down or resetting, just bail */
2644         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2645             test_bit(__IXGBE_RESETTING, &adapter->state))
2646                 return;
2647
2648         adapter->tx_timeout_count++;
2649
2650         ixgbe_reinit_locked(adapter);
2651 }
2652
2653 #ifdef CONFIG_IXGBE_DCB
2654 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
2655 {
2656         bool ret = false;
2657
2658         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2659                 adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3;
2660                 adapter->num_rx_queues =
2661                                       adapter->ring_feature[RING_F_DCB].indices;
2662                 adapter->num_tx_queues =
2663                                       adapter->ring_feature[RING_F_DCB].indices;
2664                 ret = true;
2665         } else {
2666                 ret = false;
2667         }
2668
2669         return ret;
2670 }
2671 #endif
2672
2673 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2674 {
2675         bool ret = false;
2676
2677         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2678                 adapter->ring_feature[RING_F_RSS].mask = 0xF;
2679                 adapter->num_rx_queues =
2680                                       adapter->ring_feature[RING_F_RSS].indices;
2681                 adapter->num_tx_queues =
2682                                       adapter->ring_feature[RING_F_RSS].indices;
2683                 ret = true;
2684         } else {
2685                 ret = false;
2686         }
2687
2688         return ret;
2689 }
2690
2691 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2692 {
2693         /* Start with base case */
2694         adapter->num_rx_queues = 1;
2695         adapter->num_tx_queues = 1;
2696
2697 #ifdef CONFIG_IXGBE_DCB
2698         if (ixgbe_set_dcb_queues(adapter))
2699                 return;
2700
2701 #endif
2702         if (ixgbe_set_rss_queues(adapter))
2703                 return;
2704 }
2705
2706 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2707                                        int vectors)
2708 {
2709         int err, vector_threshold;
2710
2711         /* We'll want at least 3 (vector_threshold):
2712          * 1) TxQ[0] Cleanup
2713          * 2) RxQ[0] Cleanup
2714          * 3) Other (Link Status Change, etc.)
2715          * 4) TCP Timer (optional)
2716          */
2717         vector_threshold = MIN_MSIX_COUNT;
2718
2719         /* The more we get, the more we will assign to Tx/Rx Cleanup
2720          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2721          * Right now, we simply care about how many we'll get; we'll
2722          * set them up later while requesting irq's.
2723          */
2724         while (vectors >= vector_threshold) {
2725                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2726                                       vectors);
2727                 if (!err) /* Success in acquiring all requested vectors. */
2728                         break;
2729                 else if (err < 0)
2730                         vectors = 0; /* Nasty failure, quit now */
2731                 else /* err == number of vectors we should try again with */
2732                         vectors = err;
2733         }
2734
2735         if (vectors < vector_threshold) {
2736                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2737                  * This just means we'll go with either a single MSI
2738                  * vector or fall back to legacy interrupts.
2739                  */
2740                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2741                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2742                 kfree(adapter->msix_entries);
2743                 adapter->msix_entries = NULL;
2744                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2745                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2746                 ixgbe_set_num_queues(adapter);
2747         } else {
2748                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2749                 /*
2750                  * Adjust for only the vectors we'll use, which is minimum
2751                  * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2752                  * vectors we were allocated.
2753                  */
2754                 adapter->num_msix_vectors = min(vectors,
2755                                    adapter->max_msix_q_vectors + NON_Q_VECTORS);
2756         }
2757 }
2758
2759 /**
2760  * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
2761  * @adapter: board private structure to initialize
2762  *
2763  * Cache the descriptor ring offsets for RSS to the assigned rings.
2764  *
2765  **/
2766 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
2767 {
2768         int i;
2769         bool ret = false;
2770
2771         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2772                 for (i = 0; i < adapter->num_rx_queues; i++)
2773                         adapter->rx_ring[i].reg_idx = i;
2774                 for (i = 0; i < adapter->num_tx_queues; i++)
2775                         adapter->tx_ring[i].reg_idx = i;
2776                 ret = true;
2777         } else {
2778                 ret = false;
2779         }
2780
2781         return ret;
2782 }
2783
2784 #ifdef CONFIG_IXGBE_DCB
2785 /**
2786  * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
2787  * @adapter: board private structure to initialize
2788  *
2789  * Cache the descriptor ring offsets for DCB to the assigned rings.
2790  *
2791  **/
2792 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
2793 {
2794         int i;
2795         bool ret = false;
2796         int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2797
2798         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2799                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2800                         /* the number of queues is assumed to be symmetric */
2801                         for (i = 0; i < dcb_i; i++) {
2802                                 adapter->rx_ring[i].reg_idx = i << 3;
2803                                 adapter->tx_ring[i].reg_idx = i << 2;
2804                         }
2805                         ret = true;
2806                 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
2807                         for (i = 0; i < dcb_i; i++) {
2808                                 adapter->rx_ring[i].reg_idx = i << 4;
2809                                 adapter->tx_ring[i].reg_idx = i << 4;
2810                         }
2811                         ret = true;
2812                 } else {
2813                         ret = false;
2814                 }
2815         } else {
2816                 ret = false;
2817         }
2818
2819         return ret;
2820 }
2821 #endif
2822
2823 /**
2824  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2825  * @adapter: board private structure to initialize
2826  *
2827  * Once we know the feature-set enabled for the device, we'll cache
2828  * the register offset the descriptor ring is assigned to.
2829  *
2830  * Note, the order the various feature calls is important.  It must start with
2831  * the "most" features enabled at the same time, then trickle down to the
2832  * least amount of features turned on at once.
2833  **/
2834 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2835 {
2836         /* start with default case */
2837         adapter->rx_ring[0].reg_idx = 0;
2838         adapter->tx_ring[0].reg_idx = 0;
2839
2840 #ifdef CONFIG_IXGBE_DCB
2841         if (ixgbe_cache_ring_dcb(adapter))
2842                 return;
2843
2844 #endif
2845         if (ixgbe_cache_ring_rss(adapter))
2846                 return;
2847 }
2848
2849 /**
2850  * ixgbe_alloc_queues - Allocate memory for all rings
2851  * @adapter: board private structure to initialize
2852  *
2853  * We allocate one ring per queue at run-time since we don't know the
2854  * number of queues at compile-time.
2855  **/
2856 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2857 {
2858         int i;
2859
2860         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2861                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2862         if (!adapter->tx_ring)
2863                 goto err_tx_ring_allocation;
2864
2865         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2866                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2867         if (!adapter->rx_ring)
2868                 goto err_rx_ring_allocation;
2869
2870         for (i = 0; i < adapter->num_tx_queues; i++) {
2871                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2872                 adapter->tx_ring[i].queue_index = i;
2873         }
2874
2875         for (i = 0; i < adapter->num_rx_queues; i++) {
2876                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2877                 adapter->rx_ring[i].queue_index = i;
2878         }
2879
2880         ixgbe_cache_ring_register(adapter);
2881
2882         return 0;
2883
2884 err_rx_ring_allocation:
2885         kfree(adapter->tx_ring);
2886 err_tx_ring_allocation:
2887         return -ENOMEM;
2888 }
2889
2890 /**
2891  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2892  * @adapter: board private structure to initialize
2893  *
2894  * Attempt to configure the interrupts using the best available
2895  * capabilities of the hardware and the kernel.
2896  **/
2897 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2898 {
2899         int err = 0;
2900         int vector, v_budget;
2901
2902         /*
2903          * It's easy to be greedy for MSI-X vectors, but it really
2904          * doesn't do us much good if we have a lot more vectors
2905          * than CPU's.  So let's be conservative and only ask for
2906          * (roughly) twice the number of vectors as there are CPU's.
2907          */
2908         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2909                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2910
2911         /*
2912          * At the same time, hardware can only support a maximum of
2913          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2914          * we can easily reach upwards of 64 Rx descriptor queues and
2915          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2916          * the cpu count also exceeds our vector limit.
2917          */
2918         v_budget = min(v_budget, MAX_MSIX_COUNT);
2919
2920         /* A failure in MSI-X entry allocation isn't fatal, but it does
2921          * mean we disable MSI-X capabilities of the adapter. */
2922         adapter->msix_entries = kcalloc(v_budget,
2923                                         sizeof(struct msix_entry), GFP_KERNEL);
2924         if (!adapter->msix_entries) {
2925                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2926                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2927                 ixgbe_set_num_queues(adapter);
2928                 kfree(adapter->tx_ring);
2929                 kfree(adapter->rx_ring);
2930                 err = ixgbe_alloc_queues(adapter);
2931                 if (err) {
2932                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2933                                 "for queues\n");
2934                         goto out;
2935                 }
2936
2937                 goto try_msi;
2938         }
2939
2940         for (vector = 0; vector < v_budget; vector++)
2941                 adapter->msix_entries[vector].entry = vector;
2942
2943         ixgbe_acquire_msix_vectors(adapter, v_budget);
2944
2945         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2946                 goto out;
2947
2948 try_msi:
2949         err = pci_enable_msi(adapter->pdev);
2950         if (!err) {
2951                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2952         } else {
2953                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2954                         "falling back to legacy.  Error: %d\n", err);
2955                 /* reset err */
2956                 err = 0;
2957         }
2958
2959 out:
2960         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2961         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2962
2963         return err;
2964 }
2965
2966 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2967 {
2968         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2969                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2970                 pci_disable_msix(adapter->pdev);
2971                 kfree(adapter->msix_entries);
2972                 adapter->msix_entries = NULL;
2973         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2974                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2975                 pci_disable_msi(adapter->pdev);
2976         }
2977         return;
2978 }
2979
2980 /**
2981  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2982  * @adapter: board private structure to initialize
2983  *
2984  * We determine which interrupt scheme to use based on...
2985  * - Kernel support (MSI, MSI-X)
2986  *   - which can be user-defined (via MODULE_PARAM)
2987  * - Hardware queue count (num_*_queues)
2988  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2989  **/
2990 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2991 {
2992         int err;
2993
2994         /* Number of supported queues */
2995         ixgbe_set_num_queues(adapter);
2996
2997         err = ixgbe_alloc_queues(adapter);
2998         if (err) {
2999                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
3000                 goto err_alloc_queues;
3001         }
3002
3003         err = ixgbe_set_interrupt_capability(adapter);
3004         if (err) {
3005                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
3006                 goto err_set_interrupt;
3007         }
3008
3009         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
3010                 "Tx Queue count = %u\n",
3011                 (adapter->num_rx_queues > 1) ? "Enabled" :
3012                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
3013
3014         set_bit(__IXGBE_DOWN, &adapter->state);
3015
3016         return 0;
3017
3018 err_set_interrupt:
3019         kfree(adapter->tx_ring);
3020         kfree(adapter->rx_ring);
3021 err_alloc_queues:
3022         return err;
3023 }
3024
3025 /**
3026  * ixgbe_sfp_timer - worker thread to find a missing module
3027  * @data: pointer to our adapter struct
3028  **/
3029 static void ixgbe_sfp_timer(unsigned long data)
3030 {
3031         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3032
3033         /* Do the sfp_timer outside of interrupt context due to the
3034          * delays that sfp+ detection requires
3035          */
3036         schedule_work(&adapter->sfp_task);
3037 }
3038
3039 /**
3040  * ixgbe_sfp_task - worker thread to find a missing module
3041  * @work: pointer to work_struct containing our data
3042  **/
3043 static void ixgbe_sfp_task(struct work_struct *work)
3044 {
3045         struct ixgbe_adapter *adapter = container_of(work,
3046                                                      struct ixgbe_adapter,
3047                                                      sfp_task);
3048         struct ixgbe_hw *hw = &adapter->hw;
3049
3050         if ((hw->phy.type == ixgbe_phy_nl) &&
3051             (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
3052                 s32 ret = hw->phy.ops.identify_sfp(hw);
3053                 if (ret)
3054                         goto reschedule;
3055                 ret = hw->phy.ops.reset(hw);
3056                 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3057                         DPRINTK(PROBE, ERR, "failed to initialize because an "
3058                                 "unsupported SFP+ module type was detected.\n"
3059                                 "Reload the driver after installing a "
3060                                 "supported module.\n");
3061                         unregister_netdev(adapter->netdev);
3062                 } else {
3063                         DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
3064                                 hw->phy.sfp_type);
3065                 }
3066                 /* don't need this routine any more */
3067                 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
3068         }
3069         return;
3070 reschedule:
3071         if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
3072                 mod_timer(&adapter->sfp_timer,
3073                           round_jiffies(jiffies + (2 * HZ)));
3074 }
3075
3076 /**
3077  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3078  * @adapter: board private structure to initialize
3079  *
3080  * ixgbe_sw_init initializes the Adapter private data structure.
3081  * Fields are initialized based on PCI device information and
3082  * OS network device settings (MTU size).
3083  **/
3084 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3085 {
3086         struct ixgbe_hw *hw = &adapter->hw;
3087         struct pci_dev *pdev = adapter->pdev;
3088         unsigned int rss;
3089 #ifdef CONFIG_IXGBE_DCB
3090         int j;
3091         struct tc_configuration *tc;
3092 #endif
3093
3094         /* PCI config space info */
3095
3096         hw->vendor_id = pdev->vendor;
3097         hw->device_id = pdev->device;
3098         hw->revision_id = pdev->revision;
3099         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3100         hw->subsystem_device_id = pdev->subsystem_device;
3101
3102         /* Set capability flags */
3103         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
3104         adapter->ring_feature[RING_F_RSS].indices = rss;
3105         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
3106         adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
3107         if (hw->mac.type == ixgbe_mac_82598EB)
3108                 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
3109         else if (hw->mac.type == ixgbe_mac_82599EB)
3110                 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
3111
3112 #ifdef CONFIG_IXGBE_DCB
3113         /* Configure DCB traffic classes */
3114         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
3115                 tc = &adapter->dcb_cfg.tc_config[j];
3116                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
3117                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
3118                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
3119                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
3120                 tc->dcb_pfc = pfc_disabled;
3121         }
3122         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
3123         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
3124         adapter->dcb_cfg.rx_pba_cfg = pba_equal;
3125         adapter->dcb_cfg.round_robin_enable = false;
3126         adapter->dcb_set_bitmap = 0x00;
3127         ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
3128                            adapter->ring_feature[RING_F_DCB].indices);
3129
3130 #endif
3131
3132         /* default flow control settings */
3133         hw->fc.requested_mode = ixgbe_fc_none;
3134         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3135         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3136         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3137         hw->fc.send_xon = true;
3138
3139         /* enable itr by default in dynamic mode */
3140         adapter->itr_setting = 1;
3141         adapter->eitr_param = 20000;
3142
3143         /* set defaults for eitr in MegaBytes */
3144         adapter->eitr_low = 10;
3145         adapter->eitr_high = 20;
3146
3147         /* set default ring sizes */
3148         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
3149         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
3150
3151         /* initialize eeprom parameters */
3152         if (ixgbe_init_eeprom_params_generic(hw)) {
3153                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
3154                 return -EIO;
3155         }
3156
3157         /* enable rx csum by default */
3158         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
3159
3160         set_bit(__IXGBE_DOWN, &adapter->state);
3161
3162         return 0;
3163 }
3164
3165 /**
3166  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
3167  * @adapter: board private structure
3168  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
3169  *
3170  * Return 0 on success, negative on failure
3171  **/
3172 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
3173                              struct ixgbe_ring *tx_ring)
3174 {
3175         struct pci_dev *pdev = adapter->pdev;
3176         int size;
3177
3178         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
3179         tx_ring->tx_buffer_info = vmalloc(size);
3180         if (!tx_ring->tx_buffer_info)
3181                 goto err;
3182         memset(tx_ring->tx_buffer_info, 0, size);
3183
3184         /* round up to nearest 4K */
3185         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3186         tx_ring->size = ALIGN(tx_ring->size, 4096);
3187
3188         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
3189                                              &tx_ring->dma);
3190         if (!tx_ring->desc)
3191                 goto err;
3192
3193         tx_ring->next_to_use = 0;
3194         tx_ring->next_to_clean = 0;
3195         tx_ring->work_limit = tx_ring->count;
3196         return 0;
3197
3198 err:
3199         vfree(tx_ring->tx_buffer_info);
3200         tx_ring->tx_buffer_info = NULL;
3201         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
3202                             "descriptor ring\n");
3203         return -ENOMEM;
3204 }
3205
3206 /**
3207  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
3208  * @adapter: board private structure
3209  *
3210  * If this function returns with an error, then it's possible one or
3211  * more of the rings is populated (while the rest are not).  It is the
3212  * callers duty to clean those orphaned rings.
3213  *
3214  * Return 0 on success, negative on failure
3215  **/
3216 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
3217 {
3218         int i, err = 0;
3219
3220         for (i = 0; i < adapter->num_tx_queues; i++) {
3221                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
3222                 if (!err)
3223                         continue;
3224                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
3225                 break;
3226         }
3227
3228         return err;
3229 }
3230
3231 /**
3232  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
3233  * @adapter: board private structure
3234  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3235  *
3236  * Returns 0 on success, negative on failure
3237  **/
3238 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
3239                              struct ixgbe_ring *rx_ring)
3240 {
3241         struct pci_dev *pdev = adapter->pdev;
3242         int size;
3243
3244         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
3245         rx_ring->rx_buffer_info = vmalloc(size);
3246         if (!rx_ring->rx_buffer_info) {
3247                 DPRINTK(PROBE, ERR,
3248                         "vmalloc allocation failed for the rx desc ring\n");
3249                 goto alloc_failed;
3250         }
3251         memset(rx_ring->rx_buffer_info, 0, size);
3252
3253         /* Round up to nearest 4K */
3254         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3255         rx_ring->size = ALIGN(rx_ring->size, 4096);
3256
3257         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
3258
3259         if (!rx_ring->desc) {
3260                 DPRINTK(PROBE, ERR,
3261                         "Memory allocation failed for the rx desc ring\n");
3262                 vfree(rx_ring->rx_buffer_info);
3263                 goto alloc_failed;
3264         }
3265
3266         rx_ring->next_to_clean = 0;
3267         rx_ring->next_to_use = 0;
3268
3269         return 0;
3270
3271 alloc_failed:
3272         return -ENOMEM;
3273 }
3274
3275 /**
3276  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
3277  * @adapter: board private structure
3278  *
3279  * If this function returns with an error, then it's possible one or
3280  * more of the rings is populated (while the rest are not).  It is the
3281  * callers duty to clean those orphaned rings.
3282  *
3283  * Return 0 on success, negative on failure
3284  **/
3285
3286 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
3287 {
3288         int i, err = 0;
3289
3290         for (i = 0; i < adapter->num_rx_queues; i++) {
3291                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
3292                 if (!err)
3293                         continue;
3294                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
3295                 break;
3296         }
3297
3298         return err;
3299 }
3300
3301 /**
3302  * ixgbe_free_tx_resources - Free Tx Resources per Queue
3303  * @adapter: board private structure
3304  * @tx_ring: Tx descriptor ring for a specific queue
3305  *
3306  * Free all transmit software resources
3307  **/
3308 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
3309                              struct ixgbe_ring *tx_ring)
3310 {
3311         struct pci_dev *pdev = adapter->pdev;
3312
3313         ixgbe_clean_tx_ring(adapter, tx_ring);
3314
3315         vfree(tx_ring->tx_buffer_info);
3316         tx_ring->tx_buffer_info = NULL;
3317
3318         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3319
3320         tx_ring->desc = NULL;
3321 }
3322
3323 /**
3324  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3325  * @adapter: board private structure
3326  *
3327  * Free all transmit software resources
3328  **/
3329 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3330 {
3331         int i;
3332
3333         for (i = 0; i < adapter->num_tx_queues; i++)
3334                 if (adapter->tx_ring[i].desc)
3335                         ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3336 }
3337
3338 /**
3339  * ixgbe_free_rx_resources - Free Rx Resources
3340  * @adapter: board private structure
3341  * @rx_ring: ring to clean the resources from
3342  *
3343  * Free all receive software resources
3344  **/
3345 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3346                              struct ixgbe_ring *rx_ring)
3347 {
3348         struct pci_dev *pdev = adapter->pdev;
3349
3350         ixgbe_clean_rx_ring(adapter, rx_ring);
3351
3352         vfree(rx_ring->rx_buffer_info);
3353         rx_ring->rx_buffer_info = NULL;
3354
3355         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3356
3357         rx_ring->desc = NULL;
3358 }
3359
3360 /**
3361  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3362  * @adapter: board private structure
3363  *
3364  * Free all receive software resources
3365  **/
3366 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3367 {
3368         int i;
3369
3370         for (i = 0; i < adapter->num_rx_queues; i++)
3371                 if (adapter->rx_ring[i].desc)
3372                         ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3373 }
3374
3375 /**
3376  * ixgbe_change_mtu - Change the Maximum Transfer Unit
3377  * @netdev: network interface device structure
3378  * @new_mtu: new value for maximum frame size
3379  *
3380  * Returns 0 on success, negative on failure
3381  **/
3382 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3383 {
3384         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3385         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3386
3387         /* MTU < 68 is an error and causes problems on some kernels */
3388         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3389                 return -EINVAL;
3390
3391         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3392                 netdev->mtu, new_mtu);
3393         /* must set new MTU before calling down or up */
3394         netdev->mtu = new_mtu;
3395
3396         if (netif_running(netdev))
3397                 ixgbe_reinit_locked(adapter);
3398
3399         return 0;
3400 }
3401
3402 /**
3403  * ixgbe_open - Called when a network interface is made active
3404  * @netdev: network interface device structure
3405  *
3406  * Returns 0 on success, negative value on failure
3407  *
3408  * The open entry point is called when a network interface is made
3409  * active by the system (IFF_UP).  At this point all resources needed
3410  * for transmit and receive operations are allocated, the interrupt
3411  * handler is registered with the OS, the watchdog timer is started,
3412  * and the stack is notified that the interface is ready.
3413  **/
3414 static int ixgbe_open(struct net_device *netdev)
3415 {
3416         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3417         int err;
3418
3419         /* disallow open during test */
3420         if (test_bit(__IXGBE_TESTING, &adapter->state))
3421                 return -EBUSY;
3422
3423         /* allocate transmit descriptors */
3424         err = ixgbe_setup_all_tx_resources(adapter);
3425         if (err)
3426                 goto err_setup_tx;
3427
3428         /* allocate receive descriptors */
3429         err = ixgbe_setup_all_rx_resources(adapter);
3430         if (err)
3431                 goto err_setup_rx;
3432
3433         ixgbe_configure(adapter);
3434
3435         ixgbe_napi_add_all(adapter);
3436
3437         err = ixgbe_request_irq(adapter);
3438         if (err)
3439                 goto err_req_irq;
3440
3441         err = ixgbe_up_complete(adapter);
3442         if (err)
3443                 goto err_up;
3444
3445         netif_tx_start_all_queues(netdev);
3446
3447         return 0;
3448
3449 err_up:
3450         ixgbe_release_hw_control(adapter);
3451         ixgbe_free_irq(adapter);
3452 err_req_irq:
3453         ixgbe_free_all_rx_resources(adapter);
3454 err_setup_rx:
3455         ixgbe_free_all_tx_resources(adapter);
3456 err_setup_tx:
3457         ixgbe_reset(adapter);
3458
3459         return err;
3460 }
3461
3462 /**
3463  * ixgbe_close - Disables a network interface
3464  * @netdev: network interface device structure
3465  *
3466  * Returns 0, this is not allowed to fail
3467  *
3468  * The close entry point is called when an interface is de-activated
3469  * by the OS.  The hardware is still under the drivers control, but
3470  * needs to be disabled.  A global MAC reset is issued to stop the
3471  * hardware, and all transmit and receive resources are freed.
3472  **/
3473 static int ixgbe_close(struct net_device *netdev)
3474 {
3475         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3476
3477         ixgbe_down(adapter);
3478         ixgbe_free_irq(adapter);
3479
3480         ixgbe_free_all_tx_resources(adapter);
3481         ixgbe_free_all_rx_resources(adapter);
3482
3483         ixgbe_release_hw_control(adapter);
3484
3485         return 0;
3486 }
3487
3488 /**
3489  * ixgbe_napi_add_all - prep napi structs for use
3490  * @adapter: private struct
3491  *
3492  * helper function to napi_add each possible q_vector->napi
3493  */
3494 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3495 {
3496         int q_idx, q_vectors;
3497         struct net_device *netdev = adapter->netdev;
3498         int (*poll)(struct napi_struct *, int);
3499
3500         /* check if we already have our netdev->napi_list populated */
3501         if (&netdev->napi_list != netdev->napi_list.next)
3502                 return;
3503
3504         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3505                 poll = &ixgbe_clean_rxonly;
3506                 /* Only enable as many vectors as we have rx queues. */
3507                 q_vectors = adapter->num_rx_queues;
3508         } else {
3509                 poll = &ixgbe_poll;
3510                 /* only one q_vector for legacy modes */
3511                 q_vectors = 1;
3512         }
3513
3514         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3515                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3516                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3517         }
3518 }
3519
3520 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3521 {
3522         int q_idx;
3523         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3524
3525         /* legacy and MSI only use one vector */
3526         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3527                 q_vectors = 1;
3528
3529         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3530                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3531                 if (!q_vector->rxr_count)
3532                         continue;
3533                 netif_napi_del(&q_vector->napi);
3534         }
3535 }
3536
3537 #ifdef CONFIG_PM
3538 static int ixgbe_resume(struct pci_dev *pdev)
3539 {
3540         struct net_device *netdev = pci_get_drvdata(pdev);
3541         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3542         u32 err;
3543
3544         pci_set_power_state(pdev, PCI_D0);
3545         pci_restore_state(pdev);
3546         err = pci_enable_device(pdev);
3547         if (err) {
3548                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3549                                 "suspend\n");
3550                 return err;
3551         }
3552         pci_set_master(pdev);
3553
3554         pci_enable_wake(pdev, PCI_D3hot, 0);
3555         pci_enable_wake(pdev, PCI_D3cold, 0);
3556
3557         err = ixgbe_init_interrupt_scheme(adapter);
3558         if (err) {
3559                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3560                                 "device\n");
3561                 return err;
3562         }
3563
3564         ixgbe_reset(adapter);
3565
3566         if (netif_running(netdev)) {
3567                 err = ixgbe_open(adapter->netdev);
3568                 if (err)
3569                         return err;
3570         }
3571
3572         netif_device_attach(netdev);
3573
3574         return 0;
3575 }
3576
3577 #endif /* CONFIG_PM */
3578 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3579 {
3580         struct net_device *netdev = pci_get_drvdata(pdev);
3581         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3582         struct ixgbe_hw *hw = &adapter->hw;
3583         u32 ctrl, fctrl;
3584         u32 wufc = adapter->wol;
3585 #ifdef CONFIG_PM
3586         int retval = 0;
3587 #endif
3588
3589         netif_device_detach(netdev);
3590
3591         if (netif_running(netdev)) {
3592                 ixgbe_down(adapter);
3593                 ixgbe_free_irq(adapter);
3594                 ixgbe_free_all_tx_resources(adapter);
3595                 ixgbe_free_all_rx_resources(adapter);
3596         }
3597         ixgbe_reset_interrupt_capability(adapter);
3598         ixgbe_napi_del_all(adapter);
3599         INIT_LIST_HEAD(&netdev->napi_list);
3600         kfree(adapter->tx_ring);
3601         kfree(adapter->rx_ring);
3602
3603 #ifdef CONFIG_PM
3604         retval = pci_save_state(pdev);
3605         if (retval)
3606                 return retval;
3607 #endif
3608         if (wufc) {
3609                 ixgbe_set_rx_mode(netdev);
3610
3611                 /* turn on all-multi mode if wake on multicast is enabled */
3612                 if (wufc & IXGBE_WUFC_MC) {
3613                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3614                         fctrl |= IXGBE_FCTRL_MPE;
3615                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3616                 }
3617
3618                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
3619                 ctrl |= IXGBE_CTRL_GIO_DIS;
3620                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
3621
3622                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
3623         } else {
3624                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
3625                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3626         }
3627
3628         if (wufc && hw->mac.type == ixgbe_mac_82599EB) {
3629                 pci_enable_wake(pdev, PCI_D3hot, 1);
3630                 pci_enable_wake(pdev, PCI_D3cold, 1);
3631         } else {
3632                 pci_enable_wake(pdev, PCI_D3hot, 0);
3633                 pci_enable_wake(pdev, PCI_D3cold, 0);
3634         }
3635
3636         ixgbe_release_hw_control(adapter);
3637
3638         pci_disable_device(pdev);
3639
3640         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3641
3642         return 0;
3643 }
3644
3645 static void ixgbe_shutdown(struct pci_dev *pdev)
3646 {
3647         ixgbe_suspend(pdev, PMSG_SUSPEND);
3648 }
3649
3650 /**
3651  * ixgbe_update_stats - Update the board statistics counters.
3652  * @adapter: board private structure
3653  **/
3654 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3655 {
3656         struct ixgbe_hw *hw = &adapter->hw;
3657         u64 total_mpc = 0;
3658         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3659
3660         if (hw->mac.type == ixgbe_mac_82599EB) {
3661                 for (i = 0; i < 16; i++)
3662                         adapter->hw_rx_no_dma_resources +=
3663                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
3664         }
3665
3666         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3667         for (i = 0; i < 8; i++) {
3668                 /* for packet buffers not used, the register should read 0 */
3669                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3670                 missed_rx += mpc;
3671                 adapter->stats.mpc[i] += mpc;
3672                 total_mpc += adapter->stats.mpc[i];
3673                 if (hw->mac.type == ixgbe_mac_82598EB)
3674                         adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3675                 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3676                 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3677                 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3678                 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3679                 if (hw->mac.type == ixgbe_mac_82599EB) {
3680                         adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3681                                                             IXGBE_PXONRXCNT(i));
3682                         adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3683                                                            IXGBE_PXOFFRXCNT(i));
3684                         adapter->stats.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
3685                 } else {
3686                         adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3687                                                               IXGBE_PXONRXC(i));
3688                         adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3689                                                              IXGBE_PXOFFRXC(i));
3690                 }
3691                 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3692                                                             IXGBE_PXONTXC(i));
3693                 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3694                                                              IXGBE_PXOFFTXC(i));
3695         }
3696         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3697         /* work around hardware counting issue */
3698         adapter->stats.gprc -= missed_rx;
3699
3700         /* 82598 hardware only has a 32 bit counter in the high register */
3701         if (hw->mac.type == ixgbe_mac_82599EB) {
3702                 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
3703                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
3704                 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
3705                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
3706                 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);
3707                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
3708                 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
3709                 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
3710         } else {
3711                 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3712                 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3713                 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3714                 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3715                 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3716         }
3717         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3718         adapter->stats.bprc += bprc;
3719         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3720         if (hw->mac.type == ixgbe_mac_82598EB)
3721                 adapter->stats.mprc -= bprc;
3722         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3723         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3724         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3725         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3726         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3727         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3728         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3729         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3730         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3731         adapter->stats.lxontxc += lxon;
3732         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3733         adapter->stats.lxofftxc += lxoff;
3734         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3735         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3736         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3737         /*
3738          * 82598 errata - tx of flow control packets is included in tx counters
3739          */
3740         xon_off_tot = lxon + lxoff;
3741         adapter->stats.gptc -= xon_off_tot;
3742         adapter->stats.mptc -= xon_off_tot;
3743         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3744         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3745         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3746         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3747         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3748         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3749         adapter->stats.ptc64 -= xon_off_tot;
3750         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3751         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3752         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3753         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3754         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3755         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3756
3757         /* Fill out the OS statistics structure */
3758         adapter->net_stats.multicast = adapter->stats.mprc;
3759
3760         /* Rx Errors */
3761         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3762                                        adapter->stats.rlec;
3763         adapter->net_stats.rx_dropped = 0;
3764         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3765         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3766         adapter->net_stats.rx_missed_errors = total_mpc;
3767 }
3768
3769 /**
3770  * ixgbe_watchdog - Timer Call-back
3771  * @data: pointer to adapter cast into an unsigned long
3772  **/
3773 static void ixgbe_watchdog(unsigned long data)
3774 {
3775         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3776         struct ixgbe_hw *hw = &adapter->hw;
3777
3778         /* Do the watchdog outside of interrupt context due to the lovely
3779          * delays that some of the newer hardware requires */
3780         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3781                 /* Cause software interrupt to ensure rx rings are cleaned */
3782                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3783                         u32 eics =
3784                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3785                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3786                 } else {
3787                         /* For legacy and MSI interrupts don't set any bits that
3788                          * are enabled for EIAM, because this operation would
3789                          * set *both* EIMS and EICS for any bit in EIAM */
3790                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3791                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3792                 }
3793                 /* Reset the timer */
3794                 mod_timer(&adapter->watchdog_timer,
3795                           round_jiffies(jiffies + 2 * HZ));
3796         }
3797
3798         schedule_work(&adapter->watchdog_task);
3799 }
3800
3801 /**
3802  * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
3803  * @work: pointer to work_struct containing our data
3804  **/
3805 static void ixgbe_multispeed_fiber_task(struct work_struct *work)
3806 {
3807         struct ixgbe_adapter *adapter = container_of(work,
3808                                                      struct ixgbe_adapter,
3809                                                      multispeed_fiber_task);
3810         struct ixgbe_hw *hw = &adapter->hw;
3811         u32 autoneg;
3812
3813         adapter->flags |= IXGBE_FLAG_IN_SFP_LINK_TASK;
3814         if (hw->mac.ops.get_link_capabilities)
3815                 hw->mac.ops.get_link_capabilities(hw, &autoneg,
3816                                                   &hw->mac.autoneg);
3817         if (hw->mac.ops.setup_link_speed)
3818                 hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3819         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
3820         adapter->flags &= ~IXGBE_FLAG_IN_SFP_LINK_TASK;
3821 }
3822
3823 /**
3824  * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
3825  * @work: pointer to work_struct containing our data
3826  **/
3827 static void ixgbe_sfp_config_module_task(struct work_struct *work)
3828 {
3829         struct ixgbe_adapter *adapter = container_of(work,
3830                                                      struct ixgbe_adapter,
3831                                                      sfp_config_module_task);
3832         struct ixgbe_hw *hw = &adapter->hw;
3833         u32 err;
3834
3835         adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
3836         err = hw->phy.ops.identify_sfp(hw);
3837         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3838                 DPRINTK(PROBE, ERR, "PHY not supported on this NIC %d\n", err);
3839                 ixgbe_down(adapter);
3840                 return;
3841         }
3842         hw->mac.ops.setup_sfp(hw);
3843
3844         if (!adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK)
3845                 /* This will also work for DA Twinax connections */
3846                 schedule_work(&adapter->multispeed_fiber_task);
3847         adapter->flags &= ~IXGBE_FLAG_IN_SFP_MOD_TASK;
3848 }
3849
3850 /**
3851  * ixgbe_watchdog_task - worker thread to bring link up
3852  * @work: pointer to work_struct containing our data
3853  **/
3854 static void ixgbe_watchdog_task(struct work_struct *work)
3855 {
3856         struct ixgbe_adapter *adapter = container_of(work,
3857                                                      struct ixgbe_adapter,
3858                                                      watchdog_task);
3859         struct net_device *netdev = adapter->netdev;
3860         struct ixgbe_hw *hw = &adapter->hw;
3861         u32 link_speed = adapter->link_speed;
3862         bool link_up = adapter->link_up;
3863
3864         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3865
3866         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3867                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3868                 if (link_up ||
3869                     time_after(jiffies, (adapter->link_check_timeout +
3870                                          IXGBE_TRY_LINK_TIMEOUT))) {
3871                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3872                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3873                 }
3874                 adapter->link_up = link_up;
3875                 adapter->link_speed = link_speed;
3876         }
3877
3878         if (link_up) {
3879                 if (!netif_carrier_ok(netdev)) {
3880                         bool flow_rx, flow_tx;
3881
3882                         if (hw->mac.type == ixgbe_mac_82599EB) {
3883                                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
3884                                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
3885                                 flow_rx = (mflcn & IXGBE_MFLCN_RFCE);
3886                                 flow_tx = (fccfg & IXGBE_FCCFG_TFCE_802_3X);
3887                         } else {
3888                                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3889                                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3890                                 flow_rx = (frctl & IXGBE_FCTRL_RFCE);
3891                                 flow_tx = (rmcs & IXGBE_RMCS_TFCE_802_3X);
3892                         }
3893
3894                         printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3895                                "Flow Control: %s\n",
3896                                netdev->name,
3897                                (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3898                                 "10 Gbps" :
3899                                 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3900                                  "1 Gbps" : "unknown speed")),
3901                                ((flow_rx && flow_tx) ? "RX/TX" :
3902                                 (flow_rx ? "RX" :
3903                                 (flow_tx ? "TX" : "None"))));
3904
3905                         netif_carrier_on(netdev);
3906                 } else {
3907                         /* Force detection of hung controller */
3908                         adapter->detect_tx_hung = true;
3909                 }
3910         } else {
3911                 adapter->link_up = false;
3912                 adapter->link_speed = 0;
3913                 if (netif_carrier_ok(netdev)) {
3914                         printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3915                                netdev->name);
3916                         netif_carrier_off(netdev);
3917                 }
3918         }
3919
3920         ixgbe_update_stats(adapter);
3921         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3922 }
3923
3924 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3925                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3926                      u32 tx_flags, u8 *hdr_len)
3927 {
3928         struct ixgbe_adv_tx_context_desc *context_desc;
3929         unsigned int i;
3930         int err;
3931         struct ixgbe_tx_buffer *tx_buffer_info;
3932         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3933         u32 mss_l4len_idx, l4len;
3934
3935         if (skb_is_gso(skb)) {
3936                 if (skb_header_cloned(skb)) {
3937                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3938                         if (err)
3939                                 return err;
3940                 }
3941                 l4len = tcp_hdrlen(skb);
3942                 *hdr_len += l4len;
3943
3944                 if (skb->protocol == htons(ETH_P_IP)) {
3945                         struct iphdr *iph = ip_hdr(skb);
3946                         iph->tot_len = 0;
3947                         iph->check = 0;
3948                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3949                                                                  iph->daddr, 0,
3950                                                                  IPPROTO_TCP,
3951                                                                  0);
3952                         adapter->hw_tso_ctxt++;
3953                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3954                         ipv6_hdr(skb)->payload_len = 0;
3955                         tcp_hdr(skb)->check =
3956                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3957                                              &ipv6_hdr(skb)->daddr,
3958                                              0, IPPROTO_TCP, 0);
3959                         adapter->hw_tso6_ctxt++;
3960                 }
3961
3962                 i = tx_ring->next_to_use;
3963
3964                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3965                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3966
3967                 /* VLAN MACLEN IPLEN */
3968                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3969                         vlan_macip_lens |=
3970                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3971                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3972                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3973                 *hdr_len += skb_network_offset(skb);
3974                 vlan_macip_lens |=
3975                     (skb_transport_header(skb) - skb_network_header(skb));
3976                 *hdr_len +=
3977                     (skb_transport_header(skb) - skb_network_header(skb));
3978                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3979                 context_desc->seqnum_seed = 0;
3980
3981                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3982                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3983                                    IXGBE_ADVTXD_DTYP_CTXT);
3984
3985                 if (skb->protocol == htons(ETH_P_IP))
3986                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3987                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3988                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3989
3990                 /* MSS L4LEN IDX */
3991                 mss_l4len_idx =
3992                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3993                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3994                 /* use index 1 for TSO */
3995                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3996                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3997
3998                 tx_buffer_info->time_stamp = jiffies;
3999                 tx_buffer_info->next_to_watch = i;
4000
4001                 i++;
4002                 if (i == tx_ring->count)
4003                         i = 0;
4004                 tx_ring->next_to_use = i;
4005
4006                 return true;
4007         }
4008         return false;
4009 }
4010
4011 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
4012                           struct ixgbe_ring *tx_ring,
4013                           struct sk_buff *skb, u32 tx_flags)
4014 {
4015         struct ixgbe_adv_tx_context_desc *context_desc;
4016         unsigned int i;
4017         struct ixgbe_tx_buffer *tx_buffer_info;
4018         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
4019
4020         if (skb->ip_summed == CHECKSUM_PARTIAL ||
4021             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
4022                 i = tx_ring->next_to_use;
4023                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4024                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
4025
4026                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
4027                         vlan_macip_lens |=
4028                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
4029                 vlan_macip_lens |= (skb_network_offset(skb) <<
4030                                     IXGBE_ADVTXD_MACLEN_SHIFT);
4031                 if (skb->ip_summed == CHECKSUM_PARTIAL)
4032                         vlan_macip_lens |= (skb_transport_header(skb) -
4033                                             skb_network_header(skb));
4034
4035                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4036                 context_desc->seqnum_seed = 0;
4037
4038                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
4039                                     IXGBE_ADVTXD_DTYP_CTXT);
4040
4041                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
4042                         switch (skb->protocol) {
4043                         case cpu_to_be16(ETH_P_IP):
4044                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
4045                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4046                                         type_tucmd_mlhl |=
4047                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4048                                 break;
4049                         case cpu_to_be16(ETH_P_IPV6):
4050                                 /* XXX what about other V6 headers?? */
4051                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4052                                         type_tucmd_mlhl |=
4053                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4054                                 break;
4055                         default:
4056                                 if (unlikely(net_ratelimit())) {
4057                                         DPRINTK(PROBE, WARNING,
4058                                          "partial checksum but proto=%x!\n",
4059                                          skb->protocol);
4060                                 }
4061                                 break;
4062                         }
4063                 }
4064
4065                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
4066                 /* use index zero for tx checksum offload */
4067                 context_desc->mss_l4len_idx = 0;
4068
4069                 tx_buffer_info->time_stamp = jiffies;
4070                 tx_buffer_info->next_to_watch = i;
4071
4072                 adapter->hw_csum_tx_good++;
4073                 i++;
4074                 if (i == tx_ring->count)
4075                         i = 0;
4076                 tx_ring->next_to_use = i;
4077
4078                 return true;
4079         }
4080
4081         return false;
4082 }
4083
4084 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4085                         struct ixgbe_ring *tx_ring,
4086                         struct sk_buff *skb, unsigned int first)
4087 {
4088         struct ixgbe_tx_buffer *tx_buffer_info;
4089         unsigned int len = skb->len;
4090         unsigned int offset = 0, size, count = 0, i;
4091         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
4092         unsigned int f;
4093
4094         len -= skb->data_len;
4095
4096         i = tx_ring->next_to_use;
4097
4098         while (len) {
4099                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4100                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
4101
4102                 tx_buffer_info->length = size;
4103                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
4104                                                      skb->data + offset,
4105                                                      size, PCI_DMA_TODEVICE);
4106                 tx_buffer_info->time_stamp = jiffies;
4107                 tx_buffer_info->next_to_watch = i;
4108
4109                 len -= size;
4110                 offset += size;
4111                 count++;
4112                 i++;
4113                 if (i == tx_ring->count)
4114                         i = 0;
4115         }
4116
4117         for (f = 0; f < nr_frags; f++) {
4118                 struct skb_frag_struct *frag;
4119
4120                 frag = &skb_shinfo(skb)->frags[f];
4121                 len = frag->size;
4122                 offset = frag->page_offset;
4123
4124                 while (len) {
4125                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
4126                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
4127
4128                         tx_buffer_info->length = size;
4129                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
4130                                                            frag->page,
4131                                                            offset,
4132                                                            size,
4133                                                            PCI_DMA_TODEVICE);
4134                         tx_buffer_info->time_stamp = jiffies;
4135                         tx_buffer_info->next_to_watch = i;
4136
4137                         len -= size;
4138                         offset += size;
4139                         count++;
4140                         i++;
4141                         if (i == tx_ring->count)
4142                                 i = 0;
4143                 }
4144         }
4145         if (i == 0)
4146                 i = tx_ring->count - 1;
4147         else
4148                 i = i - 1;
4149         tx_ring->tx_buffer_info[i].skb = skb;
4150         tx_ring->tx_buffer_info[first].next_to_watch = i;
4151
4152         return count;
4153 }
4154
4155 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
4156                            struct ixgbe_ring *tx_ring,
4157                            int tx_flags, int count, u32 paylen, u8 hdr_len)
4158 {
4159         union ixgbe_adv_tx_desc *tx_desc = NULL;
4160         struct ixgbe_tx_buffer *tx_buffer_info;
4161         u32 olinfo_status = 0, cmd_type_len = 0;
4162         unsigned int i;
4163         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
4164
4165         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
4166
4167         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
4168
4169         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
4170                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
4171
4172         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
4173                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
4174
4175                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
4176                                  IXGBE_ADVTXD_POPTS_SHIFT;
4177
4178                 /* use index 1 context for tso */
4179                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
4180                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
4181                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
4182                                          IXGBE_ADVTXD_POPTS_SHIFT;
4183
4184         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
4185                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
4186                                  IXGBE_ADVTXD_POPTS_SHIFT;
4187
4188         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
4189
4190         i = tx_ring->next_to_use;
4191         while (count--) {
4192                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4193                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
4194                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
4195                 tx_desc->read.cmd_type_len =
4196                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
4197                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4198                 i++;
4199                 if (i == tx_ring->count)
4200                         i = 0;
4201         }
4202
4203         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
4204
4205         /*
4206          * Force memory writes to complete before letting h/w
4207          * know there are new descriptors to fetch.  (Only
4208          * applicable for weak-ordered memory model archs,
4209          * such as IA-64).
4210          */
4211         wmb();
4212
4213         tx_ring->next_to_use = i;
4214         writel(i, adapter->hw.hw_addr + tx_ring->tail);
4215 }
4216
4217 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
4218                                  struct ixgbe_ring *tx_ring, int size)
4219 {
4220         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4221
4222         netif_stop_subqueue(netdev, tx_ring->queue_index);
4223         /* Herbert's original patch had:
4224          *  smp_mb__after_netif_stop_queue();
4225          * but since that doesn't exist yet, just open code it. */
4226         smp_mb();
4227
4228         /* We need to check again in a case another CPU has just
4229          * made room available. */
4230         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
4231                 return -EBUSY;
4232
4233         /* A reprieve! - use start_queue because it doesn't call schedule */
4234         netif_start_subqueue(netdev, tx_ring->queue_index);
4235         ++adapter->restart_queue;
4236         return 0;
4237 }
4238
4239 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
4240                               struct ixgbe_ring *tx_ring, int size)
4241 {
4242         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
4243                 return 0;
4244         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
4245 }
4246
4247 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4248 {
4249         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4250         struct ixgbe_ring *tx_ring;
4251         unsigned int first;
4252         unsigned int tx_flags = 0;
4253         u8 hdr_len = 0;
4254         int r_idx = 0, tso;
4255         int count = 0;
4256         unsigned int f;
4257
4258         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
4259         tx_ring = &adapter->tx_ring[r_idx];
4260
4261         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4262                 tx_flags |= vlan_tx_tag_get(skb);
4263                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4264                         tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
4265                         tx_flags |= (skb->queue_mapping << 13);
4266                 }
4267                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4268                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4269         } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4270                 tx_flags |= (skb->queue_mapping << 13);
4271                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4272                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4273         }
4274         /* three things can cause us to need a context descriptor */
4275         if (skb_is_gso(skb) ||
4276             (skb->ip_summed == CHECKSUM_PARTIAL) ||
4277             (tx_flags & IXGBE_TX_FLAGS_VLAN))
4278                 count++;
4279
4280         count += TXD_USE_COUNT(skb_headlen(skb));
4281         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4282                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4283
4284         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
4285                 adapter->tx_busy++;
4286                 return NETDEV_TX_BUSY;
4287         }
4288
4289         if (skb->protocol == htons(ETH_P_IP))
4290                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
4291         first = tx_ring->next_to_use;
4292         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
4293         if (tso < 0) {
4294                 dev_kfree_skb_any(skb);
4295                 return NETDEV_TX_OK;
4296         }
4297
4298         if (tso)
4299                 tx_flags |= IXGBE_TX_FLAGS_TSO;
4300         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
4301                  (skb->ip_summed == CHECKSUM_PARTIAL))
4302                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
4303
4304         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
4305                        ixgbe_tx_map(adapter, tx_ring, skb, first),
4306                        skb->len, hdr_len);
4307
4308         netdev->trans_start = jiffies;
4309
4310         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
4311
4312         return NETDEV_TX_OK;
4313 }
4314
4315 /**
4316  * ixgbe_get_stats - Get System Network Statistics
4317  * @netdev: network interface device structure
4318  *
4319  * Returns the address of the device statistics structure.
4320  * The statistics are actually updated from the timer callback.
4321  **/
4322 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
4323 {
4324         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4325
4326         /* only return the current stats */
4327         return &adapter->net_stats;
4328 }
4329
4330 /**
4331  * ixgbe_set_mac - Change the Ethernet Address of the NIC
4332  * @netdev: network interface device structure
4333  * @p: pointer to an address structure
4334  *
4335  * Returns 0 on success, negative on failure
4336  **/
4337 static int ixgbe_set_mac(struct net_device *netdev, void *p)
4338 {
4339         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4340         struct ixgbe_hw *hw = &adapter->hw;
4341         struct sockaddr *addr = p;
4342
4343         if (!is_valid_ether_addr(addr->sa_data))
4344                 return -EADDRNOTAVAIL;
4345
4346         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4347         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4348
4349         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
4350
4351         return 0;
4352 }
4353
4354 #ifdef CONFIG_NET_POLL_CONTROLLER
4355 /*
4356  * Polling 'interrupt' - used by things like netconsole to send skbs
4357  * without having to re-enable interrupts. It's not called while
4358  * the interrupt routine is executing.
4359  */
4360 static void ixgbe_netpoll(struct net_device *netdev)
4361 {
4362         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4363
4364         disable_irq(adapter->pdev->irq);
4365         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
4366         ixgbe_intr(adapter->pdev->irq, netdev);
4367         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
4368         enable_irq(adapter->pdev->irq);
4369 }
4370 #endif
4371
4372 static const struct net_device_ops ixgbe_netdev_ops = {
4373         .ndo_open               = ixgbe_open,
4374         .ndo_stop               = ixgbe_close,
4375         .ndo_start_xmit         = ixgbe_xmit_frame,
4376         .ndo_get_stats          = ixgbe_get_stats,
4377         .ndo_set_multicast_list = ixgbe_set_rx_mode,
4378         .ndo_validate_addr      = eth_validate_addr,
4379         .ndo_set_mac_address    = ixgbe_set_mac,
4380         .ndo_change_mtu         = ixgbe_change_mtu,
4381         .ndo_tx_timeout         = ixgbe_tx_timeout,
4382         .ndo_vlan_rx_register   = ixgbe_vlan_rx_register,
4383         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
4384         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
4385 #ifdef CONFIG_NET_POLL_CONTROLLER
4386         .ndo_poll_controller    = ixgbe_netpoll,
4387 #endif
4388 };
4389
4390 /**
4391  * ixgbe_probe - Device Initialization Routine
4392  * @pdev: PCI device information struct
4393  * @ent: entry in ixgbe_pci_tbl
4394  *
4395  * Returns 0 on success, negative on failure
4396  *
4397  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
4398  * The OS initialization, configuring of the adapter private structure,
4399  * and a hardware reset occur.
4400  **/
4401 static int __devinit ixgbe_probe(struct pci_dev *pdev,
4402                                  const struct pci_device_id *ent)
4403 {
4404         struct net_device *netdev;
4405         struct ixgbe_adapter *adapter = NULL;
4406         struct ixgbe_hw *hw;
4407         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
4408         static int cards_found;
4409         int i, err, pci_using_dac;
4410         u16 pm_value = 0;
4411         u32 part_num, eec;
4412
4413         err = pci_enable_device(pdev);
4414         if (err)
4415                 return err;
4416
4417         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
4418             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
4419                 pci_using_dac = 1;
4420         } else {
4421                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4422                 if (err) {
4423                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4424                         if (err) {
4425                                 dev_err(&pdev->dev, "No usable DMA "
4426                                         "configuration, aborting\n");
4427                                 goto err_dma;
4428                         }
4429                 }
4430                 pci_using_dac = 0;
4431         }
4432
4433         err = pci_request_regions(pdev, ixgbe_driver_name);
4434         if (err) {
4435                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4436                 goto err_pci_reg;
4437         }
4438
4439         err = pci_enable_pcie_error_reporting(pdev);
4440         if (err) {
4441                 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4442                                     "0x%x\n", err);
4443                 /* non-fatal, continue */
4444         }
4445
4446         pci_set_master(pdev);
4447         pci_save_state(pdev);
4448
4449         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4450         if (!netdev) {
4451                 err = -ENOMEM;
4452                 goto err_alloc_etherdev;
4453         }
4454
4455         SET_NETDEV_DEV(netdev, &pdev->dev);
4456
4457         pci_set_drvdata(pdev, netdev);
4458         adapter = netdev_priv(netdev);
4459
4460         adapter->netdev = netdev;
4461         adapter->pdev = pdev;
4462         hw = &adapter->hw;
4463         hw->back = adapter;
4464         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4465
4466         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4467                               pci_resource_len(pdev, 0));
4468         if (!hw->hw_addr) {
4469                 err = -EIO;
4470                 goto err_ioremap;
4471         }
4472
4473         for (i = 1; i <= 5; i++) {
4474                 if (pci_resource_len(pdev, i) == 0)
4475                         continue;
4476         }
4477
4478         netdev->netdev_ops = &ixgbe_netdev_ops;
4479         ixgbe_set_ethtool_ops(netdev);
4480         netdev->watchdog_timeo = 5 * HZ;
4481         strcpy(netdev->name, pci_name(pdev));
4482
4483         adapter->bd_number = cards_found;
4484
4485         /* Setup hw api */
4486         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4487         hw->mac.type  = ii->mac;
4488
4489         /* EEPROM */
4490         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4491         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4492         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4493         if (!(eec & (1 << 8)))
4494                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4495
4496         /* PHY */
4497         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4498         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4499
4500         /* set up this timer and work struct before calling get_invariants
4501          * which might start the timer
4502          */
4503         init_timer(&adapter->sfp_timer);
4504         adapter->sfp_timer.function = &ixgbe_sfp_timer;
4505         adapter->sfp_timer.data = (unsigned long) adapter;
4506
4507         INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4508
4509         /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
4510         INIT_WORK(&adapter->multispeed_fiber_task, ixgbe_multispeed_fiber_task);
4511
4512         /* a new SFP+ module arrival, called from GPI SDP2 context */
4513         INIT_WORK(&adapter->sfp_config_module_task,
4514                   ixgbe_sfp_config_module_task);
4515
4516         err = ii->get_invariants(hw);
4517         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4518                 /* start a kernel thread to watch for a module to arrive */
4519                 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4520                 mod_timer(&adapter->sfp_timer,
4521                           round_jiffies(jiffies + (2 * HZ)));
4522                 err = 0;
4523         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4524                 DPRINTK(PROBE, ERR, "failed to load because an "
4525                         "unsupported SFP+ module type was detected.\n");
4526                 goto err_hw_init;
4527         } else if (err) {
4528                 goto err_hw_init;
4529         }
4530
4531         /* setup the private structure */
4532         err = ixgbe_sw_init(adapter);
4533         if (err)
4534                 goto err_sw_init;
4535
4536         /* reset_hw fills in the perm_addr as well */
4537         err = hw->mac.ops.reset_hw(hw);
4538         if (err) {
4539                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4540                 goto err_sw_init;
4541         }
4542
4543         netdev->features = NETIF_F_SG |
4544                            NETIF_F_IP_CSUM |
4545                            NETIF_F_HW_VLAN_TX |
4546                            NETIF_F_HW_VLAN_RX |
4547                            NETIF_F_HW_VLAN_FILTER;
4548
4549         netdev->features |= NETIF_F_IPV6_CSUM;
4550         netdev->features |= NETIF_F_TSO;
4551         netdev->features |= NETIF_F_TSO6;
4552         netdev->features |= NETIF_F_GRO;
4553
4554         netdev->vlan_features |= NETIF_F_TSO;
4555         netdev->vlan_features |= NETIF_F_TSO6;
4556         netdev->vlan_features |= NETIF_F_IP_CSUM;
4557         netdev->vlan_features |= NETIF_F_SG;
4558
4559         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4560                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4561
4562 #ifdef CONFIG_IXGBE_DCB
4563         netdev->dcbnl_ops = &dcbnl_ops;
4564 #endif
4565
4566         if (pci_using_dac)
4567                 netdev->features |= NETIF_F_HIGHDMA;
4568
4569         /* make sure the EEPROM is good */
4570         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4571                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4572                 err = -EIO;
4573                 goto err_eeprom;
4574         }
4575
4576         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4577         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4578
4579         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4580                 dev_err(&pdev->dev, "invalid MAC address\n");
4581                 err = -EIO;
4582                 goto err_eeprom;
4583         }
4584
4585         init_timer(&adapter->watchdog_timer);
4586         adapter->watchdog_timer.function = &ixgbe_watchdog;
4587         adapter->watchdog_timer.data = (unsigned long)adapter;
4588
4589         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4590         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4591
4592         err = ixgbe_init_interrupt_scheme(adapter);
4593         if (err)
4594                 goto err_sw_init;
4595
4596         switch (pdev->device) {
4597         case IXGBE_DEV_ID_82599_KX4:
4598 #define IXGBE_PCIE_PMCSR 0x44
4599                 adapter->wol = IXGBE_WUFC_MAG;
4600                 pci_read_config_word(pdev, IXGBE_PCIE_PMCSR, &pm_value);
4601                 pci_write_config_word(pdev, IXGBE_PCIE_PMCSR,
4602                                       (pm_value | (1 << 8)));
4603                 break;
4604         default:
4605                 adapter->wol = 0;
4606                 break;
4607         }
4608         device_init_wakeup(&adapter->pdev->dev, true);
4609         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
4610
4611         /* print bus type/speed/width info */
4612         dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4613                 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
4614                  (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"),
4615                 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" :
4616                  (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" :
4617                  (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" :
4618                  "Unknown"),
4619                 netdev->dev_addr);
4620         ixgbe_read_pba_num_generic(hw, &part_num);
4621         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
4622                 dev_info(&pdev->dev, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
4623                          hw->mac.type, hw->phy.type, hw->phy.sfp_type,
4624                          (part_num >> 8), (part_num & 0xff));
4625         else
4626                 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4627                          hw->mac.type, hw->phy.type,
4628                          (part_num >> 8), (part_num & 0xff));
4629
4630         if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
4631                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4632                          "this card is not sufficient for optimal "
4633                          "performance.\n");
4634                 dev_warn(&pdev->dev, "For optimal performance a x8 "
4635                          "PCI-Express slot is required.\n");
4636         }
4637
4638         /* save off EEPROM version number */
4639         hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
4640
4641         /* reset the hardware with the new settings */
4642         hw->mac.ops.start_hw(hw);
4643
4644         netif_carrier_off(netdev);
4645
4646         strcpy(netdev->name, "eth%d");
4647         err = register_netdev(netdev);
4648         if (err)
4649                 goto err_register;
4650
4651 #ifdef CONFIG_IXGBE_DCA
4652         if (dca_add_requester(&pdev->dev) == 0) {
4653                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4654                 /* always use CB2 mode, difference is masked
4655                  * in the CB driver */
4656                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4657                 ixgbe_setup_dca(adapter);
4658         }
4659 #endif
4660
4661         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4662         cards_found++;
4663         return 0;
4664
4665 err_register:
4666         ixgbe_release_hw_control(adapter);
4667 err_hw_init:
4668 err_sw_init:
4669         ixgbe_reset_interrupt_capability(adapter);
4670 err_eeprom:
4671         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4672         del_timer_sync(&adapter->sfp_timer);
4673         cancel_work_sync(&adapter->sfp_task);
4674         cancel_work_sync(&adapter->multispeed_fiber_task);
4675         cancel_work_sync(&adapter->sfp_config_module_task);
4676         iounmap(hw->hw_addr);
4677 err_ioremap:
4678         free_netdev(netdev);
4679 err_alloc_etherdev:
4680         pci_release_regions(pdev);
4681 err_pci_reg:
4682 err_dma:
4683         pci_disable_device(pdev);
4684         return err;
4685 }
4686
4687 /**
4688  * ixgbe_remove - Device Removal Routine
4689  * @pdev: PCI device information struct
4690  *
4691  * ixgbe_remove is called by the PCI subsystem to alert the driver
4692  * that it should release a PCI device.  The could be caused by a
4693  * Hot-Plug event, or because the driver is going to be removed from
4694  * memory.
4695  **/
4696 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4697 {
4698         struct net_device *netdev = pci_get_drvdata(pdev);
4699         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4700         int err;
4701
4702         set_bit(__IXGBE_DOWN, &adapter->state);
4703         /* clear the module not found bit to make sure the worker won't
4704          * reschedule
4705          */
4706         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4707         del_timer_sync(&adapter->watchdog_timer);
4708
4709         del_timer_sync(&adapter->sfp_timer);
4710         cancel_work_sync(&adapter->watchdog_task);
4711         cancel_work_sync(&adapter->sfp_task);
4712         cancel_work_sync(&adapter->multispeed_fiber_task);
4713         cancel_work_sync(&adapter->sfp_config_module_task);
4714         flush_scheduled_work();
4715
4716 #ifdef CONFIG_IXGBE_DCA
4717         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4718                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4719                 dca_remove_requester(&pdev->dev);
4720                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4721         }
4722
4723 #endif
4724         if (netdev->reg_state == NETREG_REGISTERED)
4725                 unregister_netdev(netdev);
4726
4727         ixgbe_reset_interrupt_capability(adapter);
4728
4729         ixgbe_release_hw_control(adapter);
4730
4731         iounmap(adapter->hw.hw_addr);
4732         pci_release_regions(pdev);
4733
4734         DPRINTK(PROBE, INFO, "complete\n");
4735         kfree(adapter->tx_ring);
4736         kfree(adapter->rx_ring);
4737
4738         free_netdev(netdev);
4739
4740         err = pci_disable_pcie_error_reporting(pdev);
4741         if (err)
4742                 dev_err(&pdev->dev,
4743                         "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4744
4745         pci_disable_device(pdev);
4746 }
4747
4748 /**
4749  * ixgbe_io_error_detected - called when PCI error is detected
4750  * @pdev: Pointer to PCI device
4751  * @state: The current pci connection state
4752  *
4753  * This function is called after a PCI bus error affecting
4754  * this device has been detected.
4755  */
4756 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4757                                                 pci_channel_state_t state)
4758 {
4759         struct net_device *netdev = pci_get_drvdata(pdev);
4760         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4761
4762         netif_device_detach(netdev);
4763
4764         if (netif_running(netdev))
4765                 ixgbe_down(adapter);
4766         pci_disable_device(pdev);
4767
4768         /* Request a slot reset. */
4769         return PCI_ERS_RESULT_NEED_RESET;
4770 }
4771
4772 /**
4773  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4774  * @pdev: Pointer to PCI device
4775  *
4776  * Restart the card from scratch, as if from a cold-boot.
4777  */
4778 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4779 {
4780         struct net_device *netdev = pci_get_drvdata(pdev);
4781         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4782         pci_ers_result_t result;
4783         int err;
4784
4785         if (pci_enable_device(pdev)) {
4786                 DPRINTK(PROBE, ERR,
4787                         "Cannot re-enable PCI device after reset.\n");
4788                 result = PCI_ERS_RESULT_DISCONNECT;
4789         } else {
4790                 pci_set_master(pdev);
4791                 pci_restore_state(pdev);
4792
4793                 pci_enable_wake(pdev, PCI_D3hot, 0);
4794                 pci_enable_wake(pdev, PCI_D3cold, 0);
4795
4796                 ixgbe_reset(adapter);
4797
4798                 result = PCI_ERS_RESULT_RECOVERED;
4799         }
4800
4801         err = pci_cleanup_aer_uncorrect_error_status(pdev);
4802         if (err) {
4803                 dev_err(&pdev->dev,
4804                   "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4805                 /* non-fatal, continue */
4806         }
4807
4808         return result;
4809 }
4810
4811 /**
4812  * ixgbe_io_resume - called when traffic can start flowing again.
4813  * @pdev: Pointer to PCI device
4814  *
4815  * This callback is called when the error recovery driver tells us that
4816  * its OK to resume normal operation.
4817  */
4818 static void ixgbe_io_resume(struct pci_dev *pdev)
4819 {
4820         struct net_device *netdev = pci_get_drvdata(pdev);
4821         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4822
4823         if (netif_running(netdev)) {
4824                 if (ixgbe_up(adapter)) {
4825                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4826                         return;
4827                 }
4828         }
4829
4830         netif_device_attach(netdev);
4831 }
4832
4833 static struct pci_error_handlers ixgbe_err_handler = {
4834         .error_detected = ixgbe_io_error_detected,
4835         .slot_reset = ixgbe_io_slot_reset,
4836         .resume = ixgbe_io_resume,
4837 };
4838
4839 static struct pci_driver ixgbe_driver = {
4840         .name     = ixgbe_driver_name,
4841         .id_table = ixgbe_pci_tbl,
4842         .probe    = ixgbe_probe,
4843         .remove   = __devexit_p(ixgbe_remove),
4844 #ifdef CONFIG_PM
4845         .suspend  = ixgbe_suspend,
4846         .resume   = ixgbe_resume,
4847 #endif
4848         .shutdown = ixgbe_shutdown,
4849         .err_handler = &ixgbe_err_handler
4850 };
4851
4852 /**
4853  * ixgbe_init_module - Driver Registration Routine
4854  *
4855  * ixgbe_init_module is the first routine called when the driver is
4856  * loaded. All it does is register with the PCI subsystem.
4857  **/
4858 static int __init ixgbe_init_module(void)
4859 {
4860         int ret;
4861         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4862                ixgbe_driver_string, ixgbe_driver_version);
4863
4864         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4865
4866 #ifdef CONFIG_IXGBE_DCA
4867         dca_register_notify(&dca_notifier);
4868 #endif
4869
4870         ret = pci_register_driver(&ixgbe_driver);
4871         return ret;
4872 }
4873
4874 module_init(ixgbe_init_module);
4875
4876 /**
4877  * ixgbe_exit_module - Driver Exit Cleanup Routine
4878  *
4879  * ixgbe_exit_module is called just before the driver is removed
4880  * from memory.
4881  **/
4882 static void __exit ixgbe_exit_module(void)
4883 {
4884 #ifdef CONFIG_IXGBE_DCA
4885         dca_unregister_notify(&dca_notifier);
4886 #endif
4887         pci_unregister_driver(&ixgbe_driver);
4888 }
4889
4890 #ifdef CONFIG_IXGBE_DCA
4891 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4892                             void *p)
4893 {
4894         int ret_val;
4895
4896         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4897                                          __ixgbe_notify_dca);
4898
4899         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4900 }
4901 #endif /* CONFIG_IXGBE_DCA */
4902
4903 module_exit(ixgbe_exit_module);
4904
4905 /* ixgbe_main.c */