Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
[linux-2.6] / arch / sparc64 / kernel / irq.c
1 /* irq.c: UltraSparc IRQ handling/init/registry.
2  *
3  * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
6  */
7
8 #include <linux/module.h>
9 #include <linux/sched.h>
10 #include <linux/ptrace.h>
11 #include <linux/errno.h>
12 #include <linux/kernel_stat.h>
13 #include <linux/signal.h>
14 #include <linux/mm.h>
15 #include <linux/interrupt.h>
16 #include <linux/slab.h>
17 #include <linux/random.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/proc_fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/bootmem.h>
23 #include <linux/irq.h>
24
25 #include <asm/ptrace.h>
26 #include <asm/processor.h>
27 #include <asm/atomic.h>
28 #include <asm/system.h>
29 #include <asm/irq.h>
30 #include <asm/io.h>
31 #include <asm/iommu.h>
32 #include <asm/upa.h>
33 #include <asm/oplib.h>
34 #include <asm/prom.h>
35 #include <asm/timer.h>
36 #include <asm/smp.h>
37 #include <asm/starfire.h>
38 #include <asm/uaccess.h>
39 #include <asm/cache.h>
40 #include <asm/cpudata.h>
41 #include <asm/auxio.h>
42 #include <asm/head.h>
43 #include <asm/hypervisor.h>
44 #include <asm/cacheflush.h>
45
46 #include "entry.h"
47
48 #define NUM_IVECS       (IMAP_INR + 1)
49
50 struct ino_bucket *ivector_table;
51 unsigned long ivector_table_pa;
52
53 /* On several sun4u processors, it is illegal to mix bypass and
54  * non-bypass accesses.  Therefore we access all INO buckets
55  * using bypass accesses only.
56  */
57 static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
58 {
59         unsigned long ret;
60
61         __asm__ __volatile__("ldxa      [%1] %2, %0"
62                              : "=&r" (ret)
63                              : "r" (bucket_pa +
64                                     offsetof(struct ino_bucket,
65                                              __irq_chain_pa)),
66                                "i" (ASI_PHYS_USE_EC));
67
68         return ret;
69 }
70
71 static void bucket_clear_chain_pa(unsigned long bucket_pa)
72 {
73         __asm__ __volatile__("stxa      %%g0, [%0] %1"
74                              : /* no outputs */
75                              : "r" (bucket_pa +
76                                     offsetof(struct ino_bucket,
77                                              __irq_chain_pa)),
78                                "i" (ASI_PHYS_USE_EC));
79 }
80
81 static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
82 {
83         unsigned int ret;
84
85         __asm__ __volatile__("lduwa     [%1] %2, %0"
86                              : "=&r" (ret)
87                              : "r" (bucket_pa +
88                                     offsetof(struct ino_bucket,
89                                              __virt_irq)),
90                                "i" (ASI_PHYS_USE_EC));
91
92         return ret;
93 }
94
95 static void bucket_set_virt_irq(unsigned long bucket_pa,
96                                 unsigned int virt_irq)
97 {
98         __asm__ __volatile__("stwa      %0, [%1] %2"
99                              : /* no outputs */
100                              : "r" (virt_irq),
101                                "r" (bucket_pa +
102                                     offsetof(struct ino_bucket,
103                                              __virt_irq)),
104                                "i" (ASI_PHYS_USE_EC));
105 }
106
107 #define irq_work_pa(__cpu)      &(trap_block[(__cpu)].irq_worklist_pa)
108
109 static struct {
110         unsigned int dev_handle;
111         unsigned int dev_ino;
112         unsigned int in_use;
113 } virt_irq_table[NR_IRQS];
114 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
115
116 unsigned char virt_irq_alloc(unsigned int dev_handle,
117                              unsigned int dev_ino)
118 {
119         unsigned long flags;
120         unsigned char ent;
121
122         BUILD_BUG_ON(NR_IRQS >= 256);
123
124         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
125
126         for (ent = 1; ent < NR_IRQS; ent++) {
127                 if (!virt_irq_table[ent].in_use)
128                         break;
129         }
130         if (ent >= NR_IRQS) {
131                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
132                 ent = 0;
133         } else {
134                 virt_irq_table[ent].dev_handle = dev_handle;
135                 virt_irq_table[ent].dev_ino = dev_ino;
136                 virt_irq_table[ent].in_use = 1;
137         }
138
139         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
140
141         return ent;
142 }
143
144 #ifdef CONFIG_PCI_MSI
145 void virt_irq_free(unsigned int virt_irq)
146 {
147         unsigned long flags;
148
149         if (virt_irq >= NR_IRQS)
150                 return;
151
152         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
153
154         virt_irq_table[virt_irq].in_use = 0;
155
156         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
157 }
158 #endif
159
160 /*
161  * /proc/interrupts printing:
162  */
163
164 int show_interrupts(struct seq_file *p, void *v)
165 {
166         int i = *(loff_t *) v, j;
167         struct irqaction * action;
168         unsigned long flags;
169
170         if (i == 0) {
171                 seq_printf(p, "           ");
172                 for_each_online_cpu(j)
173                         seq_printf(p, "CPU%d       ",j);
174                 seq_putc(p, '\n');
175         }
176
177         if (i < NR_IRQS) {
178                 spin_lock_irqsave(&irq_desc[i].lock, flags);
179                 action = irq_desc[i].action;
180                 if (!action)
181                         goto skip;
182                 seq_printf(p, "%3d: ",i);
183 #ifndef CONFIG_SMP
184                 seq_printf(p, "%10u ", kstat_irqs(i));
185 #else
186                 for_each_online_cpu(j)
187                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
188 #endif
189                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
190                 seq_printf(p, "  %s", action->name);
191
192                 for (action=action->next; action; action = action->next)
193                         seq_printf(p, ", %s", action->name);
194
195                 seq_putc(p, '\n');
196 skip:
197                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
198         }
199         return 0;
200 }
201
202 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
203 {
204         unsigned int tid;
205
206         if (this_is_starfire) {
207                 tid = starfire_translate(imap, cpuid);
208                 tid <<= IMAP_TID_SHIFT;
209                 tid &= IMAP_TID_UPA;
210         } else {
211                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
212                         unsigned long ver;
213
214                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
215                         if ((ver >> 32UL) == __JALAPENO_ID ||
216                             (ver >> 32UL) == __SERRANO_ID) {
217                                 tid = cpuid << IMAP_TID_SHIFT;
218                                 tid &= IMAP_TID_JBUS;
219                         } else {
220                                 unsigned int a = cpuid & 0x1f;
221                                 unsigned int n = (cpuid >> 5) & 0x1f;
222
223                                 tid = ((a << IMAP_AID_SHIFT) |
224                                        (n << IMAP_NID_SHIFT));
225                                 tid &= (IMAP_AID_SAFARI |
226                                         IMAP_NID_SAFARI);;
227                         }
228                 } else {
229                         tid = cpuid << IMAP_TID_SHIFT;
230                         tid &= IMAP_TID_UPA;
231                 }
232         }
233
234         return tid;
235 }
236
237 struct irq_handler_data {
238         unsigned long   iclr;
239         unsigned long   imap;
240
241         void            (*pre_handler)(unsigned int, void *, void *);
242         void            *arg1;
243         void            *arg2;
244 };
245
246 #ifdef CONFIG_SMP
247 static int irq_choose_cpu(unsigned int virt_irq)
248 {
249         cpumask_t mask = irq_desc[virt_irq].affinity;
250         int cpuid;
251
252         if (cpus_equal(mask, CPU_MASK_ALL)) {
253                 static int irq_rover;
254                 static DEFINE_SPINLOCK(irq_rover_lock);
255                 unsigned long flags;
256
257                 /* Round-robin distribution... */
258         do_round_robin:
259                 spin_lock_irqsave(&irq_rover_lock, flags);
260
261                 while (!cpu_online(irq_rover)) {
262                         if (++irq_rover >= NR_CPUS)
263                                 irq_rover = 0;
264                 }
265                 cpuid = irq_rover;
266                 do {
267                         if (++irq_rover >= NR_CPUS)
268                                 irq_rover = 0;
269                 } while (!cpu_online(irq_rover));
270
271                 spin_unlock_irqrestore(&irq_rover_lock, flags);
272         } else {
273                 cpumask_t tmp;
274
275                 cpus_and(tmp, cpu_online_map, mask);
276
277                 if (cpus_empty(tmp))
278                         goto do_round_robin;
279
280                 cpuid = first_cpu(tmp);
281         }
282
283         return cpuid;
284 }
285 #else
286 static int irq_choose_cpu(unsigned int virt_irq)
287 {
288         return real_hard_smp_processor_id();
289 }
290 #endif
291
292 static void sun4u_irq_enable(unsigned int virt_irq)
293 {
294         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
295
296         if (likely(data)) {
297                 unsigned long cpuid, imap, val;
298                 unsigned int tid;
299
300                 cpuid = irq_choose_cpu(virt_irq);
301                 imap = data->imap;
302
303                 tid = sun4u_compute_tid(imap, cpuid);
304
305                 val = upa_readq(imap);
306                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
307                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
308                 val |= tid | IMAP_VALID;
309                 upa_writeq(val, imap);
310                 upa_writeq(ICLR_IDLE, data->iclr);
311         }
312 }
313
314 static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
315 {
316         sun4u_irq_enable(virt_irq);
317 }
318
319 static void sun4u_irq_disable(unsigned int virt_irq)
320 {
321         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
322
323         if (likely(data)) {
324                 unsigned long imap = data->imap;
325                 unsigned long tmp = upa_readq(imap);
326
327                 tmp &= ~IMAP_VALID;
328                 upa_writeq(tmp, imap);
329         }
330 }
331
332 static void sun4u_irq_eoi(unsigned int virt_irq)
333 {
334         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
335         struct irq_desc *desc = irq_desc + virt_irq;
336
337         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
338                 return;
339
340         if (likely(data))
341                 upa_writeq(ICLR_IDLE, data->iclr);
342 }
343
344 static void sun4v_irq_enable(unsigned int virt_irq)
345 {
346         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
347         unsigned long cpuid = irq_choose_cpu(virt_irq);
348         int err;
349
350         err = sun4v_intr_settarget(ino, cpuid);
351         if (err != HV_EOK)
352                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
353                        "err(%d)\n", ino, cpuid, err);
354         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
355         if (err != HV_EOK)
356                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
357                        "err(%d)\n", ino, err);
358         err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
359         if (err != HV_EOK)
360                 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
361                        ino, err);
362 }
363
364 static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
365 {
366         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
367         unsigned long cpuid = irq_choose_cpu(virt_irq);
368         int err;
369
370         err = sun4v_intr_settarget(ino, cpuid);
371         if (err != HV_EOK)
372                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
373                        "err(%d)\n", ino, cpuid, err);
374 }
375
376 static void sun4v_irq_disable(unsigned int virt_irq)
377 {
378         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
379         int err;
380
381         err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
382         if (err != HV_EOK)
383                 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
384                        "err(%d)\n", ino, err);
385 }
386
387 static void sun4v_irq_eoi(unsigned int virt_irq)
388 {
389         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
390         struct irq_desc *desc = irq_desc + virt_irq;
391         int err;
392
393         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
394                 return;
395
396         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
397         if (err != HV_EOK)
398                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
399                        "err(%d)\n", ino, err);
400 }
401
402 static void sun4v_virq_enable(unsigned int virt_irq)
403 {
404         unsigned long cpuid, dev_handle, dev_ino;
405         int err;
406
407         cpuid = irq_choose_cpu(virt_irq);
408
409         dev_handle = virt_irq_table[virt_irq].dev_handle;
410         dev_ino = virt_irq_table[virt_irq].dev_ino;
411
412         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
413         if (err != HV_EOK)
414                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
415                        "err(%d)\n",
416                        dev_handle, dev_ino, cpuid, err);
417         err = sun4v_vintr_set_state(dev_handle, dev_ino,
418                                     HV_INTR_STATE_IDLE);
419         if (err != HV_EOK)
420                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
421                        "HV_INTR_STATE_IDLE): err(%d)\n",
422                        dev_handle, dev_ino, err);
423         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
424                                     HV_INTR_ENABLED);
425         if (err != HV_EOK)
426                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
427                        "HV_INTR_ENABLED): err(%d)\n",
428                        dev_handle, dev_ino, err);
429 }
430
431 static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
432 {
433         unsigned long cpuid, dev_handle, dev_ino;
434         int err;
435
436         cpuid = irq_choose_cpu(virt_irq);
437
438         dev_handle = virt_irq_table[virt_irq].dev_handle;
439         dev_ino = virt_irq_table[virt_irq].dev_ino;
440
441         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
442         if (err != HV_EOK)
443                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
444                        "err(%d)\n",
445                        dev_handle, dev_ino, cpuid, err);
446 }
447
448 static void sun4v_virq_disable(unsigned int virt_irq)
449 {
450         unsigned long dev_handle, dev_ino;
451         int err;
452
453         dev_handle = virt_irq_table[virt_irq].dev_handle;
454         dev_ino = virt_irq_table[virt_irq].dev_ino;
455
456         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
457                                     HV_INTR_DISABLED);
458         if (err != HV_EOK)
459                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
460                        "HV_INTR_DISABLED): err(%d)\n",
461                        dev_handle, dev_ino, err);
462 }
463
464 static void sun4v_virq_eoi(unsigned int virt_irq)
465 {
466         struct irq_desc *desc = irq_desc + virt_irq;
467         unsigned long dev_handle, dev_ino;
468         int err;
469
470         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
471                 return;
472
473         dev_handle = virt_irq_table[virt_irq].dev_handle;
474         dev_ino = virt_irq_table[virt_irq].dev_ino;
475
476         err = sun4v_vintr_set_state(dev_handle, dev_ino,
477                                     HV_INTR_STATE_IDLE);
478         if (err != HV_EOK)
479                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
480                        "HV_INTR_STATE_IDLE): err(%d)\n",
481                        dev_handle, dev_ino, err);
482 }
483
484 static struct irq_chip sun4u_irq = {
485         .typename       = "sun4u",
486         .enable         = sun4u_irq_enable,
487         .disable        = sun4u_irq_disable,
488         .eoi            = sun4u_irq_eoi,
489         .set_affinity   = sun4u_set_affinity,
490 };
491
492 static struct irq_chip sun4v_irq = {
493         .typename       = "sun4v",
494         .enable         = sun4v_irq_enable,
495         .disable        = sun4v_irq_disable,
496         .eoi            = sun4v_irq_eoi,
497         .set_affinity   = sun4v_set_affinity,
498 };
499
500 static struct irq_chip sun4v_virq = {
501         .typename       = "vsun4v",
502         .enable         = sun4v_virq_enable,
503         .disable        = sun4v_virq_disable,
504         .eoi            = sun4v_virq_eoi,
505         .set_affinity   = sun4v_virt_set_affinity,
506 };
507
508 static void pre_flow_handler(unsigned int virt_irq,
509                                       struct irq_desc *desc)
510 {
511         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
512         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
513
514         data->pre_handler(ino, data->arg1, data->arg2);
515
516         handle_fasteoi_irq(virt_irq, desc);
517 }
518
519 void irq_install_pre_handler(int virt_irq,
520                              void (*func)(unsigned int, void *, void *),
521                              void *arg1, void *arg2)
522 {
523         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
524         struct irq_desc *desc = irq_desc + virt_irq;
525
526         data->pre_handler = func;
527         data->arg1 = arg1;
528         data->arg2 = arg2;
529
530         desc->handle_irq = pre_flow_handler;
531 }
532
533 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
534 {
535         struct ino_bucket *bucket;
536         struct irq_handler_data *data;
537         unsigned int virt_irq;
538         int ino;
539
540         BUG_ON(tlb_type == hypervisor);
541
542         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
543         bucket = &ivector_table[ino];
544         virt_irq = bucket_get_virt_irq(__pa(bucket));
545         if (!virt_irq) {
546                 virt_irq = virt_irq_alloc(0, ino);
547                 bucket_set_virt_irq(__pa(bucket), virt_irq);
548                 set_irq_chip_and_handler_name(virt_irq,
549                                               &sun4u_irq,
550                                               handle_fasteoi_irq,
551                                               "IVEC");
552         }
553
554         data = get_irq_chip_data(virt_irq);
555         if (unlikely(data))
556                 goto out;
557
558         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
559         if (unlikely(!data)) {
560                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
561                 prom_halt();
562         }
563         set_irq_chip_data(virt_irq, data);
564
565         data->imap  = imap;
566         data->iclr  = iclr;
567
568 out:
569         return virt_irq;
570 }
571
572 static unsigned int sun4v_build_common(unsigned long sysino,
573                                        struct irq_chip *chip)
574 {
575         struct ino_bucket *bucket;
576         struct irq_handler_data *data;
577         unsigned int virt_irq;
578
579         BUG_ON(tlb_type != hypervisor);
580
581         bucket = &ivector_table[sysino];
582         virt_irq = bucket_get_virt_irq(__pa(bucket));
583         if (!virt_irq) {
584                 virt_irq = virt_irq_alloc(0, sysino);
585                 bucket_set_virt_irq(__pa(bucket), virt_irq);
586                 set_irq_chip_and_handler_name(virt_irq, chip,
587                                               handle_fasteoi_irq,
588                                               "IVEC");
589         }
590
591         data = get_irq_chip_data(virt_irq);
592         if (unlikely(data))
593                 goto out;
594
595         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
596         if (unlikely(!data)) {
597                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
598                 prom_halt();
599         }
600         set_irq_chip_data(virt_irq, data);
601
602         /* Catch accidental accesses to these things.  IMAP/ICLR handling
603          * is done by hypervisor calls on sun4v platforms, not by direct
604          * register accesses.
605          */
606         data->imap = ~0UL;
607         data->iclr = ~0UL;
608
609 out:
610         return virt_irq;
611 }
612
613 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
614 {
615         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
616
617         return sun4v_build_common(sysino, &sun4v_irq);
618 }
619
620 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
621 {
622         struct irq_handler_data *data;
623         unsigned long hv_err, cookie;
624         struct ino_bucket *bucket;
625         struct irq_desc *desc;
626         unsigned int virt_irq;
627
628         bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
629         if (unlikely(!bucket))
630                 return 0;
631         __flush_dcache_range((unsigned long) bucket,
632                              ((unsigned long) bucket +
633                               sizeof(struct ino_bucket)));
634
635         virt_irq = virt_irq_alloc(devhandle, devino);
636         bucket_set_virt_irq(__pa(bucket), virt_irq);
637
638         set_irq_chip_and_handler_name(virt_irq, &sun4v_virq,
639                                       handle_fasteoi_irq,
640                                       "IVEC");
641
642         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
643         if (unlikely(!data))
644                 return 0;
645
646         /* In order to make the LDC channel startup sequence easier,
647          * especially wrt. locking, we do not let request_irq() enable
648          * the interrupt.
649          */
650         desc = irq_desc + virt_irq;
651         desc->status |= IRQ_NOAUTOEN;
652
653         set_irq_chip_data(virt_irq, data);
654
655         /* Catch accidental accesses to these things.  IMAP/ICLR handling
656          * is done by hypervisor calls on sun4v platforms, not by direct
657          * register accesses.
658          */
659         data->imap = ~0UL;
660         data->iclr = ~0UL;
661
662         cookie = ~__pa(bucket);
663         hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
664         if (hv_err) {
665                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
666                             "err=%lu\n", devhandle, devino, hv_err);
667                 prom_halt();
668         }
669
670         return virt_irq;
671 }
672
673 void ack_bad_irq(unsigned int virt_irq)
674 {
675         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
676
677         if (!ino)
678                 ino = 0xdeadbeef;
679
680         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
681                ino, virt_irq);
682 }
683
684 void *hardirq_stack[NR_CPUS];
685 void *softirq_stack[NR_CPUS];
686
687 static __attribute__((always_inline)) void *set_hardirq_stack(void)
688 {
689         void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
690
691         __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
692         if (orig_sp < sp ||
693             orig_sp > (sp + THREAD_SIZE)) {
694                 sp += THREAD_SIZE - 192 - STACK_BIAS;
695                 __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
696         }
697
698         return orig_sp;
699 }
700 static __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
701 {
702         __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
703 }
704
705 void handler_irq(int irq, struct pt_regs *regs)
706 {
707         unsigned long pstate, bucket_pa;
708         struct pt_regs *old_regs;
709         void *orig_sp;
710
711         clear_softint(1 << irq);
712
713         old_regs = set_irq_regs(regs);
714         irq_enter();
715
716         /* Grab an atomic snapshot of the pending IVECs.  */
717         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
718                              "wrpr      %0, %3, %%pstate\n\t"
719                              "ldx       [%2], %1\n\t"
720                              "stx       %%g0, [%2]\n\t"
721                              "wrpr      %0, 0x0, %%pstate\n\t"
722                              : "=&r" (pstate), "=&r" (bucket_pa)
723                              : "r" (irq_work_pa(smp_processor_id())),
724                                "i" (PSTATE_IE)
725                              : "memory");
726
727         orig_sp = set_hardirq_stack();
728
729         while (bucket_pa) {
730                 struct irq_desc *desc;
731                 unsigned long next_pa;
732                 unsigned int virt_irq;
733
734                 next_pa = bucket_get_chain_pa(bucket_pa);
735                 virt_irq = bucket_get_virt_irq(bucket_pa);
736                 bucket_clear_chain_pa(bucket_pa);
737
738                 desc = irq_desc + virt_irq;
739
740                 desc->handle_irq(virt_irq, desc);
741
742                 bucket_pa = next_pa;
743         }
744
745         restore_hardirq_stack(orig_sp);
746
747         irq_exit();
748         set_irq_regs(old_regs);
749 }
750
751 void do_softirq(void)
752 {
753         unsigned long flags;
754
755         if (in_interrupt())
756                 return;
757
758         local_irq_save(flags);
759
760         if (local_softirq_pending()) {
761                 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
762
763                 sp += THREAD_SIZE - 192 - STACK_BIAS;
764
765                 __asm__ __volatile__("mov %%sp, %0\n\t"
766                                      "mov %1, %%sp"
767                                      : "=&r" (orig_sp)
768                                      : "r" (sp));
769                 __do_softirq();
770                 __asm__ __volatile__("mov %0, %%sp"
771                                      : : "r" (orig_sp));
772         }
773
774         local_irq_restore(flags);
775 }
776
777 #ifdef CONFIG_HOTPLUG_CPU
778 void fixup_irqs(void)
779 {
780         unsigned int irq;
781
782         for (irq = 0; irq < NR_IRQS; irq++) {
783                 unsigned long flags;
784
785                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
786                 if (irq_desc[irq].action &&
787                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
788                         if (irq_desc[irq].chip->set_affinity)
789                                 irq_desc[irq].chip->set_affinity(irq,
790                                         irq_desc[irq].affinity);
791                 }
792                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
793         }
794 }
795 #endif
796
797 struct sun5_timer {
798         u64     count0;
799         u64     limit0;
800         u64     count1;
801         u64     limit1;
802 };
803
804 static struct sun5_timer *prom_timers;
805 static u64 prom_limit0, prom_limit1;
806
807 static void map_prom_timers(void)
808 {
809         struct device_node *dp;
810         const unsigned int *addr;
811
812         /* PROM timer node hangs out in the top level of device siblings... */
813         dp = of_find_node_by_path("/");
814         dp = dp->child;
815         while (dp) {
816                 if (!strcmp(dp->name, "counter-timer"))
817                         break;
818                 dp = dp->sibling;
819         }
820
821         /* Assume if node is not present, PROM uses different tick mechanism
822          * which we should not care about.
823          */
824         if (!dp) {
825                 prom_timers = (struct sun5_timer *) 0;
826                 return;
827         }
828
829         /* If PROM is really using this, it must be mapped by him. */
830         addr = of_get_property(dp, "address", NULL);
831         if (!addr) {
832                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
833                 prom_timers = (struct sun5_timer *) 0;
834                 return;
835         }
836         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
837 }
838
839 static void kill_prom_timer(void)
840 {
841         if (!prom_timers)
842                 return;
843
844         /* Save them away for later. */
845         prom_limit0 = prom_timers->limit0;
846         prom_limit1 = prom_timers->limit1;
847
848         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
849          * We turn both off here just to be paranoid.
850          */
851         prom_timers->limit0 = 0;
852         prom_timers->limit1 = 0;
853
854         /* Wheee, eat the interrupt packet too... */
855         __asm__ __volatile__(
856 "       mov     0x40, %%g2\n"
857 "       ldxa    [%%g0] %0, %%g1\n"
858 "       ldxa    [%%g2] %1, %%g1\n"
859 "       stxa    %%g0, [%%g0] %0\n"
860 "       membar  #Sync\n"
861         : /* no outputs */
862         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
863         : "g1", "g2");
864 }
865
866 void init_irqwork_curcpu(void)
867 {
868         int cpu = hard_smp_processor_id();
869
870         trap_block[cpu].irq_worklist_pa = 0UL;
871 }
872
873 /* Please be very careful with register_one_mondo() and
874  * sun4v_register_mondo_queues().
875  *
876  * On SMP this gets invoked from the CPU trampoline before
877  * the cpu has fully taken over the trap table from OBP,
878  * and it's kernel stack + %g6 thread register state is
879  * not fully cooked yet.
880  *
881  * Therefore you cannot make any OBP calls, not even prom_printf,
882  * from these two routines.
883  */
884 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
885 {
886         unsigned long num_entries = (qmask + 1) / 64;
887         unsigned long status;
888
889         status = sun4v_cpu_qconf(type, paddr, num_entries);
890         if (status != HV_EOK) {
891                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
892                             "err %lu\n", type, paddr, num_entries, status);
893                 prom_halt();
894         }
895 }
896
897 void __cpuinit sun4v_register_mondo_queues(int this_cpu)
898 {
899         struct trap_per_cpu *tb = &trap_block[this_cpu];
900
901         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
902                            tb->cpu_mondo_qmask);
903         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
904                            tb->dev_mondo_qmask);
905         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
906                            tb->resum_qmask);
907         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
908                            tb->nonresum_qmask);
909 }
910
911 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
912 {
913         unsigned long size = PAGE_ALIGN(qmask + 1);
914         void *p = __alloc_bootmem(size, size, 0);
915         if (!p) {
916                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
917                 prom_halt();
918         }
919
920         *pa_ptr = __pa(p);
921 }
922
923 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
924 {
925         unsigned long size = PAGE_ALIGN(qmask + 1);
926         void *p = __alloc_bootmem(size, size, 0);
927
928         if (!p) {
929                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
930                 prom_halt();
931         }
932
933         *pa_ptr = __pa(p);
934 }
935
936 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
937 {
938 #ifdef CONFIG_SMP
939         void *page;
940
941         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
942
943         page = alloc_bootmem_pages(PAGE_SIZE);
944         if (!page) {
945                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
946                 prom_halt();
947         }
948
949         tb->cpu_mondo_block_pa = __pa(page);
950         tb->cpu_list_pa = __pa(page + 64);
951 #endif
952 }
953
954 /* Allocate mondo and error queues for all possible cpus.  */
955 static void __init sun4v_init_mondo_queues(void)
956 {
957         int cpu;
958
959         for_each_possible_cpu(cpu) {
960                 struct trap_per_cpu *tb = &trap_block[cpu];
961
962                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
963                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
964                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
965                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
966                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
967                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
968                                tb->nonresum_qmask);
969         }
970 }
971
972 static void __init init_send_mondo_info(void)
973 {
974         int cpu;
975
976         for_each_possible_cpu(cpu) {
977                 struct trap_per_cpu *tb = &trap_block[cpu];
978
979                 init_cpu_send_mondo_info(tb);
980         }
981 }
982
983 static struct irqaction timer_irq_action = {
984         .name = "timer",
985 };
986
987 /* Only invoked on boot processor. */
988 void __init init_IRQ(void)
989 {
990         unsigned long size;
991
992         map_prom_timers();
993         kill_prom_timer();
994
995         size = sizeof(struct ino_bucket) * NUM_IVECS;
996         ivector_table = alloc_bootmem(size);
997         if (!ivector_table) {
998                 prom_printf("Fatal error, cannot allocate ivector_table\n");
999                 prom_halt();
1000         }
1001         __flush_dcache_range((unsigned long) ivector_table,
1002                              ((unsigned long) ivector_table) + size);
1003
1004         ivector_table_pa = __pa(ivector_table);
1005
1006         if (tlb_type == hypervisor)
1007                 sun4v_init_mondo_queues();
1008
1009         init_send_mondo_info();
1010
1011         if (tlb_type == hypervisor) {
1012                 /* Load up the boot cpu's entries.  */
1013                 sun4v_register_mondo_queues(hard_smp_processor_id());
1014         }
1015
1016         /* We need to clear any IRQ's pending in the soft interrupt
1017          * registers, a spurious one could be left around from the
1018          * PROM timer which we just disabled.
1019          */
1020         clear_softint(get_softint());
1021
1022         /* Now that ivector table is initialized, it is safe
1023          * to receive IRQ vector traps.  We will normally take
1024          * one or two right now, in case some device PROM used
1025          * to boot us wants to speak to us.  We just ignore them.
1026          */
1027         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1028                              "or        %%g1, %0, %%g1\n\t"
1029                              "wrpr      %%g1, 0x0, %%pstate"
1030                              : /* No outputs */
1031                              : "i" (PSTATE_IE)
1032                              : "g1");
1033
1034         irq_desc[0].action = &timer_irq_action;
1035 }