git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/module.h>
  23 #include <linux/lmb.h>
  24 #include <linux/of_device.h>
  25
  26 #include <asm/prom.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31 #include <asm/smp.h>
  32
  33 extern struct device_node *allnodes;    /* temporary while merging */
  34
  35 extern rwlock_t devtree_lock;   /* temporary while merging */
  36
  37 struct device_node *of_find_node_by_phandle(phandle handle)
  38 {
  39         struct device_node *np;
  40
  41         for (np = allnodes; np != 0; np = np->allnext)
  42                 if (np->node == handle)
  43                         break;
  44
  45         return np;
  46 }
  47 EXPORT_SYMBOL(of_find_node_by_phandle);
  48
  49 int of_getintprop_default(struct device_node *np, const char *name, int def)
  50 {
  51         struct property *prop;
  52         int len;
  53
  54         prop = of_find_property(np, name, &len);
  55         if (!prop || len != 4)
  56                 return def;
  57
  58         return *(int *) prop->value;
  59 }
  60 EXPORT_SYMBOL(of_getintprop_default);
  61
  62 DEFINE_MUTEX(of_set_property_mutex);
  63 EXPORT_SYMBOL(of_set_property_mutex);
  64
  65 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
  66 {
  67         struct property **prevp;
  68         void *new_val;
  69         int err;
  70
  71         new_val = kmalloc(len, GFP_KERNEL);
  72         if (!new_val)
  73                 return -ENOMEM;
  74
  75         memcpy(new_val, val, len);
  76
  77         err = -ENODEV;
  78
  79         write_lock(&devtree_lock);
  80         prevp = &dp->properties;
  81         while (*prevp) {
  82                 struct property *prop = *prevp;
  83
  84                 if (!strcasecmp(prop->name, name)) {
  85                         void *old_val = prop->value;
  86                         int ret;
  87
  88                         mutex_lock(&of_set_property_mutex);
  89                         ret = prom_setprop(dp->node, name, val, len);
  90                         mutex_unlock(&of_set_property_mutex);
  91
  92                         err = -EINVAL;
  93                         if (ret >= 0) {
  94                                 prop->value = new_val;
  95                                 prop->length = len;
  96
  97                                 if (OF_IS_DYNAMIC(prop))
  98                                         kfree(old_val);
  99
 100                                 OF_MARK_DYNAMIC(prop);
 101
 102                                 err = 0;
 103                         }
 104                         break;
 105                 }
 106                 prevp = &(*prevp)->next;
 107         }
 108         write_unlock(&devtree_lock);
 109
 110         /* XXX Upate procfs if necessary... */
 111
 112         return err;
 113 }
 114 EXPORT_SYMBOL(of_set_property);
 115
 116 int of_find_in_proplist(const char *list, const char *match, int len)
 117 {
 118         while (len > 0) {
 119                 int l;
 120
 121                 if (!strcmp(list, match))
 122                         return 1;
 123                 l = strlen(list) + 1;
 124                 list += l;
 125                 len -= l;
 126         }
 127         return 0;
 128 }
 129 EXPORT_SYMBOL(of_find_in_proplist);
 130
 131 static unsigned int prom_early_allocated __initdata;
 132
 133 static void * __init prom_early_alloc(unsigned long size)
 134 {
 135         unsigned long paddr = lmb_alloc(size, SMP_CACHE_BYTES);
 136         void *ret;
 137
 138         if (!paddr) {
 139                 prom_printf("prom_early_alloc(%lu) failed\n");
 140                 prom_halt();
 141         }
 142
 143         ret = __va(paddr);
 144         memset(ret, 0, size);
 145         prom_early_allocated += size;
 146
 147         return ret;
 148 }
 149
 150 #ifdef CONFIG_PCI
 151 /* PSYCHO interrupt mapping support. */
 152 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 153 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 154 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 155 {
 156         unsigned int bus =  (ino & 0x10) >> 4;
 157         unsigned int slot = (ino & 0x0c) >> 2;
 158
 159         if (bus == 0)
 160                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 161         else
 162                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 163 }
 164
 165 #define PSYCHO_IMAP_SCSI        0x1000UL
 166 #define PSYCHO_IMAP_ETH         0x1008UL
 167 #define PSYCHO_IMAP_BPP         0x1010UL
 168 #define PSYCHO_IMAP_AU_REC      0x1018UL
 169 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 170 #define PSYCHO_IMAP_PFAIL       0x1028UL
 171 #define PSYCHO_IMAP_KMS         0x1030UL
 172 #define PSYCHO_IMAP_FLPY        0x1038UL
 173 #define PSYCHO_IMAP_SHW         0x1040UL
 174 #define PSYCHO_IMAP_KBD         0x1048UL
 175 #define PSYCHO_IMAP_MS          0x1050UL
 176 #define PSYCHO_IMAP_SER         0x1058UL
 177 #define PSYCHO_IMAP_TIM0        0x1060UL
 178 #define PSYCHO_IMAP_TIM1        0x1068UL
 179 #define PSYCHO_IMAP_UE          0x1070UL
 180 #define PSYCHO_IMAP_CE          0x1078UL
 181 #define PSYCHO_IMAP_A_ERR       0x1080UL
 182 #define PSYCHO_IMAP_B_ERR       0x1088UL
 183 #define PSYCHO_IMAP_PMGMT       0x1090UL
 184 #define PSYCHO_IMAP_GFX         0x1098UL
 185 #define PSYCHO_IMAP_EUPA        0x10a0UL
 186
 187 static unsigned long __psycho_onboard_imap_off[] = {
 188 /*0x20*/        PSYCHO_IMAP_SCSI,
 189 /*0x21*/        PSYCHO_IMAP_ETH,
 190 /*0x22*/        PSYCHO_IMAP_BPP,
 191 /*0x23*/        PSYCHO_IMAP_AU_REC,
 192 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 193 /*0x25*/        PSYCHO_IMAP_PFAIL,
 194 /*0x26*/        PSYCHO_IMAP_KMS,
 195 /*0x27*/        PSYCHO_IMAP_FLPY,
 196 /*0x28*/        PSYCHO_IMAP_SHW,
 197 /*0x29*/        PSYCHO_IMAP_KBD,
 198 /*0x2a*/        PSYCHO_IMAP_MS,
 199 /*0x2b*/        PSYCHO_IMAP_SER,
 200 /*0x2c*/        PSYCHO_IMAP_TIM0,
 201 /*0x2d*/        PSYCHO_IMAP_TIM1,
 202 /*0x2e*/        PSYCHO_IMAP_UE,
 203 /*0x2f*/        PSYCHO_IMAP_CE,
 204 /*0x30*/        PSYCHO_IMAP_A_ERR,
 205 /*0x31*/        PSYCHO_IMAP_B_ERR,
 206 /*0x32*/        PSYCHO_IMAP_PMGMT,
 207 /*0x33*/        PSYCHO_IMAP_GFX,
 208 /*0x34*/        PSYCHO_IMAP_EUPA,
 209 };
 210 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 211 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 212 #define psycho_onboard_imap_offset(__ino) \
 213         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 214
 215 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 216 #define PSYCHO_ICLR_SCSI        0x1800UL
 217
 218 #define psycho_iclr_offset(ino)                                       \
 219         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 220                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 221
 222 static unsigned int psycho_irq_build(struct device_node *dp,
 223                                      unsigned int ino,
 224                                      void *_data)
 225 {
 226         unsigned long controller_regs = (unsigned long) _data;
 227         unsigned long imap, iclr;
 228         unsigned long imap_off, iclr_off;
 229         int inofixup = 0;
 230
 231         ino &= 0x3f;
 232         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 233                 /* PCI slot */
 234                 imap_off = psycho_pcislot_imap_offset(ino);
 235         } else {
 236                 /* Onboard device */
 237                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 238                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 239                         prom_halt();
 240                 }
 241                 imap_off = psycho_onboard_imap_offset(ino);
 242         }
 243
 244         /* Now build the IRQ bucket. */
 245         imap = controller_regs + imap_off;
 246
 247         iclr_off = psycho_iclr_offset(ino);
 248         iclr = controller_regs + iclr_off;
 249
 250         if ((ino & 0x20) == 0)
 251                 inofixup = ino & 0x03;
 252
 253         return build_irq(inofixup, iclr, imap);
 254 }
 255
 256 static void __init psycho_irq_trans_init(struct device_node *dp)
 257 {
 258         const struct linux_prom64_registers *regs;
 259
 260         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 261         dp->irq_trans->irq_build = psycho_irq_build;
 262
 263         regs = of_get_property(dp, "reg", NULL);
 264         dp->irq_trans->data = (void *) regs[2].phys_addr;
 265 }
 266
 267 #define sabre_read(__reg) \
 268 ({      u64 __ret; \
 269         __asm__ __volatile__("ldxa [%1] %2, %0" \
 270                              : "=r" (__ret) \
 271                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 272                              : "memory"); \
 273         __ret; \
 274 })
 275
 276 struct sabre_irq_data {
 277         unsigned long controller_regs;
 278         unsigned int pci_first_busno;
 279 };
 280 #define SABRE_CONFIGSPACE       0x001000000UL
 281 #define SABRE_WRSYNC            0x1c20UL
 282
 283 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 284         (CONFIG_SPACE | (1UL << 24))
 285 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 286         (((unsigned long)(BUS)   << 16) |       \
 287          ((unsigned long)(DEVFN) << 8)  |       \
 288          ((unsigned long)(REG)))
 289
 290 /* When a device lives behind a bridge deeper in the PCI bus topology
 291  * than APB, a special sequence must run to make sure all pending DMA
 292  * transfers at the time of IRQ delivery are visible in the coherency
 293  * domain by the cpu.  This sequence is to perform a read on the far
 294  * side of the non-APB bridge, then perform a read of Sabre's DMA
 295  * write-sync register.
 296  */
 297 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 298 {
 299         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 300         struct sabre_irq_data *irq_data = _arg2;
 301         unsigned long controller_regs = irq_data->controller_regs;
 302         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 303         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 304         unsigned int bus, devfn;
 305         u16 _unused;
 306
 307         config_space = SABRE_CONFIG_BASE(config_space);
 308
 309         bus = (phys_hi >> 16) & 0xff;
 310         devfn = (phys_hi >> 8) & 0xff;
 311
 312         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 313
 314         __asm__ __volatile__("membar #Sync\n\t"
 315                              "lduha [%1] %2, %0\n\t"
 316                              "membar #Sync"
 317                              : "=r" (_unused)
 318                              : "r" ((u16 *) config_space),
 319                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 320                              : "memory");
 321
 322         sabre_read(sync_reg);
 323 }
 324
 325 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 326 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 327 #define SABRE_IMAP_SCSI         0x1000UL
 328 #define SABRE_IMAP_ETH          0x1008UL
 329 #define SABRE_IMAP_BPP          0x1010UL
 330 #define SABRE_IMAP_AU_REC       0x1018UL
 331 #define SABRE_IMAP_AU_PLAY      0x1020UL
 332 #define SABRE_IMAP_PFAIL        0x1028UL
 333 #define SABRE_IMAP_KMS          0x1030UL
 334 #define SABRE_IMAP_FLPY         0x1038UL
 335 #define SABRE_IMAP_SHW          0x1040UL
 336 #define SABRE_IMAP_KBD          0x1048UL
 337 #define SABRE_IMAP_MS           0x1050UL
 338 #define SABRE_IMAP_SER          0x1058UL
 339 #define SABRE_IMAP_UE           0x1070UL
 340 #define SABRE_IMAP_CE           0x1078UL
 341 #define SABRE_IMAP_PCIERR       0x1080UL
 342 #define SABRE_IMAP_GFX          0x1098UL
 343 #define SABRE_IMAP_EUPA         0x10a0UL
 344 #define SABRE_ICLR_A_SLOT0      0x1400UL
 345 #define SABRE_ICLR_B_SLOT0      0x1480UL
 346 #define SABRE_ICLR_SCSI         0x1800UL
 347 #define SABRE_ICLR_ETH          0x1808UL
 348 #define SABRE_ICLR_BPP          0x1810UL
 349 #define SABRE_ICLR_AU_REC       0x1818UL
 350 #define SABRE_ICLR_AU_PLAY      0x1820UL
 351 #define SABRE_ICLR_PFAIL        0x1828UL
 352 #define SABRE_ICLR_KMS          0x1830UL
 353 #define SABRE_ICLR_FLPY         0x1838UL
 354 #define SABRE_ICLR_SHW          0x1840UL
 355 #define SABRE_ICLR_KBD          0x1848UL
 356 #define SABRE_ICLR_MS           0x1850UL
 357 #define SABRE_ICLR_SER          0x1858UL
 358 #define SABRE_ICLR_UE           0x1870UL
 359 #define SABRE_ICLR_CE           0x1878UL
 360 #define SABRE_ICLR_PCIERR       0x1880UL
 361
 362 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 363 {
 364         unsigned int bus =  (ino & 0x10) >> 4;
 365         unsigned int slot = (ino & 0x0c) >> 2;
 366
 367         if (bus == 0)
 368                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 369         else
 370                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 371 }
 372
 373 static unsigned long __sabre_onboard_imap_off[] = {
 374 /*0x20*/        SABRE_IMAP_SCSI,
 375 /*0x21*/        SABRE_IMAP_ETH,
 376 /*0x22*/        SABRE_IMAP_BPP,
 377 /*0x23*/        SABRE_IMAP_AU_REC,
 378 /*0x24*/        SABRE_IMAP_AU_PLAY,
 379 /*0x25*/        SABRE_IMAP_PFAIL,
 380 /*0x26*/        SABRE_IMAP_KMS,
 381 /*0x27*/        SABRE_IMAP_FLPY,
 382 /*0x28*/        SABRE_IMAP_SHW,
 383 /*0x29*/        SABRE_IMAP_KBD,
 384 /*0x2a*/        SABRE_IMAP_MS,
 385 /*0x2b*/        SABRE_IMAP_SER,
 386 /*0x2c*/        0 /* reserved */,
 387 /*0x2d*/        0 /* reserved */,
 388 /*0x2e*/        SABRE_IMAP_UE,
 389 /*0x2f*/        SABRE_IMAP_CE,
 390 /*0x30*/        SABRE_IMAP_PCIERR,
 391 /*0x31*/        0 /* reserved */,
 392 /*0x32*/        0 /* reserved */,
 393 /*0x33*/        SABRE_IMAP_GFX,
 394 /*0x34*/        SABRE_IMAP_EUPA,
 395 };
 396 #define SABRE_ONBOARD_IRQ_BASE          0x20
 397 #define SABRE_ONBOARD_IRQ_LAST          0x30
 398 #define sabre_onboard_imap_offset(__ino) \
 399         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 400
 401 #define sabre_iclr_offset(ino)                                        \
 402         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 403                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 404
 405 static int sabre_device_needs_wsync(struct device_node *dp)
 406 {
 407         struct device_node *parent = dp->parent;
 408         const char *parent_model, *parent_compat;
 409
 410         /* This traversal up towards the root is meant to
 411          * handle two cases:
 412          *
 413          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 414          * 2) the PCI controller interrupts themselves, which
 415          *    will use the sabre_irq_build but do not need
 416          *    the DMA synchronization handling
 417          */
 418         while (parent) {
 419                 if (!strcmp(parent->type, "pci"))
 420                         break;
 421                 parent = parent->parent;
 422         }
 423
 424         if (!parent)
 425                 return 0;
 426
 427         parent_model = of_get_property(parent,
 428                                        "model", NULL);
 429         if (parent_model &&
 430             (!strcmp(parent_model, "SUNW,sabre") ||
 431              !strcmp(parent_model, "SUNW,simba")))
 432                 return 0;
 433
 434         parent_compat = of_get_property(parent,
 435                                         "compatible", NULL);
 436         if (parent_compat &&
 437             (!strcmp(parent_compat, "pci108e,a000") ||
 438              !strcmp(parent_compat, "pci108e,a001")))
 439                 return 0;
 440
 441         return 1;
 442 }
 443
 444 static unsigned int sabre_irq_build(struct device_node *dp,
 445                                     unsigned int ino,
 446                                     void *_data)
 447 {
 448         struct sabre_irq_data *irq_data = _data;
 449         unsigned long controller_regs = irq_data->controller_regs;
 450         const struct linux_prom_pci_registers *regs;
 451         unsigned long imap, iclr;
 452         unsigned long imap_off, iclr_off;
 453         int inofixup = 0;
 454         int virt_irq;
 455
 456         ino &= 0x3f;
 457         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 458                 /* PCI slot */
 459                 imap_off = sabre_pcislot_imap_offset(ino);
 460         } else {
 461                 /* onboard device */
 462                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 463                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 464                         prom_halt();
 465                 }
 466                 imap_off = sabre_onboard_imap_offset(ino);
 467         }
 468
 469         /* Now build the IRQ bucket. */
 470         imap = controller_regs + imap_off;
 471
 472         iclr_off = sabre_iclr_offset(ino);
 473         iclr = controller_regs + iclr_off;
 474
 475         if ((ino & 0x20) == 0)
 476                 inofixup = ino & 0x03;
 477
 478         virt_irq = build_irq(inofixup, iclr, imap);
 479
 480         /* If the parent device is a PCI<->PCI bridge other than
 481          * APB, we have to install a pre-handler to ensure that
 482          * all pending DMA is drained before the interrupt handler
 483          * is run.
 484          */
 485         regs = of_get_property(dp, "reg", NULL);
 486         if (regs && sabre_device_needs_wsync(dp)) {
 487                 irq_install_pre_handler(virt_irq,
 488                                         sabre_wsync_handler,
 489                                         (void *) (long) regs->phys_hi,
 490                                         (void *) irq_data);
 491         }
 492
 493         return virt_irq;
 494 }
 495
 496 static void __init sabre_irq_trans_init(struct device_node *dp)
 497 {
 498         const struct linux_prom64_registers *regs;
 499         struct sabre_irq_data *irq_data;
 500         const u32 *busrange;
 501
 502         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 503         dp->irq_trans->irq_build = sabre_irq_build;
 504
 505         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 506
 507         regs = of_get_property(dp, "reg", NULL);
 508         irq_data->controller_regs = regs[0].phys_addr;
 509
 510         busrange = of_get_property(dp, "bus-range", NULL);
 511         irq_data->pci_first_busno = busrange[0];
 512
 513         dp->irq_trans->data = irq_data;
 514 }
 515
 516 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 517  * imap/iclr registers are per-PBM.
 518  */
 519 #define SCHIZO_IMAP_BASE        0x1000UL
 520 #define SCHIZO_ICLR_BASE        0x1400UL
 521
 522 static unsigned long schizo_imap_offset(unsigned long ino)
 523 {
 524         return SCHIZO_IMAP_BASE + (ino * 8UL);
 525 }
 526
 527 static unsigned long schizo_iclr_offset(unsigned long ino)
 528 {
 529         return SCHIZO_ICLR_BASE + (ino * 8UL);
 530 }
 531
 532 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 533                                         unsigned int ino)
 534 {
 535
 536         return pbm_regs + schizo_iclr_offset(ino);
 537 }
 538
 539 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 540                                         unsigned int ino)
 541 {
 542         return pbm_regs + schizo_imap_offset(ino);
 543 }
 544
 545 #define schizo_read(__reg) \
 546 ({      u64 __ret; \
 547         __asm__ __volatile__("ldxa [%1] %2, %0" \
 548                              : "=r" (__ret) \
 549                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 550                              : "memory"); \
 551         __ret; \
 552 })
 553 #define schizo_write(__reg, __val) \
 554         __asm__ __volatile__("stxa %0, [%1] %2" \
 555                              : /* no outputs */ \
 556                              : "r" (__val), "r" (__reg), \
 557                                "i" (ASI_PHYS_BYPASS_EC_E) \
 558                              : "memory")
 559
 560 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 561 {
 562         unsigned long sync_reg = (unsigned long) _arg2;
 563         u64 mask = 1UL << (ino & IMAP_INO);
 564         u64 val;
 565         int limit;
 566
 567         schizo_write(sync_reg, mask);
 568
 569         limit = 100000;
 570         val = 0;
 571         while (--limit) {
 572                 val = schizo_read(sync_reg);
 573                 if (!(val & mask))
 574                         break;
 575         }
 576         if (limit <= 0) {
 577                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 578                        val, mask);
 579         }
 580
 581         if (_arg1) {
 582                 static unsigned char cacheline[64]
 583                         __attribute__ ((aligned (64)));
 584
 585                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 586                                      "or %0, %4, %1\n\t"
 587                                      "wr %1, 0x0, %%fprs\n\t"
 588                                      "stda %%f0, [%5] %6\n\t"
 589                                      "wr %0, 0x0, %%fprs\n\t"
 590                                      "membar #Sync"
 591                                      : "=&r" (mask), "=&r" (val)
 592                                      : "0" (mask), "1" (val),
 593                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 594                                      "i" (ASI_BLK_COMMIT_P));
 595         }
 596 }
 597
 598 struct schizo_irq_data {
 599         unsigned long pbm_regs;
 600         unsigned long sync_reg;
 601         u32 portid;
 602         int chip_version;
 603 };
 604
 605 static unsigned int schizo_irq_build(struct device_node *dp,
 606                                      unsigned int ino,
 607                                      void *_data)
 608 {
 609         struct schizo_irq_data *irq_data = _data;
 610         unsigned long pbm_regs = irq_data->pbm_regs;
 611         unsigned long imap, iclr;
 612         int ign_fixup;
 613         int virt_irq;
 614         int is_tomatillo;
 615
 616         ino &= 0x3f;
 617
 618         /* Now build the IRQ bucket. */
 619         imap = schizo_ino_to_imap(pbm_regs, ino);
 620         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 621
 622         /* On Schizo, no inofixup occurs.  This is because each
 623          * INO has it's own IMAP register.  On Psycho and Sabre
 624          * there is only one IMAP register for each PCI slot even
 625          * though four different INOs can be generated by each
 626          * PCI slot.
 627          *
 628          * But, for JBUS variants (essentially, Tomatillo), we have
 629          * to fixup the lowest bit of the interrupt group number.
 630          */
 631         ign_fixup = 0;
 632
 633         is_tomatillo = (irq_data->sync_reg != 0UL);
 634
 635         if (is_tomatillo) {
 636                 if (irq_data->portid & 1)
 637                         ign_fixup = (1 << 6);
 638         }
 639
 640         virt_irq = build_irq(ign_fixup, iclr, imap);
 641
 642         if (is_tomatillo) {
 643                 irq_install_pre_handler(virt_irq,
 644                                         tomatillo_wsync_handler,
 645                                         ((irq_data->chip_version <= 4) ?
 646                                          (void *) 1 : (void *) 0),
 647                                         (void *) irq_data->sync_reg);
 648         }
 649
 650         return virt_irq;
 651 }
 652
 653 static void __init __schizo_irq_trans_init(struct device_node *dp,
 654                                            int is_tomatillo)
 655 {
 656         const struct linux_prom64_registers *regs;
 657         struct schizo_irq_data *irq_data;
 658
 659         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 660         dp->irq_trans->irq_build = schizo_irq_build;
 661
 662         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 663
 664         regs = of_get_property(dp, "reg", NULL);
 665         dp->irq_trans->data = irq_data;
 666
 667         irq_data->pbm_regs = regs[0].phys_addr;
 668         if (is_tomatillo)
 669                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 670         else
 671                 irq_data->sync_reg = 0UL;
 672         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 673         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 674 }
 675
 676 static void __init schizo_irq_trans_init(struct device_node *dp)
 677 {
 678         __schizo_irq_trans_init(dp, 0);
 679 }
 680
 681 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 682 {
 683         __schizo_irq_trans_init(dp, 1);
 684 }
 685
 686 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 687                                         unsigned int devino,
 688                                         void *_data)
 689 {
 690         u32 devhandle = (u32) (unsigned long) _data;
 691
 692         return sun4v_build_irq(devhandle, devino);
 693 }
 694
 695 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 696 {
 697         const struct linux_prom64_registers *regs;
 698
 699         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 700         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 701
 702         regs = of_get_property(dp, "reg", NULL);
 703         dp->irq_trans->data = (void *) (unsigned long)
 704                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 705 }
 706
 707 struct fire_irq_data {
 708         unsigned long pbm_regs;
 709         u32 portid;
 710 };
 711
 712 #define FIRE_IMAP_BASE  0x001000
 713 #define FIRE_ICLR_BASE  0x001400
 714
 715 static unsigned long fire_imap_offset(unsigned long ino)
 716 {
 717         return FIRE_IMAP_BASE + (ino * 8UL);
 718 }
 719
 720 static unsigned long fire_iclr_offset(unsigned long ino)
 721 {
 722         return FIRE_ICLR_BASE + (ino * 8UL);
 723 }
 724
 725 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 726                                             unsigned int ino)
 727 {
 728         return pbm_regs + fire_iclr_offset(ino);
 729 }
 730
 731 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 732                                             unsigned int ino)
 733 {
 734         return pbm_regs + fire_imap_offset(ino);
 735 }
 736
 737 static unsigned int fire_irq_build(struct device_node *dp,
 738                                          unsigned int ino,
 739                                          void *_data)
 740 {
 741         struct fire_irq_data *irq_data = _data;
 742         unsigned long pbm_regs = irq_data->pbm_regs;
 743         unsigned long imap, iclr;
 744         unsigned long int_ctrlr;
 745
 746         ino &= 0x3f;
 747
 748         /* Now build the IRQ bucket. */
 749         imap = fire_ino_to_imap(pbm_regs, ino);
 750         iclr = fire_ino_to_iclr(pbm_regs, ino);
 751
 752         /* Set the interrupt controller number.  */
 753         int_ctrlr = 1 << 6;
 754         upa_writeq(int_ctrlr, imap);
 755
 756         /* The interrupt map registers do not have an INO field
 757          * like other chips do.  They return zero in the INO
 758          * field, and the interrupt controller number is controlled
 759          * in bits 6 to 9.  So in order for build_irq() to get
 760          * the INO right we pass it in as part of the fixup
 761          * which will get added to the map register zero value
 762          * read by build_irq().
 763          */
 764         ino |= (irq_data->portid << 6);
 765         ino -= int_ctrlr;
 766         return build_irq(ino, iclr, imap);
 767 }
 768
 769 static void __init fire_irq_trans_init(struct device_node *dp)
 770 {
 771         const struct linux_prom64_registers *regs;
 772         struct fire_irq_data *irq_data;
 773
 774         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 775         dp->irq_trans->irq_build = fire_irq_build;
 776
 777         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 778
 779         regs = of_get_property(dp, "reg", NULL);
 780         dp->irq_trans->data = irq_data;
 781
 782         irq_data->pbm_regs = regs[0].phys_addr;
 783         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 784 }
 785 #endif /* CONFIG_PCI */
 786
 787 #ifdef CONFIG_SBUS
 788 /* INO number to IMAP register offset for SYSIO external IRQ's.
 789  * This should conform to both Sunfire/Wildfire server and Fusion
 790  * desktop designs.
 791  */
 792 #define SYSIO_IMAP_SLOT0        0x2c00UL
 793 #define SYSIO_IMAP_SLOT1        0x2c08UL
 794 #define SYSIO_IMAP_SLOT2        0x2c10UL
 795 #define SYSIO_IMAP_SLOT3        0x2c18UL
 796 #define SYSIO_IMAP_SCSI         0x3000UL
 797 #define SYSIO_IMAP_ETH          0x3008UL
 798 #define SYSIO_IMAP_BPP          0x3010UL
 799 #define SYSIO_IMAP_AUDIO        0x3018UL
 800 #define SYSIO_IMAP_PFAIL        0x3020UL
 801 #define SYSIO_IMAP_KMS          0x3028UL
 802 #define SYSIO_IMAP_FLPY         0x3030UL
 803 #define SYSIO_IMAP_SHW          0x3038UL
 804 #define SYSIO_IMAP_KBD          0x3040UL
 805 #define SYSIO_IMAP_MS           0x3048UL
 806 #define SYSIO_IMAP_SER          0x3050UL
 807 #define SYSIO_IMAP_TIM0         0x3060UL
 808 #define SYSIO_IMAP_TIM1         0x3068UL
 809 #define SYSIO_IMAP_UE           0x3070UL
 810 #define SYSIO_IMAP_CE           0x3078UL
 811 #define SYSIO_IMAP_SBERR        0x3080UL
 812 #define SYSIO_IMAP_PMGMT        0x3088UL
 813 #define SYSIO_IMAP_GFX          0x3090UL
 814 #define SYSIO_IMAP_EUPA         0x3098UL
 815
 816 #define bogon     ((unsigned long) -1)
 817 static unsigned long sysio_irq_offsets[] = {
 818         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 819         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 820         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 821         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 822         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 823         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 824         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 825         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 826         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 827
 828         /* Onboard devices (not relevant/used on SunFire). */
 829         SYSIO_IMAP_SCSI,
 830         SYSIO_IMAP_ETH,
 831         SYSIO_IMAP_BPP,
 832         bogon,
 833         SYSIO_IMAP_AUDIO,
 834         SYSIO_IMAP_PFAIL,
 835         bogon,
 836         bogon,
 837         SYSIO_IMAP_KMS,
 838         SYSIO_IMAP_FLPY,
 839         SYSIO_IMAP_SHW,
 840         SYSIO_IMAP_KBD,
 841         SYSIO_IMAP_MS,
 842         SYSIO_IMAP_SER,
 843         bogon,
 844         bogon,
 845         SYSIO_IMAP_TIM0,
 846         SYSIO_IMAP_TIM1,
 847         bogon,
 848         bogon,
 849         SYSIO_IMAP_UE,
 850         SYSIO_IMAP_CE,
 851         SYSIO_IMAP_SBERR,
 852         SYSIO_IMAP_PMGMT,
 853         SYSIO_IMAP_GFX,
 854         SYSIO_IMAP_EUPA,
 855 };
 856
 857 #undef bogon
 858
 859 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 860
 861 /* Convert Interrupt Mapping register pointer to associated
 862  * Interrupt Clear register pointer, SYSIO specific version.
 863  */
 864 #define SYSIO_ICLR_UNUSED0      0x3400UL
 865 #define SYSIO_ICLR_SLOT0        0x3408UL
 866 #define SYSIO_ICLR_SLOT1        0x3448UL
 867 #define SYSIO_ICLR_SLOT2        0x3488UL
 868 #define SYSIO_ICLR_SLOT3        0x34c8UL
 869 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 870 {
 871         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 872         return imap + diff;
 873 }
 874
 875 static unsigned int sbus_of_build_irq(struct device_node *dp,
 876                                       unsigned int ino,
 877                                       void *_data)
 878 {
 879         unsigned long reg_base = (unsigned long) _data;
 880         const struct linux_prom_registers *regs;
 881         unsigned long imap, iclr;
 882         int sbus_slot = 0;
 883         int sbus_level = 0;
 884
 885         ino &= 0x3f;
 886
 887         regs = of_get_property(dp, "reg", NULL);
 888         if (regs)
 889                 sbus_slot = regs->which_io;
 890
 891         if (ino < 0x20)
 892                 ino += (sbus_slot * 8);
 893
 894         imap = sysio_irq_offsets[ino];
 895         if (imap == ((unsigned long)-1)) {
 896                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 897                             ino);
 898                 prom_halt();
 899         }
 900         imap += reg_base;
 901
 902         /* SYSIO inconsistency.  For external SLOTS, we have to select
 903          * the right ICLR register based upon the lower SBUS irq level
 904          * bits.
 905          */
 906         if (ino >= 0x20) {
 907                 iclr = sysio_imap_to_iclr(imap);
 908         } else {
 909                 sbus_level = ino & 0x7;
 910
 911                 switch(sbus_slot) {
 912                 case 0:
 913                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 914                         break;
 915                 case 1:
 916                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 917                         break;
 918                 case 2:
 919                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 920                         break;
 921                 default:
 922                 case 3:
 923                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 924                         break;
 925                 };
 926
 927                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 928         }
 929         return build_irq(sbus_level, iclr, imap);
 930 }
 931
 932 static void __init sbus_irq_trans_init(struct device_node *dp)
 933 {
 934         const struct linux_prom64_registers *regs;
 935
 936         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 937         dp->irq_trans->irq_build = sbus_of_build_irq;
 938
 939         regs = of_get_property(dp, "reg", NULL);
 940         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
 941 }
 942 #endif /* CONFIG_SBUS */
 943
 944
 945 static unsigned int central_build_irq(struct device_node *dp,
 946                                       unsigned int ino,
 947                                       void *_data)
 948 {
 949         struct device_node *central_dp = _data;
 950         struct of_device *central_op = of_find_device_by_node(central_dp);
 951         struct resource *res;
 952         unsigned long imap, iclr;
 953         u32 tmp;
 954
 955         if (!strcmp(dp->name, "eeprom")) {
 956                 res = &central_op->resource[5];
 957         } else if (!strcmp(dp->name, "zs")) {
 958                 res = &central_op->resource[4];
 959         } else if (!strcmp(dp->name, "clock-board")) {
 960                 res = &central_op->resource[3];
 961         } else {
 962                 return ino;
 963         }
 964
 965         imap = res->start + 0x00UL;
 966         iclr = res->start + 0x10UL;
 967
 968         /* Set the INO state to idle, and disable.  */
 969         upa_writel(0, iclr);
 970         upa_readl(iclr);
 971
 972         tmp = upa_readl(imap);
 973         tmp &= ~0x80000000;
 974         upa_writel(tmp, imap);
 975
 976         return build_irq(0, iclr, imap);
 977 }
 978
 979 static void __init central_irq_trans_init(struct device_node *dp)
 980 {
 981         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 982         dp->irq_trans->irq_build = central_build_irq;
 983
 984         dp->irq_trans->data = dp;
 985 }
 986
 987 struct irq_trans {
 988         const char *name;
 989         void (*init)(struct device_node *);
 990 };
 991
 992 #ifdef CONFIG_PCI
 993 static struct irq_trans __initdata pci_irq_trans_table[] = {
 994         { "SUNW,sabre", sabre_irq_trans_init },
 995         { "pci108e,a000", sabre_irq_trans_init },
 996         { "pci108e,a001", sabre_irq_trans_init },
 997         { "SUNW,psycho", psycho_irq_trans_init },
 998         { "pci108e,8000", psycho_irq_trans_init },
 999         { "SUNW,schizo", schizo_irq_trans_init },
1000         { "pci108e,8001", schizo_irq_trans_init },
1001         { "SUNW,schizo+", schizo_irq_trans_init },
1002         { "pci108e,8002", schizo_irq_trans_init },
1003         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1004         { "pci108e,a801", tomatillo_irq_trans_init },
1005         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1006         { "pciex108e,80f0", fire_irq_trans_init },
1007 };
1008 #endif
1009
1010 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1011                                          unsigned int devino,
1012                                          void *_data)
1013 {
1014         u32 devhandle = (u32) (unsigned long) _data;
1015
1016         return sun4v_build_irq(devhandle, devino);
1017 }
1018
1019 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1020 {
1021         const struct linux_prom64_registers *regs;
1022
1023         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1024         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1025
1026         regs = of_get_property(dp, "reg", NULL);
1027         dp->irq_trans->data = (void *) (unsigned long)
1028                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1029 }
1030
1031 static void __init irq_trans_init(struct device_node *dp)
1032 {
1033 #ifdef CONFIG_PCI
1034         const char *model;
1035         int i;
1036 #endif
1037
1038 #ifdef CONFIG_PCI
1039         model = of_get_property(dp, "model", NULL);
1040         if (!model)
1041                 model = of_get_property(dp, "compatible", NULL);
1042         if (model) {
1043                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1044                         struct irq_trans *t = &pci_irq_trans_table[i];
1045
1046                         if (!strcmp(model, t->name))
1047                                 return t->init(dp);
1048                 }
1049         }
1050 #endif
1051 #ifdef CONFIG_SBUS
1052         if (!strcmp(dp->name, "sbus") ||
1053             !strcmp(dp->name, "sbi"))
1054                 return sbus_irq_trans_init(dp);
1055 #endif
1056         if (!strcmp(dp->name, "fhc") &&
1057             !strcmp(dp->parent->name, "central"))
1058                 return central_irq_trans_init(dp);
1059         if (!strcmp(dp->name, "virtual-devices") ||
1060             !strcmp(dp->name, "niu"))
1061                 return sun4v_vdev_irq_trans_init(dp);
1062 }
1063
1064 static int is_root_node(const struct device_node *dp)
1065 {
1066         if (!dp)
1067                 return 0;
1068
1069         return (dp->parent == NULL);
1070 }
1071
1072 /* The following routines deal with the black magic of fully naming a
1073  * node.
1074  *
1075  * Certain well known named nodes are just the simple name string.
1076  *
1077  * Actual devices have an address specifier appended to the base name
1078  * string, like this "foo@addr".  The "addr" can be in any number of
1079  * formats, and the platform plus the type of the node determine the
1080  * format and how it is constructed.
1081  *
1082  * For children of the ROOT node, the naming convention is fixed and
1083  * determined by whether this is a sun4u or sun4v system.
1084  *
1085  * For children of other nodes, it is bus type specific.  So
1086  * we walk up the tree until we discover a "device_type" property
1087  * we recognize and we go from there.
1088  *
1089  * As an example, the boot device on my workstation has a full path:
1090  *
1091  *      /pci@1e,600000/ide@d/disk@0,0:c
1092  */
1093 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1094 {
1095         struct linux_prom64_registers *regs;
1096         struct property *rprop;
1097         u32 high_bits, low_bits, type;
1098
1099         rprop = of_find_property(dp, "reg", NULL);
1100         if (!rprop)
1101                 return;
1102
1103         regs = rprop->value;
1104         if (!is_root_node(dp->parent)) {
1105                 sprintf(tmp_buf, "%s@%x,%x",
1106                         dp->name,
1107                         (unsigned int) (regs->phys_addr >> 32UL),
1108                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1109                 return;
1110         }
1111
1112         type = regs->phys_addr >> 60UL;
1113         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1114         low_bits = (regs->phys_addr & 0xffffffffUL);
1115
1116         if (type == 0 || type == 8) {
1117                 const char *prefix = (type == 0) ? "m" : "i";
1118
1119                 if (low_bits)
1120                         sprintf(tmp_buf, "%s@%s%x,%x",
1121                                 dp->name, prefix,
1122                                 high_bits, low_bits);
1123                 else
1124                         sprintf(tmp_buf, "%s@%s%x",
1125                                 dp->name,
1126                                 prefix,
1127                                 high_bits);
1128         } else if (type == 12) {
1129                 sprintf(tmp_buf, "%s@%x",
1130                         dp->name, high_bits);
1131         }
1132 }
1133
1134 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1135 {
1136         struct linux_prom64_registers *regs;
1137         struct property *prop;
1138
1139         prop = of_find_property(dp, "reg", NULL);
1140         if (!prop)
1141                 return;
1142
1143         regs = prop->value;
1144         if (!is_root_node(dp->parent)) {
1145                 sprintf(tmp_buf, "%s@%x,%x",
1146                         dp->name,
1147                         (unsigned int) (regs->phys_addr >> 32UL),
1148                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1149                 return;
1150         }
1151
1152         prop = of_find_property(dp, "upa-portid", NULL);
1153         if (!prop)
1154                 prop = of_find_property(dp, "portid", NULL);
1155         if (prop) {
1156                 unsigned long mask = 0xffffffffUL;
1157
1158                 if (tlb_type >= cheetah)
1159                         mask = 0x7fffff;
1160
1161                 sprintf(tmp_buf, "%s@%x,%x",
1162                         dp->name,
1163                         *(u32 *)prop->value,
1164                         (unsigned int) (regs->phys_addr & mask));
1165         }
1166 }
1167
1168 /* "name@slot,offset"  */
1169 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1170 {
1171         struct linux_prom_registers *regs;
1172         struct property *prop;
1173
1174         prop = of_find_property(dp, "reg", NULL);
1175         if (!prop)
1176                 return;
1177
1178         regs = prop->value;
1179         sprintf(tmp_buf, "%s@%x,%x",
1180                 dp->name,
1181                 regs->which_io,
1182                 regs->phys_addr);
1183 }
1184
1185 /* "name@devnum[,func]" */
1186 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1187 {
1188         struct linux_prom_pci_registers *regs;
1189         struct property *prop;
1190         unsigned int devfn;
1191
1192         prop = of_find_property(dp, "reg", NULL);
1193         if (!prop)
1194                 return;
1195
1196         regs = prop->value;
1197         devfn = (regs->phys_hi >> 8) & 0xff;
1198         if (devfn & 0x07) {
1199                 sprintf(tmp_buf, "%s@%x,%x",
1200                         dp->name,
1201                         devfn >> 3,
1202                         devfn & 0x07);
1203         } else {
1204                 sprintf(tmp_buf, "%s@%x",
1205                         dp->name,
1206                         devfn >> 3);
1207         }
1208 }
1209
1210 /* "name@UPA_PORTID,offset" */
1211 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1212 {
1213         struct linux_prom64_registers *regs;
1214         struct property *prop;
1215
1216         prop = of_find_property(dp, "reg", NULL);
1217         if (!prop)
1218                 return;
1219
1220         regs = prop->value;
1221
1222         prop = of_find_property(dp, "upa-portid", NULL);
1223         if (!prop)
1224                 return;
1225
1226         sprintf(tmp_buf, "%s@%x,%x",
1227                 dp->name,
1228                 *(u32 *) prop->value,
1229                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1230 }
1231
1232 /* "name@reg" */
1233 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1234 {
1235         struct property *prop;
1236         u32 *regs;
1237
1238         prop = of_find_property(dp, "reg", NULL);
1239         if (!prop)
1240                 return;
1241
1242         regs = prop->value;
1243
1244         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1245 }
1246
1247 /* "name@addrhi,addrlo" */
1248 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1249 {
1250         struct linux_prom64_registers *regs;
1251         struct property *prop;
1252
1253         prop = of_find_property(dp, "reg", NULL);
1254         if (!prop)
1255                 return;
1256
1257         regs = prop->value;
1258
1259         sprintf(tmp_buf, "%s@%x,%x",
1260                 dp->name,
1261                 (unsigned int) (regs->phys_addr >> 32UL),
1262                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1263 }
1264
1265 /* "name@bus,addr" */
1266 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1267 {
1268         struct property *prop;
1269         u32 *regs;
1270
1271         prop = of_find_property(dp, "reg", NULL);
1272         if (!prop)
1273                 return;
1274
1275         regs = prop->value;
1276
1277         /* This actually isn't right... should look at the #address-cells
1278          * property of the i2c bus node etc. etc.
1279          */
1280         sprintf(tmp_buf, "%s@%x,%x",
1281                 dp->name, regs[0], regs[1]);
1282 }
1283
1284 /* "name@reg0[,reg1]" */
1285 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1286 {
1287         struct property *prop;
1288         u32 *regs;
1289
1290         prop = of_find_property(dp, "reg", NULL);
1291         if (!prop)
1292                 return;
1293
1294         regs = prop->value;
1295
1296         if (prop->length == sizeof(u32) || regs[1] == 1) {
1297                 sprintf(tmp_buf, "%s@%x",
1298                         dp->name, regs[0]);
1299         } else {
1300                 sprintf(tmp_buf, "%s@%x,%x",
1301                         dp->name, regs[0], regs[1]);
1302         }
1303 }
1304
1305 /* "name@reg0reg1[,reg2reg3]" */
1306 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1307 {
1308         struct property *prop;
1309         u32 *regs;
1310
1311         prop = of_find_property(dp, "reg", NULL);
1312         if (!prop)
1313                 return;
1314
1315         regs = prop->value;
1316
1317         if (regs[2] || regs[3]) {
1318                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1319                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1320         } else {
1321                 sprintf(tmp_buf, "%s@%08x%08x",
1322                         dp->name, regs[0], regs[1]);
1323         }
1324 }
1325
1326 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1327 {
1328         struct device_node *parent = dp->parent;
1329
1330         if (parent != NULL) {
1331                 if (!strcmp(parent->type, "pci") ||
1332                     !strcmp(parent->type, "pciex"))
1333                         return pci_path_component(dp, tmp_buf);
1334                 if (!strcmp(parent->type, "sbus"))
1335                         return sbus_path_component(dp, tmp_buf);
1336                 if (!strcmp(parent->type, "upa"))
1337                         return upa_path_component(dp, tmp_buf);
1338                 if (!strcmp(parent->type, "ebus"))
1339                         return ebus_path_component(dp, tmp_buf);
1340                 if (!strcmp(parent->name, "usb") ||
1341                     !strcmp(parent->name, "hub"))
1342                         return usb_path_component(dp, tmp_buf);
1343                 if (!strcmp(parent->type, "i2c"))
1344                         return i2c_path_component(dp, tmp_buf);
1345                 if (!strcmp(parent->type, "firewire"))
1346                         return ieee1394_path_component(dp, tmp_buf);
1347                 if (!strcmp(parent->type, "virtual-devices"))
1348                         return vdev_path_component(dp, tmp_buf);
1349
1350                 /* "isa" is handled with platform naming */
1351         }
1352
1353         /* Use platform naming convention.  */
1354         if (tlb_type == hypervisor)
1355                 return sun4v_path_component(dp, tmp_buf);
1356         else
1357                 return sun4u_path_component(dp, tmp_buf);
1358 }
1359
1360 static char * __init build_path_component(struct device_node *dp)
1361 {
1362         char tmp_buf[64], *n;
1363
1364         tmp_buf[0] = '\0';
1365         __build_path_component(dp, tmp_buf);
1366         if (tmp_buf[0] == '\0')
1367                 strcpy(tmp_buf, dp->name);
1368
1369         n = prom_early_alloc(strlen(tmp_buf) + 1);
1370         strcpy(n, tmp_buf);
1371
1372         return n;
1373 }
1374
1375 static char * __init build_full_name(struct device_node *dp)
1376 {
1377         int len, ourlen, plen;
1378         char *n;
1379
1380         plen = strlen(dp->parent->full_name);
1381         ourlen = strlen(dp->path_component_name);
1382         len = ourlen + plen + 2;
1383
1384         n = prom_early_alloc(len);
1385         strcpy(n, dp->parent->full_name);
1386         if (!is_root_node(dp->parent)) {
1387                 strcpy(n + plen, "/");
1388                 plen++;
1389         }
1390         strcpy(n + plen, dp->path_component_name);
1391
1392         return n;
1393 }
1394
1395 static unsigned int unique_id;
1396
1397 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1398 {
1399         static struct property *tmp = NULL;
1400         struct property *p;
1401
1402         if (tmp) {
1403                 p = tmp;
1404                 memset(p, 0, sizeof(*p) + 32);
1405                 tmp = NULL;
1406         } else {
1407                 p = prom_early_alloc(sizeof(struct property) + 32);
1408                 p->unique_id = unique_id++;
1409         }
1410
1411         p->name = (char *) (p + 1);
1412         if (special_name) {
1413                 strcpy(p->name, special_name);
1414                 p->length = special_len;
1415                 p->value = prom_early_alloc(special_len);
1416                 memcpy(p->value, special_val, special_len);
1417         } else {
1418                 if (prev == NULL) {
1419                         prom_firstprop(node, p->name);
1420                 } else {
1421                         prom_nextprop(node, prev, p->name);
1422                 }
1423                 if (strlen(p->name) == 0) {
1424                         tmp = p;
1425                         return NULL;
1426                 }
1427                 p->length = prom_getproplen(node, p->name);
1428                 if (p->length <= 0) {
1429                         p->length = 0;
1430                 } else {
1431                         p->value = prom_early_alloc(p->length + 1);
1432                         prom_getproperty(node, p->name, p->value, p->length);
1433                         ((unsigned char *)p->value)[p->length] = '\0';
1434                 }
1435         }
1436         return p;
1437 }
1438
1439 static struct property * __init build_prop_list(phandle node)
1440 {
1441         struct property *head, *tail;
1442
1443         head = tail = build_one_prop(node, NULL,
1444                                      ".node", &node, sizeof(node));
1445
1446         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1447         tail = tail->next;
1448         while(tail) {
1449                 tail->next = build_one_prop(node, tail->name,
1450                                             NULL, NULL, 0);
1451                 tail = tail->next;
1452         }
1453
1454         return head;
1455 }
1456
1457 static char * __init get_one_property(phandle node, const char *name)
1458 {
1459         char *buf = "<NULL>";
1460         int len;
1461
1462         len = prom_getproplen(node, name);
1463         if (len > 0) {
1464                 buf = prom_early_alloc(len);
1465                 prom_getproperty(node, name, buf, len);
1466         }
1467
1468         return buf;
1469 }
1470
1471 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1472 {
1473         struct device_node *dp;
1474
1475         if (!node)
1476                 return NULL;
1477
1478         dp = prom_early_alloc(sizeof(*dp));
1479         dp->unique_id = unique_id++;
1480         dp->parent = parent;
1481
1482         kref_init(&dp->kref);
1483
1484         dp->name = get_one_property(node, "name");
1485         dp->type = get_one_property(node, "device_type");
1486         dp->node = node;
1487
1488         dp->properties = build_prop_list(node);
1489
1490         irq_trans_init(dp);
1491
1492         return dp;
1493 }
1494
1495 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1496 {
1497         struct device_node *ret = NULL, *prev_sibling = NULL;
1498         struct device_node *dp;
1499
1500         while (1) {
1501                 dp = create_node(node, parent);
1502                 if (!dp)
1503                         break;
1504
1505                 if (prev_sibling)
1506                         prev_sibling->sibling = dp;
1507
1508                 if (!ret)
1509                         ret = dp;
1510                 prev_sibling = dp;
1511
1512                 *(*nextp) = dp;
1513                 *nextp = &dp->allnext;
1514
1515                 dp->path_component_name = build_path_component(dp);
1516                 dp->full_name = build_full_name(dp);
1517
1518                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1519
1520                 node = prom_getsibling(node);
1521         }
1522
1523         return ret;
1524 }
1525
1526 static const char *get_mid_prop(void)
1527 {
1528         return (tlb_type == spitfire ? "upa-portid" : "portid");
1529 }
1530
1531 struct device_node *of_find_node_by_cpuid(int cpuid)
1532 {
1533         struct device_node *dp;
1534         const char *mid_prop = get_mid_prop();
1535
1536         for_each_node_by_type(dp, "cpu") {
1537                 int id = of_getintprop_default(dp, mid_prop, -1);
1538                 const char *this_mid_prop = mid_prop;
1539
1540                 if (id < 0) {
1541                         this_mid_prop = "cpuid";
1542                         id = of_getintprop_default(dp, this_mid_prop, -1);
1543                 }
1544
1545                 if (id < 0) {
1546                         prom_printf("OF: Serious problem, cpu lacks "
1547                                     "%s property", this_mid_prop);
1548                         prom_halt();
1549                 }
1550                 if (cpuid == id)
1551                         return dp;
1552         }
1553         return NULL;
1554 }
1555
1556 static void __init of_fill_in_cpu_data(void)
1557 {
1558         struct device_node *dp;
1559         const char *mid_prop = get_mid_prop();
1560
1561         ncpus_probed = 0;
1562         for_each_node_by_type(dp, "cpu") {
1563                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1564                 const char *this_mid_prop = mid_prop;
1565                 struct device_node *portid_parent;
1566                 int portid = -1;
1567
1568                 portid_parent = NULL;
1569                 if (cpuid < 0) {
1570                         this_mid_prop = "cpuid";
1571                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1572                         if (cpuid >= 0) {
1573                                 int limit = 2;
1574
1575                                 portid_parent = dp;
1576                                 while (limit--) {
1577                                         portid_parent = portid_parent->parent;
1578                                         if (!portid_parent)
1579                                                 break;
1580                                         portid = of_getintprop_default(portid_parent,
1581                                                                        "portid", -1);
1582                                         if (portid >= 0)
1583                                                 break;
1584                                 }
1585                         }
1586                 }
1587
1588                 if (cpuid < 0) {
1589                         prom_printf("OF: Serious problem, cpu lacks "
1590                                     "%s property", this_mid_prop);
1591                         prom_halt();
1592                 }
1593
1594                 ncpus_probed++;
1595
1596 #ifdef CONFIG_SMP
1597                 if (cpuid >= NR_CPUS) {
1598                         printk(KERN_WARNING "Ignoring CPU %d which is "
1599                                ">= NR_CPUS (%d)\n",
1600                                cpuid, NR_CPUS);
1601                         continue;
1602                 }
1603 #else
1604                 /* On uniprocessor we only want the values for the
1605                  * real physical cpu the kernel booted onto, however
1606                  * cpu_data() only has one entry at index 0.
1607                  */
1608                 if (cpuid != real_hard_smp_processor_id())
1609                         continue;
1610                 cpuid = 0;
1611 #endif
1612
1613                 cpu_data(cpuid).clock_tick =
1614                         of_getintprop_default(dp, "clock-frequency", 0);
1615
1616                 if (portid_parent) {
1617                         cpu_data(cpuid).dcache_size =
1618                                 of_getintprop_default(dp, "l1-dcache-size",
1619                                                       16 * 1024);
1620                         cpu_data(cpuid).dcache_line_size =
1621                                 of_getintprop_default(dp, "l1-dcache-line-size",
1622                                                       32);
1623                         cpu_data(cpuid).icache_size =
1624                                 of_getintprop_default(dp, "l1-icache-size",
1625                                                       8 * 1024);
1626                         cpu_data(cpuid).icache_line_size =
1627                                 of_getintprop_default(dp, "l1-icache-line-size",
1628                                                       32);
1629                         cpu_data(cpuid).ecache_size =
1630                                 of_getintprop_default(dp, "l2-cache-size", 0);
1631                         cpu_data(cpuid).ecache_line_size =
1632                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1633                         if (!cpu_data(cpuid).ecache_size ||
1634                             !cpu_data(cpuid).ecache_line_size) {
1635                                 cpu_data(cpuid).ecache_size =
1636                                         of_getintprop_default(portid_parent,
1637                                                               "l2-cache-size",
1638                                                               (4 * 1024 * 1024));
1639                                 cpu_data(cpuid).ecache_line_size =
1640                                         of_getintprop_default(portid_parent,
1641                                                               "l2-cache-line-size", 64);
1642                         }
1643
1644                         cpu_data(cpuid).core_id = portid + 1;
1645                         cpu_data(cpuid).proc_id = portid;
1646 #ifdef CONFIG_SMP
1647                         sparc64_multi_core = 1;
1648 #endif
1649                 } else {
1650                         cpu_data(cpuid).dcache_size =
1651                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1652                         cpu_data(cpuid).dcache_line_size =
1653                                 of_getintprop_default(dp, "dcache-line-size", 32);
1654
1655                         cpu_data(cpuid).icache_size =
1656                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1657                         cpu_data(cpuid).icache_line_size =
1658                                 of_getintprop_default(dp, "icache-line-size", 32);
1659
1660                         cpu_data(cpuid).ecache_size =
1661                                 of_getintprop_default(dp, "ecache-size",
1662                                                       (4 * 1024 * 1024));
1663                         cpu_data(cpuid).ecache_line_size =
1664                                 of_getintprop_default(dp, "ecache-line-size", 64);
1665
1666                         cpu_data(cpuid).core_id = 0;
1667                         cpu_data(cpuid).proc_id = -1;
1668                 }
1669
1670 #ifdef CONFIG_SMP
1671                 cpu_set(cpuid, cpu_present_map);
1672                 cpu_set(cpuid, cpu_possible_map);
1673 #endif
1674         }
1675
1676         smp_fill_in_sib_core_maps();
1677 }
1678
1679 struct device_node *of_console_device;
1680 EXPORT_SYMBOL(of_console_device);
1681
1682 char *of_console_path;
1683 EXPORT_SYMBOL(of_console_path);
1684
1685 char *of_console_options;
1686 EXPORT_SYMBOL(of_console_options);
1687
1688 static void __init of_console_init(void)
1689 {
1690         char *msg = "OF stdout device is: %s\n";
1691         struct device_node *dp;
1692         const char *type;
1693         phandle node;
1694
1695         of_console_path = prom_early_alloc(256);
1696         if (prom_ihandle2path(prom_stdout, of_console_path, 256) < 0) {
1697                 prom_printf("Cannot obtain path of stdout.\n");
1698                 prom_halt();
1699         }
1700         of_console_options = strrchr(of_console_path, ':');
1701         if (of_console_options) {
1702                 of_console_options++;
1703                 if (*of_console_options == '\0')
1704                         of_console_options = NULL;
1705         }
1706
1707         node = prom_inst2pkg(prom_stdout);
1708         if (!node) {
1709                 prom_printf("Cannot resolve stdout node from "
1710                             "instance %08x.\n", prom_stdout);
1711                 prom_halt();
1712         }
1713
1714         dp = of_find_node_by_phandle(node);
1715         type = of_get_property(dp, "device_type", NULL);
1716         if (!type) {
1717                 prom_printf("Console stdout lacks device_type property.\n");
1718                 prom_halt();
1719         }
1720
1721         if (strcmp(type, "display") && strcmp(type, "serial")) {
1722                 prom_printf("Console device_type is neither display "
1723                             "nor serial.\n");
1724                 prom_halt();
1725         }
1726
1727         of_console_device = dp;
1728
1729         printk(msg, of_console_path);
1730 }
1731
1732 void __init prom_build_devicetree(void)
1733 {
1734         struct device_node **nextp;
1735
1736         allnodes = create_node(prom_root_node, NULL);
1737         allnodes->path_component_name = "";
1738         allnodes->full_name = "/";
1739
1740         nextp = &allnodes->allnext;
1741         allnodes->child = build_tree(allnodes,
1742                                      prom_getchild(allnodes->node),
1743                                      &nextp);
1744         of_console_init();
1745
1746         printk("PROM: Built device tree with %u bytes of memory.\n",
1747                prom_early_allocated);
1748
1749         if (tlb_type != hypervisor)
1750                 of_fill_in_cpu_data();
1751 }