1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
159 /* ----------------------------------------------------------------------------
161 ---------------------------------------------------------------------------- */
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
172 TBD: Dean brought this up, and I assumed the hardware would
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
206 #define MACE_FIFOFC 7
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
219 #define MACE_LADRF 20
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
299 #define MACE_IMR_DEFAULT \
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
313 #define TX_TIMEOUT ((400*HZ)/1000)
315 /* ----------------------------------------------------------------------------
317 ---------------------------------------------------------------------------- */
319 typedef struct _mace_statistics {
334 /* RFS1--Receive Status (RCVSTS) */
340 /* RFS2--Runt Packet Count (RNTPC) */
343 /* RFS3--Receive Collision Count (RCVCC) */
364 typedef struct _mace_private {
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
385 static char rcsid[] =
386 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387 static char *version =
388 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
391 static dev_info_t dev_info="nmclan_cs";
392 static dev_link_t *dev_list;
394 static char *if_names[]={
395 "Auto", "10baseT", "BNC",
398 /* ----------------------------------------------------------------------------
400 These are the parameters that can be set during loading with
402 ---------------------------------------------------------------------------- */
404 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
405 MODULE_LICENSE("GPL");
407 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
409 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
410 INT_MODULE_PARM(if_port, 0);
413 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
414 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
416 #define DEBUG(n, args...)
419 /* ----------------------------------------------------------------------------
421 ---------------------------------------------------------------------------- */
423 static void nmclan_config(dev_link_t *link);
424 static void nmclan_release(dev_link_t *link);
425 static int nmclan_event(event_t event, int priority,
426 event_callback_args_t *args);
428 static void nmclan_reset(struct net_device *dev);
429 static int mace_config(struct net_device *dev, struct ifmap *map);
430 static int mace_open(struct net_device *dev);
431 static int mace_close(struct net_device *dev);
432 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
433 static void mace_tx_timeout(struct net_device *dev);
434 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
435 static struct net_device_stats *mace_get_stats(struct net_device *dev);
436 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
437 static void restore_multicast_list(struct net_device *dev);
438 static void set_multicast_list(struct net_device *dev);
439 static struct ethtool_ops netdev_ethtool_ops;
442 static dev_link_t *nmclan_attach(void);
443 static void nmclan_detach(dev_link_t *);
445 /* ----------------------------------------------------------------------------
447 Creates an "instance" of the driver, allocating local data
448 structures for one device. The device is registered with Card
450 ---------------------------------------------------------------------------- */
452 static dev_link_t *nmclan_attach(void)
456 struct net_device *dev;
457 client_reg_t client_reg;
460 DEBUG(0, "nmclan_attach()\n");
461 DEBUG(1, "%s\n", rcsid);
463 /* Create new ethernet device */
464 dev = alloc_etherdev(sizeof(mace_private));
467 lp = netdev_priv(dev);
471 spin_lock_init(&lp->bank_lock);
472 link->io.NumPorts1 = 32;
473 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
474 link->io.IOAddrLines = 5;
475 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
476 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
477 link->irq.Handler = &mace_interrupt;
478 link->irq.Instance = dev;
479 link->conf.Attributes = CONF_ENABLE_IRQ;
481 link->conf.IntType = INT_MEMORY_AND_IO;
482 link->conf.ConfigIndex = 1;
483 link->conf.Present = PRESENT_OPTION;
485 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
487 SET_MODULE_OWNER(dev);
488 dev->hard_start_xmit = &mace_start_xmit;
489 dev->set_config = &mace_config;
490 dev->get_stats = &mace_get_stats;
491 dev->set_multicast_list = &set_multicast_list;
492 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
493 dev->open = &mace_open;
494 dev->stop = &mace_close;
495 #ifdef HAVE_TX_TIMEOUT
496 dev->tx_timeout = mace_tx_timeout;
497 dev->watchdog_timeo = TX_TIMEOUT;
500 /* Register with Card Services */
501 link->next = dev_list;
503 client_reg.dev_info = &dev_info;
504 client_reg.Version = 0x0210;
505 client_reg.event_callback_args.client_data = link;
506 ret = pcmcia_register_client(&link->handle, &client_reg);
508 cs_error(link->handle, RegisterClient, ret);
514 } /* nmclan_attach */
516 /* ----------------------------------------------------------------------------
518 This deletes a driver "instance". The device is de-registered
519 with Card Services. If it has been released, all local data
520 structures are freed. Otherwise, the structures will be freed
521 when the device is released.
522 ---------------------------------------------------------------------------- */
524 static void nmclan_detach(dev_link_t *link)
526 struct net_device *dev = link->priv;
529 DEBUG(0, "nmclan_detach(0x%p)\n", link);
531 /* Locate device structure */
532 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
533 if (*linkp == link) break;
538 unregister_netdev(dev);
540 if (link->state & DEV_CONFIG)
541 nmclan_release(link);
544 pcmcia_deregister_client(link->handle);
546 /* Unlink device structure, free bits */
549 } /* nmclan_detach */
551 /* ----------------------------------------------------------------------------
553 Reads a MACE register. This is bank independent; however, the
554 caller must ensure that this call is not interruptable. We are
555 assuming that during normal operation, the MACE is always in
557 ---------------------------------------------------------------------------- */
558 static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
564 case 0: /* register 0-15 */
565 data = inb(ioaddr + AM2150_MACE_BASE + reg);
567 case 1: /* register 16-31 */
568 spin_lock_irqsave(&lp->bank_lock, flags);
570 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
572 spin_unlock_irqrestore(&lp->bank_lock, flags);
575 return (data & 0xFF);
578 /* ----------------------------------------------------------------------------
580 Writes to a MACE register. This is bank independent; however,
581 the caller must ensure that this call is not interruptable. We
582 are assuming that during normal operation, the MACE is always in
584 ---------------------------------------------------------------------------- */
585 static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
590 case 0: /* register 0-15 */
591 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
593 case 1: /* register 16-31 */
594 spin_lock_irqsave(&lp->bank_lock, flags);
596 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
598 spin_unlock_irqrestore(&lp->bank_lock, flags);
603 /* ----------------------------------------------------------------------------
605 Resets the MACE chip.
606 ---------------------------------------------------------------------------- */
607 static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
612 /* MACE Software reset */
613 mace_write(lp, ioaddr, MACE_BIUCC, 1);
614 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
615 /* Wait for reset bit to be cleared automatically after <= 200ns */;
618 printk(KERN_ERR "mace: reset failed, card removed ?\n");
623 mace_write(lp, ioaddr, MACE_BIUCC, 0);
625 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
626 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
628 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
629 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
632 * Bit 2-1 PORTSEL[1-0] Port Select.
635 * 10 DAI Port (reserved in Am2150)
637 * For this card, only the first two are valid.
638 * So, PLSCC should be set to
641 * Or just set ASEL in PHYCC below!
645 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
648 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
651 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
652 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
653 and the MACE device will automatically select the operating media
658 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
659 /* Poll ADDRCHG bit */
661 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
665 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
669 /* Set PADR register */
670 for (i = 0; i < ETHER_ADDR_LEN; i++)
671 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
673 /* MAC Configuration Control Register should be written last */
674 /* Let set_multicast_list set this. */
675 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
676 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
680 /* ----------------------------------------------------------------------------
682 This routine is scheduled to run after a CARD_INSERTION event
683 is received, to configure the PCMCIA socket, and to make the
684 ethernet device available to the system.
685 ---------------------------------------------------------------------------- */
687 #define CS_CHECK(fn, ret) \
688 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
690 static void nmclan_config(dev_link_t *link)
692 client_handle_t handle = link->handle;
693 struct net_device *dev = link->priv;
694 mace_private *lp = netdev_priv(dev);
698 int i, last_ret, last_fn;
701 DEBUG(0, "nmclan_config(0x%p)\n", link);
703 tuple.Attributes = 0;
704 tuple.TupleData = buf;
705 tuple.TupleDataMax = 64;
706 tuple.TupleOffset = 0;
707 tuple.DesiredTuple = CISTPL_CONFIG;
708 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
709 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
710 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
711 link->conf.ConfigBase = parse.config.base;
714 link->state |= DEV_CONFIG;
716 CS_CHECK(RequestIO, pcmcia_request_io(handle, &link->io));
717 CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq));
718 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf));
719 dev->irq = link->irq.AssignedIRQ;
720 dev->base_addr = link->io.BasePort1;
722 ioaddr = dev->base_addr;
724 /* Read the ethernet address from the CIS. */
725 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
726 tuple.TupleData = buf;
727 tuple.TupleDataMax = 64;
728 tuple.TupleOffset = 0;
729 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
730 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
731 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
733 /* Verify configuration by reading the MACE ID. */
737 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
738 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
739 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
740 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
743 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
744 " be 0x40 0x?9\n", sig[0], sig[1]);
745 link->state &= ~DEV_CONFIG_PENDING;
750 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
753 /* The if_port symbol can be set when the module is loaded */
755 dev->if_port = if_port;
757 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
759 link->dev = &lp->node;
760 link->state &= ~DEV_CONFIG_PENDING;
761 SET_NETDEV_DEV(dev, &handle_to_dev(handle));
763 i = register_netdev(dev);
765 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
770 strcpy(lp->node.dev_name, dev->name);
772 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
773 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
774 for (i = 0; i < 6; i++)
775 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
779 cs_error(link->handle, last_fn, last_ret);
781 nmclan_release(link);
784 } /* nmclan_config */
786 /* ----------------------------------------------------------------------------
788 After a card is removed, nmclan_release() will unregister the
789 net device, and release the PCMCIA configuration. If the device
790 is still open, this will be postponed until it is closed.
791 ---------------------------------------------------------------------------- */
792 static void nmclan_release(dev_link_t *link)
795 DEBUG(0, "nmclan_release(0x%p)\n", link);
797 pcmcia_release_configuration(link->handle);
798 pcmcia_release_io(link->handle, &link->io);
799 pcmcia_release_irq(link->handle, &link->irq);
801 link->state &= ~DEV_CONFIG;
804 static int nmclan_suspend(struct pcmcia_device *p_dev)
806 dev_link_t *link = dev_to_instance(p_dev);
807 struct net_device *dev = link->priv;
809 link->state |= DEV_SUSPEND;
810 if (link->state & DEV_CONFIG) {
812 netif_device_detach(dev);
813 pcmcia_release_configuration(link->handle);
820 static int nmclan_resume(struct pcmcia_device *p_dev)
822 dev_link_t *link = dev_to_instance(p_dev);
823 struct net_device *dev = link->priv;
825 link->state &= ~DEV_SUSPEND;
826 if (link->state & DEV_CONFIG) {
827 pcmcia_request_configuration(link->handle, &link->conf);
830 netif_device_attach(dev);
837 /* ----------------------------------------------------------------------------
839 The card status event handler. Mostly, this schedules other
840 stuff to run after an event is received. A CARD_REMOVAL event
841 also sets some flags to discourage the net drivers from trying
842 to talk to the card any more.
843 ---------------------------------------------------------------------------- */
844 static int nmclan_event(event_t event, int priority,
845 event_callback_args_t *args)
847 dev_link_t *link = args->client_data;
848 struct net_device *dev = link->priv;
850 DEBUG(1, "nmclan_event(0x%06x)\n", event);
853 case CS_EVENT_CARD_REMOVAL:
854 link->state &= ~DEV_PRESENT;
855 if (link->state & DEV_CONFIG)
856 netif_device_detach(dev);
858 case CS_EVENT_CARD_INSERTION:
859 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
862 case CS_EVENT_RESET_REQUEST:
869 /* ----------------------------------------------------------------------------
871 Reset and restore all of the Xilinx and MACE registers.
872 ---------------------------------------------------------------------------- */
873 static void nmclan_reset(struct net_device *dev)
875 mace_private *lp = netdev_priv(dev);
878 dev_link_t *link = &lp->link;
882 /* Save original COR value */
884 reg.Action = CS_READ;
885 reg.Offset = CISREG_COR;
887 pcmcia_access_configuration_register(link->handle, ®);
888 OrigCorValue = reg.Value;
891 reg.Action = CS_WRITE;
892 reg.Offset = CISREG_COR;
893 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
895 reg.Value = COR_SOFT_RESET;
896 pcmcia_access_configuration_register(link->handle, ®);
897 /* Need to wait for 20 ms for PCMCIA to finish reset. */
899 /* Restore original COR configuration index */
900 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
901 pcmcia_access_configuration_register(link->handle, ®);
902 /* Xilinx is now completely reset along with the MACE chip. */
903 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
905 #endif /* #if RESET_XILINX */
907 /* Xilinx is now completely reset along with the MACE chip. */
908 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
910 /* Reinitialize the MACE chip for operation. */
911 mace_init(lp, dev->base_addr, dev->dev_addr);
912 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
914 /* Restore the multicast list and enable TX and RX. */
915 restore_multicast_list(dev);
918 /* ----------------------------------------------------------------------------
920 [Someone tell me what this is supposed to do? Is if_port a defined
921 standard? If so, there should be defines to indicate 1=10Base-T,
922 2=10Base-2, etc. including limited automatic detection.]
923 ---------------------------------------------------------------------------- */
924 static int mace_config(struct net_device *dev, struct ifmap *map)
926 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
927 if (map->port <= 2) {
928 dev->if_port = map->port;
929 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
930 if_names[dev->if_port]);
937 /* ----------------------------------------------------------------------------
940 ---------------------------------------------------------------------------- */
941 static int mace_open(struct net_device *dev)
943 kio_addr_t ioaddr = dev->base_addr;
944 mace_private *lp = netdev_priv(dev);
945 dev_link_t *link = &lp->link;
954 netif_start_queue(dev);
957 return 0; /* Always succeed */
960 /* ----------------------------------------------------------------------------
962 Closes device driver.
963 ---------------------------------------------------------------------------- */
964 static int mace_close(struct net_device *dev)
966 kio_addr_t ioaddr = dev->base_addr;
967 mace_private *lp = netdev_priv(dev);
968 dev_link_t *link = &lp->link;
970 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
972 /* Mask off all interrupts from the MACE chip. */
973 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
976 netif_stop_queue(dev);
981 static void netdev_get_drvinfo(struct net_device *dev,
982 struct ethtool_drvinfo *info)
984 strcpy(info->driver, DRV_NAME);
985 strcpy(info->version, DRV_VERSION);
986 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
990 static u32 netdev_get_msglevel(struct net_device *dev)
995 static void netdev_set_msglevel(struct net_device *dev, u32 level)
999 #endif /* PCMCIA_DEBUG */
1001 static struct ethtool_ops netdev_ethtool_ops = {
1002 .get_drvinfo = netdev_get_drvinfo,
1004 .get_msglevel = netdev_get_msglevel,
1005 .set_msglevel = netdev_set_msglevel,
1006 #endif /* PCMCIA_DEBUG */
1009 /* ----------------------------------------------------------------------------
1011 This routine begins the packet transmit function. When completed,
1012 it will generate a transmit interrupt.
1014 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
1015 returns 0, the "packet is now solely the responsibility of the
1016 driver." If _start_xmit returns non-zero, the "transmission
1017 failed, put skb back into a list."
1018 ---------------------------------------------------------------------------- */
1020 static void mace_tx_timeout(struct net_device *dev)
1022 mace_private *lp = netdev_priv(dev);
1023 dev_link_t *link = &lp->link;
1025 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
1026 #if RESET_ON_TIMEOUT
1027 printk("resetting card\n");
1028 pcmcia_reset_card(link->handle, NULL);
1029 #else /* #if RESET_ON_TIMEOUT */
1030 printk("NOT resetting card\n");
1031 #endif /* #if RESET_ON_TIMEOUT */
1032 dev->trans_start = jiffies;
1033 netif_wake_queue(dev);
1036 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
1038 mace_private *lp = netdev_priv(dev);
1039 kio_addr_t ioaddr = dev->base_addr;
1041 netif_stop_queue(dev);
1043 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
1044 dev->name, (long)skb->len);
1046 #if (!TX_INTERRUPTABLE)
1047 /* Disable MACE TX interrupts. */
1048 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
1049 ioaddr + AM2150_MACE_BASE + MACE_IMR);
1050 lp->tx_irq_disabled=1;
1051 #endif /* #if (!TX_INTERRUPTABLE) */
1054 /* This block must not be interrupted by another transmit request!
1055 mace_tx_timeout will take care of timer-based retransmissions from
1056 the upper layers. The interrupt handler is guaranteed never to
1057 service a transmit interrupt while we are in here.
1060 lp->linux_stats.tx_bytes += skb->len;
1061 lp->tx_free_frames--;
1063 /* WARNING: Write the _exact_ number of bytes written in the header! */
1064 /* Put out the word header [must be an outw()] . . . */
1065 outw(skb->len, ioaddr + AM2150_XMT);
1066 /* . . . and the packet [may be any combination of outw() and outb()] */
1067 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
1069 /* Odd byte transfer */
1070 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
1073 dev->trans_start = jiffies;
1076 if (lp->tx_free_frames > 0)
1077 netif_start_queue(dev);
1078 #endif /* #if MULTI_TX */
1081 #if (!TX_INTERRUPTABLE)
1082 /* Re-enable MACE TX interrupts. */
1083 lp->tx_irq_disabled=0;
1084 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1085 #endif /* #if (!TX_INTERRUPTABLE) */
1090 } /* mace_start_xmit */
1092 /* ----------------------------------------------------------------------------
1094 The interrupt handler.
1095 ---------------------------------------------------------------------------- */
1096 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1098 struct net_device *dev = (struct net_device *) dev_id;
1099 mace_private *lp = netdev_priv(dev);
1100 kio_addr_t ioaddr = dev->base_addr;
1102 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1105 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1110 if (lp->tx_irq_disabled) {
1112 (lp->tx_irq_disabled?
1113 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1114 "[isr=%02X, imr=%02X]\n":
1115 KERN_NOTICE "%s: Re-entering the interrupt handler "
1116 "[isr=%02X, imr=%02X]\n"),
1118 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1119 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1121 /* WARNING: MACE_IR has been read! */
1125 if (!netif_device_present(dev)) {
1126 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1131 /* WARNING: MACE_IR is a READ/CLEAR port! */
1132 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1134 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1136 if (status & MACE_IR_RCVINT) {
1137 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1140 if (status & MACE_IR_XMTINT) {
1141 unsigned char fifofc;
1142 unsigned char xmtrc;
1143 unsigned char xmtfs;
1145 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1146 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1147 lp->linux_stats.tx_errors++;
1148 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1151 /* Transmit Retry Count (XMTRC, reg 4) */
1152 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1153 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1154 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1157 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1158 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1160 lp->mace_stats.xmtsv++;
1162 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1163 if (xmtfs & MACE_XMTFS_UFLO) {
1164 /* Underflow. Indicates that the Transmit FIFO emptied before
1165 the end of frame was reached. */
1166 lp->mace_stats.uflo++;
1168 if (xmtfs & MACE_XMTFS_LCOL) {
1169 /* Late Collision */
1170 lp->mace_stats.lcol++;
1172 if (xmtfs & MACE_XMTFS_MORE) {
1173 /* MORE than one retry was needed */
1174 lp->mace_stats.more++;
1176 if (xmtfs & MACE_XMTFS_ONE) {
1177 /* Exactly ONE retry occurred */
1178 lp->mace_stats.one++;
1180 if (xmtfs & MACE_XMTFS_DEFER) {
1181 /* Transmission was defered */
1182 lp->mace_stats.defer++;
1184 if (xmtfs & MACE_XMTFS_LCAR) {
1185 /* Loss of carrier */
1186 lp->mace_stats.lcar++;
1188 if (xmtfs & MACE_XMTFS_RTRY) {
1189 /* Retry error: transmit aborted after 16 attempts */
1190 lp->mace_stats.rtry++;
1192 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1194 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1196 lp->linux_stats.tx_packets++;
1197 lp->tx_free_frames++;
1198 netif_wake_queue(dev);
1199 } /* if (status & MACE_IR_XMTINT) */
1201 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1202 if (status & MACE_IR_JAB) {
1203 /* Jabber Error. Excessive transmit duration (20-150ms). */
1204 lp->mace_stats.jab++;
1206 if (status & MACE_IR_BABL) {
1207 /* Babble Error. >1518 bytes transmitted. */
1208 lp->mace_stats.babl++;
1210 if (status & MACE_IR_CERR) {
1211 /* Collision Error. CERR indicates the absence of the
1212 Signal Quality Error Test message after a packet
1214 lp->mace_stats.cerr++;
1216 if (status & MACE_IR_RCVCCO) {
1217 /* Receive Collision Count Overflow; */
1218 lp->mace_stats.rcvcco++;
1220 if (status & MACE_IR_RNTPCO) {
1221 /* Runt Packet Count Overflow */
1222 lp->mace_stats.rntpco++;
1224 if (status & MACE_IR_MPCO) {
1225 /* Missed Packet Count Overflow */
1226 lp->mace_stats.mpco++;
1228 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1230 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1233 } /* mace_interrupt */
1235 /* ----------------------------------------------------------------------------
1238 ---------------------------------------------------------------------------- */
1239 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1241 mace_private *lp = netdev_priv(dev);
1242 kio_addr_t ioaddr = dev->base_addr;
1243 unsigned char rx_framecnt;
1244 unsigned short rx_status;
1247 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1248 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1251 rx_status = inw(ioaddr + AM2150_RCV);
1253 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1254 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1256 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1257 lp->linux_stats.rx_errors++;
1258 if (rx_status & MACE_RCVFS_OFLO) {
1259 lp->mace_stats.oflo++;
1261 if (rx_status & MACE_RCVFS_CLSN) {
1262 lp->mace_stats.clsn++;
1264 if (rx_status & MACE_RCVFS_FRAM) {
1265 lp->mace_stats.fram++;
1267 if (rx_status & MACE_RCVFS_FCS) {
1268 lp->mace_stats.fcs++;
1271 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1272 /* Auto Strip is off, always subtract 4 */
1273 struct sk_buff *skb;
1275 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1276 /* runt packet count */
1277 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1278 /* rcv collision count */
1280 DEBUG(3, " receiving packet size 0x%X rx_status"
1281 " 0x%X.\n", pkt_len, rx_status);
1283 skb = dev_alloc_skb(pkt_len+2);
1288 skb_reserve(skb, 2);
1289 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1291 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1292 skb->protocol = eth_type_trans(skb, dev);
1294 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1296 dev->last_rx = jiffies;
1297 lp->linux_stats.rx_packets++;
1298 lp->linux_stats.rx_bytes += skb->len;
1299 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1302 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1303 " %d.\n", dev->name, pkt_len);
1304 lp->linux_stats.rx_dropped++;
1307 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1313 /* ----------------------------------------------------------------------------
1315 ---------------------------------------------------------------------------- */
1316 static void pr_linux_stats(struct net_device_stats *pstats)
1318 DEBUG(2, "pr_linux_stats\n");
1319 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1320 (long)pstats->rx_packets, (long)pstats->tx_packets);
1321 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1322 (long)pstats->rx_errors, (long)pstats->tx_errors);
1323 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1324 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1325 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1326 (long)pstats->multicast, (long)pstats->collisions);
1328 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1329 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1330 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1331 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1332 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1333 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1335 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1336 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1337 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1338 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1339 DEBUG(2, " tx_window_errors=%ld\n",
1340 (long)pstats->tx_window_errors);
1341 } /* pr_linux_stats */
1343 /* ----------------------------------------------------------------------------
1345 ---------------------------------------------------------------------------- */
1346 static void pr_mace_stats(mace_statistics *pstats)
1348 DEBUG(2, "pr_mace_stats\n");
1350 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1351 pstats->xmtsv, pstats->uflo);
1352 DEBUG(2, " lcol=%-7d more=%d\n",
1353 pstats->lcol, pstats->more);
1354 DEBUG(2, " one=%-7d defer=%d\n",
1355 pstats->one, pstats->defer);
1356 DEBUG(2, " lcar=%-7d rtry=%d\n",
1357 pstats->lcar, pstats->rtry);
1360 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1361 pstats->exdef, pstats->xmtrc);
1363 /* RFS1--Receive Status (RCVSTS) */
1364 DEBUG(2, " oflo=%-7d clsn=%d\n",
1365 pstats->oflo, pstats->clsn);
1366 DEBUG(2, " fram=%-7d fcs=%d\n",
1367 pstats->fram, pstats->fcs);
1369 /* RFS2--Runt Packet Count (RNTPC) */
1370 /* RFS3--Receive Collision Count (RCVCC) */
1371 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1372 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1375 DEBUG(2, " jab=%-7d babl=%d\n",
1376 pstats->jab, pstats->babl);
1377 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1378 pstats->cerr, pstats->rcvcco);
1379 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1380 pstats->rntpco, pstats->mpco);
1383 DEBUG(2, " mpc=%d\n", pstats->mpc);
1386 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1389 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1391 } /* pr_mace_stats */
1393 /* ----------------------------------------------------------------------------
1395 Update statistics. We change to register window 1, so this
1396 should be run single-threaded if the device is active. This is
1397 expected to be a rare operation, and it's simpler for the rest
1398 of the driver to assume that window 0 is always valid rather
1399 than use a special window-state variable.
1401 oflo & uflo should _never_ occur since it would mean the Xilinx
1402 was not able to transfer data between the MACE FIFO and the
1403 card's SRAM fast enough. If this happens, something is
1404 seriously wrong with the hardware.
1405 ---------------------------------------------------------------------------- */
1406 static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1408 mace_private *lp = netdev_priv(dev);
1410 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1411 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1412 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1413 /* At this point, mace_stats is fully updated for this call.
1414 We may now update the linux_stats. */
1416 /* The MACE has no equivalent for linux_stats field which are commented
1419 /* lp->linux_stats.multicast; */
1420 lp->linux_stats.collisions =
1421 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1422 /* Collision: The MACE may retry sending a packet 15 times
1423 before giving up. The retry count is in XMTRC.
1424 Does each retry constitute a collision?
1425 If so, why doesn't the RCVCC record these collisions? */
1427 /* detailed rx_errors: */
1428 lp->linux_stats.rx_length_errors =
1429 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1430 /* lp->linux_stats.rx_over_errors */
1431 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1432 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1433 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1434 lp->linux_stats.rx_missed_errors =
1435 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1437 /* detailed tx_errors */
1438 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1439 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1440 /* LCAR usually results from bad cabling. */
1441 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1442 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1443 /* lp->linux_stats.tx_window_errors; */
1446 } /* update_stats */
1448 /* ----------------------------------------------------------------------------
1450 Gathers ethernet statistics from the MACE chip.
1451 ---------------------------------------------------------------------------- */
1452 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1454 mace_private *lp = netdev_priv(dev);
1456 update_stats(dev->base_addr, dev);
1458 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1459 pr_linux_stats(&lp->linux_stats);
1460 pr_mace_stats(&lp->mace_stats);
1462 return &lp->linux_stats;
1463 } /* net_device_stats */
1465 /* ----------------------------------------------------------------------------
1467 Modified from Am79C90 data sheet.
1468 ---------------------------------------------------------------------------- */
1470 #ifdef BROKEN_MULTICAST
1472 static void updateCRC(int *CRC, int bit)
1479 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1480 CRC generator polynomial. */
1484 /* shift CRC and control bit (CRC[32]) */
1485 for (j = 32; j > 0; j--)
1489 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1491 for (j = 0; j < 32; j++)
1495 /* ----------------------------------------------------------------------------
1497 Build logical address filter.
1498 Modified from Am79C90 data sheet.
1501 ladrf: logical address filter (contents initialized to 0)
1502 adr: ethernet address
1503 ---------------------------------------------------------------------------- */
1504 static void BuildLAF(int *ladrf, int *adr)
1506 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1508 int i, byte; /* temporary array indices */
1509 int hashcode; /* the output object */
1513 for (byte = 0; byte < 6; byte++)
1514 for (i = 0; i < 8; i++)
1515 updateCRC(CRC, (adr[byte] >> i) & 1);
1518 for (i = 0; i < 6; i++)
1519 hashcode = (hashcode << 1) + CRC[i];
1521 byte = hashcode >> 3;
1522 ladrf[byte] |= (1 << (hashcode & 7));
1526 printk(KERN_DEBUG " adr =");
1527 for (i = 0; i < 6; i++)
1528 printk(" %02X", adr[i]);
1529 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1531 for (i = 0; i < 8; i++)
1532 printk(" %02X", ladrf[i]);
1538 /* ----------------------------------------------------------------------------
1539 restore_multicast_list
1540 Restores the multicast filter for MACE chip to the last
1541 set_multicast_list() call.
1546 ---------------------------------------------------------------------------- */
1547 static void restore_multicast_list(struct net_device *dev)
1549 mace_private *lp = netdev_priv(dev);
1550 int num_addrs = lp->multicast_num_addrs;
1551 int *ladrf = lp->multicast_ladrf;
1552 kio_addr_t ioaddr = dev->base_addr;
1555 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1556 dev->name, num_addrs);
1558 if (num_addrs > 0) {
1560 DEBUG(1, "Attempt to restore multicast list detected.\n");
1562 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1563 /* Poll ADDRCHG bit */
1564 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1566 /* Set LADRF register */
1567 for (i = 0; i < MACE_LADRF_LEN; i++)
1568 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1570 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1571 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1573 } else if (num_addrs < 0) {
1575 /* Promiscuous mode: receive all packets */
1576 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1577 mace_write(lp, ioaddr, MACE_MACCC,
1578 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1584 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1585 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1588 } /* restore_multicast_list */
1590 /* ----------------------------------------------------------------------------
1592 Set or clear the multicast filter for this adaptor.
1595 num_addrs == -1 Promiscuous mode, receive all packets
1596 num_addrs == 0 Normal mode, clear multicast list
1597 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1598 best-effort filtering.
1602 ---------------------------------------------------------------------------- */
1604 static void set_multicast_list(struct net_device *dev)
1606 mace_private *lp = netdev_priv(dev);
1607 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1609 struct dev_mc_list *dmi = dev->mc_list;
1614 if (dev->mc_count != old) {
1615 old = dev->mc_count;
1616 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1622 /* Set multicast_num_addrs. */
1623 lp->multicast_num_addrs = dev->mc_count;
1625 /* Set multicast_ladrf. */
1626 if (num_addrs > 0) {
1627 /* Calculate multicast logical address filter */
1628 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1629 for (i = 0; i < dev->mc_count; i++) {
1630 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1632 BuildLAF(lp->multicast_ladrf, adr);
1636 restore_multicast_list(dev);
1638 } /* set_multicast_list */
1640 #endif /* BROKEN_MULTICAST */
1642 static void restore_multicast_list(struct net_device *dev)
1644 kio_addr_t ioaddr = dev->base_addr;
1645 mace_private *lp = netdev_priv(dev);
1647 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1648 lp->multicast_num_addrs);
1650 if (dev->flags & IFF_PROMISC) {
1651 /* Promiscuous mode: receive all packets */
1652 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1653 mace_write(lp, ioaddr, MACE_MACCC,
1654 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1658 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1659 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1661 } /* restore_multicast_list */
1663 static void set_multicast_list(struct net_device *dev)
1665 mace_private *lp = netdev_priv(dev);
1670 if (dev->mc_count != old) {
1671 old = dev->mc_count;
1672 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1678 lp->multicast_num_addrs = dev->mc_count;
1679 restore_multicast_list(dev);
1681 } /* set_multicast_list */
1683 static struct pcmcia_device_id nmclan_ids[] = {
1684 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1685 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1688 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1690 static struct pcmcia_driver nmclan_cs_driver = {
1691 .owner = THIS_MODULE,
1693 .name = "nmclan_cs",
1695 .attach = nmclan_attach,
1696 .event = nmclan_event,
1697 .detach = nmclan_detach,
1698 .id_table = nmclan_ids,
1699 .suspend = nmclan_suspend,
1700 .resume = nmclan_resume,
1703 static int __init init_nmclan_cs(void)
1705 return pcmcia_register_driver(&nmclan_cs_driver);
1708 static void __exit exit_nmclan_cs(void)
1710 pcmcia_unregister_driver(&nmclan_cs_driver);
1711 BUG_ON(dev_list != NULL);
1714 module_init(init_nmclan_cs);
1715 module_exit(exit_nmclan_cs);