git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt3070/common/eeprom.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         eeprom.c
  29
  30         Abstract:
  31
  32         Revision History:
  33         Who                     When                    What
  34         --------        ----------              ----------------------------------------------
  35         Name            Date                    Modification logs
  36 */
  37 #include        "../rt_config.h"
  38
  39 // IRQL = PASSIVE_LEVEL
  40 VOID RaiseClock(
  41     IN  PRTMP_ADAPTER   pAd,
  42     IN  UINT32 *x)
  43 {
  44     *x = *x | EESK;
  45     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  46     RTMPusecDelay(1);                           // Max frequency = 1MHz in Spec. definition
  47 }
  48
  49 // IRQL = PASSIVE_LEVEL
  50 VOID LowerClock(
  51     IN  PRTMP_ADAPTER   pAd,
  52     IN  UINT32 *x)
  53 {
  54     *x = *x & ~EESK;
  55     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  56     RTMPusecDelay(1);
  57 }
  58
  59 // IRQL = PASSIVE_LEVEL
  60 USHORT ShiftInBits(
  61     IN  PRTMP_ADAPTER   pAd)
  62 {
  63     UINT32              x,i;
  64         USHORT      data=0;
  65
  66     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  67
  68     x &= ~( EEDO | EEDI);
  69
  70     for(i=0; i<16; i++)
  71     {
  72         data = data << 1;
  73         RaiseClock(pAd, &x);
  74
  75         RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  76                 LowerClock(pAd, &x); //prevent read failed
  77
  78         x &= ~(EEDI);
  79         if(x & EEDO)
  80             data |= 1;
  81     }
  82
  83     return data;
  84 }
  85
  86 // IRQL = PASSIVE_LEVEL
  87 VOID ShiftOutBits(
  88     IN  PRTMP_ADAPTER   pAd,
  89     IN  USHORT data,
  90     IN  USHORT count)
  91 {
  92     UINT32       x,mask;
  93
  94     mask = 0x01 << (count - 1);
  95     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  96
  97     x &= ~(EEDO | EEDI);
  98
  99     do
 100     {
 101         x &= ~EEDI;
 102         if(data & mask)         x |= EEDI;
 103
 104         RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 105
 106         RaiseClock(pAd, &x);
 107         LowerClock(pAd, &x);
 108
 109         mask = mask >> 1;
 110     } while(mask);
 111
 112     x &= ~EEDI;
 113     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 114 }
 115
 116 // IRQL = PASSIVE_LEVEL
 117 VOID EEpromCleanup(
 118     IN  PRTMP_ADAPTER   pAd)
 119 {
 120     UINT32 x;
 121
 122     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 123
 124     x &= ~(EECS | EEDI);
 125     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 126
 127     RaiseClock(pAd, &x);
 128     LowerClock(pAd, &x);
 129 }
 130
 131 VOID EWEN(
 132         IN      PRTMP_ADAPTER   pAd)
 133 {
 134     UINT32      x;
 135
 136     // reset bits and set EECS
 137     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 138     x &= ~(EEDI | EEDO | EESK);
 139     x |= EECS;
 140     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 141
 142         // kick a pulse
 143         RaiseClock(pAd, &x);
 144         LowerClock(pAd, &x);
 145
 146     // output the read_opcode and six pulse in that order
 147     ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
 148     ShiftOutBits(pAd, 0, 6);
 149
 150     EEpromCleanup(pAd);
 151 }
 152
 153 VOID EWDS(
 154         IN      PRTMP_ADAPTER   pAd)
 155 {
 156     UINT32      x;
 157
 158     // reset bits and set EECS
 159     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 160     x &= ~(EEDI | EEDO | EESK);
 161     x |= EECS;
 162     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 163
 164         // kick a pulse
 165         RaiseClock(pAd, &x);
 166         LowerClock(pAd, &x);
 167
 168     // output the read_opcode and six pulse in that order
 169     ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
 170     ShiftOutBits(pAd, 0, 6);
 171
 172     EEpromCleanup(pAd);
 173 }
 174
 175 // IRQL = PASSIVE_LEVEL
 176 USHORT RTMP_EEPROM_READ16(
 177     IN  PRTMP_ADAPTER   pAd,
 178     IN  USHORT Offset)
 179 {
 180     UINT32              x;
 181     USHORT              data;
 182
 183         if (pAd->NicConfig2.field.AntDiversity)
 184     {
 185         pAd->EepromAccess = TRUE;
 186     }
 187 //2008/09/11:KH add to support efuse<--
 188 //2008/09/11:KH add to support efuse-->
 189 {
 190     Offset /= 2;
 191     // reset bits and set EECS
 192     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 193     x &= ~(EEDI | EEDO | EESK);
 194     x |= EECS;
 195     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 196
 197         // patch can not access e-Fuse issue
 198     if (!IS_RT3090(pAd))
 199     {
 200         // kick a pulse
 201         RaiseClock(pAd, &x);
 202         LowerClock(pAd, &x);
 203     }
 204
 205     // output the read_opcode and register number in that order
 206     ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
 207     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 208
 209     // Now read the data (16 bits) in from the selected EEPROM word
 210     data = ShiftInBits(pAd);
 211
 212     EEpromCleanup(pAd);
 213
 214         // Antenna and EEPROM access are both using EESK pin,
 215     // Therefor we should avoid accessing EESK at the same time
 216     // Then restore antenna after EEPROM access
 217         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 218     {
 219             pAd->EepromAccess = FALSE;
 220             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 221     }
 222 }
 223     return data;
 224 }       //ReadEEprom
 225
 226 VOID RTMP_EEPROM_WRITE16(
 227     IN  PRTMP_ADAPTER   pAd,
 228     IN  USHORT Offset,
 229     IN  USHORT Data)
 230 {
 231     UINT32 x;
 232
 233         if (pAd->NicConfig2.field.AntDiversity)
 234     {
 235         pAd->EepromAccess = TRUE;
 236     }
 237         //2008/09/11:KH add to support efuse<--
 238 //2008/09/11:KH add to support efuse-->
 239         {
 240         Offset /= 2;
 241
 242         EWEN(pAd);
 243
 244     // reset bits and set EECS
 245     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 246     x &= ~(EEDI | EEDO | EESK);
 247     x |= EECS;
 248     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 249
 250         // patch can not access e-Fuse issue
 251     if (!IS_RT3090(pAd))
 252     {
 253         // kick a pulse
 254         RaiseClock(pAd, &x);
 255         LowerClock(pAd, &x);
 256     }
 257
 258     // output the read_opcode ,register number and data in that order
 259     ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
 260     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 261         ShiftOutBits(pAd, Data, 16);            // 16-bit access
 262
 263     // read DO status
 264     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 265
 266         EEpromCleanup(pAd);
 267
 268         RTMPusecDelay(10000);   //delay for twp(MAX)=10ms
 269
 270         EWDS(pAd);
 271
 272     EEpromCleanup(pAd);
 273
 274         // Antenna and EEPROM access are both using EESK pin,
 275     // Therefor we should avoid accessing EESK at the same time
 276     // Then restore antenna after EEPROM access
 277         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 278     {
 279             pAd->EepromAccess = FALSE;
 280             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 281     }
 282 }
 283 }
 284
 285 //2008/09/11:KH add to support efuse<--
 286 #ifdef RT30xx
 287 /*
 288         ========================================================================
 289
 290         Routine Description:
 291
 292         Arguments:
 293
 294         Return Value:
 295
 296         IRQL =
 297
 298         Note:
 299
 300         ========================================================================
 301 */
 302 UCHAR eFuseReadRegisters(
 303         IN      PRTMP_ADAPTER   pAd,
 304         IN      USHORT Offset,
 305         IN      USHORT Length,
 306         OUT     USHORT* pData)
 307 {
 308         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 309         int     i;
 310         USHORT  efuseDataOffset;
 311         UINT32  data;
 312
 313         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 314
 315         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 316         //Use the eeprom logical address and covert to address to block number
 317         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 318
 319         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.
 320         eFuseCtrlStruc.field.EFSROM_MODE = 0;
 321
 322         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 323         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 324
 325         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 326         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 327
 328         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 329         i = 0;
 330         while(i < 100)
 331         {
 332                 //rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);
 333                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 334                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 335                 {
 336                         break;
 337                 }
 338                 RTMPusecDelay(2);
 339                 i++;
 340         }
 341
 342         //if EFSROM_AOUT is not found in physical address, write 0xffff
 343         if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
 344         {
 345                 for(i=0; i<Length/2; i++)
 346                         *(pData+2*i) = 0xffff;
 347         }
 348         else
 349         {
 350                 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)
 351                 efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 352                 //data hold 4 bytes data.
 353                 //In RTMP_IO_READ32 will automatically execute 32-bytes swapping
 354                 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 355                 //Decide the upper 2 bytes or the bottom 2 bytes.
 356                 // Little-endian                S       |       S       Big-endian
 357                 // addr 3       2       1       0       |       0       1       2       3
 358                 // Ori-V        D       C       B       A       |       A       B       C       D
 359                 //After swapping
 360                 //              D       C       B       A       |       D       C       B       A
 361                 //Return 2-bytes
 362                 //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
 363                 //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
 364                 data = data >> (8*(Offset & 0x3));
 365
 366                 NdisMoveMemory(pData, &data, Length);
 367         }
 368
 369         return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
 370
 371 }
 372
 373 /*
 374         ========================================================================
 375
 376         Routine Description:
 377
 378         Arguments:
 379
 380         Return Value:
 381
 382         IRQL =
 383
 384         Note:
 385
 386         ========================================================================
 387 */
 388 VOID eFusePhysicalReadRegisters(
 389         IN      PRTMP_ADAPTER   pAd,
 390         IN      USHORT Offset,
 391         IN      USHORT Length,
 392         OUT     USHORT* pData)
 393 {
 394         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 395         int     i;
 396         USHORT  efuseDataOffset;
 397         UINT32  data;
 398
 399         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 400
 401         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 402         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 403
 404         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 405         //Read in physical view
 406         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 407
 408         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 409         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 410
 411         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 412         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 413
 414         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 415         i = 0;
 416         while(i < 100)
 417         {
 418                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 419                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 420                         break;
 421                 RTMPusecDelay(2);
 422                 i++;
 423         }
 424
 425         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 426         //Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.
 427         //The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes
 428         //Decide which EFUSE_DATA to read
 429         //590:F E D C
 430         //594:B A 9 8
 431         //598:7 6 5 4
 432         //59C:3 2 1 0
 433         efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 434
 435         RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 436
 437         data = data >> (8*(Offset & 0x3));
 438
 439         NdisMoveMemory(pData, &data, Length);
 440
 441 }
 442
 443 /*
 444         ========================================================================
 445
 446         Routine Description:
 447
 448         Arguments:
 449
 450         Return Value:
 451
 452         IRQL =
 453
 454         Note:
 455
 456         ========================================================================
 457 */
 458 VOID eFuseReadPhysical(
 459         IN      PRTMP_ADAPTER   pAd,
 460         IN      PUSHORT lpInBuffer,
 461         IN      ULONG nInBufferSize,
 462         OUT     PUSHORT lpOutBuffer,
 463         IN      ULONG nOutBufferSize
 464 )
 465 {
 466         USHORT* pInBuf = (USHORT*)lpInBuffer;
 467         USHORT* pOutBuf = (USHORT*)lpOutBuffer;
 468
 469         USHORT Offset = pInBuf[0];                                      //addr
 470         USHORT Length = pInBuf[1];                                      //length
 471         int             i;
 472
 473         for(i=0; i<Length; i+=2)
 474         {
 475                 eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);
 476         }
 477 }
 478
 479 /*
 480         ========================================================================
 481
 482         Routine Description:
 483
 484         Arguments:
 485
 486         Return Value:
 487
 488         IRQL =
 489
 490         Note:
 491
 492         ========================================================================
 493 */
 494 NTSTATUS eFuseRead(
 495         IN      PRTMP_ADAPTER   pAd,
 496         IN      USHORT                  Offset,
 497         OUT     PUCHAR                  pData,
 498         IN      USHORT                  Length)
 499 {
 500         USHORT* pOutBuf = (USHORT*)pData;
 501         NTSTATUS        Status = STATUS_SUCCESS;
 502         UCHAR   EFSROM_AOUT;
 503         int     i;
 504
 505         for(i=0; i<Length; i+=2)
 506         {
 507                 EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
 508         }
 509         return Status;
 510 }
 511
 512 /*
 513         ========================================================================
 514
 515         Routine Description:
 516
 517         Arguments:
 518
 519         Return Value:
 520
 521         IRQL =
 522
 523         Note:
 524
 525         ========================================================================
 526 */
 527 VOID eFusePhysicalWriteRegisters(
 528         IN      PRTMP_ADAPTER   pAd,
 529         IN      USHORT Offset,
 530         IN      USHORT Length,
 531         OUT     USHORT* pData)
 532 {
 533         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 534         int     i;
 535         USHORT  efuseDataOffset;
 536         UINT32  data, eFuseDataBuffer[4];
 537
 538         //Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.
 539
 540         /////////////////////////////////////////////////////////////////
 541         //read current values of 16-byte block
 542         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 543
 544         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 545         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 546
 547         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 548         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 549
 550         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 551         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 552
 553         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 554         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 555
 556         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 557         i = 0;
 558         while(i < 100)
 559         {
 560                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 561
 562                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 563                         break;
 564                 RTMPusecDelay(2);
 565                 i++;
 566         }
 567
 568         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 569         efuseDataOffset =  EFUSE_DATA3;
 570         for(i=0; i< 4; i++)
 571         {
 572                 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
 573                 efuseDataOffset -=  4;
 574         }
 575
 576         //Update the value, the offset is multiple of 2, length is 2
 577         efuseDataOffset = (Offset & 0xc) >> 2;
 578         data = pData[0] & 0xffff;
 579         //The offset should be 0x***10 or 0x***00
 580         if((Offset % 4) != 0)
 581         {
 582                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
 583         }
 584         else
 585         {
 586                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
 587         }
 588
 589         efuseDataOffset =  EFUSE_DATA3;
 590         for(i=0; i< 4; i++)
 591         {
 592                 RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);
 593                 efuseDataOffset -= 4;
 594         }
 595         /////////////////////////////////////////////////////////////////
 596
 597         //Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 598         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 599
 600         //Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
 601         eFuseCtrlStruc.field.EFSROM_MODE = 3;
 602
 603         //Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
 604         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 605
 606         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 607         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 608
 609         //Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It¡¦s done.
 610         i = 0;
 611         while(i < 100)
 612         {
 613                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 614
 615                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 616                         break;
 617
 618                 RTMPusecDelay(2);
 619                 i++;
 620         }
 621 }
 622
 623 /*
 624         ========================================================================
 625
 626         Routine Description:
 627
 628         Arguments:
 629
 630         Return Value:
 631
 632         IRQL =
 633
 634         Note:
 635
 636         ========================================================================
 637 */
 638 NTSTATUS eFuseWriteRegisters(
 639         IN      PRTMP_ADAPTER   pAd,
 640         IN      USHORT Offset,
 641         IN      USHORT Length,
 642         IN      USHORT* pData)
 643 {
 644         USHORT  i;
 645         USHORT  eFuseData;
 646         USHORT  LogicalAddress, BlkNum = 0xffff;
 647         UCHAR   EFSROM_AOUT;
 648
 649         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
 650         USHORT buffer[8];
 651         BOOLEAN         bWriteSuccess = TRUE;
 652
 653         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
 654
 655         //Step 0. find the entry in the mapping table
 656         //The address of EEPROM is 2-bytes alignment.
 657         //The last bit is used for alignment, so it must be 0.
 658         tmpOffset = Offset & 0xfffe;
 659         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
 660
 661         if( EFSROM_AOUT == 0x3f)
 662         {       //find available logical address pointer
 663                 //the logical address does not exist, find an empty one
 664                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
 665                 //==>48*16-3(reserved)=2FC
 666                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 667                 {
 668                         //Retrive the logical block nubmer form each logical address pointer
 669                         //It will access two logical address pointer each time.
 670                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 671                         if( (LogicalAddress & 0xff) == 0)
 672                         {//Not used logical address pointer
 673                                 BlkNum = i-EFUSE_USAGE_MAP_START;
 674                                 break;
 675                         }
 676                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
 677                         {//Not used logical address pointer
 678                                 if (i != EFUSE_USAGE_MAP_END)
 679                                 {
 680                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
 681                                 }
 682                                 break;
 683                         }
 684                 }
 685         }
 686         else
 687         {
 688                 BlkNum = EFSROM_AOUT;
 689         }
 690
 691         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
 692
 693         if(BlkNum == 0xffff)
 694         {
 695                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 696                 return FALSE;
 697         }
 698
 699         //Step 1. Save data of this block       which is pointed by the avaible logical address pointer
 700         // read and save the original block data
 701         for(i =0; i<8; i++)
 702         {
 703                 addr = BlkNum * 0x10 ;
 704
 705                 InBuf[0] = addr+2*i;
 706                 InBuf[1] = 2;
 707                 InBuf[2] = 0x0;
 708
 709                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 710
 711                 buffer[i] = InBuf[2];
 712         }
 713
 714         //Step 2. Update the data in buffer, and write the data to Efuse
 715         buffer[ (Offset >> 1) % 8] = pData[0];
 716
 717         do
 718         {
 719                 //Step 3. Write the data to Efuse
 720                 if(!bWriteSuccess)
 721                 {
 722                         for(i =0; i<8; i++)
 723                         {
 724                                 addr = BlkNum * 0x10 ;
 725
 726                                 InBuf[0] = addr+2*i;
 727                                 InBuf[1] = 2;
 728                                 InBuf[2] = buffer[i];
 729
 730                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 731                         }
 732                 }
 733                 else
 734                 {
 735                                 addr = BlkNum * 0x10 ;
 736
 737                                 InBuf[0] = addr+(Offset % 16);
 738                                 InBuf[1] = 2;
 739                                 InBuf[2] = pData[0];
 740
 741                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 742                 }
 743
 744                 //Step 4. Write mapping table
 745                 addr = EFUSE_USAGE_MAP_START+BlkNum;
 746
 747                 tmpaddr = addr;
 748
 749                 if(addr % 2 != 0)
 750                         addr = addr -1;
 751                 InBuf[0] = addr;
 752                 InBuf[1] = 2;
 753
 754                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
 755                 tmpOffset = Offset;
 756                 tmpOffset >>= 4;
 757                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
 758                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
 759
 760                 // write the logical address
 761                 if(tmpaddr%2 != 0)
 762                         InBuf[2] = tmpOffset<<8;
 763                 else
 764                         InBuf[2] = tmpOffset;
 765
 766                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
 767
 768                 //Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
 769                 bWriteSuccess = TRUE;
 770                 for(i =0; i<8; i++)
 771                 {
 772                         addr = BlkNum * 0x10 ;
 773
 774                         InBuf[0] = addr+2*i;
 775                         InBuf[1] = 2;
 776                         InBuf[2] = 0x0;
 777
 778                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 779
 780                         if(buffer[i] != InBuf[2])
 781                         {
 782                                 bWriteSuccess = FALSE;
 783                                 break;
 784                         }
 785                 }
 786
 787                 //Step 6. invlidate mapping entry and find a free mapping entry if not succeed
 788                 if (!bWriteSuccess)
 789                 {
 790                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
 791
 792                         // the offset of current mapping entry
 793                         addr = EFUSE_USAGE_MAP_START+BlkNum;
 794
 795                         //find a new mapping entry
 796                         BlkNum = 0xffff;
 797                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 798                         {
 799                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 800                                 if( (LogicalAddress & 0xff) == 0)
 801                                 {
 802                                         BlkNum = i-EFUSE_USAGE_MAP_START;
 803                                         break;
 804                                 }
 805                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 806                                 {
 807                                         if (i != EFUSE_USAGE_MAP_END)
 808                                         {
 809                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
 810                                         }
 811                                         break;
 812                                 }
 813                         }
 814                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess new BlkNum = %d\n", BlkNum));
 815                         if(BlkNum == 0xffff)
 816                         {
 817                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 818                                 return FALSE;
 819                         }
 820
 821                         //invalidate the original mapping entry if new entry is not found
 822                         tmpaddr = addr;
 823
 824                         if(addr % 2 != 0)
 825                                 addr = addr -1;
 826                         InBuf[0] = addr;
 827                         InBuf[1] = 2;
 828
 829                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 830
 831                         // write the logical address
 832                         if(tmpaddr%2 != 0)
 833                         {
 834                                 // Invalidate the high byte
 835                                 for (i=8; i<15; i++)
 836                                 {
 837                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 838                                         {
 839                                                 InBuf[2] |= (0x1 <<i);
 840                                                 break;
 841                                         }
 842                                 }
 843                         }
 844                         else
 845                         {
 846                                 // invalidate the low byte
 847                                 for (i=0; i<8; i++)
 848                                 {
 849                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 850                                         {
 851                                                 InBuf[2] |= (0x1 <<i);
 852                                                 break;
 853                                         }
 854                                 }
 855                         }
 856                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
 857                 }
 858         }
 859         while(!bWriteSuccess);
 860
 861         return TRUE;
 862 }
 863
 864 /*
 865         ========================================================================
 866
 867         Routine Description:
 868
 869         Arguments:
 870
 871         Return Value:
 872
 873         IRQL =
 874
 875         Note:
 876
 877         ========================================================================
 878 */
 879 VOID eFuseWritePhysical(
 880         IN      PRTMP_ADAPTER   pAd,
 881         PUSHORT lpInBuffer,
 882         ULONG nInBufferSize,
 883         PUCHAR lpOutBuffer,
 884         ULONG nOutBufferSize
 885 )
 886 {
 887         USHORT* pInBuf = (USHORT*)lpInBuffer;
 888         int             i;
 889         //USHORT* pOutBuf = (USHORT*)ioBuffer;
 890
 891         USHORT Offset = pInBuf[0];                                      //addr
 892         USHORT Length = pInBuf[1];                                      //length
 893         USHORT* pValueX = &pInBuf[2];                           //value ...
 894                 // Little-endian                S       |       S       Big-endian
 895                 // addr 3       2       1       0       |       0       1       2       3
 896                 // Ori-V        D       C       B       A       |       A       B       C       D
 897                 //After swapping
 898                 //              D       C       B       A       |       D       C       B       A
 899                 //Both the little and big-endian use the same sequence to write  data.
 900                 //Therefore, we only need swap data when read the data.
 901         for(i=0; i<Length; i+=2)
 902         {
 903                 eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 904         }
 905 }
 906
 907
 908 /*
 909         ========================================================================
 910
 911         Routine Description:
 912
 913         Arguments:
 914
 915         Return Value:
 916
 917         IRQL =
 918
 919         Note:
 920
 921         ========================================================================
 922 */
 923 NTSTATUS eFuseWrite(
 924         IN      PRTMP_ADAPTER   pAd,
 925         IN      USHORT                  Offset,
 926         IN      PUCHAR                  pData,
 927         IN      USHORT                  length)
 928 {
 929         int i;
 930
 931         USHORT* pValueX = (PUSHORT) pData;                              //value ...
 932                 //The input value=3070 will be stored as following
 933                 // Little-endian                S       |       S       Big-endian
 934                 // addr                 1       0       |       0       1
 935                 // Ori-V                        30      70      |       30      70
 936                 //After swapping
 937                 //                              30      70      |       70      30
 938                 //Casting
 939                 //                              3070    |       7030 (x)
 940                 //The swapping should be removed for big-endian
 941         for(i=0; i<length; i+=2)
 942         {
 943                 eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 944         }
 945
 946         return TRUE;
 947 }
 948
 949 /*
 950         ========================================================================
 951
 952         Routine Description:
 953
 954         Arguments:
 955
 956         Return Value:
 957
 958         IRQL =
 959
 960         Note:
 961
 962         ========================================================================
 963 */
 964 INT set_eFuseGetFreeBlockCount_Proc(
 965         IN      PRTMP_ADAPTER   pAd,
 966         IN      PUCHAR                  arg)
 967 {
 968         USHORT i;
 969         USHORT  LogicalAddress;
 970         USHORT efusefreenum=0;
 971         if(!pAd->bUseEfuse)
 972                 return FALSE;
 973         for (i = EFUSE_USAGE_MAP_START; i <= EFUSE_USAGE_MAP_END; i+=2)
 974         {
 975                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 976                 if( (LogicalAddress & 0xff) == 0)
 977                 {
 978                         efusefreenum= (UCHAR) (EFUSE_USAGE_MAP_END-i+1);
 979                         break;
 980                 }
 981                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 982                 {
 983                         efusefreenum = (UCHAR) (EFUSE_USAGE_MAP_END-i);
 984                         break;
 985                 }
 986
 987                 if(i == EFUSE_USAGE_MAP_END)
 988                         efusefreenum = 0;
 989         }
 990         printk("efuseFreeNumber is %d\n",efusefreenum);
 991         return TRUE;
 992 }
 993 INT set_eFusedump_Proc(
 994         IN      PRTMP_ADAPTER   pAd,
 995         IN      PUCHAR                  arg)
 996 {
 997 USHORT InBuf[3];
 998         INT i=0;
 999         if(!pAd->bUseEfuse)
1000                 return FALSE;
1001         for(i =0; i<EFUSE_USAGE_MAP_END/2; i++)
1002         {
1003                 InBuf[0] = 2*i;
1004                 InBuf[1] = 2;
1005                 InBuf[2] = 0x0;
1006
1007                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1008                 if(i%4==0)
1009                 printk("\nBlock %x:",i/8);
1010                 printk("%04x ",InBuf[2]);
1011         }
1012         return TRUE;
1013 }
1014 INT     set_eFuseLoadFromBin_Proc(
1015         IN      PRTMP_ADAPTER   pAd,
1016         IN      PUCHAR                  arg)
1017 {
1018         CHAR                                    *src;
1019         struct file                             *srcf;
1020         INT                                     retval, orgfsuid, orgfsgid;
1021         mm_segment_t                    orgfs;
1022         UCHAR                                   *buffer;
1023         UCHAR                                   BinFileSize=0;
1024         INT                                             i = 0,j=0,k=1;
1025         USHORT                                  *PDATA;
1026         USHORT                                  DATA;
1027         BinFileSize=strlen("RT30xxEEPROM.bin");
1028         src = kmalloc(128, MEM_ALLOC_FLAG);
1029         NdisZeroMemory(src, 128);
1030
1031         if(strlen(arg)>0)
1032         {
1033
1034                 NdisMoveMemory(src, arg, strlen(arg));
1035         }
1036
1037         else
1038         {
1039
1040                 NdisMoveMemory(src, "RT30xxEEPROM.bin", BinFileSize);
1041         }
1042
1043         DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
1044         buffer = kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);
1045
1046         if(buffer == NULL)
1047         {
1048                 kfree(src);
1049                  return FALSE;
1050 }
1051         PDATA=kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);
1052
1053         if(PDATA==NULL)
1054         {
1055                 kfree(src);
1056
1057                 kfree(buffer);
1058                 return FALSE;
1059         }
1060         /* Don't change to uid 0, let the file be opened as the "normal" user */
1061 #if 0
1062         orgfsuid = current->fsuid;
1063         orgfsgid = current->fsgid;
1064         current->fsuid=current->fsgid = 0;
1065 #endif
1066         orgfs = get_fs();
1067          set_fs(KERNEL_DS);
1068
1069         if (src && *src)
1070         {
1071                 srcf = filp_open(src, O_RDONLY, 0);
1072                 if (IS_ERR(srcf))
1073                 {
1074                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld opening %s\n", -PTR_ERR(srcf),src));
1075                         return FALSE;
1076                 }
1077                 else
1078                 {
1079                         // The object must have a read method
1080                         if (srcf->f_op && srcf->f_op->read)
1081                         {
1082                                 memset(buffer, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
1083                                 while(srcf->f_op->read(srcf, &buffer[i], 1, &srcf->f_pos)==1)
1084                                 {
1085                                         DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[i]));
1086                                         if((i+1)%8==0)
1087                                                 DBGPRINT(RT_DEBUG_TRACE, ("\n"));
1088                                 i++;
1089                                                 if(i>=MAX_EEPROM_BIN_FILE_SIZE)
1090                                                         {
1091                                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld reading %s, The file is too large[1024]\n", -PTR_ERR(srcf),src));
1092                                                                 kfree(PDATA);
1093                                                                 kfree(buffer);
1094                                                                 kfree(src);
1095                                                                 return FALSE;
1096                                                         }
1097                                }
1098                         }
1099                         else
1100                         {
1101                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error!! System doest not support read function\n"));
1102                                                 kfree(PDATA);
1103                                                 kfree(buffer);
1104                                                 kfree(src);
1105                                                 return FALSE;
1106                         }
1107                 }
1108
1109
1110         }
1111         else
1112                 {
1113                                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error src  or srcf is null\n"));
1114                                         kfree(PDATA);
1115                                         kfree(buffer);
1116                                         return FALSE;
1117
1118                 }
1119
1120
1121         retval=filp_close(srcf,NULL);
1122
1123         if (retval)
1124         {
1125                 DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
1126         }
1127         set_fs(orgfs);
1128 #if 0
1129         current->fsuid = orgfsuid;
1130         current->fsgid = orgfsgid;
1131 #endif
1132         for(j=0;j<i;j++)
1133         {
1134                 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[j]));
1135                 if((j+1)%2==0)
1136                         PDATA[j/2%8]=((buffer[j]<<8)&0xff00)|(buffer[j-1]&0xff);
1137                 if(j%16==0)
1138                 {
1139                         k=buffer[j];
1140                 }
1141                 else
1142                 {
1143                         k&=buffer[j];
1144                         if((j+1)%16==0)
1145                         {
1146
1147                                 DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",k,j/16));
1148
1149                                 if(k!=0xff)
1150                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1151                                 else
1152                                         {
1153                                                 if(eFuseReadRegisters(pAd,j, 2,(PUSHORT)&DATA)!=0x3f)
1154                                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1155                                         }
1156                                 /*
1157                                 for(l=0;l<8;l++)
1158                                         printk("%04x ",PDATA[l]);
1159                                 printk("\n");
1160                                 */
1161                                 NdisZeroMemory(PDATA,16);
1162
1163
1164                         }
1165                 }
1166
1167
1168         }
1169
1170
1171         kfree(PDATA);
1172         kfree(buffer);
1173         kfree(src);
1174         return TRUE;
1175 }
1176 NTSTATUS eFuseWriteRegistersFromBin(
1177         IN      PRTMP_ADAPTER   pAd,
1178         IN      USHORT Offset,
1179         IN      USHORT Length,
1180         IN      USHORT* pData)
1181 {
1182         USHORT  i;
1183         USHORT  eFuseData;
1184         USHORT  LogicalAddress, BlkNum = 0xffff;
1185         UCHAR   EFSROM_AOUT,Loop=0;
1186         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
1187         USHORT  efuseDataOffset;
1188         UINT32  data,tempbuffer;
1189         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
1190         UINT32 buffer[4];
1191         BOOLEAN         bWriteSuccess = TRUE;
1192         BOOLEAN         bNotWrite=TRUE;
1193         BOOLEAN         bAllocateNewBlk=TRUE;
1194
1195         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
1196
1197         do
1198         {
1199         //Step 0. find the entry in the mapping table
1200         //The address of EEPROM is 2-bytes alignment.
1201         //The last bit is used for alignment, so it must be 0.
1202         Loop++;
1203         tmpOffset = Offset & 0xfffe;
1204         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
1205
1206         if( EFSROM_AOUT == 0x3f)
1207         {       //find available logical address pointer
1208                 //the logical address does not exist, find an empty one
1209                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
1210                 //==>48*16-3(reserved)=2FC
1211                 bAllocateNewBlk=TRUE;
1212                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1213                 {
1214                         //Retrive the logical block nubmer form each logical address pointer
1215                         //It will access two logical address pointer each time.
1216                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1217                         if( (LogicalAddress & 0xff) == 0)
1218                         {//Not used logical address pointer
1219                                 BlkNum = i-EFUSE_USAGE_MAP_START;
1220                                 break;
1221                         }
1222                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
1223                         {//Not used logical address pointer
1224                                 if (i != EFUSE_USAGE_MAP_END)
1225                                 {
1226                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
1227                                 }
1228                                 break;
1229                         }
1230                 }
1231         }
1232         else
1233         {
1234                 bAllocateNewBlk=FALSE;
1235                 BlkNum = EFSROM_AOUT;
1236         }
1237
1238         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
1239
1240         if(BlkNum == 0xffff)
1241         {
1242                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
1243                 return FALSE;
1244         }
1245         //Step 1.1.0
1246         //If the block is not existing in mapping table, create one
1247         //and write down the 16-bytes data to the new block
1248         if(bAllocateNewBlk)
1249         {
1250                 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
1251                 efuseDataOffset =  EFUSE_DATA3;
1252                 for(i=0; i< 4; i++)
1253                 {
1254                         DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
1255                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1256
1257
1258                         RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);
1259                         efuseDataOffset -= 4;
1260
1261                 }
1262                 /////////////////////////////////////////////////////////////////
1263
1264                 //Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1265                 eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
1266
1267                 //Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
1268                 eFuseCtrlStruc.field.EFSROM_MODE = 3;
1269
1270                 //Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
1271                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1272
1273                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1274
1275                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1276
1277                 //Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It¡¦s done.
1278                 i = 0;
1279                 while(i < 100)
1280                 {
1281                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1282
1283                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1284                                 break;
1285
1286                         RTMPusecDelay(2);
1287                         i++;
1288                 }
1289
1290         }
1291         else
1292         {       //Step1.2.
1293                 //If the same logical number is existing, check if the writting data and the data
1294                 //saving in this block are the same.
1295                 /////////////////////////////////////////////////////////////////
1296                 //read current values of 16-byte block
1297                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1298
1299                 //Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1300                 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
1301
1302                 //Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
1303                 eFuseCtrlStruc.field.EFSROM_MODE = 0;
1304
1305                 //Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
1306                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1307
1308                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1309                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1310
1311                 //Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
1312                 i = 0;
1313                 while(i < 100)
1314                 {
1315                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1316
1317                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1318                                 break;
1319                         RTMPusecDelay(2);
1320                         i++;
1321                 }
1322
1323                 //Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
1324                 efuseDataOffset =  EFUSE_DATA3;
1325                 for(i=0; i< 4; i++)
1326                 {
1327                         RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
1328                         efuseDataOffset -=  4;
1329                 }
1330                 //Step1.2.5. Check if the data of efuse and the writing data are the same.
1331                 for(i =0; i<4; i++)
1332                 {
1333                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1334                         DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
1335
1336                         if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
1337                                 bNotWrite&=TRUE;
1338                         else
1339                         {
1340                                 bNotWrite&=FALSE;
1341                                 break;
1342                         }
1343                 }
1344                 if(!bNotWrite)
1345                 {
1346                 printk("The data is not the same\n");
1347
1348                         for(i =0; i<8; i++)
1349                         {
1350                                 addr = BlkNum * 0x10 ;
1351
1352                                 InBuf[0] = addr+2*i;
1353                                 InBuf[1] = 2;
1354                                 InBuf[2] = pData[i];
1355
1356                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
1357                         }
1358
1359                 }
1360                 else
1361                         return TRUE;
1362              }
1363
1364
1365
1366                 //Step 2. Write mapping table
1367                 addr = EFUSE_USAGE_MAP_START+BlkNum;
1368
1369                 tmpaddr = addr;
1370
1371                 if(addr % 2 != 0)
1372                         addr = addr -1;
1373                 InBuf[0] = addr;
1374                 InBuf[1] = 2;
1375
1376                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
1377                 tmpOffset = Offset;
1378                 tmpOffset >>= 4;
1379                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
1380                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
1381
1382                 // write the logical address
1383                 if(tmpaddr%2 != 0)
1384                         InBuf[2] = tmpOffset<<8;
1385                 else
1386                         InBuf[2] = tmpOffset;
1387
1388                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
1389
1390                 //Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
1391                 bWriteSuccess = TRUE;
1392                 for(i =0; i<8; i++)
1393                 {
1394                         addr = BlkNum * 0x10 ;
1395
1396                         InBuf[0] = addr+2*i;
1397                         InBuf[1] = 2;
1398                         InBuf[2] = 0x0;
1399
1400                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1401                         DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
1402                         if(pData[i] != InBuf[2])
1403                         {
1404                                 bWriteSuccess = FALSE;
1405                                 break;
1406                         }
1407                 }
1408
1409                 //Step 4. invlidate mapping entry and find a free mapping entry if not succeed
1410
1411                 if (!bWriteSuccess&&Loop<2)
1412                 {
1413                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
1414
1415                         // the offset of current mapping entry
1416                         addr = EFUSE_USAGE_MAP_START+BlkNum;
1417
1418                         //find a new mapping entry
1419                         BlkNum = 0xffff;
1420                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1421                         {
1422                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1423                                 if( (LogicalAddress & 0xff) == 0)
1424                                 {
1425                                         BlkNum = i-EFUSE_USAGE_MAP_START;
1426                                         break;
1427                                 }
1428                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1429                                 {
1430                                         if (i != EFUSE_USAGE_MAP_END)
1431                                         {
1432                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
1433                                         }
1434                                         break;
1435                                 }
1436                         }
1437                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));
1438                         if(BlkNum == 0xffff)
1439                         {
1440                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
1441                                 return FALSE;
1442                         }
1443
1444                         //invalidate the original mapping entry if new entry is not found
1445                         tmpaddr = addr;
1446
1447                         if(addr % 2 != 0)
1448                                 addr = addr -1;
1449                         InBuf[0] = addr;
1450                         InBuf[1] = 2;
1451
1452                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1453
1454                         // write the logical address
1455                         if(tmpaddr%2 != 0)
1456                         {
1457                                 // Invalidate the high byte
1458                                 for (i=8; i<15; i++)
1459                                 {
1460                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1461                                         {
1462                                                 InBuf[2] |= (0x1 <<i);
1463                                                 break;
1464                                         }
1465                                 }
1466                         }
1467                         else
1468                         {
1469                                 // invalidate the low byte
1470                                 for (i=0; i<8; i++)
1471                                 {
1472                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1473                                         {
1474                                                 InBuf[2] |= (0x1 <<i);
1475                                                 break;
1476                                         }
1477                                 }
1478                         }
1479                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
1480                 }
1481
1482         }
1483         while(!bWriteSuccess&&Loop<2);
1484
1485         return TRUE;
1486 }
1487
1488 #endif // RT30xx //
1489 //2008/09/11:KH add to support efuse-->
1490