2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
41 #include "../firmware.h"
43 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
44 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
45 0x00000010, 0x00000020, 0x00000040, 0x00000080,
46 0x00000100, 0x00000200, 0x00000400, 0x00000800,
47 0x00001000, 0x00002000, 0x00004000, 0x00008000,
48 0x00010000, 0x00020000, 0x00040000, 0x00080000,
49 0x00100000, 0x00200000, 0x00400000, 0x00800000,
50 0x01000000, 0x02000000, 0x04000000, 0x08000000,
51 0x10000000, 0x20000000, 0x40000000, 0x80000000};
53 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
55 const unsigned short ccitt_16Table[] = {
56 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
57 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
58 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
59 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
60 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
61 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
62 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
63 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
64 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
65 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
66 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
67 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
68 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
69 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
70 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
71 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
72 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
73 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
74 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
75 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
76 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
77 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
78 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
79 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
80 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
81 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
82 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
83 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
84 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
85 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
86 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
87 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
89 #define ByteCRC16(v, crc) \
90 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
92 unsigned char BitReverse(unsigned char x)
98 if(x & 0x80) Temp |= 0x80;
107 // BBP register initialization set
109 REG_PAIR BBPRegTable[] = {
110 {BBP_R65, 0x2C}, // fix rssi issue
111 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
113 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
118 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
119 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
120 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
121 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
122 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
123 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
125 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
128 // RF register initialization set
131 REG_PAIR RT30xx_RFRegTable[] = {
152 #define NUM_RF_REG_PARMS (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
156 // ASIC register initialization sets
159 RTMP_REG_PAIR MACRegTable[] = {
160 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
161 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
162 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
163 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
164 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
165 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
167 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
168 #endif // HW_BEACON_OFFSET //
170 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
171 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
172 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
173 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
174 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
175 //{TX_SW_CFG0, 0x40a06}, // Gary,2006-08-23
176 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
177 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
178 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
179 {TX_TIMEOUT_CFG, 0x000a2090},
180 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
181 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
182 // {WMM_AIFSN_CFG, 0x00002273},
183 // {WMM_CWMIN_CFG, 0x00002344},
184 // {WMM_CWMAX_CFG, 0x000034aa},
185 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
186 //{TX_RTY_CFG, 0x6bb80408}, // Jan, 2006/11/16
187 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
188 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
189 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
190 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
191 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
193 {PBF_CFG, 0xf40006}, // Only enable Queue 2
194 {MM40_PROT_CFG, 0x3F44084}, // Initial Auto_Responder, because QA will turn off Auto-Responder
195 {WPDMA_GLO_CFG, 0x00000030},
197 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
198 {GF40_PROT_CFG, 0x03F44084},
199 {MM20_PROT_CFG, 0x01744004},
200 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
201 {TX_RTS_CFG, 0x00092b20},
203 {EXP_ACK_TIME, 0x002400ca}, // default value
205 // {EXP_ACK_TIME, 0x005400ca}, // suggested by Gray @ 20070323 for 11n intel-sta throughput
206 //#endif // end - WIFI_TEST //
207 {TXOP_HLDR_ET, 0x00000002},
209 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
210 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
211 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
212 will always lost. So we change the SIFS of CCK from 10us to 16us. */
213 {XIFS_TIME_CFG, 0x33a41010},
214 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
217 RTMP_REG_PAIR STAMACRegTable[] = {
218 {WMM_AIFSN_CFG, 0x00002273},
219 {WMM_CWMIN_CFG, 0x00002344},
220 {WMM_CWMAX_CFG, 0x000034aa},
223 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
224 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
228 // RT2870 Firmware Spec only used 1 oct for version expression
230 #define FIRMWARE_MINOR_VERSION 7
234 // New 8k byte firmware size for RT3071/RT3072
235 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
236 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
237 #define FIRMWARE_MAJOR_VERSION 0
239 #define FIRMWAREIMAGEV1_LENGTH 0x1000
240 #define FIRMWAREIMAGEV2_LENGTH 0x1000
245 ========================================================================
248 Allocate RTMP_ADAPTER data block and do some initialization
251 Adapter Pointer to our adapter
261 ========================================================================
263 NDIS_STATUS RTMPAllocAdapterBlock(
265 OUT PRTMP_ADAPTER *ppAdapter)
270 UCHAR *pBeaconBuf = NULL;
272 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
278 // Allocate RTMP_ADAPTER memory block
279 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
280 if (pBeaconBuf == NULL)
282 Status = NDIS_STATUS_FAILURE;
283 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
287 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
288 if (Status != NDIS_STATUS_SUCCESS)
290 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
293 pAd->BeaconBuf = pBeaconBuf;
294 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
298 NdisAllocateSpinLock(&pAd->MgmtRingLock);
300 for (index =0 ; index < NUM_OF_TX_RING; index++)
302 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
303 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
304 pAd->DeQueueRunning[index] = FALSE;
307 NdisAllocateSpinLock(&pAd->irq_lock);
311 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
316 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
321 ========================================================================
324 Read initial Tx power per MCS and BW from EEPROM
327 Adapter Pointer to our adapter
336 ========================================================================
338 VOID RTMPReadTxPwrPerRate(
339 IN PRTMP_ADAPTER pAd)
341 ULONG data, Adata, Gdata;
342 USHORT i, value, value2;
343 INT Apwrdelta, Gpwrdelta;
345 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
348 // Get power delta for 20MHz and 40MHz.
350 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
351 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
355 if ((value2 & 0xff) != 0xff)
358 Gpwrdelta = (value2&0xf);
361 bGpwrdeltaMinus = FALSE;
363 bGpwrdeltaMinus = TRUE;
365 if ((value2 & 0xff00) != 0xff00)
367 if ((value2 & 0x8000))
368 Apwrdelta = ((value2&0xf00)>>8);
370 if ((value2 & 0x4000))
371 bApwrdeltaMinus = FALSE;
373 bApwrdeltaMinus = TRUE;
375 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
378 // Get Txpower per MCS for 20MHz in 2.4G.
382 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
384 if (bApwrdeltaMinus == FALSE)
386 t1 = (value&0xf)+(Apwrdelta);
389 t2 = ((value&0xf0)>>4)+(Apwrdelta);
392 t3 = ((value&0xf00)>>8)+(Apwrdelta);
395 t4 = ((value&0xf000)>>12)+(Apwrdelta);
401 if ((value&0xf) > Apwrdelta)
402 t1 = (value&0xf)-(Apwrdelta);
405 if (((value&0xf0)>>4) > Apwrdelta)
406 t2 = ((value&0xf0)>>4)-(Apwrdelta);
409 if (((value&0xf00)>>8) > Apwrdelta)
410 t3 = ((value&0xf00)>>8)-(Apwrdelta);
413 if (((value&0xf000)>>12) > Apwrdelta)
414 t4 = ((value&0xf000)>>12)-(Apwrdelta);
418 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
419 if (bGpwrdeltaMinus == FALSE)
421 t1 = (value&0xf)+(Gpwrdelta);
424 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
427 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
430 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
436 if ((value&0xf) > Gpwrdelta)
437 t1 = (value&0xf)-(Gpwrdelta);
440 if (((value&0xf0)>>4) > Gpwrdelta)
441 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
444 if (((value&0xf00)>>8) > Gpwrdelta)
445 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
448 if (((value&0xf000)>>12) > Gpwrdelta)
449 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
453 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
455 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
456 if (bApwrdeltaMinus == FALSE)
458 t1 = (value&0xf)+(Apwrdelta);
461 t2 = ((value&0xf0)>>4)+(Apwrdelta);
464 t3 = ((value&0xf00)>>8)+(Apwrdelta);
467 t4 = ((value&0xf000)>>12)+(Apwrdelta);
473 if ((value&0xf) > Apwrdelta)
474 t1 = (value&0xf)-(Apwrdelta);
477 if (((value&0xf0)>>4) > Apwrdelta)
478 t2 = ((value&0xf0)>>4)-(Apwrdelta);
481 if (((value&0xf00)>>8) > Apwrdelta)
482 t3 = ((value&0xf00)>>8)-(Apwrdelta);
485 if (((value&0xf000)>>12) > Apwrdelta)
486 t4 = ((value&0xf000)>>12)-(Apwrdelta);
490 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
491 if (bGpwrdeltaMinus == FALSE)
493 t1 = (value&0xf)+(Gpwrdelta);
496 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
499 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
502 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
508 if ((value&0xf) > Gpwrdelta)
509 t1 = (value&0xf)-(Gpwrdelta);
512 if (((value&0xf0)>>4) > Gpwrdelta)
513 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
516 if (((value&0xf00)>>8) > Gpwrdelta)
517 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
520 if (((value&0xf000)>>12) > Gpwrdelta)
521 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
525 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
528 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
529 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
531 if (data != 0xffffffff)
532 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
533 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
537 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
542 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
543 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
551 // Get Txpower per MCS for 40MHz in 2.4G.
557 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
558 if (bGpwrdeltaMinus == FALSE)
560 t1 = (value&0xf)+(Gpwrdelta);
563 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
566 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
569 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
575 if ((value&0xf) > Gpwrdelta)
576 t1 = (value&0xf)-(Gpwrdelta);
579 if (((value&0xf0)>>4) > Gpwrdelta)
580 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
583 if (((value&0xf00)>>8) > Gpwrdelta)
584 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
587 if (((value&0xf000)>>12) > Gpwrdelta)
588 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
592 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
594 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
595 if (bGpwrdeltaMinus == FALSE)
597 t1 = (value&0xf)+(Gpwrdelta);
600 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
603 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
606 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
612 if ((value&0xf) > Gpwrdelta)
613 t1 = (value&0xf)-(Gpwrdelta);
616 if (((value&0xf0)>>4) > Gpwrdelta)
617 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
620 if (((value&0xf00)>>8) > Gpwrdelta)
621 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
624 if (((value&0xf000)>>12) > Gpwrdelta)
625 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
629 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
632 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
634 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
636 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
641 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
646 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
647 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
655 // Get Txpower per MCS for 20MHz in 5G.
661 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
662 if (bApwrdeltaMinus == FALSE)
664 t1 = (value&0xf)+(Apwrdelta);
667 t2 = ((value&0xf0)>>4)+(Apwrdelta);
670 t3 = ((value&0xf00)>>8)+(Apwrdelta);
673 t4 = ((value&0xf000)>>12)+(Apwrdelta);
679 if ((value&0xf) > Apwrdelta)
680 t1 = (value&0xf)-(Apwrdelta);
683 if (((value&0xf0)>>4) > Apwrdelta)
684 t2 = ((value&0xf0)>>4)-(Apwrdelta);
687 if (((value&0xf00)>>8) > Apwrdelta)
688 t3 = ((value&0xf00)>>8)-(Apwrdelta);
691 if (((value&0xf000)>>12) > Apwrdelta)
692 t4 = ((value&0xf000)>>12)-(Apwrdelta);
696 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
698 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
699 if (bApwrdeltaMinus == FALSE)
701 t1 = (value&0xf)+(Apwrdelta);
704 t2 = ((value&0xf0)>>4)+(Apwrdelta);
707 t3 = ((value&0xf00)>>8)+(Apwrdelta);
710 t4 = ((value&0xf000)>>12)+(Apwrdelta);
716 if ((value&0xf) > Apwrdelta)
717 t1 = (value&0xf)-(Apwrdelta);
720 if (((value&0xf0)>>4) > Apwrdelta)
721 t2 = ((value&0xf0)>>4)-(Apwrdelta);
724 if (((value&0xf00)>>8) > Apwrdelta)
725 t3 = ((value&0xf00)>>8)-(Apwrdelta);
728 if (((value&0xf000)>>12) > Apwrdelta)
729 t4 = ((value&0xf000)>>12)-(Apwrdelta);
733 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
736 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
738 pAd->Tx20MPwrCfgABand[i] = Adata;
740 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
745 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
750 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
751 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
759 // Get Txpower per MCS for 40MHz in 5G.
765 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
766 if (bApwrdeltaMinus == FALSE)
768 t1 = (value&0xf)+(Apwrdelta);
771 t2 = ((value&0xf0)>>4)+(Apwrdelta);
774 t3 = ((value&0xf00)>>8)+(Apwrdelta);
777 t4 = ((value&0xf000)>>12)+(Apwrdelta);
783 if ((value&0xf) > Apwrdelta)
784 t1 = (value&0xf)-(Apwrdelta);
787 if (((value&0xf0)>>4) > Apwrdelta)
788 t2 = ((value&0xf0)>>4)-(Apwrdelta);
791 if (((value&0xf00)>>8) > Apwrdelta)
792 t3 = ((value&0xf00)>>8)-(Apwrdelta);
795 if (((value&0xf000)>>12) > Apwrdelta)
796 t4 = ((value&0xf000)>>12)-(Apwrdelta);
800 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
802 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
803 if (bApwrdeltaMinus == FALSE)
805 t1 = (value&0xf)+(Apwrdelta);
808 t2 = ((value&0xf0)>>4)+(Apwrdelta);
811 t3 = ((value&0xf00)>>8)+(Apwrdelta);
814 t4 = ((value&0xf000)>>12)+(Apwrdelta);
820 if ((value&0xf) > Apwrdelta)
821 t1 = (value&0xf)-(Apwrdelta);
824 if (((value&0xf0)>>4) > Apwrdelta)
825 t2 = ((value&0xf0)>>4)-(Apwrdelta);
828 if (((value&0xf00)>>8) > Apwrdelta)
829 t3 = ((value&0xf00)>>8)-(Apwrdelta);
832 if (((value&0xf000)>>12) > Apwrdelta)
833 t4 = ((value&0xf000)>>12)-(Apwrdelta);
837 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
840 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
842 pAd->Tx40MPwrCfgABand[i+1] = Adata;
844 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
851 ========================================================================
854 Read initial channel power parameters from EEPROM
857 Adapter Pointer to our adapter
866 ========================================================================
868 VOID RTMPReadChannelPwr(
869 IN PRTMP_ADAPTER pAd)
872 EEPROM_TX_PWR_STRUC Power;
873 EEPROM_TX_PWR_STRUC Power2;
875 // Read Tx power value for all channels
876 // Value from 1 - 0x7f. Default value is 24.
877 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
878 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
880 // 0. 11b/g, ch1 - ch 14
881 for (i = 0; i < 7; i++)
883 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2);
884 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2);
885 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
886 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
887 pAd->TxPower[i * 2].Channel = i * 2 + 1;
888 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
890 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
891 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
893 pAd->TxPower[i * 2].Power = Power.field.Byte0;
895 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
896 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
898 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
900 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
901 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
903 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
905 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
906 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
908 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
911 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
912 // 1.1 Fill up channel
914 for (i = 0; i < 4; i++)
916 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
917 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
918 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
920 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
921 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
922 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
924 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
925 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
926 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
930 for (i = 0; i < 6; i++)
932 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2);
933 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2);
934 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
935 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
937 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
938 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
940 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
941 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
943 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
944 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
946 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
947 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
950 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
951 // 2.1 Fill up channel
953 for (i = 0; i < 5; i++)
955 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
956 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
957 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
959 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
960 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
961 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
963 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
964 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
965 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
967 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
968 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
969 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
972 for (i = 0; i < 8; i++)
974 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
975 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
976 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
977 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
979 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
980 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
982 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
983 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
985 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
986 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
988 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
989 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
992 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
993 // 3.1 Fill up channel
994 choffset = 14 + 12 + 16;
995 for (i = 0; i < 2; i++)
997 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
998 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
999 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
1001 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
1002 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
1003 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
1005 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
1006 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
1007 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
1009 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
1010 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
1011 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
1013 // 3.2 Fill up power
1014 for (i = 0; i < 4; i++)
1016 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
1017 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
1018 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1019 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1021 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1022 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1024 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1025 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1027 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1028 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1030 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1031 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1034 // 4. Print and Debug
1035 choffset = 14 + 12 + 16 + 7;
1040 ========================================================================
1042 Routine Description:
1043 Read the following from the registry
1044 1. All the parameters
1048 Adapter Pointer to our adapter
1049 WrapperConfigurationContext For use by NdisOpenConfiguration
1054 NDIS_STATUS_RESOURCES
1056 IRQL = PASSIVE_LEVEL
1060 ========================================================================
1062 NDIS_STATUS NICReadRegParameters(
1063 IN PRTMP_ADAPTER pAd,
1064 IN NDIS_HANDLE WrapperConfigurationContext
1067 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1068 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1075 ========================================================================
1077 Routine Description:
1078 For RF filter calibration purpose
1081 pAd Pointer to our adapter
1086 IRQL = PASSIVE_LEVEL
1088 ========================================================================
1090 VOID RTMPFilterCalibration(
1091 IN PRTMP_ADAPTER pAd)
1093 UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1094 UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1095 UCHAR RF_R24_Value = 0;
1097 // Give bbp filter initial value
1098 pAd->Mlme.CaliBW20RfR24 = 0x1F;
1099 pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1103 if (loop == 1) //BandWidth = 40 MHz
1105 // Write 0x27 to RF_R24 to program filter
1106 RF_R24_Value = 0x27;
1107 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1109 FilterTarget = 0x15;
1111 FilterTarget = 0x19;
1113 // when calibrate BW40, BBP mask must set to BW40.
1114 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1117 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1120 RT30xxReadRFRegister(pAd, RF_R31, &value);
1122 RT30xxWriteRFRegister(pAd, RF_R31, value);
1124 else //BandWidth = 20 MHz
1126 // Write 0x07 to RF_R24 to program filter
1127 RF_R24_Value = 0x07;
1128 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1130 FilterTarget = 0x13;
1132 FilterTarget = 0x16;
1135 RT30xxReadRFRegister(pAd, RF_R31, &value);
1137 RT30xxWriteRFRegister(pAd, RF_R31, value);
1140 // Write 0x01 to RF_R22 to enable baseband loopback mode
1141 RT30xxReadRFRegister(pAd, RF_R22, &value);
1143 RT30xxWriteRFRegister(pAd, RF_R22, value);
1145 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1146 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1150 // Write 0x90 to BBP_R25 to transmit test tone
1151 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1153 RTMPusecDelay(1000);
1154 // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1155 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1156 R55x = value & 0xFF;
1158 } while ((ReTry++ < 100) && (R55x == 0));
1160 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1161 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1165 // Write 0x90 to BBP_R25 to transmit test tone
1166 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1168 //We need to wait for calibration
1169 RTMPusecDelay(1000);
1170 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1172 if ((R55x - value) < FilterTarget)
1176 else if ((R55x - value) == FilterTarget)
1186 // prevent infinite loop cause driver hang.
1187 if (loopcnt++ > 100)
1189 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1193 // Write RF_R24 to program filter
1194 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1199 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1202 // Store for future usage
1207 //BandWidth = 20 MHz
1208 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1212 //BandWidth = 40 MHz
1213 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1220 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1227 // Set back to initial state
1229 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1231 RT30xxReadRFRegister(pAd, RF_R22, &value);
1233 RT30xxWriteRFRegister(pAd, RF_R22, value);
1235 // set BBP back to BW20
1236 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1238 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1240 DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1246 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1249 // Driver must read EEPROM to get RfIcType before initial RF registers
1250 // Initialize RF register to default value
1251 if (IS_RT3070(pAd) || IS_RT3071(pAd))
1253 // Init RF calibration
1254 // Driver should toggle RF R30 bit7 before init RF registers
1258 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1260 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1261 RTMPusecDelay(1000);
1263 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1265 // Initialize RF register to default value
1266 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1268 RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1274 // Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1275 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1276 data = ((data & 0xF0FFFFFF) | 0x0D000000);
1277 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1279 else if (IS_RT3071(pAd))
1281 // Driver should set RF R6 bit6 on before init RF registers
1282 RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1284 RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1287 RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1289 // RT3071 version E has fixed this issue
1290 if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1292 // patch tx EVM issue temporarily
1293 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1294 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1295 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1299 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1300 data = ((data & 0xE0FFFFFF) | 0x01000000);
1301 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1304 // patch LNA_PE_G1 failed issue
1305 RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1307 RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1310 //For RF filter Calibration
1311 RTMPFilterCalibration(pAd);
1313 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1314 if ((pAd->MACVersion & 0xffff) < 0x0211)
1315 RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1317 // set led open drain enable
1318 RTUSBReadMACRegister(pAd, OPT_14, &data);
1320 RTUSBWriteMACRegister(pAd, OPT_14, data);
1324 // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1325 RT30xxLoadRFNormalModeSetup(pAd);
1334 ========================================================================
1336 Routine Description:
1337 Read initial parameters from EEPROM
1340 Adapter Pointer to our adapter
1345 IRQL = PASSIVE_LEVEL
1349 ========================================================================
1351 VOID NICReadEEPROMParameters(
1352 IN PRTMP_ADAPTER pAd,
1356 USHORT i, value, value2;
1358 EEPROM_TX_PWR_STRUC Power;
1359 EEPROM_VERSION_STRUC Version;
1360 EEPROM_ANTENNA_STRUC Antenna;
1361 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1363 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1365 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1366 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1367 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1369 if((data & 0x30) == 0)
1370 pAd->EEPROMAddressNum = 6; // 93C46
1371 else if((data & 0x30) == 0x10)
1372 pAd->EEPROMAddressNum = 8; // 93C66
1374 pAd->EEPROMAddressNum = 8; // 93C86
1375 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1377 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1378 // MAC address registers according to E2PROM setting
1379 if (mac_addr == NULL ||
1380 strlen(mac_addr) != 17 ||
1381 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1382 mac_addr[11] != ':' || mac_addr[14] != ':')
1384 USHORT Addr01,Addr23,Addr45 ;
1386 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1387 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1388 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1390 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1391 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1392 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1393 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1394 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1395 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1397 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1406 for (j=0; j<MAC_ADDR_LEN; j++)
1408 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1412 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1417 //more conveninet to test mbssid, so ap's bssid &0xf1
1418 if (pAd->PermanentAddress[0] == 0xff)
1419 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1421 //if (pAd->PermanentAddress[5] == 0xff)
1422 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1424 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1425 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1426 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1427 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1428 if (pAd->bLocalAdminMAC == FALSE)
1432 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1433 csr2.field.Byte0 = pAd->CurrentAddress[0];
1434 csr2.field.Byte1 = pAd->CurrentAddress[1];
1435 csr2.field.Byte2 = pAd->CurrentAddress[2];
1436 csr2.field.Byte3 = pAd->CurrentAddress[3];
1437 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1439 csr3.field.Byte4 = pAd->CurrentAddress[4];
1440 csr3.field.Byte5 = pAd->CurrentAddress[5];
1441 csr3.field.U2MeMask = 0xff;
1442 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1443 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1444 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1445 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1446 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1450 // if not return early. cause fail at emulation.
1451 // Init the channel number for TX channel power
1452 RTMPReadChannelPwr(pAd);
1454 // if E2PROM version mismatch with driver's expectation, then skip
1455 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1456 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1457 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1458 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1460 if (Version.field.Version > VALID_EEPROM_VERSION)
1462 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1463 /*pAd->SystemErrorBitmap |= 0x00000001;
1465 // hard-code default value when no proper E2PROM installed
1466 pAd->bAutoTxAgcA = FALSE;
1467 pAd->bAutoTxAgcG = FALSE;
1469 // Default the channel power
1470 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1471 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1473 // Default the channel power
1474 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1475 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1477 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1478 pAd->EEPROMDefaultValue[i] = 0xffff;
1482 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1483 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1484 pAd->EEPROMDefaultValue[0] = value;
1486 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1487 pAd->EEPROMDefaultValue[1] = value;
1489 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1490 pAd->EEPROMDefaultValue[2] = value;
1492 for(i = 0; i < 8; i++)
1494 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1495 pAd->EEPROMDefaultValue[i+3] = value;
1498 // We have to parse NIC configuration 0 at here.
1499 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1500 // Therefore, we have to read TxAutoAgc control beforehand.
1501 // Read Tx AGC control bit
1502 Antenna.word = pAd->EEPROMDefaultValue[0];
1503 if (Antenna.word == 0xFFFF)
1509 Antenna.field.RfIcType = RFIC_3020;
1510 Antenna.field.TxPath = 1;
1511 Antenna.field.RxPath = 1;
1517 Antenna.field.RfIcType = RFIC_2820;
1518 Antenna.field.TxPath = 1;
1519 Antenna.field.RxPath = 2;
1520 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1526 // Choose the desired Tx&Rx stream.
1527 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1528 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1530 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1532 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1534 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1535 (pAd->CommonCfg.RxStream > 2))
1537 // only 2 Rx streams for RT2860 series
1538 pAd->CommonCfg.RxStream = 2;
1543 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1549 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1552 if ((NicConfig2.word & 0x00ff) == 0xff)
1554 NicConfig2.word &= 0xff00;
1557 if ((NicConfig2.word >> 8) == 0xff)
1559 NicConfig2.word &= 0x00ff;
1563 if (NicConfig2.field.DynamicTxAgcControl == 1)
1564 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1566 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1568 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1570 // Save the antenna for future use
1571 pAd->Antenna.word = Antenna.word;
1574 // Reset PhyMode if we don't support 802.11a
1575 // Only RFIC_2850 & RFIC_2750 support 802.11a
1577 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1579 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1580 (pAd->CommonCfg.PhyMode == PHY_11A))
1581 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1582 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1583 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1584 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1585 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1586 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1589 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1592 /* these are tempature reference value (0x00 ~ 0xFE)
1593 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1594 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1595 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1596 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1597 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1598 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1599 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1600 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1601 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1602 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1603 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1604 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1605 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1606 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1607 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1608 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1609 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1610 pAd->TxAgcStepG = Power.field.Byte1;
1611 pAd->TxAgcCompensateG = 0;
1612 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1613 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1615 // Disable TxAgc if the based value is not right
1616 if (pAd->TssiRefG == 0xff)
1617 pAd->bAutoTxAgcG = FALSE;
1619 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1620 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1622 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1623 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1627 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1628 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1629 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1630 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1631 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1632 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1633 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1634 pAd->TssiRefA = Power.field.Byte0;
1635 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1636 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1637 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1638 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1639 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1640 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1641 pAd->TxAgcStepA = Power.field.Byte1;
1642 pAd->TxAgcCompensateA = 0;
1643 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1644 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1646 // Disable TxAgc if the based value is not right
1647 if (pAd->TssiRefA == 0xff)
1648 pAd->bAutoTxAgcA = FALSE;
1650 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1651 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1653 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1654 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1656 pAd->BbpRssiToDbmDelta = 0x0;
1658 // Read frequency offset setting for RF
1659 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1660 if ((value & 0x00FF) != 0x00FF)
1661 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1663 pAd->RfFreqOffset = 0;
1664 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1666 //CountryRegion byte offset (38h)
1667 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1668 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1670 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1672 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1673 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1674 TmpPhy = pAd->CommonCfg.PhyMode;
1675 pAd->CommonCfg.PhyMode = 0xff;
1676 RTMPSetPhyMode(pAd, TmpPhy);
1681 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1682 // The valid value are (-10 ~ 10)
1684 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1685 pAd->BGRssiOffset0 = value & 0x00ff;
1686 pAd->BGRssiOffset1 = (value >> 8);
1687 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1688 pAd->BGRssiOffset2 = value & 0x00ff;
1689 pAd->ALNAGain1 = (value >> 8);
1690 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1691 pAd->BLNAGain = value & 0x00ff;
1692 pAd->ALNAGain0 = (value >> 8);
1694 // Validate 11b/g RSSI_0 offset.
1695 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1696 pAd->BGRssiOffset0 = 0;
1698 // Validate 11b/g RSSI_1 offset.
1699 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1700 pAd->BGRssiOffset1 = 0;
1702 // Validate 11b/g RSSI_2 offset.
1703 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1704 pAd->BGRssiOffset2 = 0;
1706 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1707 pAd->ARssiOffset0 = value & 0x00ff;
1708 pAd->ARssiOffset1 = (value >> 8);
1709 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1710 pAd->ARssiOffset2 = value & 0x00ff;
1711 pAd->ALNAGain2 = (value >> 8);
1713 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1714 pAd->ALNAGain1 = pAd->ALNAGain0;
1715 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1716 pAd->ALNAGain2 = pAd->ALNAGain0;
1718 // Validate 11a RSSI_0 offset.
1719 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1720 pAd->ARssiOffset0 = 0;
1722 // Validate 11a RSSI_1 offset.
1723 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1724 pAd->ARssiOffset1 = 0;
1726 //Validate 11a RSSI_2 offset.
1727 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1728 pAd->ARssiOffset2 = 0;
1733 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1734 pAd->LedCntl.word = (value&0xff00) >> 8;
1735 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1737 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1739 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1742 RTMPReadTxPwrPerRate(pAd);
1747 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1748 pAd->EFuseTag = (value & 0xff);
1752 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1756 ========================================================================
1758 Routine Description:
1759 Set default value from EEPROM
1762 Adapter Pointer to our adapter
1767 IRQL = PASSIVE_LEVEL
1771 ========================================================================
1773 VOID NICInitAsicFromEEPROM(
1774 IN PRTMP_ADAPTER pAd)
1779 EEPROM_ANTENNA_STRUC Antenna;
1780 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1783 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1784 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1786 UCHAR BbpRegIdx, BbpValue;
1788 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1790 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1791 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1792 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1796 Antenna.word = pAd->EEPROMDefaultValue[0];
1797 if (Antenna.word == 0xFFFF)
1799 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1800 BUG_ON(Antenna.word == 0xFFFF);
1802 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1803 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1805 DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1807 // Save the antenna for future use
1808 pAd->Antenna.word = Antenna.word;
1810 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1813 if ((NicConfig2.word & 0x00ff) == 0xff)
1815 NicConfig2.word &= 0xff00;
1818 if ((NicConfig2.word >> 8) == 0xff)
1820 NicConfig2.word &= 0x00ff;
1824 // Save the antenna for future use
1825 pAd->NicConfig2.word = NicConfig2.word;
1827 // set default antenna as main
1828 if (pAd->RfIcType == RFIC_3020)
1829 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1832 // Send LED Setting to MCU.
1834 if (pAd->LedCntl.word == 0xFF)
1836 pAd->LedCntl.word = 0x01;
1845 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1846 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1847 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1848 pAd->LedIndicatorStregth = 0xFF;
1849 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1852 // Read Hardware controlled Radio state enable bit
1853 if (NicConfig2.field.HardwareRadioControl == 1)
1855 pAd->StaCfg.bHardwareRadio = TRUE;
1857 // Read GPIO pin2 as Hardware controlled radio state
1858 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1859 if ((data & 0x04) == 0)
1861 pAd->StaCfg.bHwRadio = FALSE;
1862 pAd->StaCfg.bRadio = FALSE;
1863 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1864 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1868 pAd->StaCfg.bHardwareRadio = FALSE;
1870 if (pAd->StaCfg.bRadio == FALSE)
1872 RTMPSetLED(pAd, LED_RADIO_OFF);
1876 RTMPSetLED(pAd, LED_RADIO_ON);
1880 // Turn off patching for cardbus controller
1881 if (NicConfig2.field.CardbusAcceleration == 1)
1883 // pAd->bTest1 = TRUE;
1886 if (NicConfig2.field.DynamicTxAgcControl == 1)
1887 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1889 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1891 // Since BBP has been progamed, to make sure BBP setting will be
1892 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1894 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1896 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1898 if(pAd->Antenna.field.RxPath == 3)
1902 else if(pAd->Antenna.field.RxPath == 2)
1906 else if(pAd->Antenna.field.RxPath == 1)
1910 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1913 // Handle the difference when 1T
1914 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1915 if(pAd->Antenna.field.TxPath == 1)
1919 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1921 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1924 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1925 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1929 ========================================================================
1931 Routine Description:
1932 Initialize NIC hardware
1935 Adapter Pointer to our adapter
1940 IRQL = PASSIVE_LEVEL
1944 ========================================================================
1946 NDIS_STATUS NICInitializeAdapter(
1947 IN PRTMP_ADAPTER pAd,
1948 IN BOOLEAN bHardReset)
1950 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1951 WPDMA_GLO_CFG_STRUC GloCfg;
1952 // INT_MASK_CSR_STRUC IntMask;
1954 AC_TXOP_CSR0_STRUC csr0;
1956 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1958 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1963 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1964 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1967 RTMPusecDelay(1000);
1970 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1971 GloCfg.word &= 0xff0;
1972 GloCfg.field.EnTXWriteBackDDONE =1;
1973 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1975 // Record HW Beacon offset
1976 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1977 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1978 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1979 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1980 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1981 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1982 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1983 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1986 // write all shared Ring's base address into ASIC
1989 // asic simulation sequence put this ahead before loading firmware.
1990 // pbf hardware reset
1992 // Initialze ASIC for TX & Rx operation
1993 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1997 NICLoadFirmware(pAd);
2000 return NDIS_STATUS_FAILURE;
2008 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2009 if (pAd->CommonCfg.PhyMode == PHY_11B)
2011 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
2012 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
2016 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
2017 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
2019 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2026 // Status = NICLoadFirmware(pAd);
2028 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2033 ========================================================================
2035 Routine Description:
2039 Adapter Pointer to our adapter
2044 IRQL = PASSIVE_LEVEL
2048 ========================================================================
2050 NDIS_STATUS NICInitializeAsic(
2051 IN PRTMP_ADAPTER pAd,
2052 IN BOOLEAN bHardReset)
2056 UINT32 MacCsr12 = 0, Counter = 0;
2068 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2073 // Make sure MAC gets ready after NICLoadFirmware().
2077 //To avoid hang-on issue when interface up in kernel 2.4,
2078 //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2081 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2083 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2087 } while (Index++ < 100);
2089 pAd->MACVersion = MacCsr0;
2090 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2091 // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2092 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2093 MacCsr12 &= (~0x2000);
2094 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2096 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2097 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2098 Status = RTUSBVenderReset(pAd);
2100 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2102 // Initialize MAC register to default value
2103 for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2106 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2108 MACRegTable[Index].Value = 0x00000400;
2111 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2116 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2118 RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2124 // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2127 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2129 // RT3071 version E has fixed this issue
2130 if ((pAd->MACVersion & 0xffff) < 0x0211)
2132 if (pAd->NicConfig2.field.DACTestBit == 1)
2134 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2138 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2143 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2146 else if (IS_RT3070(pAd))
2148 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2149 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2154 // Before program BBP, we need to wait BBP/RF get wake up.
2159 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2161 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
2164 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
2165 RTMPusecDelay(1000);
2166 } while (Index++ < 100);
2168 // The commands to firmware should be after these commands, these commands will init firmware
2169 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2170 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2171 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2172 RTMPusecDelay(1000);
2174 // Read BBP register, make sure BBP is up and running before write new data
2178 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2179 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2180 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2181 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2183 if ((R0 == 0xff) || (R0 == 0x00))
2184 return NDIS_STATUS_FAILURE;
2186 // Initialize BBP register to default value
2187 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2189 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2192 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2193 // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2194 if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2195 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2197 // add by johnli, RF power sequence setup
2200 { //update for RT3070/71/72/90/91/92.
2201 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2202 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2203 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2211 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2213 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2216 // improve power consumption
2217 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2218 if (pAd->Antenna.field.TxPath == 1)
2220 // turn off tx DAC_1
2221 bbpreg = (bbpreg | 0x20);
2224 if (pAd->Antenna.field.RxPath == 1)
2226 // turn off tx ADC_1
2229 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2231 // improve power consumption in RT3071 Ver.E
2232 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2234 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2236 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2242 if (pAd->MACVersion == 0x28600100)
2244 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2245 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2248 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2250 // enlarge MAX_LEN_CFG
2252 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2255 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2260 UCHAR MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2262 //Initialize WCID table
2264 for(Index =0 ;Index < 254;Index++)
2266 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2271 // Add radio off control
2273 if (pAd->StaCfg.bRadio == FALSE)
2275 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2276 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2277 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2281 // Clear raw counters
2282 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2283 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2284 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2285 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2286 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2287 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2289 // ASIC will keep garbage value after boot
2290 // Clear all seared key table when initial
2291 // This routine can be ignored in radio-ON/OFF operation.
2294 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2296 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2299 // Clear all pairwise key table when initial
2300 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2302 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2306 // assert HOST ready bit
2307 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
2308 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
2310 // It isn't necessary to clear this space when not hard reset.
2311 if (bHardReset == TRUE)
2313 // clear all on-chip BEACON frame space
2314 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2316 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2317 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2321 AsicDisableSync(pAd);
2322 // Clear raw counters
2323 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2324 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2325 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2326 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2327 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2328 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2329 // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2330 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2331 Counter&=0xffffff00;
2333 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2336 pAd->bUseEfuse=FALSE;
2337 RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2338 pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2341 DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2345 DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2351 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2352 if ((pAd->MACVersion&0xffff) != 0x0101)
2353 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2356 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2357 return NDIS_STATUS_SUCCESS;
2361 ========================================================================
2363 Routine Description:
2367 Adapter Pointer to our adapter
2372 IRQL = PASSIVE_LEVEL
2375 Reset NIC to initial state AS IS system boot up time.
2377 ========================================================================
2380 IN PRTMP_ADAPTER pAd)
2383 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2385 // Abort Tx, prevent ASIC from writing to Host memory
2386 //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
2388 // Disable Rx, register value supposed will remain after reset
2389 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2390 Value &= (0xfffffff3);
2391 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2393 // Issue reset and clear from reset state
2394 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2395 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2397 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2401 ========================================================================
2403 Routine Description:
2404 Check ASIC registers and find any reason the system might hang
2407 Adapter Pointer to our adapter
2412 IRQL = DISPATCH_LEVEL
2414 ========================================================================
2416 BOOLEAN NICCheckForHang(
2417 IN PRTMP_ADAPTER pAd)
2422 VOID NICUpdateFifoStaCounters(
2423 IN PRTMP_ADAPTER pAd)
2425 TX_STA_FIFO_STRUC StaFifo;
2426 MAC_TABLE_ENTRY *pEntry;
2428 UCHAR pid = 0, wcid = 0;
2434 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2436 if (StaFifo.field.bValid == 0)
2439 wcid = (UCHAR)StaFifo.field.wcid;
2442 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2443 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2449 /* PID store Tx MCS Rate */
2450 pid = (UCHAR)StaFifo.field.PidType;
2452 pEntry = &pAd->MacTab.Content[wcid];
2454 pEntry->DebugFIFOCount++;
2456 if (StaFifo.field.TxBF) // 3*3
2457 pEntry->TxBFCount++;
2459 #ifdef UAPSD_AP_SUPPORT
2460 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2461 #endif // UAPSD_AP_SUPPORT //
2463 if (!StaFifo.field.TxSuccess)
2465 pEntry->FIFOCount++;
2466 pEntry->OneSecTxFailCount++;
2468 if (pEntry->FIFOCount >= 1)
2470 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2471 pEntry->NoBADataCountDown = 64;
2473 if(pEntry->PsMode == PWR_ACTIVE)
2476 for (tid=0; tid<NUM_OF_TID; tid++)
2478 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2481 // Update the continuous transmission counter except PS mode
2482 pEntry->ContinueTxFailCnt++;
2486 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2487 // this tx error happened due to sta just go to sleep.
2488 pEntry->FIFOCount = 0;
2489 pEntry->ContinueTxFailCnt = 0;
2491 //pEntry->FIFOCount = 0;
2493 //pEntry->bSendBAR = TRUE;
2497 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2499 pEntry->NoBADataCountDown--;
2500 if (pEntry->NoBADataCountDown==0)
2502 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2506 pEntry->FIFOCount = 0;
2507 pEntry->OneSecTxNoRetryOkCount++;
2508 // update NoDataIdleCount when sucessful send packet to STA.
2509 pEntry->NoDataIdleCount = 0;
2510 pEntry->ContinueTxFailCnt = 0;
2513 succMCS = StaFifo.field.SuccessRate & 0x7F;
2515 reTry = pid - succMCS;
2517 if (StaFifo.field.TxSuccess)
2519 pEntry->TXMCSExpected[pid]++;
2522 pEntry->TXMCSSuccessful[pid]++;
2526 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2531 pEntry->TXMCSFailed[pid]++;
2536 if ((pid >= 12) && succMCS <=7)
2540 pEntry->OneSecTxRetryOkCount += reTry;
2544 // ASIC store 16 stack
2545 } while ( i < (2*TX_RING_SIZE) );
2550 ========================================================================
2552 Routine Description:
2553 Read statistical counters from hardware registers and record them
2554 in software variables for later on query
2557 pAd Pointer to our adapter
2562 IRQL = DISPATCH_LEVEL
2564 ========================================================================
2566 VOID NICUpdateRawCounters(
2567 IN PRTMP_ADAPTER pAd)
2569 UINT32 OldValue;//, Value2;
2570 //ULONG PageSum, OneSecTransmitCount;
2571 //ULONG TxErrorRatio, Retry, Fail;
2572 RX_STA_CNT0_STRUC RxStaCnt0;
2573 RX_STA_CNT1_STRUC RxStaCnt1;
2574 RX_STA_CNT2_STRUC RxStaCnt2;
2575 TX_STA_CNT0_STRUC TxStaCnt0;
2576 TX_STA_CNT1_STRUC StaTx1;
2577 TX_STA_CNT2_STRUC StaTx2;
2578 TX_AGG_CNT_STRUC TxAggCnt;
2579 TX_AGG_CNT0_STRUC TxAggCnt0;
2580 TX_AGG_CNT1_STRUC TxAggCnt1;
2581 TX_AGG_CNT2_STRUC TxAggCnt2;
2582 TX_AGG_CNT3_STRUC TxAggCnt3;
2583 TX_AGG_CNT4_STRUC TxAggCnt4;
2584 TX_AGG_CNT5_STRUC TxAggCnt5;
2585 TX_AGG_CNT6_STRUC TxAggCnt6;
2586 TX_AGG_CNT7_STRUC TxAggCnt7;
2588 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2589 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2592 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2593 // Update RX PLCP error counter
2594 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2595 // Update False CCA counter
2596 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2599 // Update FCS counters
2600 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2601 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2602 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2603 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2605 // Add FCS error count to private counters
2606 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2607 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2608 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2609 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2610 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2612 // Update Duplicate Rcv check
2613 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2614 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2615 // Update RX Overflow counter
2616 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2618 //pAd->RalinkCounters.RxCount = 0;
2620 if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2622 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2623 pAd->watchDogRxOverFlowCnt = 0;
2627 if (RxStaCnt2.field.RxFifoOverflowCount)
2628 pAd->watchDogRxOverFlowCnt++;
2630 pAd->watchDogRxOverFlowCnt = 0;
2635 //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2636 // (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2637 if (!pAd->bUpdateBcnCntDone)
2639 // Update BEACON sent count
2640 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2641 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2642 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2643 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2644 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2645 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2646 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2647 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2648 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2649 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2652 //if (pAd->bStaFifoTest == TRUE)
2654 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2655 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2656 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2657 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2658 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2659 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2660 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2661 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2662 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2663 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2664 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2665 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2666 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2668 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2669 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2670 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2671 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2673 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2674 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2675 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2676 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2678 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2679 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2680 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2681 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2683 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2684 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2686 // Calculate the transmitted A-MPDU count
2687 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2688 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2690 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2691 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2693 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2694 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2696 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2697 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2699 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2700 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2702 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2703 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2705 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2706 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2708 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2709 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2714 RtmpDiagStruct *pDiag;
2715 COUNTER_RALINK *pRalinkCounters;
2716 UCHAR ArrayCurIdx, i;
2718 pDiag = &pAd->DiagStruct;
2719 pRalinkCounters = &pAd->RalinkCounters;
2720 ArrayCurIdx = pDiag->ArrayCurIdx;
2722 if (pDiag->inited == 0)
2724 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2725 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2731 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2732 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2733 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2734 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2735 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2736 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2737 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2738 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2739 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2740 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2741 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2742 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2743 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2744 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2745 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2746 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2747 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2748 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2749 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2751 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2753 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2754 ArrayCurIdx = pDiag->ArrayCurIdx;
2755 for (i =0; i < 9; i++)
2757 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2758 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2759 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2760 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2762 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2763 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2764 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2765 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2766 // for (i = 9; i < 16; i++)
2767 for (i = 9; i < 24; i++) // 3*3
2769 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2770 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2771 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2774 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2775 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2779 #endif // DBG_DIAGNOSE //
2786 ========================================================================
2788 Routine Description:
2789 Reset NIC from error
2792 Adapter Pointer to our adapter
2797 IRQL = PASSIVE_LEVEL
2800 Reset NIC from error state
2802 ========================================================================
2804 VOID NICResetFromError(
2805 IN PRTMP_ADAPTER pAd)
2807 // Reset BBP (according to alex, reset ASIC will force reset BBP
2808 // Therefore, skip the reset BBP
2809 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2811 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2812 // Remove ASIC from reset state
2813 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2815 NICInitializeAdapter(pAd, FALSE);
2816 NICInitAsicFromEEPROM(pAd);
2818 // Switch to current channel, since during reset process, the connection should remains on.
2819 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2820 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2824 ========================================================================
2826 Routine Description:
2827 erase 8051 firmware image in MAC ASIC
2830 Adapter Pointer to our adapter
2832 IRQL = PASSIVE_LEVEL
2834 ========================================================================
2836 VOID NICEraseFirmware(
2837 IN PRTMP_ADAPTER pAd)
2841 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2842 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2844 }/* End of NICEraseFirmware */
2847 ========================================================================
2849 Routine Description:
2850 Load 8051 firmware RT2561.BIN file into MAC ASIC
2853 Adapter Pointer to our adapter
2856 NDIS_STATUS_SUCCESS firmware image load ok
2857 NDIS_STATUS_FAILURE image not found
2859 IRQL = PASSIVE_LEVEL
2861 ========================================================================
2863 NDIS_STATUS NICLoadFirmware(
2864 IN PRTMP_ADAPTER pAd)
2866 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2867 PUCHAR pFirmwareImage;
2868 ULONG FileLength, Index;
2871 UINT32 Version = (pAd->MACVersion >> 16);
2873 pFirmwareImage = FirmwareImage;
2874 FileLength = sizeof(FirmwareImage);
2876 // New 8k byte firmware size for RT3071/RT3072
2877 //printk("Usb Chip\n");
2878 if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
2879 //The firmware image consists of two parts. One is the origianl and the other is the new.
2883 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
2884 { // Use Firmware V2.
2885 //printk("KH:Use New Version,part2\n");
2886 pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
2887 FileLength = FIRMWAREIMAGEV2_LENGTH;
2891 //printk("KH:Use New Version,part1\n");
2892 pFirmwareImage = FirmwareImage;
2893 FileLength = FIRMWAREIMAGEV1_LENGTH;
2899 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
2900 Status = NDIS_STATUS_FAILURE;
2903 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2905 /* check if MCU is ready */
2909 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2914 RTMPusecDelay(1000);
2915 } while (Index++ < 1000);
2919 Status = NDIS_STATUS_FAILURE;
2920 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2923 DBGPRINT(RT_DEBUG_TRACE,
2924 ("<=== %s (status=%d)\n", __func__, Status));
2926 } /* End of NICLoadFirmware */
2930 ========================================================================
2932 Routine Description:
2933 Load Tx rate switching parameters
2936 Adapter Pointer to our adapter
2939 NDIS_STATUS_SUCCESS firmware image load ok
2940 NDIS_STATUS_FAILURE image not found
2942 IRQL = PASSIVE_LEVEL
2945 1. (B0: Valid Item number) (B1:Initial item from zero)
2946 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2948 ========================================================================
2950 NDIS_STATUS NICLoadRateSwitchingParams(
2951 IN PRTMP_ADAPTER pAd)
2953 return NDIS_STATUS_SUCCESS;
2957 ========================================================================
2959 Routine Description:
2960 if pSrc1 all zero with length Length, return 0.
2961 If not all zero, return 1
2970 IRQL = DISPATCH_LEVEL
2974 ========================================================================
2976 ULONG RTMPNotAllZero(
2983 pMem1 = (PUCHAR) pSrc1;
2985 for (Index = 0; Index < Length; Index++)
2987 if (pMem1[Index] != 0x0)
2993 if (Index == Length)
3004 ========================================================================
3006 Routine Description:
3007 Compare two memory block
3010 pSrc1 Pointer to first memory address
3011 pSrc2 Pointer to second memory address
3015 1: pSrc1 memory is larger
3016 2: pSrc2 memory is larger
3018 IRQL = DISPATCH_LEVEL
3022 ========================================================================
3024 ULONG RTMPCompareMemory(
3033 pMem1 = (PUCHAR) pSrc1;
3034 pMem2 = (PUCHAR) pSrc2;
3036 for (Index = 0; Index < Length; Index++)
3038 if (pMem1[Index] > pMem2[Index])
3040 else if (pMem1[Index] < pMem2[Index])
3049 ========================================================================
3051 Routine Description:
3052 Zero out memory block
3055 pSrc1 Pointer to memory address
3061 IRQL = PASSIVE_LEVEL
3062 IRQL = DISPATCH_LEVEL
3066 ========================================================================
3068 VOID RTMPZeroMemory(
3075 pMem = (PUCHAR) pSrc;
3077 for (Index = 0; Index < Length; Index++)
3083 VOID RTMPFillMemory(
3091 pMem = (PUCHAR) pSrc;
3093 for (Index = 0; Index < Length; Index++)
3100 ========================================================================
3102 Routine Description:
3103 Copy data from memory block 1 to memory block 2
3106 pDest Pointer to destination memory address
3107 pSrc Pointer to source memory address
3113 IRQL = PASSIVE_LEVEL
3114 IRQL = DISPATCH_LEVEL
3118 ========================================================================
3120 VOID RTMPMoveMemory(
3129 ASSERT((Length==0) || (pDest && pSrc));
3131 pMem1 = (PUCHAR) pDest;
3132 pMem2 = (PUCHAR) pSrc;
3134 for (Index = 0; Index < Length; Index++)
3136 pMem1[Index] = pMem2[Index];
3141 ========================================================================
3143 Routine Description:
3144 Initialize port configuration structure
3147 Adapter Pointer to our adapter
3152 IRQL = PASSIVE_LEVEL
3156 ========================================================================
3159 IN PRTMP_ADAPTER pAd)
3161 // EDCA_PARM DefaultEdcaParm;
3162 UINT key_index, bss_index;
3164 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3167 // part I. intialize common configuration
3170 pAd->BulkOutReq = 0;
3172 pAd->BulkOutComplete = 0;
3173 pAd->BulkOutCompleteOther = 0;
3174 pAd->BulkOutCompleteCancel = 0;
3176 pAd->BulkInComplete = 0;
3177 pAd->BulkInCompleteFail = 0;
3179 //pAd->QuickTimerP = 100;
3180 //pAd->TurnAggrBulkInCount = 0;
3181 pAd->bUsbTxBulkAggre = 0;
3183 // init as unsed value to ensure driver will set to MCU once.
3184 pAd->LedIndicatorStregth = 0xFF;
3186 pAd->CommonCfg.MaxPktOneTxBulk = 2;
3187 pAd->CommonCfg.TxBulkFactor = 1;
3188 pAd->CommonCfg.RxBulkFactor =1;
3190 pAd->CommonCfg.TxPower = 100; //mW
3192 NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3195 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3197 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3199 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3200 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3204 pAd->EepromAccess = FALSE;
3206 pAd->Antenna.word = 0;
3207 pAd->CommonCfg.BBPCurrentBW = BW_20;
3209 pAd->LedCntl.word = 0;
3211 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3212 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3213 pAd->RfIcType = RFIC_2820;
3215 // Init timer for reset complete event
3216 pAd->CommonCfg.CentralChannel = 1;
3217 pAd->bForcePrintTX = FALSE;
3218 pAd->bForcePrintRX = FALSE;
3219 pAd->bStaFifoTest = FALSE;
3220 pAd->bProtectionTest = FALSE;
3221 pAd->bHCCATest = FALSE;
3222 pAd->bGenOneHCCA = FALSE;
3223 pAd->CommonCfg.Dsifs = 10; // in units of usec
3224 pAd->CommonCfg.TxPower = 100; //mW
3225 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3226 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3227 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3228 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3229 pAd->CommonCfg.RtsThreshold = 2347;
3230 pAd->CommonCfg.FragmentThreshold = 2346;
3231 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3232 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3233 pAd->CommonCfg.PhyMode = 0xff; // unknown
3234 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3235 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3236 pAd->CommonCfg.RadarDetect.CSCount = 0;
3237 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3238 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3239 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3240 pAd->CommonCfg.bAPSDCapable = FALSE;
3241 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3242 pAd->CommonCfg.TriggerTimerCount = 0;
3243 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3244 pAd->CommonCfg.bCountryFlag = FALSE;
3245 pAd->CommonCfg.TxStream = 0;
3246 pAd->CommonCfg.RxStream = 0;
3248 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3250 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3251 pAd->HTCEnable = FALSE;
3252 pAd->bBroadComHT = FALSE;
3253 pAd->CommonCfg.bRdg = FALSE;
3255 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3256 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3257 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3258 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3259 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3260 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3261 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3263 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3264 BATableInit(pAd, &pAd->BATable);
3266 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3267 pAd->CommonCfg.bHTProtect = 1;
3268 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3269 pAd->CommonCfg.bBADecline = FALSE;
3270 pAd->CommonCfg.bDisableReordering = FALSE;
3272 pAd->CommonCfg.TxBASize = 7;
3274 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3276 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3277 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3278 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3279 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3280 pAd->CommonCfg.TxRate = RATE_6;
3282 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3283 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3284 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3286 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3289 // part II. intialize STA specific configuration
3292 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3293 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3294 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3295 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3297 pAd->StaCfg.Psm = PWR_ACTIVE;
3299 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3300 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3301 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3302 pAd->StaCfg.bMixCipher = FALSE;
3303 pAd->StaCfg.DefaultKeyId = 0;
3305 // 802.1x port control
3306 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3307 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3308 pAd->StaCfg.LastMicErrorTime = 0;
3309 pAd->StaCfg.MicErrCnt = 0;
3310 pAd->StaCfg.bBlockAssoc = FALSE;
3311 pAd->StaCfg.WpaState = SS_NOTUSE;
3313 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3315 pAd->StaCfg.RssiTrigger = 0;
3316 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3317 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3318 pAd->StaCfg.AtimWin = 0;
3319 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3320 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3321 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3322 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3323 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3325 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3326 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3329 // global variables mXXXX used in MAC protocol state machines
3330 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3331 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3332 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3334 // PHY specification
3335 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3336 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3339 // user desired power mode
3340 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3341 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3342 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3344 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3345 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3348 pAd->StaCfg.ScanCnt = 0;
3350 // CCX 2.0 control flag init
3351 pAd->StaCfg.CCXEnable = FALSE;
3352 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3353 pAd->StaCfg.CCXQosECWMin = 4;
3354 pAd->StaCfg.CCXQosECWMax = 10;
3356 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3357 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3358 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3359 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3360 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3362 // Nitro mode control
3363 pAd->StaCfg.bAutoReconnect = TRUE;
3365 // Save the init time as last scan time, the system should do scan after 2 seconds.
3366 // This patch is for driver wake up from standby mode, system will do scan right away.
3367 pAd->StaCfg.LastScanTime = 0;
3368 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3369 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3370 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3371 pAd->StaCfg.IEEE8021X = FALSE;
3372 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3373 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3374 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3377 // Default for extra information is not valid
3378 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3380 // Default Config change flag
3381 pAd->bConfigChanged = FALSE;
3384 // part III. AP configurations
3391 // dynamic BBP R66:sensibity tuning to overcome background noise
3392 pAd->BbpTuning.bEnable = TRUE;
3393 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3394 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3395 pAd->BbpTuning.R66Delta = 4;
3396 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3399 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3400 // if not initial this value, the default value will be 0.
3402 pAd->BbpTuning.R66CurrentValue = 0x38;
3404 pAd->Bbp94 = BBPR94_DEFAULT;
3405 pAd->BbpForCCK = FALSE;
3407 // Default is FALSE for test bit 1
3408 //pAd->bTest1 = FALSE;
3410 // initialize MAC table and allocate spin lock
3411 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3412 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3413 NdisAllocateSpinLock(&pAd->MacTabLock);
3415 //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
3416 //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
3418 pAd->CommonCfg.bWiFiTest = FALSE;
3421 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3424 // IRQL = PASSIVE_LEVEL
3427 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3428 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3429 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3434 // FUNCTION: AtoH(char *, UCHAR *, int)
3436 // PURPOSE: Converts ascii string to network order hex
3439 // src - pointer to input ascii string
3440 // dest - pointer to output hex
3441 // destlen - size of dest
3445 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3446 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3448 // IRQL = PASSIVE_LEVEL
3450 void AtoH(char * src, UCHAR * dest, int destlen)
3456 destTemp = (PUCHAR) dest;
3460 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3461 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3466 VOID RTMPPatchMacBbpBug(
3467 IN PRTMP_ADAPTER pAd)
3471 // Initialize BBP register to default value
3472 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3474 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3477 // Initialize RF register to default value
3478 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3479 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3481 // Re-init BBP register from EEPROM value
3482 NICInitAsicFromEEPROM(pAd);
3486 ========================================================================
3488 Routine Description:
3492 pAd Pointer to our adapter
3493 pTimer Timer structure
3494 pTimerFunc Function to execute when timer expired
3495 Repeat Ture for period timer
3502 ========================================================================
3505 IN PRTMP_ADAPTER pAd,
3506 IN PRALINK_TIMER_STRUCT pTimer,
3507 IN PVOID pTimerFunc,
3512 // Set Valid to TRUE for later used.
3513 // It will crash if we cancel a timer or set a timer
3514 // that we haven't initialize before.
3516 pTimer->Valid = TRUE;
3518 pTimer->PeriodicType = Repeat;
3519 pTimer->State = FALSE;
3520 pTimer->cookie = (ULONG) pData;
3526 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3530 ========================================================================
3532 Routine Description:
3536 pTimer Timer structure
3537 Value Timer value in milliseconds
3543 To use this routine, must call RTMPInitTimer before.
3545 ========================================================================
3548 IN PRALINK_TIMER_STRUCT pTimer,
3553 pTimer->TimerValue = Value;
3554 pTimer->State = FALSE;
3555 if (pTimer->PeriodicType == TRUE)
3557 pTimer->Repeat = TRUE;
3558 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3562 pTimer->Repeat = FALSE;
3563 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3568 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3574 ========================================================================
3576 Routine Description:
3580 pTimer Timer structure
3581 Value Timer value in milliseconds
3587 To use this routine, must call RTMPInitTimer before.
3589 ========================================================================
3592 IN PRALINK_TIMER_STRUCT pTimer,
3599 pTimer->TimerValue = Value;
3600 pTimer->State = FALSE;
3601 if (pTimer->PeriodicType == TRUE)
3603 RTMPCancelTimer(pTimer, &Cancel);
3604 RTMPSetTimer(pTimer, Value);
3608 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3613 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3618 ========================================================================
3620 Routine Description:
3621 Cancel timer objects
3624 Adapter Pointer to our adapter
3629 IRQL = PASSIVE_LEVEL
3630 IRQL = DISPATCH_LEVEL
3633 1.) To use this routine, must call RTMPInitTimer before.
3634 2.) Reset NIC to initial state AS IS system boot up time.
3636 ========================================================================
3638 VOID RTMPCancelTimer(
3639 IN PRALINK_TIMER_STRUCT pTimer,
3640 OUT BOOLEAN *pCancelled)
3644 if (pTimer->State == FALSE)
3645 pTimer->Repeat = FALSE;
3646 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3648 if (*pCancelled == TRUE)
3649 pTimer->State = TRUE;
3652 // We need to go-through the TimerQ to findout this timer handler and remove it if
3653 // it's still waiting for execution.
3655 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3661 // NdisMCancelTimer just canced the timer and not mean release the timer.
3662 // And don't set the "Valid" to False. So that we can use this timer again.
3664 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3669 ========================================================================
3671 Routine Description:
3675 pAd Pointer to our adapter
3681 IRQL = PASSIVE_LEVEL
3682 IRQL = DISPATCH_LEVEL
3686 ========================================================================
3689 IN PRTMP_ADAPTER pAd,
3696 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3701 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3702 pAd->LedIndicatorStregth = 0;
3705 if (pAd->CommonCfg.Channel > 14)
3709 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3713 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3716 LowByte = 0; // Driver sets MAC register and MAC controls LED
3719 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3723 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3725 case LED_ON_SITE_SURVEY:
3727 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3731 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3734 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3739 // Keep LED status for LED SiteSurvey mode.
3740 // After SiteSurvey, we will set the LED mode to previous status.
3742 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3743 pAd->LedStatus = Status;
3745 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3749 ========================================================================
3751 Routine Description:
3752 Set LED Signal Stregth
3755 pAd Pointer to our adapter
3761 IRQL = PASSIVE_LEVEL
3764 Can be run on any IRQL level.
3766 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3773 ========================================================================
3775 VOID RTMPSetSignalLED(
3776 IN PRTMP_ADAPTER pAd,
3777 IN NDIS_802_11_RSSI Dbm)
3782 // if not Signal Stregth, then do nothing.
3784 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3791 else if (Dbm <= -81)
3793 else if (Dbm <= -71)
3795 else if (Dbm <= -67)
3797 else if (Dbm <= -57)
3803 // Update Signal Stregth to firmware if changed.
3805 if (pAd->LedIndicatorStregth != nLed)
3807 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3808 pAd->LedIndicatorStregth = nLed;
3813 ========================================================================
3815 Routine Description:
3819 pAd Pointer to our adapter
3824 IRQL <= DISPATCH_LEVEL
3827 Before Enable RX, make sure you have enabled Interrupt.
3828 ========================================================================
3830 VOID RTMPEnableRxTx(
3831 IN PRTMP_ADAPTER pAd)
3833 // WPDMA_GLO_CFG_STRUC GloCfg;
3836 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3839 RT28XXDMAEnable(pAd);
3841 // enable RX of MAC block
3842 if (pAd->OpMode == OPMODE_AP)
3844 UINT32 rx_filter_flag = APNORMAL;
3847 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3851 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
3854 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3855 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));