git.oblomov.eu Git - linux-2.6/blob - drivers/block/cciss.h

   1 #ifndef CCISS_H
   2 #define CCISS_H
   3
   4 #include <linux/genhd.h>
   5
   6 #include "cciss_cmd.h"
   7
   8
   9 #define NWD             16
  10 #define NWD_SHIFT       4
  11 #define MAX_PART        (1 << NWD_SHIFT)
  12
  13 #define IO_OK           0
  14 #define IO_ERROR        1
  15
  16 struct ctlr_info;
  17 typedef struct ctlr_info ctlr_info_t;
  18
  19 struct access_method {
  20         void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  21         void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  22         unsigned long (*fifo_full)(ctlr_info_t *h);
  23         unsigned long (*intr_pending)(ctlr_info_t *h);
  24         unsigned long (*command_completed)(ctlr_info_t *h);
  25 };
  26 typedef struct _drive_info_struct
  27 {
  28         __u32   LunID;
  29         int     usage_count;
  30         struct request_queue *queue;
  31         sector_t nr_blocks;
  32         int     block_size;
  33         int     heads;
  34         int     sectors;
  35         int     cylinders;
  36         int     raid_level; /* set to -1 to indicate that
  37                              * the drive is not in use/configured
  38                             */
  39         int     busy_configuring; /*This is set when the drive is being removed
  40                                    *to prevent it from being opened or it's queue
  41                                    *from being started.
  42                                   */
  43 } drive_info_struct;
  44
  45 #ifdef CONFIG_CISS_SCSI_TAPE
  46
  47 struct sendcmd_reject_list {
  48         int ncompletions;
  49         unsigned long *complete; /* array of NR_CMDS tags */
  50 };
  51
  52 #endif
  53 struct ctlr_info
  54 {
  55         int     ctlr;
  56         char    devname[8];
  57         char    *product_name;
  58         char    firm_ver[4]; // Firmware version
  59         struct pci_dev *pdev;
  60         __u32   board_id;
  61         void __iomem *vaddr;
  62         unsigned long paddr;
  63         unsigned long io_mem_addr;
  64         unsigned long io_mem_length;
  65         CfgTable_struct __iomem *cfgtable;
  66         int     interrupts_enabled;
  67         int     major;
  68         int     max_commands;
  69         int     commands_outstanding;
  70         int     max_outstanding; /* Debug */
  71         int     num_luns;
  72         int     highest_lun;
  73         int     usage_count;  /* number of opens all all minor devices */
  74 #       define DOORBELL_INT     0
  75 #       define PERF_MODE_INT    1
  76 #       define SIMPLE_MODE_INT  2
  77 #       define MEMQ_MODE_INT    3
  78         unsigned int intr[4];
  79         unsigned int msix_vector;
  80         unsigned int msi_vector;
  81
  82         // information about each logical volume
  83         drive_info_struct drv[CISS_MAX_LUN];
  84
  85         struct access_method access;
  86
  87         /* queue and queue Info */
  88         CommandList_struct *reqQ;
  89         CommandList_struct  *cmpQ;
  90         unsigned int Qdepth;
  91         unsigned int maxQsinceinit;
  92         unsigned int maxSG;
  93         spinlock_t lock;
  94
  95         //* pointers to command and error info pool */
  96         CommandList_struct      *cmd_pool;
  97         dma_addr_t              cmd_pool_dhandle;
  98         ErrorInfo_struct        *errinfo_pool;
  99         dma_addr_t              errinfo_pool_dhandle;
 100         unsigned long           *cmd_pool_bits;
 101         int                     nr_allocs;
 102         int                     nr_frees;
 103         int                     busy_configuring;
 104         int                     busy_initializing;
 105
 106         /* This element holds the zero based queue number of the last
 107          * queue to be started.  It is used for fairness.
 108         */
 109         int                     next_to_run;
 110
 111         // Disk structures we need to pass back
 112         struct gendisk   *gendisk[NWD];
 113 #ifdef CONFIG_CISS_SCSI_TAPE
 114         void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
 115         /* list of block side commands the scsi error handling sucked up */
 116         /* and saved for later processing */
 117         struct sendcmd_reject_list scsi_rejects;
 118 #endif
 119         unsigned char alive;
 120 };
 121
 122 /*  Defining the diffent access_menthods */
 123 /*
 124  * Memory mapped FIFO interface (SMART 53xx cards)
 125  */
 126 #define SA5_DOORBELL    0x20
 127 #define SA5_REQUEST_PORT_OFFSET 0x40
 128 #define SA5_REPLY_INTR_MASK_OFFSET      0x34
 129 #define SA5_REPLY_PORT_OFFSET           0x44
 130 #define SA5_INTR_STATUS         0x30
 131 #define SA5_SCRATCHPAD_OFFSET   0xB0
 132
 133 #define SA5_CTCFG_OFFSET        0xB4
 134 #define SA5_CTMEM_OFFSET        0xB8
 135
 136 #define SA5_INTR_OFF            0x08
 137 #define SA5B_INTR_OFF           0x04
 138 #define SA5_INTR_PENDING        0x08
 139 #define SA5B_INTR_PENDING       0x04
 140 #define FIFO_EMPTY              0xffffffff
 141 #define CCISS_FIRMWARE_READY    0xffff0000 /* value in scratchpad register */
 142
 143 #define  CISS_ERROR_BIT         0x02
 144
 145 #define CCISS_INTR_ON   1
 146 #define CCISS_INTR_OFF  0
 147 /*
 148         Send the command to the hardware
 149 */
 150 static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
 151 {
 152 #ifdef CCISS_DEBUG
 153          printk("Sending %x - down to controller\n", c->busaddr );
 154 #endif /* CCISS_DEBUG */
 155          writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 156          h->commands_outstanding++;
 157          if ( h->commands_outstanding > h->max_outstanding)
 158                 h->max_outstanding = h->commands_outstanding;
 159 }
 160
 161 /*
 162  *  This card is the opposite of the other cards.
 163  *   0 turns interrupts on...
 164  *   0x08 turns them off...
 165  */
 166 static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
 167 {
 168         if (val)
 169         { /* Turn interrupts on */
 170                 h->interrupts_enabled = 1;
 171                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 172         } else /* Turn them off */
 173         {
 174                 h->interrupts_enabled = 0;
 175                 writel( SA5_INTR_OFF,
 176                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 177         }
 178 }
 179 /*
 180  *  This card is the opposite of the other cards.
 181  *   0 turns interrupts on...
 182  *   0x04 turns them off...
 183  */
 184 static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
 185 {
 186         if (val)
 187         { /* Turn interrupts on */
 188                 h->interrupts_enabled = 1;
 189                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 190         } else /* Turn them off */
 191         {
 192                 h->interrupts_enabled = 0;
 193                 writel( SA5B_INTR_OFF,
 194                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 195         }
 196 }
 197 /*
 198  *  Returns true if fifo is full.
 199  *
 200  */
 201 static unsigned long SA5_fifo_full(ctlr_info_t *h)
 202 {
 203         if( h->commands_outstanding >= h->max_commands)
 204                 return(1);
 205         else
 206                 return(0);
 207
 208 }
 209 /*
 210  *   returns value read from hardware.
 211  *     returns FIFO_EMPTY if there is nothing to read
 212  */
 213 static unsigned long SA5_completed(ctlr_info_t *h)
 214 {
 215         unsigned long register_value
 216                 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
 217         if(register_value != FIFO_EMPTY)
 218         {
 219                 h->commands_outstanding--;
 220 #ifdef CCISS_DEBUG
 221                 printk("cciss:  Read %lx back from board\n", register_value);
 222 #endif /* CCISS_DEBUG */
 223         }
 224 #ifdef CCISS_DEBUG
 225         else
 226         {
 227                 printk("cciss:  FIFO Empty read\n");
 228         }
 229 #endif
 230         return ( register_value);
 231
 232 }
 233 /*
 234  *      Returns true if an interrupt is pending..
 235  */
 236 static unsigned long SA5_intr_pending(ctlr_info_t *h)
 237 {
 238         unsigned long register_value  =
 239                 readl(h->vaddr + SA5_INTR_STATUS);
 240 #ifdef CCISS_DEBUG
 241         printk("cciss: intr_pending %lx\n", register_value);
 242 #endif  /* CCISS_DEBUG */
 243         if( register_value &  SA5_INTR_PENDING)
 244                 return  1;
 245         return 0 ;
 246 }
 247
 248 /*
 249  *      Returns true if an interrupt is pending..
 250  */
 251 static unsigned long SA5B_intr_pending(ctlr_info_t *h)
 252 {
 253         unsigned long register_value  =
 254                 readl(h->vaddr + SA5_INTR_STATUS);
 255 #ifdef CCISS_DEBUG
 256         printk("cciss: intr_pending %lx\n", register_value);
 257 #endif  /* CCISS_DEBUG */
 258         if( register_value &  SA5B_INTR_PENDING)
 259                 return  1;
 260         return 0 ;
 261 }
 262
 263
 264 static struct access_method SA5_access = {
 265         SA5_submit_command,
 266         SA5_intr_mask,
 267         SA5_fifo_full,
 268         SA5_intr_pending,
 269         SA5_completed,
 270 };
 271
 272 static struct access_method SA5B_access = {
 273         SA5_submit_command,
 274         SA5B_intr_mask,
 275         SA5_fifo_full,
 276         SA5B_intr_pending,
 277         SA5_completed,
 278 };
 279
 280 struct board_type {
 281         __u32   board_id;
 282         char    *product_name;
 283         struct access_method *access;
 284 };
 285
 286 #define CCISS_LOCK(i)   (&hba[i]->lock)
 287
 288 #endif /* CCISS_H */
 289