1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C24XX GPIOlib support
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
20 #include <linux/gpio.h>
22 #include <mach/hardware.h>
25 #include <mach/regs-gpio.h>
27 struct s3c24xx_gpio_chip {
28 struct gpio_chip chip;
32 static inline struct s3c24xx_gpio_chip *to_s3c_chip(struct gpio_chip *gpc)
34 return container_of(gpc, struct s3c24xx_gpio_chip, chip);
37 /* these routines are exported for use by other parts of the platform
38 * and system support, but are not intended to be used directly by the
42 static int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
44 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
45 void __iomem *base = ourchip->base;
49 local_irq_save(flags);
51 con = __raw_readl(base + 0x00);
52 con &= ~(3 << (offset * 2));
53 con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
55 __raw_writel(con, base + 0x00);
57 local_irq_restore(flags);
61 static int s3c24xx_gpiolib_output(struct gpio_chip *chip,
62 unsigned offset, int value)
64 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
65 void __iomem *base = ourchip->base;
70 local_irq_save(flags);
72 dat = __raw_readl(base + 0x04);
73 dat &= ~(1 << offset);
76 __raw_writel(dat, base + 0x04);
78 con = __raw_readl(base + 0x00);
79 con &= ~(3 << (offset * 2));
80 con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
82 __raw_writel(con, base + 0x00);
83 __raw_writel(dat, base + 0x04);
85 local_irq_restore(flags);
89 static void s3c24xx_gpiolib_set(struct gpio_chip *chip,
90 unsigned offset, int value)
92 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
93 void __iomem *base = ourchip->base;
97 local_irq_save(flags);
99 dat = __raw_readl(base + 0x04);
100 dat &= ~(1 << offset);
103 __raw_writel(dat, base + 0x04);
105 local_irq_restore(flags);
108 static int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset)
110 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
113 val = __raw_readl(ourchip->base + 0x04);
120 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
125 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
126 unsigned offset, int value)
128 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
129 void __iomem *base = ourchip->base;
134 local_irq_save(flags);
136 con = __raw_readl(base + 0x00);
137 dat = __raw_readl(base + 0x04);
139 dat &= ~(1 << offset);
143 __raw_writel(dat, base + 0x04);
145 con &= ~(1 << offset);
147 __raw_writel(con, base + 0x00);
148 __raw_writel(dat, base + 0x04);
150 local_irq_restore(flags);
154 static struct s3c24xx_gpio_chip gpios[] = {
156 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
158 .base = S3C2410_GPA0,
159 .owner = THIS_MODULE,
162 .direction_input = s3c24xx_gpiolib_banka_input,
163 .direction_output = s3c24xx_gpiolib_banka_output,
164 .set = s3c24xx_gpiolib_set,
165 .get = s3c24xx_gpiolib_get,
169 .base = S3C24XX_GPIO_BASE(S3C2410_GPB0),
171 .base = S3C2410_GPB0,
172 .owner = THIS_MODULE,
175 .direction_input = s3c24xx_gpiolib_input,
176 .direction_output = s3c24xx_gpiolib_output,
177 .set = s3c24xx_gpiolib_set,
178 .get = s3c24xx_gpiolib_get,
182 .base = S3C24XX_GPIO_BASE(S3C2410_GPC0),
184 .base = S3C2410_GPC0,
185 .owner = THIS_MODULE,
188 .direction_input = s3c24xx_gpiolib_input,
189 .direction_output = s3c24xx_gpiolib_output,
190 .set = s3c24xx_gpiolib_set,
191 .get = s3c24xx_gpiolib_get,
195 .base = S3C24XX_GPIO_BASE(S3C2410_GPD0),
197 .base = S3C2410_GPD0,
198 .owner = THIS_MODULE,
201 .direction_input = s3c24xx_gpiolib_input,
202 .direction_output = s3c24xx_gpiolib_output,
203 .set = s3c24xx_gpiolib_set,
204 .get = s3c24xx_gpiolib_get,
208 .base = S3C24XX_GPIO_BASE(S3C2410_GPE0),
210 .base = S3C2410_GPE0,
212 .owner = THIS_MODULE,
214 .direction_input = s3c24xx_gpiolib_input,
215 .direction_output = s3c24xx_gpiolib_output,
216 .set = s3c24xx_gpiolib_set,
217 .get = s3c24xx_gpiolib_get,
221 .base = S3C24XX_GPIO_BASE(S3C2410_GPF0),
223 .base = S3C2410_GPF0,
224 .owner = THIS_MODULE,
227 .direction_input = s3c24xx_gpiolib_input,
228 .direction_output = s3c24xx_gpiolib_output,
229 .set = s3c24xx_gpiolib_set,
230 .get = s3c24xx_gpiolib_get,
234 .base = S3C24XX_GPIO_BASE(S3C2410_GPG0),
236 .base = S3C2410_GPG0,
237 .owner = THIS_MODULE,
240 .direction_input = s3c24xx_gpiolib_input,
241 .direction_output = s3c24xx_gpiolib_output,
242 .set = s3c24xx_gpiolib_set,
243 .get = s3c24xx_gpiolib_get,
248 static __init int s3c24xx_gpiolib_init(void)
250 struct s3c24xx_gpio_chip *chip = gpios;
253 for (gpn = 0; gpn < ARRAY_SIZE(gpios); gpn++, chip++)
254 gpiochip_add(&chip->chip);
259 arch_initcall(s3c24xx_gpiolib_init);