2 * MPC85xx setup and early boot code plus other random bits.
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * Copyright 2005 Freescale Semiconductor Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/stddef.h>
15 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/kdev_t.h>
18 #include <linux/delay.h>
19 #include <linux/seq_file.h>
21 #include <asm/system.h>
23 #include <asm/machdep.h>
24 #include <asm/pci-bridge.h>
25 #include <asm/mpc85xx.h>
28 #include <mm/mmu_decl.h>
31 #include <sysdev/fsl_soc.h>
35 #include <linux/fs_enet_pd.h>
37 #include <sysdev/cpm2_pic.h>
38 #include <asm/fs_pd.h>
42 static int mpc85xx_exclude_device(struct pci_controller *hose,
43 u_char bus, u_char devfn)
45 if (bus == 0 && PCI_SLOT(devfn) == 0)
46 return PCIBIOS_DEVICE_NOT_FOUND;
48 return PCIBIOS_SUCCESSFUL;
50 #endif /* CONFIG_PCI */
54 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
58 while ((cascade_irq = cpm2_get_irq()) >= 0) {
59 generic_handle_irq(cascade_irq);
64 #endif /* CONFIG_CPM2 */
66 static void __init mpc85xx_ads_pic_init(void)
70 struct device_node *np = NULL;
75 np = of_find_node_by_type(np, "open-pic");
78 printk(KERN_ERR "Could not find open-pic node\n");
82 if(of_address_to_resource(np, 0, &r)) {
83 printk(KERN_ERR "Could not map mpic register space\n");
88 mpic = mpic_alloc(np, r.start,
89 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
98 np = of_find_node_by_type(NULL, "cpm-pic");
100 printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
103 irq = irq_of_parse_and_map(np, 0);
106 set_irq_chained_handler(irq, cpm2_cascade);
111 * Setup the architecture
114 void init_fcc_ioports(struct fs_platform_info *fpi)
116 struct io_port *io = cpm2_map(im_ioport);
117 int fcc_no = fs_get_fcc_index(fpi->fs_no);
123 tempval = in_be32(&io->iop_pdirb);
124 tempval &= ~PB2_DIRB0;
125 tempval |= PB2_DIRB1;
126 out_be32(&io->iop_pdirb, tempval);
128 tempval = in_be32(&io->iop_psorb);
129 tempval &= ~PB2_PSORB0;
130 tempval |= PB2_PSORB1;
131 out_be32(&io->iop_psorb, tempval);
133 tempval = in_be32(&io->iop_pparb);
134 tempval |= (PB2_DIRB0 | PB2_DIRB1);
135 out_be32(&io->iop_pparb, tempval);
137 target = CPM_CLK_FCC2;
140 tempval = in_be32(&io->iop_pdirb);
141 tempval &= ~PB3_DIRB0;
142 tempval |= PB3_DIRB1;
143 out_be32(&io->iop_pdirb, tempval);
145 tempval = in_be32(&io->iop_psorb);
146 tempval &= ~PB3_PSORB0;
147 tempval |= PB3_PSORB1;
148 out_be32(&io->iop_psorb, tempval);
150 tempval = in_be32(&io->iop_pparb);
151 tempval |= (PB3_DIRB0 | PB3_DIRB1);
152 out_be32(&io->iop_pparb, tempval);
154 tempval = in_be32(&io->iop_pdirc);
155 tempval |= PC3_DIRC1;
156 out_be32(&io->iop_pdirc, tempval);
158 tempval = in_be32(&io->iop_pparc);
159 tempval |= PC3_DIRC1;
160 out_be32(&io->iop_pparc, tempval);
162 target = CPM_CLK_FCC3;
165 printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
169 /* Port C has clocks...... */
170 tempval = in_be32(&io->iop_psorc);
171 tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
172 out_be32(&io->iop_psorc, tempval);
174 tempval = in_be32(&io->iop_pdirc);
175 tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
176 out_be32(&io->iop_pdirc, tempval);
177 tempval = in_be32(&io->iop_pparc);
178 tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
179 out_be32(&io->iop_pparc, tempval);
183 /* Configure Serial Interface clock routing.
184 * First, clear FCC bits to zero,
185 * then set the ones we want.
187 cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
188 cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
192 static void __init mpc85xx_ads_setup_arch(void)
194 struct device_node *cpu;
196 struct device_node *np;
200 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
202 cpu = of_find_node_by_type(NULL, "cpu");
204 const unsigned int *fp;
206 fp = of_get_property(cpu, "clock-frequency", NULL);
208 loops_per_jiffy = *fp / HZ;
210 loops_per_jiffy = 50000000 / HZ;
219 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
220 mpc85xx_add_bridge(np);
221 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
225 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
227 uint pvid, svid, phid1;
228 uint memsize = total_memory;
230 pvid = mfspr(SPRN_PVR);
231 svid = mfspr(SPRN_SVR);
233 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
234 seq_printf(m, "Machine\t\t: mpc85xx\n");
235 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
236 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
238 /* Display cpu Pll setting */
239 phid1 = mfspr(SPRN_HID1);
240 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
242 /* Display the amount of memory */
243 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
247 * Called very early, device-tree isn't unflattened
249 static int __init mpc85xx_ads_probe(void)
251 unsigned long root = of_get_flat_dt_root();
253 return of_flat_dt_is_compatible(root, "MPC85xxADS");
256 define_machine(mpc85xx_ads) {
257 .name = "MPC85xx ADS",
258 .probe = mpc85xx_ads_probe,
259 .setup_arch = mpc85xx_ads_setup_arch,
260 .init_IRQ = mpc85xx_ads_pic_init,
261 .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
262 .get_irq = mpic_get_irq,
263 .restart = mpc85xx_restart,
264 .calibrate_decr = generic_calibrate_decr,
265 .progress = udbg_progress,