Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog
[linux-2.6] / drivers / usb / host / ohci-hcd.c
1 /*
2  * OHCI HCD (Host Controller Driver) for USB.
3  *
4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6  *
7  * [ Initialisation is based on Linus'  ]
8  * [ uhci code and gregs ohci fragments ]
9  * [ (C) Copyright 1999 Linus Torvalds  ]
10  * [ (C) Copyright 1999 Gregory P. Smith]
11  *
12  *
13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14  * interfaces (though some non-x86 Intel chips use it).  It supports
15  * smarter hardware than UHCI.  A download link for the spec available
16  * through the http://www.usb.org website.
17  *
18  * This file is licenced under the GPL.
19  */
20
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/timer.h>
32 #include <linux/list.h>
33 #include <linux/usb.h>
34 #include <linux/usb/otg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/dmapool.h>
37 #include <linux/reboot.h>
38 #include <linux/workqueue.h>
39
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/system.h>
43 #include <asm/unaligned.h>
44 #include <asm/byteorder.h>
45
46 #include "../core/hcd.h"
47
48 #define DRIVER_VERSION "2006 August 04"
49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
51
52 /*-------------------------------------------------------------------------*/
53
54 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
55
56 /* For initializing controller (mask in an HCFS mode too) */
57 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
58 #define OHCI_INTR_INIT \
59                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
60                 | OHCI_INTR_RD | OHCI_INTR_WDH)
61
62 #ifdef __hppa__
63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
64 #define IR_DISABLE
65 #endif
66
67 #ifdef CONFIG_ARCH_OMAP
68 /* OMAP doesn't support IR (no SMM; not needed) */
69 #define IR_DISABLE
70 #endif
71
72 /*-------------------------------------------------------------------------*/
73
74 static const char       hcd_name [] = "ohci_hcd";
75
76 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
77
78 #include "ohci.h"
79
80 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
81 static int ohci_init (struct ohci_hcd *ohci);
82 static void ohci_stop (struct usb_hcd *hcd);
83 static int ohci_restart (struct ohci_hcd *ohci);
84 static void ohci_quirk_nec_worker (struct work_struct *work);
85
86 #include "ohci-hub.c"
87 #include "ohci-dbg.c"
88 #include "ohci-mem.c"
89 #include "ohci-q.c"
90
91
92 /*
93  * On architectures with edge-triggered interrupts we must never return
94  * IRQ_NONE.
95  */
96 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
97 #define IRQ_NOTMINE     IRQ_HANDLED
98 #else
99 #define IRQ_NOTMINE     IRQ_NONE
100 #endif
101
102
103 /* Some boards misreport power switching/overcurrent */
104 static int distrust_firmware = 1;
105 module_param (distrust_firmware, bool, 0);
106 MODULE_PARM_DESC (distrust_firmware,
107         "true to distrust firmware power/overcurrent setup");
108
109 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
110 static int no_handshake = 0;
111 module_param (no_handshake, bool, 0);
112 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
113
114 /*-------------------------------------------------------------------------*/
115
116 /*
117  * queue up an urb for anything except the root hub
118  */
119 static int ohci_urb_enqueue (
120         struct usb_hcd  *hcd,
121         struct usb_host_endpoint *ep,
122         struct urb      *urb,
123         gfp_t           mem_flags
124 ) {
125         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
126         struct ed       *ed;
127         urb_priv_t      *urb_priv;
128         unsigned int    pipe = urb->pipe;
129         int             i, size = 0;
130         unsigned long   flags;
131         int             retval = 0;
132
133 #ifdef OHCI_VERBOSE_DEBUG
134         urb_print (urb, "SUB", usb_pipein (pipe));
135 #endif
136
137         /* every endpoint has a ed, locate and maybe (re)initialize it */
138         if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
139                 return -ENOMEM;
140
141         /* for the private part of the URB we need the number of TDs (size) */
142         switch (ed->type) {
143                 case PIPE_CONTROL:
144                         /* td_submit_urb() doesn't yet handle these */
145                         if (urb->transfer_buffer_length > 4096)
146                                 return -EMSGSIZE;
147
148                         /* 1 TD for setup, 1 for ACK, plus ... */
149                         size = 2;
150                         /* FALLTHROUGH */
151                 // case PIPE_INTERRUPT:
152                 // case PIPE_BULK:
153                 default:
154                         /* one TD for every 4096 Bytes (can be upto 8K) */
155                         size += urb->transfer_buffer_length / 4096;
156                         /* ... and for any remaining bytes ... */
157                         if ((urb->transfer_buffer_length % 4096) != 0)
158                                 size++;
159                         /* ... and maybe a zero length packet to wrap it up */
160                         if (size == 0)
161                                 size++;
162                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
163                                 && (urb->transfer_buffer_length
164                                         % usb_maxpacket (urb->dev, pipe,
165                                                 usb_pipeout (pipe))) == 0)
166                                 size++;
167                         break;
168                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
169                         size = urb->number_of_packets;
170                         break;
171         }
172
173         /* allocate the private part of the URB */
174         urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
175                         mem_flags);
176         if (!urb_priv)
177                 return -ENOMEM;
178         memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
179         INIT_LIST_HEAD (&urb_priv->pending);
180         urb_priv->length = size;
181         urb_priv->ed = ed;
182
183         /* allocate the TDs (deferring hash chain updates) */
184         for (i = 0; i < size; i++) {
185                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
186                 if (!urb_priv->td [i]) {
187                         urb_priv->length = i;
188                         urb_free_priv (ohci, urb_priv);
189                         return -ENOMEM;
190                 }
191         }
192
193         spin_lock_irqsave (&ohci->lock, flags);
194
195         /* don't submit to a dead HC */
196         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
197                 retval = -ENODEV;
198                 goto fail;
199         }
200         if (!HC_IS_RUNNING(hcd->state)) {
201                 retval = -ENODEV;
202                 goto fail;
203         }
204
205         /* in case of unlink-during-submit */
206         spin_lock (&urb->lock);
207         if (urb->status != -EINPROGRESS) {
208                 spin_unlock (&urb->lock);
209                 urb->hcpriv = urb_priv;
210                 finish_urb (ohci, urb);
211                 retval = 0;
212                 goto fail;
213         }
214
215         /* schedule the ed if needed */
216         if (ed->state == ED_IDLE) {
217                 retval = ed_schedule (ohci, ed);
218                 if (retval < 0)
219                         goto fail0;
220                 if (ed->type == PIPE_ISOCHRONOUS) {
221                         u16     frame = ohci_frame_no(ohci);
222
223                         /* delay a few frames before the first TD */
224                         frame += max_t (u16, 8, ed->interval);
225                         frame &= ~(ed->interval - 1);
226                         frame |= ed->branch;
227                         urb->start_frame = frame;
228
229                         /* yes, only URB_ISO_ASAP is supported, and
230                          * urb->start_frame is never used as input.
231                          */
232                 }
233         } else if (ed->type == PIPE_ISOCHRONOUS)
234                 urb->start_frame = ed->last_iso + ed->interval;
235
236         /* fill the TDs and link them to the ed; and
237          * enable that part of the schedule, if needed
238          * and update count of queued periodic urbs
239          */
240         urb->hcpriv = urb_priv;
241         td_submit_urb (ohci, urb);
242
243 fail0:
244         spin_unlock (&urb->lock);
245 fail:
246         if (retval)
247                 urb_free_priv (ohci, urb_priv);
248         spin_unlock_irqrestore (&ohci->lock, flags);
249         return retval;
250 }
251
252 /*
253  * decouple the URB from the HC queues (TDs, urb_priv); it's
254  * already marked using urb->status.  reporting is always done
255  * asynchronously, and we might be dealing with an urb that's
256  * partially transferred, or an ED with other urbs being unlinked.
257  */
258 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
259 {
260         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
261         unsigned long           flags;
262
263 #ifdef OHCI_VERBOSE_DEBUG
264         urb_print (urb, "UNLINK", 1);
265 #endif
266
267         spin_lock_irqsave (&ohci->lock, flags);
268         if (HC_IS_RUNNING(hcd->state)) {
269                 urb_priv_t  *urb_priv;
270
271                 /* Unless an IRQ completed the unlink while it was being
272                  * handed to us, flag it for unlink and giveback, and force
273                  * some upcoming INTR_SF to call finish_unlinks()
274                  */
275                 urb_priv = urb->hcpriv;
276                 if (urb_priv) {
277                         if (urb_priv->ed->state == ED_OPER)
278                                 start_ed_unlink (ohci, urb_priv->ed);
279                 }
280         } else {
281                 /*
282                  * with HC dead, we won't respect hc queue pointers
283                  * any more ... just clean up every urb's memory.
284                  */
285                 if (urb->hcpriv)
286                         finish_urb (ohci, urb);
287         }
288         spin_unlock_irqrestore (&ohci->lock, flags);
289         return 0;
290 }
291
292 /*-------------------------------------------------------------------------*/
293
294 /* frees config/altsetting state for endpoints,
295  * including ED memory, dummy TD, and bulk/intr data toggle
296  */
297
298 static void
299 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
300 {
301         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
302         unsigned long           flags;
303         struct ed               *ed = ep->hcpriv;
304         unsigned                limit = 1000;
305
306         /* ASSERT:  any requests/urbs are being unlinked */
307         /* ASSERT:  nobody can be submitting urbs for this any more */
308
309         if (!ed)
310                 return;
311
312 rescan:
313         spin_lock_irqsave (&ohci->lock, flags);
314
315         if (!HC_IS_RUNNING (hcd->state)) {
316 sanitize:
317                 ed->state = ED_IDLE;
318                 finish_unlinks (ohci, 0);
319         }
320
321         switch (ed->state) {
322         case ED_UNLINK:         /* wait for hw to finish? */
323                 /* major IRQ delivery trouble loses INTR_SF too... */
324                 if (limit-- == 0) {
325                         ohci_warn (ohci, "IRQ INTR_SF lossage\n");
326                         goto sanitize;
327                 }
328                 spin_unlock_irqrestore (&ohci->lock, flags);
329                 schedule_timeout_uninterruptible(1);
330                 goto rescan;
331         case ED_IDLE:           /* fully unlinked */
332                 if (list_empty (&ed->td_list)) {
333                         td_free (ohci, ed->dummy);
334                         ed_free (ohci, ed);
335                         break;
336                 }
337                 /* else FALL THROUGH */
338         default:
339                 /* caller was supposed to have unlinked any requests;
340                  * that's not our job.  can't recover; must leak ed.
341                  */
342                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
343                         ed, ep->desc.bEndpointAddress, ed->state,
344                         list_empty (&ed->td_list) ? "" : " (has tds)");
345                 td_free (ohci, ed->dummy);
346                 break;
347         }
348         ep->hcpriv = NULL;
349         spin_unlock_irqrestore (&ohci->lock, flags);
350         return;
351 }
352
353 static int ohci_get_frame (struct usb_hcd *hcd)
354 {
355         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
356
357         return ohci_frame_no(ohci);
358 }
359
360 static void ohci_usb_reset (struct ohci_hcd *ohci)
361 {
362         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
363         ohci->hc_control &= OHCI_CTRL_RWC;
364         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
365 }
366
367 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
368  * other cases where the next software may expect clean state from the
369  * "firmware".  this is bus-neutral, unlike shutdown() methods.
370  */
371 static void
372 ohci_shutdown (struct usb_hcd *hcd)
373 {
374         struct ohci_hcd *ohci;
375
376         ohci = hcd_to_ohci (hcd);
377         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
378         ohci_usb_reset (ohci);
379         /* flush the writes */
380         (void) ohci_readl (ohci, &ohci->regs->control);
381 }
382
383 /*-------------------------------------------------------------------------*
384  * HC functions
385  *-------------------------------------------------------------------------*/
386
387 /* init memory, and kick BIOS/SMM off */
388
389 static int ohci_init (struct ohci_hcd *ohci)
390 {
391         int ret;
392         struct usb_hcd *hcd = ohci_to_hcd(ohci);
393
394         disable (ohci);
395         ohci->regs = hcd->regs;
396
397         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
398          * was never needed for most non-PCI systems ... remove the code?
399          */
400
401 #ifndef IR_DISABLE
402         /* SMM owns the HC?  not for long! */
403         if (!no_handshake && ohci_readl (ohci,
404                                         &ohci->regs->control) & OHCI_CTRL_IR) {
405                 u32 temp;
406
407                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
408
409                 /* this timeout is arbitrary.  we make it long, so systems
410                  * depending on usb keyboards may be usable even if the
411                  * BIOS/SMM code seems pretty broken.
412                  */
413                 temp = 500;     /* arbitrary: five seconds */
414
415                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
416                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
417                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
418                         msleep (10);
419                         if (--temp == 0) {
420                                 ohci_err (ohci, "USB HC takeover failed!"
421                                         "  (BIOS/SMM bug)\n");
422                                 return -EBUSY;
423                         }
424                 }
425                 ohci_usb_reset (ohci);
426         }
427 #endif
428
429         /* Disable HC interrupts */
430         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
431
432         /* flush the writes, and save key bits like RWC */
433         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
434                 ohci->hc_control |= OHCI_CTRL_RWC;
435
436         /* Read the number of ports unless overridden */
437         if (ohci->num_ports == 0)
438                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
439
440         if (ohci->hcca)
441                 return 0;
442
443         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
444                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
445         if (!ohci->hcca)
446                 return -ENOMEM;
447
448         if ((ret = ohci_mem_init (ohci)) < 0)
449                 ohci_stop (hcd);
450         else {
451                 create_debug_files (ohci);
452         }
453
454         return ret;
455 }
456
457 /*-------------------------------------------------------------------------*/
458
459 /* Start an OHCI controller, set the BUS operational
460  * resets USB and controller
461  * enable interrupts
462  */
463 static int ohci_run (struct ohci_hcd *ohci)
464 {
465         u32                     mask, temp;
466         int                     first = ohci->fminterval == 0;
467         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
468
469         disable (ohci);
470
471         /* boot firmware should have set this up (5.1.1.3.1) */
472         if (first) {
473
474                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
475                 ohci->fminterval = temp & 0x3fff;
476                 if (ohci->fminterval != FI)
477                         ohci_dbg (ohci, "fminterval delta %d\n",
478                                 ohci->fminterval - FI);
479                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
480                 /* also: power/overcurrent flags in roothub.a */
481         }
482
483         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
484          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
485          * or if bus glue did the same (e.g. for PCI add-in cards with
486          * PCI PM support).
487          */
488         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
489                         && !device_may_wakeup(hcd->self.controller))
490                 device_init_wakeup(hcd->self.controller, 1);
491
492         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
493         case OHCI_USB_OPER:
494                 temp = 0;
495                 break;
496         case OHCI_USB_SUSPEND:
497         case OHCI_USB_RESUME:
498                 ohci->hc_control &= OHCI_CTRL_RWC;
499                 ohci->hc_control |= OHCI_USB_RESUME;
500                 temp = 10 /* msec wait */;
501                 break;
502         // case OHCI_USB_RESET:
503         default:
504                 ohci->hc_control &= OHCI_CTRL_RWC;
505                 ohci->hc_control |= OHCI_USB_RESET;
506                 temp = 50 /* msec wait */;
507                 break;
508         }
509         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
510         // flush the writes
511         (void) ohci_readl (ohci, &ohci->regs->control);
512         msleep(temp);
513
514         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
515
516         /* 2msec timelimit here means no irqs/preempt */
517         spin_lock_irq (&ohci->lock);
518
519 retry:
520         /* HC Reset requires max 10 us delay */
521         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
522         temp = 30;      /* ... allow extra time */
523         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
524                 if (--temp == 0) {
525                         spin_unlock_irq (&ohci->lock);
526                         ohci_err (ohci, "USB HC reset timed out!\n");
527                         return -1;
528                 }
529                 udelay (1);
530         }
531
532         /* now we're in the SUSPEND state ... must go OPERATIONAL
533          * within 2msec else HC enters RESUME
534          *
535          * ... but some hardware won't init fmInterval "by the book"
536          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
537          * this if we write fmInterval after we're OPERATIONAL.
538          * Unclear about ALi, ServerWorks, and others ... this could
539          * easily be a longstanding bug in chip init on Linux.
540          */
541         if (ohci->flags & OHCI_QUIRK_INITRESET) {
542                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
543                 // flush those writes
544                 (void) ohci_readl (ohci, &ohci->regs->control);
545         }
546
547         /* Tell the controller where the control and bulk lists are
548          * The lists are empty now. */
549         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
550         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
551
552         /* a reset clears this */
553         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
554
555         periodic_reinit (ohci);
556
557         /* some OHCI implementations are finicky about how they init.
558          * bogus values here mean not even enumeration could work.
559          */
560         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
561                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
562                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
563                         ohci->flags |= OHCI_QUIRK_INITRESET;
564                         ohci_dbg (ohci, "enabling initreset quirk\n");
565                         goto retry;
566                 }
567                 spin_unlock_irq (&ohci->lock);
568                 ohci_err (ohci, "init err (%08x %04x)\n",
569                         ohci_readl (ohci, &ohci->regs->fminterval),
570                         ohci_readl (ohci, &ohci->regs->periodicstart));
571                 return -EOVERFLOW;
572         }
573
574         /* use rhsc irqs after khubd is fully initialized */
575         hcd->poll_rh = 1;
576         hcd->uses_new_polling = 1;
577
578         /* start controller operations */
579         ohci->hc_control &= OHCI_CTRL_RWC;
580         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
581         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
582         hcd->state = HC_STATE_RUNNING;
583
584         /* wake on ConnectStatusChange, matching external hubs */
585         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
586
587         /* Choose the interrupts we care about now, others later on demand */
588         mask = OHCI_INTR_INIT;
589         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
590         ohci_writel (ohci, mask, &ohci->regs->intrenable);
591
592         /* handle root hub init quirks ... */
593         temp = roothub_a (ohci);
594         temp &= ~(RH_A_PSM | RH_A_OCPM);
595         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
596                 /* NSC 87560 and maybe others */
597                 temp |= RH_A_NOCP;
598                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
599                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
600         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
601                 /* hub power always on; required for AMD-756 and some
602                  * Mac platforms.  ganged overcurrent reporting, if any.
603                  */
604                 temp |= RH_A_NPS;
605                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
606         }
607         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
608         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
609                                                 &ohci->regs->roothub.b);
610         // flush those writes
611         (void) ohci_readl (ohci, &ohci->regs->control);
612
613         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
614         spin_unlock_irq (&ohci->lock);
615
616         // POTPGT delay is bits 24-31, in 2 ms units.
617         mdelay ((temp >> 23) & 0x1fe);
618         hcd->state = HC_STATE_RUNNING;
619
620         ohci_dump (ohci, 1);
621
622         return 0;
623 }
624
625 /*-------------------------------------------------------------------------*/
626
627 /* an interrupt happens */
628
629 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
630 {
631         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
632         struct ohci_regs __iomem *regs = ohci->regs;
633         int                     ints; 
634
635         /* we can eliminate a (slow) ohci_readl()
636            if _only_ WDH caused this irq */
637         if ((ohci->hcca->done_head != 0)
638                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
639                                 & 0x01)) {
640                 ints =  OHCI_INTR_WDH;
641
642         /* cardbus/... hardware gone before remove() */
643         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
644                 disable (ohci);
645                 ohci_dbg (ohci, "device removed!\n");
646                 return IRQ_HANDLED;
647
648         /* interrupt for some other device? */
649         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
650                 return IRQ_NOTMINE;
651         }
652
653         if (ints & OHCI_INTR_UE) {
654                 // e.g. due to PCI Master/Target Abort
655                 if (ohci->flags & OHCI_QUIRK_NEC) {
656                         /* Workaround for a silicon bug in some NEC chips used
657                          * in Apple's PowerBooks. Adapted from Darwin code.
658                          */
659                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
660
661                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
662
663                         schedule_work (&ohci->nec_work);
664                 } else {
665                         disable (ohci);
666                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
667                 }
668
669                 ohci_dump (ohci, 1);
670                 ohci_usb_reset (ohci);
671         }
672
673         if (ints & OHCI_INTR_RHSC) {
674                 ohci_vdbg(ohci, "rhsc\n");
675                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
676                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
677                                 &regs->intrstatus);
678
679                 /* NOTE: Vendors didn't always make the same implementation
680                  * choices for RHSC.  Many followed the spec; RHSC triggers
681                  * on an edge, like setting and maybe clearing a port status
682                  * change bit.  With others it's level-triggered, active
683                  * until khubd clears all the port status change bits.  We'll
684                  * always disable it here and rely on polling until khubd
685                  * re-enables it.
686                  */
687                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
688                 usb_hcd_poll_rh_status(hcd);
689         }
690
691         /* For connect and disconnect events, we expect the controller
692          * to turn on RHSC along with RD.  But for remote wakeup events
693          * this might not happen.
694          */
695         else if (ints & OHCI_INTR_RD) {
696                 ohci_vdbg(ohci, "resume detect\n");
697                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
698                 hcd->poll_rh = 1;
699                 if (ohci->autostop) {
700                         spin_lock (&ohci->lock);
701                         ohci_rh_resume (ohci);
702                         spin_unlock (&ohci->lock);
703                 } else
704                         usb_hcd_resume_root_hub(hcd);
705         }
706
707         if (ints & OHCI_INTR_WDH) {
708                 if (HC_IS_RUNNING(hcd->state))
709                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
710                 spin_lock (&ohci->lock);
711                 dl_done_list (ohci);
712                 spin_unlock (&ohci->lock);
713                 if (HC_IS_RUNNING(hcd->state))
714                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
715         }
716
717         /* could track INTR_SO to reduce available PCI/... bandwidth */
718
719         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
720          * when there's still unlinking to be done (next frame).
721          */
722         spin_lock (&ohci->lock);
723         if (ohci->ed_rm_list)
724                 finish_unlinks (ohci, ohci_frame_no(ohci));
725         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
726                         && HC_IS_RUNNING(hcd->state))
727                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
728         spin_unlock (&ohci->lock);
729
730         if (HC_IS_RUNNING(hcd->state)) {
731                 ohci_writel (ohci, ints, &regs->intrstatus);
732                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
733                 // flush those writes
734                 (void) ohci_readl (ohci, &ohci->regs->control);
735         }
736
737         return IRQ_HANDLED;
738 }
739
740 /*-------------------------------------------------------------------------*/
741
742 static void ohci_stop (struct usb_hcd *hcd)
743 {
744         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
745
746         ohci_dump (ohci, 1);
747
748         flush_scheduled_work();
749
750         ohci_usb_reset (ohci);
751         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
752         free_irq(hcd->irq, hcd);
753         hcd->irq = -1;
754
755         remove_debug_files (ohci);
756         ohci_mem_cleanup (ohci);
757         if (ohci->hcca) {
758                 dma_free_coherent (hcd->self.controller,
759                                 sizeof *ohci->hcca,
760                                 ohci->hcca, ohci->hcca_dma);
761                 ohci->hcca = NULL;
762                 ohci->hcca_dma = 0;
763         }
764 }
765
766 /*-------------------------------------------------------------------------*/
767
768 /* must not be called from interrupt context */
769 static int ohci_restart (struct ohci_hcd *ohci)
770 {
771         int temp;
772         int i;
773         struct urb_priv *priv;
774
775         spin_lock_irq(&ohci->lock);
776         disable (ohci);
777
778         /* Recycle any "live" eds/tds (and urbs). */
779         if (!list_empty (&ohci->pending))
780                 ohci_dbg(ohci, "abort schedule...\n");
781         list_for_each_entry (priv, &ohci->pending, pending) {
782                 struct urb      *urb = priv->td[0]->urb;
783                 struct ed       *ed = priv->ed;
784
785                 switch (ed->state) {
786                 case ED_OPER:
787                         ed->state = ED_UNLINK;
788                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
789                         ed_deschedule (ohci, ed);
790
791                         ed->ed_next = ohci->ed_rm_list;
792                         ed->ed_prev = NULL;
793                         ohci->ed_rm_list = ed;
794                         /* FALLTHROUGH */
795                 case ED_UNLINK:
796                         break;
797                 default:
798                         ohci_dbg(ohci, "bogus ed %p state %d\n",
799                                         ed, ed->state);
800                 }
801
802                 spin_lock (&urb->lock);
803                 urb->status = -ESHUTDOWN;
804                 spin_unlock (&urb->lock);
805         }
806         finish_unlinks (ohci, 0);
807         spin_unlock_irq(&ohci->lock);
808
809         /* paranoia, in case that didn't work: */
810
811         /* empty the interrupt branches */
812         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
813         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
814
815         /* no EDs to remove */
816         ohci->ed_rm_list = NULL;
817
818         /* empty control and bulk lists */
819         ohci->ed_controltail = NULL;
820         ohci->ed_bulktail    = NULL;
821
822         if ((temp = ohci_run (ohci)) < 0) {
823                 ohci_err (ohci, "can't restart, %d\n", temp);
824                 return temp;
825         }
826         ohci_dbg(ohci, "restart complete\n");
827         return 0;
828 }
829
830 /*-------------------------------------------------------------------------*/
831
832 /* NEC workaround */
833 static void ohci_quirk_nec_worker(struct work_struct *work)
834 {
835         struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
836         int status;
837
838         status = ohci_init(ohci);
839         if (status != 0) {
840                 ohci_err(ohci, "Restarting NEC controller failed "
841                          "in ohci_init, %d\n", status);
842                 return;
843         }
844
845         status = ohci_restart(ohci);
846         if (status != 0)
847                 ohci_err(ohci, "Restarting NEC controller failed "
848                          "in ohci_restart, %d\n", status);
849 }
850
851 /*-------------------------------------------------------------------------*/
852
853 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
854
855 MODULE_AUTHOR (DRIVER_AUTHOR);
856 MODULE_DESCRIPTION (DRIVER_INFO);
857 MODULE_LICENSE ("GPL");
858
859 #ifdef CONFIG_PCI
860 #include "ohci-pci.c"
861 #define PCI_DRIVER              ohci_pci_driver
862 #endif
863
864 #ifdef CONFIG_SA1111
865 #include "ohci-sa1111.c"
866 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
867 #endif
868
869 #ifdef CONFIG_ARCH_S3C2410
870 #include "ohci-s3c2410.c"
871 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
872 #endif
873
874 #ifdef CONFIG_ARCH_OMAP
875 #include "ohci-omap.c"
876 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
877 #endif
878
879 #ifdef CONFIG_ARCH_LH7A404
880 #include "ohci-lh7a404.c"
881 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
882 #endif
883
884 #ifdef CONFIG_PXA27x
885 #include "ohci-pxa27x.c"
886 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
887 #endif
888
889 #ifdef CONFIG_ARCH_EP93XX
890 #include "ohci-ep93xx.c"
891 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
892 #endif
893
894 #ifdef CONFIG_SOC_AU1X00
895 #include "ohci-au1xxx.c"
896 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
897 #endif
898
899 #ifdef CONFIG_PNX8550
900 #include "ohci-pnx8550.c"
901 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
902 #endif
903
904 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
905 #include "ohci-ppc-soc.c"
906 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
907 #endif
908
909 #ifdef CONFIG_ARCH_AT91
910 #include "ohci-at91.c"
911 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
912 #endif
913
914 #ifdef CONFIG_ARCH_PNX4008
915 #include "ohci-pnx4008.c"
916 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
917 #endif
918
919
920 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
921 #include "ohci-ppc-of.c"
922 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
923 #endif
924
925 #ifdef CONFIG_PPC_PS3
926 #include "ohci-ps3.c"
927 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
928 #endif
929
930 #if     !defined(PCI_DRIVER) &&         \
931         !defined(PLATFORM_DRIVER) &&    \
932         !defined(OF_PLATFORM_DRIVER) && \
933         !defined(SA1111_DRIVER) &&      \
934         !defined(PS3_SYSTEM_BUS_DRIVER)
935 #error "missing bus glue for ohci-hcd"
936 #endif
937
938 static int __init ohci_hcd_mod_init(void)
939 {
940         int retval = 0;
941
942         if (usb_disabled())
943                 return -ENODEV;
944
945         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
946         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
947                 sizeof (struct ed), sizeof (struct td));
948
949 #ifdef PS3_SYSTEM_BUS_DRIVER
950         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
951         if (retval < 0)
952                 goto error_ps3;
953 #endif
954
955 #ifdef PLATFORM_DRIVER
956         retval = platform_driver_register(&PLATFORM_DRIVER);
957         if (retval < 0)
958                 goto error_platform;
959 #endif
960
961 #ifdef OF_PLATFORM_DRIVER
962         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
963         if (retval < 0)
964                 goto error_of_platform;
965 #endif
966
967 #ifdef SA1111_DRIVER
968         retval = sa1111_driver_register(&SA1111_DRIVER);
969         if (retval < 0)
970                 goto error_sa1111;
971 #endif
972
973 #ifdef PCI_DRIVER
974         retval = pci_register_driver(&PCI_DRIVER);
975         if (retval < 0)
976                 goto error_pci;
977 #endif
978
979         return retval;
980
981         /* Error path */
982 #ifdef PCI_DRIVER
983  error_pci:
984 #endif
985 #ifdef SA1111_DRIVER
986         sa1111_driver_unregister(&SA1111_DRIVER);
987  error_sa1111:
988 #endif
989 #ifdef OF_PLATFORM_DRIVER
990         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
991  error_of_platform:
992 #endif
993 #ifdef PLATFORM_DRIVER
994         platform_driver_unregister(&PLATFORM_DRIVER);
995  error_platform:
996 #endif
997 #ifdef PS3_SYSTEM_BUS_DRIVER
998         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
999  error_ps3:
1000 #endif
1001         return retval;
1002 }
1003 module_init(ohci_hcd_mod_init);
1004
1005 static void __exit ohci_hcd_mod_exit(void)
1006 {
1007 #ifdef PCI_DRIVER
1008         pci_unregister_driver(&PCI_DRIVER);
1009 #endif
1010 #ifdef SA1111_DRIVER
1011         sa1111_driver_unregister(&SA1111_DRIVER);
1012 #endif
1013 #ifdef OF_PLATFORM_DRIVER
1014         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1015 #endif
1016 #ifdef PLATFORM_DRIVER
1017         platform_driver_unregister(&PLATFORM_DRIVER);
1018 #endif
1019 #ifdef PS3_SYSTEM_BUS_DRIVER
1020         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1021 #endif
1022 }
1023 module_exit(ohci_hcd_mod_exit);
1024