2 * Board setup routines for the Motorola MVME5100.
4 * Author: Matt Porter <mporter@mvista.com>
6 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
12 #include <linux/config.h>
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/pci.h>
18 #include <linux/initrd.h>
19 #include <linux/console.h>
20 #include <linux/delay.h>
21 #include <linux/ide.h>
22 #include <linux/seq_file.h>
23 #include <linux/kdev_t.h>
24 #include <linux/root_dev.h>
26 #include <asm/system.h>
27 #include <asm/pgtable.h>
31 #include <asm/machdep.h>
32 #include <asm/open_pic.h>
33 #include <asm/i8259.h>
35 #include <asm/pci-bridge.h>
36 #include <asm/bootinfo.h>
39 #include <platforms/pplus.h>
40 #include <platforms/mvme5100.h>
42 static u_char mvme5100_openpic_initsenses[16] __initdata = {
43 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */
44 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */
45 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */
46 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */
47 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */
48 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */
49 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */
50 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */
51 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */
52 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */
53 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */
54 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */
55 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */
56 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */
57 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */
58 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */
62 mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
66 static char pci_irq_table[][4] =
68 * PCI IDSEL/INTPIN->INTLINE
72 { 0, 0, 0, 0 }, /* IDSEL 11 - Winbond */
73 { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
74 { 21, 22, 23, 24 }, /* IDSEL 13 - Universe II */
75 { 18, 0, 0, 0 }, /* IDSEL 14 - Enet 1 */
76 { 0, 0, 0, 0 }, /* IDSEL 15 - unused */
77 { 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */
78 { 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */
79 { 0, 0, 0, 0 }, /* IDSEL 18 - unused */
80 { 29, 0, 0, 0 }, /* IDSEL 19 - Enet 2 */
81 { 0, 0, 0, 0 }, /* IDSEL 20 - PMCSPAN */
84 const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
85 irq = PCI_IRQ_TABLE_LOOKUP;
86 /* If lookup is zero, always return 0 */
90 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
91 /* If IPMC761 present, return table value */
94 /* If IPMC761 not present, we don't have an i8259 so adjust */
95 return (irq - NUM_8259_INTERRUPTS);
100 mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
104 if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
105 (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
106 for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
108 dev->resource[i].start = 0;
109 dev->resource[i].end = 0;
114 mvme5100_setup_bridge(void)
116 struct pci_controller* hose;
118 hose = pcibios_alloc_controller();
123 hose->first_busno = 0;
124 hose->last_busno = 0xff;
125 hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
127 pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO,
128 MVME5100_PCI_UPPER_IO, IORESOURCE_IO,
131 pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM,
132 MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM,
135 hose->io_space.start = MVME5100_PCI_LOWER_IO;
136 hose->io_space.end = MVME5100_PCI_UPPER_IO;
137 hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
138 hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
139 hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
141 /* Use indirect method of Hawk */
142 setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR,
143 MVME5100_PCI_CONFIG_DATA);
145 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
147 ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
148 ppc_md.pci_swizzle = common_swizzle;
149 ppc_md.pci_map_irq = mvme5100_map_irq;
153 mvme5100_setup_arch(void)
155 if ( ppc_md.progress )
156 ppc_md.progress("mvme5100_setup_arch: enter", 0);
158 loops_per_jiffy = 50000000 / HZ;
160 #ifdef CONFIG_BLK_DEV_INITRD
162 ROOT_DEV = Root_RAM0;
165 #ifdef CONFIG_ROOT_NFS
168 ROOT_DEV = Root_SDA2;
171 if ( ppc_md.progress )
172 ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
174 /* Setup PCI host bridge */
175 mvme5100_setup_bridge();
177 /* Find and map our OpenPIC */
178 hawk_mpic_init(MVME5100_PCI_MEM_OFFSET);
179 OpenPIC_InitSenses = mvme5100_openpic_initsenses;
180 OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
182 printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
184 if ( ppc_md.progress )
185 ppc_md.progress("mvme5100_setup_arch: exit", 0);
193 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
194 request_region(0x00,0x20,"dma1");
195 request_region(0x20,0x20,"pic1");
196 request_region(0x40,0x20,"timer");
197 request_region(0x80,0x10,"dma page reg");
198 request_region(0xa0,0x20,"pic2");
199 request_region(0xc0,0x20,"dma2");
205 * Interrupt setup and service.
206 * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
209 mvme5100_init_IRQ(void)
211 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
215 if ( ppc_md.progress )
216 ppc_md.progress("init_irq: enter", 0);
218 openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
219 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
220 openpic_init(NUM_8259_INTERRUPTS);
221 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
229 if ( ppc_md.progress )
230 ppc_md.progress("init_irq: exit", 0);
236 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
238 static __inline__ void
239 mvme5100_set_bat(void)
242 mtspr(SPRN_DBAT1U, 0xf0001ffe);
243 mtspr(SPRN_DBAT1L, 0xf000002a);
247 static unsigned long __init
248 mvme5100_find_end_of_memory(void)
250 return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE);
254 mvme5100_map_io(void)
256 io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
257 ioremap_base = 0xfe000000;
261 mvme5100_reset_board(void)
265 /* Set exception prefix high - to the firmware */
266 _nmask_and_or_msr(0, MSR_IP);
268 out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
274 mvme5100_restart(char *cmd)
276 volatile ulong i = 10000000;
278 mvme5100_reset_board();
281 panic("restart failed\n");
292 mvme5100_power_off(void)
298 mvme5100_show_cpuinfo(struct seq_file *m)
300 seq_printf(m, "vendor\t\t: Motorola\n");
301 seq_printf(m, "machine\t\t: MVME5100\n");
309 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
310 unsigned long r6, unsigned long r7)
312 parse_bootinfo(find_bootinfo());
315 isa_io_base = MVME5100_ISA_IO_BASE;
316 isa_mem_base = MVME5100_ISA_MEM_BASE;
317 pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
319 ppc_md.setup_arch = mvme5100_setup_arch;
320 ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
321 ppc_md.init_IRQ = mvme5100_init_IRQ;
322 ppc_md.get_irq = openpic_get_irq;
323 ppc_md.init = mvme5100_init2;
325 ppc_md.restart = mvme5100_restart;
326 ppc_md.power_off = mvme5100_power_off;
327 ppc_md.halt = mvme5100_halt;
329 ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
330 ppc_md.setup_io_mappings = mvme5100_map_io;
332 TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1,
333 MVME5100_NVRAM_DATA, 8);
335 ppc_md.time_init = todc_time_init;
336 ppc_md.set_rtc_time = todc_set_rtc_time;
337 ppc_md.get_rtc_time = todc_get_rtc_time;
338 ppc_md.calibrate_decr = todc_calibrate_decr;
340 ppc_md.nvram_read_val = todc_m48txx_read_val;
341 ppc_md.nvram_write_val = todc_m48txx_write_val;