drm: fix issues with systems with no MTRR
[linux-2.6] / drivers / char / drm / i810_dma.c
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3  *
4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6  * All Rights Reserved.
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the "Software"),
10  * to deal in the Software without restriction, including without limitation
11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12  * and/or sell copies of the Software, and to permit persons to whom the
13  * Software is furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the next
16  * paragraph) shall be included in all copies or substantial portions of the
17  * Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25  * DEALINGS IN THE SOFTWARE.
26  *
27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28  *          Jeff Hartmann <jhartmann@valinux.com>
29  *          Keith Whitwell <keith@tungstengraphics.com>
30  *
31  */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h>    /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/pagemap.h>
40
41 #define I810_BUF_FREE           2
42 #define I810_BUF_CLIENT         1
43 #define I810_BUF_HARDWARE       0
44
45 #define I810_BUF_UNMAPPED 0
46 #define I810_BUF_MAPPED   1
47
48 static drm_buf_t *i810_freelist_get(drm_device_t * dev)
49 {
50         drm_device_dma_t *dma = dev->dma;
51         int i;
52         int used;
53
54         /* Linear search might not be the best solution */
55
56         for (i = 0; i < dma->buf_count; i++) {
57                 drm_buf_t *buf = dma->buflist[i];
58                 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
59                 /* In use is already a pointer */
60                 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
61                                I810_BUF_CLIENT);
62                 if (used == I810_BUF_FREE) {
63                         return buf;
64                 }
65         }
66         return NULL;
67 }
68
69 /* This should only be called if the buffer is not sent to the hardware
70  * yet, the hardware updates in use for us once its on the ring buffer.
71  */
72
73 static int i810_freelist_put(drm_device_t * dev, drm_buf_t * buf)
74 {
75         drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76         int used;
77
78         /* In use is already a pointer */
79         used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80         if (used != I810_BUF_CLIENT) {
81                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82                 return -EINVAL;
83         }
84
85         return 0;
86 }
87
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89 {
90         drm_file_t *priv = filp->private_data;
91         drm_device_t *dev;
92         drm_i810_private_t *dev_priv;
93         drm_buf_t *buf;
94         drm_i810_buf_priv_t *buf_priv;
95
96         lock_kernel();
97         dev = priv->head->dev;
98         dev_priv = dev->dev_private;
99         buf = dev_priv->mmap_buffer;
100         buf_priv = buf->dev_private;
101
102         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
103         vma->vm_file = filp;
104
105         buf_priv->currently_mapped = I810_BUF_MAPPED;
106         unlock_kernel();
107
108         if (io_remap_pfn_range(vma, vma->vm_start,
109                                VM_OFFSET(vma) >> PAGE_SHIFT,
110                                vma->vm_end - vma->vm_start, vma->vm_page_prot))
111                 return -EAGAIN;
112         return 0;
113 }
114
115 static struct file_operations i810_buffer_fops = {
116         .open = drm_open,
117         .release = drm_release,
118         .ioctl = drm_ioctl,
119         .mmap = i810_mmap_buffers,
120         .fasync = drm_fasync,
121 };
122
123 static int i810_map_buffer(drm_buf_t * buf, struct file *filp)
124 {
125         drm_file_t *priv = filp->private_data;
126         drm_device_t *dev = priv->head->dev;
127         drm_i810_buf_priv_t *buf_priv = buf->dev_private;
128         drm_i810_private_t *dev_priv = dev->dev_private;
129         struct file_operations *old_fops;
130         int retcode = 0;
131
132         if (buf_priv->currently_mapped == I810_BUF_MAPPED)
133                 return -EINVAL;
134
135         down_write(&current->mm->mmap_sem);
136         old_fops = filp->f_op;
137         filp->f_op = &i810_buffer_fops;
138         dev_priv->mmap_buffer = buf;
139         buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
140                                             PROT_READ | PROT_WRITE,
141                                             MAP_SHARED, buf->bus_address);
142         dev_priv->mmap_buffer = NULL;
143         filp->f_op = old_fops;
144         if ((unsigned long)buf_priv->virtual > -1024UL) {
145                 /* Real error */
146                 DRM_ERROR("mmap error\n");
147                 retcode = (signed int)buf_priv->virtual;
148                 buf_priv->virtual = NULL;
149         }
150         up_write(&current->mm->mmap_sem);
151
152         return retcode;
153 }
154
155 static int i810_unmap_buffer(drm_buf_t * buf)
156 {
157         drm_i810_buf_priv_t *buf_priv = buf->dev_private;
158         int retcode = 0;
159
160         if (buf_priv->currently_mapped != I810_BUF_MAPPED)
161                 return -EINVAL;
162
163         down_write(&current->mm->mmap_sem);
164         retcode = do_munmap(current->mm,
165                             (unsigned long)buf_priv->virtual,
166                             (size_t) buf->total);
167         up_write(&current->mm->mmap_sem);
168
169         buf_priv->currently_mapped = I810_BUF_UNMAPPED;
170         buf_priv->virtual = NULL;
171
172         return retcode;
173 }
174
175 static int i810_dma_get_buffer(drm_device_t * dev, drm_i810_dma_t * d,
176                                struct file *filp)
177 {
178         drm_buf_t *buf;
179         drm_i810_buf_priv_t *buf_priv;
180         int retcode = 0;
181
182         buf = i810_freelist_get(dev);
183         if (!buf) {
184                 retcode = -ENOMEM;
185                 DRM_DEBUG("retcode=%d\n", retcode);
186                 return retcode;
187         }
188
189         retcode = i810_map_buffer(buf, filp);
190         if (retcode) {
191                 i810_freelist_put(dev, buf);
192                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
193                 return retcode;
194         }
195         buf->filp = filp;
196         buf_priv = buf->dev_private;
197         d->granted = 1;
198         d->request_idx = buf->idx;
199         d->request_size = buf->total;
200         d->virtual = buf_priv->virtual;
201
202         return retcode;
203 }
204
205 static int i810_dma_cleanup(drm_device_t * dev)
206 {
207         drm_device_dma_t *dma = dev->dma;
208
209         /* Make sure interrupts are disabled here because the uninstall ioctl
210          * may not have been called from userspace and after dev_private
211          * is freed, it's too late.
212          */
213         if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
214                 drm_irq_uninstall(dev);
215
216         if (dev->dev_private) {
217                 int i;
218                 drm_i810_private_t *dev_priv =
219                     (drm_i810_private_t *) dev->dev_private;
220
221                 if (dev_priv->ring.virtual_start) {
222                         drm_ioremapfree((void *)dev_priv->ring.virtual_start,
223                                         dev_priv->ring.Size, dev);
224                 }
225                 if (dev_priv->hw_status_page) {
226                         pci_free_consistent(dev->pdev, PAGE_SIZE,
227                                             dev_priv->hw_status_page,
228                                             dev_priv->dma_status_page);
229                         /* Need to rewrite hardware status page */
230                         I810_WRITE(0x02080, 0x1ffff000);
231                 }
232                 drm_free(dev->dev_private, sizeof(drm_i810_private_t),
233                          DRM_MEM_DRIVER);
234                 dev->dev_private = NULL;
235
236                 for (i = 0; i < dma->buf_count; i++) {
237                         drm_buf_t *buf = dma->buflist[i];
238                         drm_i810_buf_priv_t *buf_priv = buf->dev_private;
239                         if (buf_priv->kernel_virtual && buf->total)
240                                 drm_ioremapfree(buf_priv->kernel_virtual,
241                                                 buf->total, dev);
242                 }
243         }
244         return 0;
245 }
246
247 static int i810_wait_ring(drm_device_t * dev, int n)
248 {
249         drm_i810_private_t *dev_priv = dev->dev_private;
250         drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
251         int iters = 0;
252         unsigned long end;
253         unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
254
255         end = jiffies + (HZ * 3);
256         while (ring->space < n) {
257                 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
258                 ring->space = ring->head - (ring->tail + 8);
259                 if (ring->space < 0)
260                         ring->space += ring->Size;
261
262                 if (ring->head != last_head) {
263                         end = jiffies + (HZ * 3);
264                         last_head = ring->head;
265                 }
266
267                 iters++;
268                 if (time_before(end, jiffies)) {
269                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
270                         DRM_ERROR("lockup\n");
271                         goto out_wait_ring;
272                 }
273                 udelay(1);
274         }
275
276       out_wait_ring:
277         return iters;
278 }
279
280 static void i810_kernel_lost_context(drm_device_t * dev)
281 {
282         drm_i810_private_t *dev_priv = dev->dev_private;
283         drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
284
285         ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
286         ring->tail = I810_READ(LP_RING + RING_TAIL);
287         ring->space = ring->head - (ring->tail + 8);
288         if (ring->space < 0)
289                 ring->space += ring->Size;
290 }
291
292 static int i810_freelist_init(drm_device_t * dev, drm_i810_private_t * dev_priv)
293 {
294         drm_device_dma_t *dma = dev->dma;
295         int my_idx = 24;
296         u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
297         int i;
298
299         if (dma->buf_count > 1019) {
300                 /* Not enough space in the status page for the freelist */
301                 return -EINVAL;
302         }
303
304         for (i = 0; i < dma->buf_count; i++) {
305                 drm_buf_t *buf = dma->buflist[i];
306                 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
307
308                 buf_priv->in_use = hw_status++;
309                 buf_priv->my_use_idx = my_idx;
310                 my_idx += 4;
311
312                 *buf_priv->in_use = I810_BUF_FREE;
313
314                 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
315                                                        buf->total, dev);
316         }
317         return 0;
318 }
319
320 static int i810_dma_initialize(drm_device_t * dev,
321                                drm_i810_private_t * dev_priv,
322                                drm_i810_init_t * init)
323 {
324         struct list_head *list;
325
326         memset(dev_priv, 0, sizeof(drm_i810_private_t));
327
328         list_for_each(list, &dev->maplist->head) {
329                 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
330                 if (r_list->map &&
331                     r_list->map->type == _DRM_SHM &&
332                     r_list->map->flags & _DRM_CONTAINS_LOCK) {
333                         dev_priv->sarea_map = r_list->map;
334                         break;
335                 }
336         }
337         if (!dev_priv->sarea_map) {
338                 dev->dev_private = (void *)dev_priv;
339                 i810_dma_cleanup(dev);
340                 DRM_ERROR("can not find sarea!\n");
341                 return -EINVAL;
342         }
343         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
344         if (!dev_priv->mmio_map) {
345                 dev->dev_private = (void *)dev_priv;
346                 i810_dma_cleanup(dev);
347                 DRM_ERROR("can not find mmio map!\n");
348                 return -EINVAL;
349         }
350         dev->agp_buffer_token = init->buffers_offset;
351         dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
352         if (!dev->agp_buffer_map) {
353                 dev->dev_private = (void *)dev_priv;
354                 i810_dma_cleanup(dev);
355                 DRM_ERROR("can not find dma buffer map!\n");
356                 return -EINVAL;
357         }
358
359         dev_priv->sarea_priv = (drm_i810_sarea_t *)
360             ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
361
362         dev_priv->ring.Start = init->ring_start;
363         dev_priv->ring.End = init->ring_end;
364         dev_priv->ring.Size = init->ring_size;
365
366         dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
367                                                    init->ring_start,
368                                                    init->ring_size, dev);
369
370         if (dev_priv->ring.virtual_start == NULL) {
371                 dev->dev_private = (void *)dev_priv;
372                 i810_dma_cleanup(dev);
373                 DRM_ERROR("can not ioremap virtual address for"
374                           " ring buffer\n");
375                 return -ENOMEM;
376         }
377
378         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
379
380         dev_priv->w = init->w;
381         dev_priv->h = init->h;
382         dev_priv->pitch = init->pitch;
383         dev_priv->back_offset = init->back_offset;
384         dev_priv->depth_offset = init->depth_offset;
385         dev_priv->front_offset = init->front_offset;
386
387         dev_priv->overlay_offset = init->overlay_offset;
388         dev_priv->overlay_physical = init->overlay_physical;
389
390         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
391         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
392         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
393
394         /* Program Hardware Status Page */
395         dev_priv->hw_status_page =
396             pci_alloc_consistent(dev->pdev, PAGE_SIZE,
397                                  &dev_priv->dma_status_page);
398         if (!dev_priv->hw_status_page) {
399                 dev->dev_private = (void *)dev_priv;
400                 i810_dma_cleanup(dev);
401                 DRM_ERROR("Can not allocate hardware status page\n");
402                 return -ENOMEM;
403         }
404         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
405         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
406
407         I810_WRITE(0x02080, dev_priv->dma_status_page);
408         DRM_DEBUG("Enabled hardware status page\n");
409
410         /* Now we need to init our freelist */
411         if (i810_freelist_init(dev, dev_priv) != 0) {
412                 dev->dev_private = (void *)dev_priv;
413                 i810_dma_cleanup(dev);
414                 DRM_ERROR("Not enough space in the status page for"
415                           " the freelist\n");
416                 return -ENOMEM;
417         }
418         dev->dev_private = (void *)dev_priv;
419
420         return 0;
421 }
422
423 /* i810 DRM version 1.1 used a smaller init structure with different
424  * ordering of values than is currently used (drm >= 1.2). There is
425  * no defined way to detect the XFree version to correct this problem,
426  * however by checking using this procedure we can detect the correct
427  * thing to do.
428  *
429  * #1 Read the Smaller init structure from user-space
430  * #2 Verify the overlay_physical is a valid physical address, or NULL
431  *    If it isn't then we have a v1.1 client. Fix up params.
432  *    If it is, then we have a 1.2 client... get the rest of the data.
433  */
434 static int i810_dma_init_compat(drm_i810_init_t * init, unsigned long arg)
435 {
436
437         /* Get v1.1 init data */
438         if (copy_from_user(init, (drm_i810_pre12_init_t __user *) arg,
439                            sizeof(drm_i810_pre12_init_t))) {
440                 return -EFAULT;
441         }
442
443         if ((!init->overlay_physical) || (init->overlay_physical > 4096)) {
444
445                 /* This is a v1.2 client, just get the v1.2 init data */
446                 DRM_INFO("Using POST v1.2 init.\n");
447                 if (copy_from_user(init, (drm_i810_init_t __user *) arg,
448                                    sizeof(drm_i810_init_t))) {
449                         return -EFAULT;
450                 }
451         } else {
452
453                 /* This is a v1.1 client, fix the params */
454                 DRM_INFO("Using PRE v1.2 init.\n");
455                 init->pitch_bits = init->h;
456                 init->pitch = init->w;
457                 init->h = init->overlay_physical;
458                 init->w = init->overlay_offset;
459                 init->overlay_physical = 0;
460                 init->overlay_offset = 0;
461         }
462
463         return 0;
464 }
465
466 static int i810_dma_init(struct inode *inode, struct file *filp,
467                          unsigned int cmd, unsigned long arg)
468 {
469         drm_file_t *priv = filp->private_data;
470         drm_device_t *dev = priv->head->dev;
471         drm_i810_private_t *dev_priv;
472         drm_i810_init_t init;
473         int retcode = 0;
474
475         /* Get only the init func */
476         if (copy_from_user
477             (&init, (void __user *)arg, sizeof(drm_i810_init_func_t)))
478                 return -EFAULT;
479
480         switch (init.func) {
481         case I810_INIT_DMA:
482                 /* This case is for backward compatibility. It
483                  * handles XFree 4.1.0 and 4.2.0, and has to
484                  * do some parameter checking as described below.
485                  * It will someday go away.
486                  */
487                 retcode = i810_dma_init_compat(&init, arg);
488                 if (retcode)
489                         return retcode;
490
491                 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
492                                      DRM_MEM_DRIVER);
493                 if (dev_priv == NULL)
494                         return -ENOMEM;
495                 retcode = i810_dma_initialize(dev, dev_priv, &init);
496                 break;
497
498         default:
499         case I810_INIT_DMA_1_4:
500                 DRM_INFO("Using v1.4 init.\n");
501                 if (copy_from_user(&init, (drm_i810_init_t __user *) arg,
502                                    sizeof(drm_i810_init_t))) {
503                         return -EFAULT;
504                 }
505                 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
506                                      DRM_MEM_DRIVER);
507                 if (dev_priv == NULL)
508                         return -ENOMEM;
509                 retcode = i810_dma_initialize(dev, dev_priv, &init);
510                 break;
511
512         case I810_CLEANUP_DMA:
513                 DRM_INFO("DMA Cleanup\n");
514                 retcode = i810_dma_cleanup(dev);
515                 break;
516         }
517
518         return retcode;
519 }
520
521 /* Most efficient way to verify state for the i810 is as it is
522  * emitted.  Non-conformant state is silently dropped.
523  *
524  * Use 'volatile' & local var tmp to force the emitted values to be
525  * identical to the verified ones.
526  */
527 static void i810EmitContextVerified(drm_device_t * dev,
528                                     volatile unsigned int *code)
529 {
530         drm_i810_private_t *dev_priv = dev->dev_private;
531         int i, j = 0;
532         unsigned int tmp;
533         RING_LOCALS;
534
535         BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
536
537         OUT_RING(GFX_OP_COLOR_FACTOR);
538         OUT_RING(code[I810_CTXREG_CF1]);
539
540         OUT_RING(GFX_OP_STIPPLE);
541         OUT_RING(code[I810_CTXREG_ST1]);
542
543         for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
544                 tmp = code[i];
545
546                 if ((tmp & (7 << 29)) == (3 << 29) &&
547                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
548                         OUT_RING(tmp);
549                         j++;
550                 } else
551                         printk("constext state dropped!!!\n");
552         }
553
554         if (j & 1)
555                 OUT_RING(0);
556
557         ADVANCE_LP_RING();
558 }
559
560 static void i810EmitTexVerified(drm_device_t * dev, volatile unsigned int *code)
561 {
562         drm_i810_private_t *dev_priv = dev->dev_private;
563         int i, j = 0;
564         unsigned int tmp;
565         RING_LOCALS;
566
567         BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
568
569         OUT_RING(GFX_OP_MAP_INFO);
570         OUT_RING(code[I810_TEXREG_MI1]);
571         OUT_RING(code[I810_TEXREG_MI2]);
572         OUT_RING(code[I810_TEXREG_MI3]);
573
574         for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
575                 tmp = code[i];
576
577                 if ((tmp & (7 << 29)) == (3 << 29) &&
578                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
579                         OUT_RING(tmp);
580                         j++;
581                 } else
582                         printk("texture state dropped!!!\n");
583         }
584
585         if (j & 1)
586                 OUT_RING(0);
587
588         ADVANCE_LP_RING();
589 }
590
591 /* Need to do some additional checking when setting the dest buffer.
592  */
593 static void i810EmitDestVerified(drm_device_t * dev,
594                                  volatile unsigned int *code)
595 {
596         drm_i810_private_t *dev_priv = dev->dev_private;
597         unsigned int tmp;
598         RING_LOCALS;
599
600         BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
601
602         tmp = code[I810_DESTREG_DI1];
603         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
604                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
605                 OUT_RING(tmp);
606         } else
607                 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
608                           tmp, dev_priv->front_di1, dev_priv->back_di1);
609
610         /* invarient:
611          */
612         OUT_RING(CMD_OP_Z_BUFFER_INFO);
613         OUT_RING(dev_priv->zi1);
614
615         OUT_RING(GFX_OP_DESTBUFFER_VARS);
616         OUT_RING(code[I810_DESTREG_DV1]);
617
618         OUT_RING(GFX_OP_DRAWRECT_INFO);
619         OUT_RING(code[I810_DESTREG_DR1]);
620         OUT_RING(code[I810_DESTREG_DR2]);
621         OUT_RING(code[I810_DESTREG_DR3]);
622         OUT_RING(code[I810_DESTREG_DR4]);
623         OUT_RING(0);
624
625         ADVANCE_LP_RING();
626 }
627
628 static void i810EmitState(drm_device_t * dev)
629 {
630         drm_i810_private_t *dev_priv = dev->dev_private;
631         drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
632         unsigned int dirty = sarea_priv->dirty;
633
634         DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
635
636         if (dirty & I810_UPLOAD_BUFFERS) {
637                 i810EmitDestVerified(dev, sarea_priv->BufferState);
638                 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
639         }
640
641         if (dirty & I810_UPLOAD_CTX) {
642                 i810EmitContextVerified(dev, sarea_priv->ContextState);
643                 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
644         }
645
646         if (dirty & I810_UPLOAD_TEX0) {
647                 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
648                 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
649         }
650
651         if (dirty & I810_UPLOAD_TEX1) {
652                 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
653                 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
654         }
655 }
656
657 /* need to verify
658  */
659 static void i810_dma_dispatch_clear(drm_device_t * dev, int flags,
660                                     unsigned int clear_color,
661                                     unsigned int clear_zval)
662 {
663         drm_i810_private_t *dev_priv = dev->dev_private;
664         drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
665         int nbox = sarea_priv->nbox;
666         drm_clip_rect_t *pbox = sarea_priv->boxes;
667         int pitch = dev_priv->pitch;
668         int cpp = 2;
669         int i;
670         RING_LOCALS;
671
672         if (dev_priv->current_page == 1) {
673                 unsigned int tmp = flags;
674
675                 flags &= ~(I810_FRONT | I810_BACK);
676                 if (tmp & I810_FRONT)
677                         flags |= I810_BACK;
678                 if (tmp & I810_BACK)
679                         flags |= I810_FRONT;
680         }
681
682         i810_kernel_lost_context(dev);
683
684         if (nbox > I810_NR_SAREA_CLIPRECTS)
685                 nbox = I810_NR_SAREA_CLIPRECTS;
686
687         for (i = 0; i < nbox; i++, pbox++) {
688                 unsigned int x = pbox->x1;
689                 unsigned int y = pbox->y1;
690                 unsigned int width = (pbox->x2 - x) * cpp;
691                 unsigned int height = pbox->y2 - y;
692                 unsigned int start = y * pitch + x * cpp;
693
694                 if (pbox->x1 > pbox->x2 ||
695                     pbox->y1 > pbox->y2 ||
696                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
697                         continue;
698
699                 if (flags & I810_FRONT) {
700                         BEGIN_LP_RING(6);
701                         OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
702                         OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
703                         OUT_RING((height << 16) | width);
704                         OUT_RING(start);
705                         OUT_RING(clear_color);
706                         OUT_RING(0);
707                         ADVANCE_LP_RING();
708                 }
709
710                 if (flags & I810_BACK) {
711                         BEGIN_LP_RING(6);
712                         OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
713                         OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
714                         OUT_RING((height << 16) | width);
715                         OUT_RING(dev_priv->back_offset + start);
716                         OUT_RING(clear_color);
717                         OUT_RING(0);
718                         ADVANCE_LP_RING();
719                 }
720
721                 if (flags & I810_DEPTH) {
722                         BEGIN_LP_RING(6);
723                         OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
724                         OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
725                         OUT_RING((height << 16) | width);
726                         OUT_RING(dev_priv->depth_offset + start);
727                         OUT_RING(clear_zval);
728                         OUT_RING(0);
729                         ADVANCE_LP_RING();
730                 }
731         }
732 }
733
734 static void i810_dma_dispatch_swap(drm_device_t * dev)
735 {
736         drm_i810_private_t *dev_priv = dev->dev_private;
737         drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
738         int nbox = sarea_priv->nbox;
739         drm_clip_rect_t *pbox = sarea_priv->boxes;
740         int pitch = dev_priv->pitch;
741         int cpp = 2;
742         int i;
743         RING_LOCALS;
744
745         DRM_DEBUG("swapbuffers\n");
746
747         i810_kernel_lost_context(dev);
748
749         if (nbox > I810_NR_SAREA_CLIPRECTS)
750                 nbox = I810_NR_SAREA_CLIPRECTS;
751
752         for (i = 0; i < nbox; i++, pbox++) {
753                 unsigned int w = pbox->x2 - pbox->x1;
754                 unsigned int h = pbox->y2 - pbox->y1;
755                 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
756                 unsigned int start = dst;
757
758                 if (pbox->x1 > pbox->x2 ||
759                     pbox->y1 > pbox->y2 ||
760                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
761                         continue;
762
763                 BEGIN_LP_RING(6);
764                 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
765                 OUT_RING(pitch | (0xCC << 16));
766                 OUT_RING((h << 16) | (w * cpp));
767                 if (dev_priv->current_page == 0)
768                         OUT_RING(dev_priv->front_offset + start);
769                 else
770                         OUT_RING(dev_priv->back_offset + start);
771                 OUT_RING(pitch);
772                 if (dev_priv->current_page == 0)
773                         OUT_RING(dev_priv->back_offset + start);
774                 else
775                         OUT_RING(dev_priv->front_offset + start);
776                 ADVANCE_LP_RING();
777         }
778 }
779
780 static void i810_dma_dispatch_vertex(drm_device_t * dev,
781                                      drm_buf_t * buf, int discard, int used)
782 {
783         drm_i810_private_t *dev_priv = dev->dev_private;
784         drm_i810_buf_priv_t *buf_priv = buf->dev_private;
785         drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
786         drm_clip_rect_t *box = sarea_priv->boxes;
787         int nbox = sarea_priv->nbox;
788         unsigned long address = (unsigned long)buf->bus_address;
789         unsigned long start = address - dev->agp->base;
790         int i = 0;
791         RING_LOCALS;
792
793         i810_kernel_lost_context(dev);
794
795         if (nbox > I810_NR_SAREA_CLIPRECTS)
796                 nbox = I810_NR_SAREA_CLIPRECTS;
797
798         if (used > 4 * 1024)
799                 used = 0;
800
801         if (sarea_priv->dirty)
802                 i810EmitState(dev);
803
804         if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
805                 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
806
807                 *(u32 *) buf_priv->kernel_virtual =
808                     ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
809
810                 if (used & 4) {
811                         *(u32 *) ((u32) buf_priv->kernel_virtual + used) = 0;
812                         used += 4;
813                 }
814
815                 i810_unmap_buffer(buf);
816         }
817
818         if (used) {
819                 do {
820                         if (i < nbox) {
821                                 BEGIN_LP_RING(4);
822                                 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
823                                          SC_ENABLE);
824                                 OUT_RING(GFX_OP_SCISSOR_INFO);
825                                 OUT_RING(box[i].x1 | (box[i].y1 << 16));
826                                 OUT_RING((box[i].x2 -
827                                           1) | ((box[i].y2 - 1) << 16));
828                                 ADVANCE_LP_RING();
829                         }
830
831                         BEGIN_LP_RING(4);
832                         OUT_RING(CMD_OP_BATCH_BUFFER);
833                         OUT_RING(start | BB1_PROTECTED);
834                         OUT_RING(start + used - 4);
835                         OUT_RING(0);
836                         ADVANCE_LP_RING();
837
838                 } while (++i < nbox);
839         }
840
841         if (discard) {
842                 dev_priv->counter++;
843
844                 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
845                               I810_BUF_HARDWARE);
846
847                 BEGIN_LP_RING(8);
848                 OUT_RING(CMD_STORE_DWORD_IDX);
849                 OUT_RING(20);
850                 OUT_RING(dev_priv->counter);
851                 OUT_RING(CMD_STORE_DWORD_IDX);
852                 OUT_RING(buf_priv->my_use_idx);
853                 OUT_RING(I810_BUF_FREE);
854                 OUT_RING(CMD_REPORT_HEAD);
855                 OUT_RING(0);
856                 ADVANCE_LP_RING();
857         }
858 }
859
860 static void i810_dma_dispatch_flip(drm_device_t * dev)
861 {
862         drm_i810_private_t *dev_priv = dev->dev_private;
863         int pitch = dev_priv->pitch;
864         RING_LOCALS;
865
866         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
867                   __FUNCTION__,
868                   dev_priv->current_page,
869                   dev_priv->sarea_priv->pf_current_page);
870
871         i810_kernel_lost_context(dev);
872
873         BEGIN_LP_RING(2);
874         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
875         OUT_RING(0);
876         ADVANCE_LP_RING();
877
878         BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
879         /* On i815 at least ASYNC is buggy */
880         /* pitch<<5 is from 11.2.8 p158,
881            its the pitch / 8 then left shifted 8,
882            so (pitch >> 3) << 8 */
883         OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
884         if (dev_priv->current_page == 0) {
885                 OUT_RING(dev_priv->back_offset);
886                 dev_priv->current_page = 1;
887         } else {
888                 OUT_RING(dev_priv->front_offset);
889                 dev_priv->current_page = 0;
890         }
891         OUT_RING(0);
892         ADVANCE_LP_RING();
893
894         BEGIN_LP_RING(2);
895         OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
896         OUT_RING(0);
897         ADVANCE_LP_RING();
898
899         /* Increment the frame counter.  The client-side 3D driver must
900          * throttle the framerate by waiting for this value before
901          * performing the swapbuffer ioctl.
902          */
903         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
904
905 }
906
907 static void i810_dma_quiescent(drm_device_t * dev)
908 {
909         drm_i810_private_t *dev_priv = dev->dev_private;
910         RING_LOCALS;
911
912 /*      printk("%s\n", __FUNCTION__); */
913
914         i810_kernel_lost_context(dev);
915
916         BEGIN_LP_RING(4);
917         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
918         OUT_RING(CMD_REPORT_HEAD);
919         OUT_RING(0);
920         OUT_RING(0);
921         ADVANCE_LP_RING();
922
923         i810_wait_ring(dev, dev_priv->ring.Size - 8);
924 }
925
926 static int i810_flush_queue(drm_device_t * dev)
927 {
928         drm_i810_private_t *dev_priv = dev->dev_private;
929         drm_device_dma_t *dma = dev->dma;
930         int i, ret = 0;
931         RING_LOCALS;
932
933 /*      printk("%s\n", __FUNCTION__); */
934
935         i810_kernel_lost_context(dev);
936
937         BEGIN_LP_RING(2);
938         OUT_RING(CMD_REPORT_HEAD);
939         OUT_RING(0);
940         ADVANCE_LP_RING();
941
942         i810_wait_ring(dev, dev_priv->ring.Size - 8);
943
944         for (i = 0; i < dma->buf_count; i++) {
945                 drm_buf_t *buf = dma->buflist[i];
946                 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
947
948                 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
949                                    I810_BUF_FREE);
950
951                 if (used == I810_BUF_HARDWARE)
952                         DRM_DEBUG("reclaimed from HARDWARE\n");
953                 if (used == I810_BUF_CLIENT)
954                         DRM_DEBUG("still on client\n");
955         }
956
957         return ret;
958 }
959
960 /* Must be called with the lock held */
961 void i810_reclaim_buffers(drm_device_t * dev, struct file *filp)
962 {
963         drm_device_dma_t *dma = dev->dma;
964         int i;
965
966         if (!dma)
967                 return;
968         if (!dev->dev_private)
969                 return;
970         if (!dma->buflist)
971                 return;
972
973         i810_flush_queue(dev);
974
975         for (i = 0; i < dma->buf_count; i++) {
976                 drm_buf_t *buf = dma->buflist[i];
977                 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
978
979                 if (buf->filp == filp && buf_priv) {
980                         int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
981                                            I810_BUF_FREE);
982
983                         if (used == I810_BUF_CLIENT)
984                                 DRM_DEBUG("reclaimed from client\n");
985                         if (buf_priv->currently_mapped == I810_BUF_MAPPED)
986                                 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
987                 }
988         }
989 }
990
991 static int i810_flush_ioctl(struct inode *inode, struct file *filp,
992                             unsigned int cmd, unsigned long arg)
993 {
994         drm_file_t *priv = filp->private_data;
995         drm_device_t *dev = priv->head->dev;
996
997         LOCK_TEST_WITH_RETURN(dev, filp);
998
999         i810_flush_queue(dev);
1000         return 0;
1001 }
1002
1003 static int i810_dma_vertex(struct inode *inode, struct file *filp,
1004                            unsigned int cmd, unsigned long arg)
1005 {
1006         drm_file_t *priv = filp->private_data;
1007         drm_device_t *dev = priv->head->dev;
1008         drm_device_dma_t *dma = dev->dma;
1009         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1010         u32 *hw_status = dev_priv->hw_status_page;
1011         drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1012             dev_priv->sarea_priv;
1013         drm_i810_vertex_t vertex;
1014
1015         if (copy_from_user
1016             (&vertex, (drm_i810_vertex_t __user *) arg, sizeof(vertex)))
1017                 return -EFAULT;
1018
1019         LOCK_TEST_WITH_RETURN(dev, filp);
1020
1021         DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
1022                   vertex.idx, vertex.used, vertex.discard);
1023
1024         if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1025                 return -EINVAL;
1026
1027         i810_dma_dispatch_vertex(dev,
1028                                  dma->buflist[vertex.idx],
1029                                  vertex.discard, vertex.used);
1030
1031         atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
1032         atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1033         sarea_priv->last_enqueue = dev_priv->counter - 1;
1034         sarea_priv->last_dispatch = (int)hw_status[5];
1035
1036         return 0;
1037 }
1038
1039 static int i810_clear_bufs(struct inode *inode, struct file *filp,
1040                            unsigned int cmd, unsigned long arg)
1041 {
1042         drm_file_t *priv = filp->private_data;
1043         drm_device_t *dev = priv->head->dev;
1044         drm_i810_clear_t clear;
1045
1046         if (copy_from_user
1047             (&clear, (drm_i810_clear_t __user *) arg, sizeof(clear)))
1048                 return -EFAULT;
1049
1050         LOCK_TEST_WITH_RETURN(dev, filp);
1051
1052         /* GH: Someone's doing nasty things... */
1053         if (!dev->dev_private) {
1054                 return -EINVAL;
1055         }
1056
1057         i810_dma_dispatch_clear(dev, clear.flags,
1058                                 clear.clear_color, clear.clear_depth);
1059         return 0;
1060 }
1061
1062 static int i810_swap_bufs(struct inode *inode, struct file *filp,
1063                           unsigned int cmd, unsigned long arg)
1064 {
1065         drm_file_t *priv = filp->private_data;
1066         drm_device_t *dev = priv->head->dev;
1067
1068         DRM_DEBUG("i810_swap_bufs\n");
1069
1070         LOCK_TEST_WITH_RETURN(dev, filp);
1071
1072         i810_dma_dispatch_swap(dev);
1073         return 0;
1074 }
1075
1076 static int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1077                        unsigned long arg)
1078 {
1079         drm_file_t *priv = filp->private_data;
1080         drm_device_t *dev = priv->head->dev;
1081         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1082         u32 *hw_status = dev_priv->hw_status_page;
1083         drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1084             dev_priv->sarea_priv;
1085
1086         sarea_priv->last_dispatch = (int)hw_status[5];
1087         return 0;
1088 }
1089
1090 static int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1091                        unsigned long arg)
1092 {
1093         drm_file_t *priv = filp->private_data;
1094         drm_device_t *dev = priv->head->dev;
1095         int retcode = 0;
1096         drm_i810_dma_t d;
1097         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1098         u32 *hw_status = dev_priv->hw_status_page;
1099         drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1100             dev_priv->sarea_priv;
1101
1102         if (copy_from_user(&d, (drm_i810_dma_t __user *) arg, sizeof(d)))
1103                 return -EFAULT;
1104
1105         LOCK_TEST_WITH_RETURN(dev, filp);
1106
1107         d.granted = 0;
1108
1109         retcode = i810_dma_get_buffer(dev, &d, filp);
1110
1111         DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1112                   current->pid, retcode, d.granted);
1113
1114         if (copy_to_user((drm_dma_t __user *) arg, &d, sizeof(d)))
1115                 return -EFAULT;
1116         sarea_priv->last_dispatch = (int)hw_status[5];
1117
1118         return retcode;
1119 }
1120
1121 static int i810_copybuf(struct inode *inode,
1122                         struct file *filp, unsigned int cmd, unsigned long arg)
1123 {
1124         /* Never copy - 2.4.x doesn't need it */
1125         return 0;
1126 }
1127
1128 static int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1129                        unsigned long arg)
1130 {
1131         /* Never copy - 2.4.x doesn't need it */
1132         return 0;
1133 }
1134
1135 static void i810_dma_dispatch_mc(drm_device_t * dev, drm_buf_t * buf, int used,
1136                                  unsigned int last_render)
1137 {
1138         drm_i810_private_t *dev_priv = dev->dev_private;
1139         drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1140         drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1141         unsigned long address = (unsigned long)buf->bus_address;
1142         unsigned long start = address - dev->agp->base;
1143         int u;
1144         RING_LOCALS;
1145
1146         i810_kernel_lost_context(dev);
1147
1148         u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1149         if (u != I810_BUF_CLIENT) {
1150                 DRM_DEBUG("MC found buffer that isn't mine!\n");
1151         }
1152
1153         if (used > 4 * 1024)
1154                 used = 0;
1155
1156         sarea_priv->dirty = 0x7f;
1157
1158         DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", address, used);
1159
1160         dev_priv->counter++;
1161         DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1162         DRM_DEBUG("i810_dma_dispatch_mc\n");
1163         DRM_DEBUG("start : %lx\n", start);
1164         DRM_DEBUG("used : %d\n", used);
1165         DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1166
1167         if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1168                 if (used & 4) {
1169                         *(u32 *) ((u32) buf_priv->virtual + used) = 0;
1170                         used += 4;
1171                 }
1172
1173                 i810_unmap_buffer(buf);
1174         }
1175         BEGIN_LP_RING(4);
1176         OUT_RING(CMD_OP_BATCH_BUFFER);
1177         OUT_RING(start | BB1_PROTECTED);
1178         OUT_RING(start + used - 4);
1179         OUT_RING(0);
1180         ADVANCE_LP_RING();
1181
1182         BEGIN_LP_RING(8);
1183         OUT_RING(CMD_STORE_DWORD_IDX);
1184         OUT_RING(buf_priv->my_use_idx);
1185         OUT_RING(I810_BUF_FREE);
1186         OUT_RING(0);
1187
1188         OUT_RING(CMD_STORE_DWORD_IDX);
1189         OUT_RING(16);
1190         OUT_RING(last_render);
1191         OUT_RING(0);
1192         ADVANCE_LP_RING();
1193 }
1194
1195 static int i810_dma_mc(struct inode *inode, struct file *filp,
1196                        unsigned int cmd, unsigned long arg)
1197 {
1198         drm_file_t *priv = filp->private_data;
1199         drm_device_t *dev = priv->head->dev;
1200         drm_device_dma_t *dma = dev->dma;
1201         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1202         u32 *hw_status = dev_priv->hw_status_page;
1203         drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1204             dev_priv->sarea_priv;
1205         drm_i810_mc_t mc;
1206
1207         if (copy_from_user(&mc, (drm_i810_mc_t __user *) arg, sizeof(mc)))
1208                 return -EFAULT;
1209
1210         LOCK_TEST_WITH_RETURN(dev, filp);
1211
1212         if (mc.idx >= dma->buf_count || mc.idx < 0)
1213                 return -EINVAL;
1214
1215         i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used,
1216                              mc.last_render);
1217
1218         atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]);
1219         atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1220         sarea_priv->last_enqueue = dev_priv->counter - 1;
1221         sarea_priv->last_dispatch = (int)hw_status[5];
1222
1223         return 0;
1224 }
1225
1226 static int i810_rstatus(struct inode *inode, struct file *filp,
1227                         unsigned int cmd, unsigned long arg)
1228 {
1229         drm_file_t *priv = filp->private_data;
1230         drm_device_t *dev = priv->head->dev;
1231         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1232
1233         return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1234 }
1235
1236 static int i810_ov0_info(struct inode *inode, struct file *filp,
1237                          unsigned int cmd, unsigned long arg)
1238 {
1239         drm_file_t *priv = filp->private_data;
1240         drm_device_t *dev = priv->head->dev;
1241         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1242         drm_i810_overlay_t data;
1243
1244         data.offset = dev_priv->overlay_offset;
1245         data.physical = dev_priv->overlay_physical;
1246         if (copy_to_user
1247             ((drm_i810_overlay_t __user *) arg, &data, sizeof(data)))
1248                 return -EFAULT;
1249         return 0;
1250 }
1251
1252 static int i810_fstatus(struct inode *inode, struct file *filp,
1253                         unsigned int cmd, unsigned long arg)
1254 {
1255         drm_file_t *priv = filp->private_data;
1256         drm_device_t *dev = priv->head->dev;
1257         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1258
1259         LOCK_TEST_WITH_RETURN(dev, filp);
1260
1261         return I810_READ(0x30008);
1262 }
1263
1264 static int i810_ov0_flip(struct inode *inode, struct file *filp,
1265                          unsigned int cmd, unsigned long arg)
1266 {
1267         drm_file_t *priv = filp->private_data;
1268         drm_device_t *dev = priv->head->dev;
1269         drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1270
1271         LOCK_TEST_WITH_RETURN(dev, filp);
1272
1273         //Tell the overlay to update
1274         I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1275
1276         return 0;
1277 }
1278
1279 /* Not sure why this isn't set all the time:
1280  */
1281 static void i810_do_init_pageflip(drm_device_t * dev)
1282 {
1283         drm_i810_private_t *dev_priv = dev->dev_private;
1284
1285         DRM_DEBUG("%s\n", __FUNCTION__);
1286         dev_priv->page_flipping = 1;
1287         dev_priv->current_page = 0;
1288         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1289 }
1290
1291 static int i810_do_cleanup_pageflip(drm_device_t * dev)
1292 {
1293         drm_i810_private_t *dev_priv = dev->dev_private;
1294
1295         DRM_DEBUG("%s\n", __FUNCTION__);
1296         if (dev_priv->current_page != 0)
1297                 i810_dma_dispatch_flip(dev);
1298
1299         dev_priv->page_flipping = 0;
1300         return 0;
1301 }
1302
1303 static int i810_flip_bufs(struct inode *inode, struct file *filp,
1304                           unsigned int cmd, unsigned long arg)
1305 {
1306         drm_file_t *priv = filp->private_data;
1307         drm_device_t *dev = priv->head->dev;
1308         drm_i810_private_t *dev_priv = dev->dev_private;
1309
1310         DRM_DEBUG("%s\n", __FUNCTION__);
1311
1312         LOCK_TEST_WITH_RETURN(dev, filp);
1313
1314         if (!dev_priv->page_flipping)
1315                 i810_do_init_pageflip(dev);
1316
1317         i810_dma_dispatch_flip(dev);
1318         return 0;
1319 }
1320
1321 int i810_driver_load(drm_device_t *dev, unsigned long flags)
1322 {
1323         /* i810 has 4 more counters */
1324         dev->counters += 4;
1325         dev->types[6] = _DRM_STAT_IRQ;
1326         dev->types[7] = _DRM_STAT_PRIMARY;
1327         dev->types[8] = _DRM_STAT_SECONDARY;
1328         dev->types[9] = _DRM_STAT_DMA;
1329
1330         return 0;
1331 }
1332
1333 void i810_driver_lastclose(drm_device_t * dev)
1334 {
1335         i810_dma_cleanup(dev);
1336 }
1337
1338 void i810_driver_preclose(drm_device_t * dev, DRMFILE filp)
1339 {
1340         if (dev->dev_private) {
1341                 drm_i810_private_t *dev_priv = dev->dev_private;
1342                 if (dev_priv->page_flipping) {
1343                         i810_do_cleanup_pageflip(dev);
1344                 }
1345         }
1346 }
1347
1348 void i810_driver_reclaim_buffers_locked(drm_device_t * dev, struct file *filp)
1349 {
1350         i810_reclaim_buffers(dev, filp);
1351 }
1352
1353 int i810_driver_dma_quiescent(drm_device_t * dev)
1354 {
1355         i810_dma_quiescent(dev);
1356         return 0;
1357 }
1358
1359 drm_ioctl_desc_t i810_ioctls[] = {
1360         [DRM_IOCTL_NR(DRM_I810_INIT)] = {i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
1361         [DRM_IOCTL_NR(DRM_I810_VERTEX)] = {i810_dma_vertex, DRM_AUTH},
1362         [DRM_IOCTL_NR(DRM_I810_CLEAR)] = {i810_clear_bufs, DRM_AUTH},
1363         [DRM_IOCTL_NR(DRM_I810_FLUSH)] = {i810_flush_ioctl, DRM_AUTH},
1364         [DRM_IOCTL_NR(DRM_I810_GETAGE)] = {i810_getage, DRM_AUTH},
1365         [DRM_IOCTL_NR(DRM_I810_GETBUF)] = {i810_getbuf, DRM_AUTH},
1366         [DRM_IOCTL_NR(DRM_I810_SWAP)] = {i810_swap_bufs, DRM_AUTH},
1367         [DRM_IOCTL_NR(DRM_I810_COPY)] = {i810_copybuf, DRM_AUTH},
1368         [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = {i810_docopy, DRM_AUTH},
1369         [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = {i810_ov0_info, DRM_AUTH},
1370         [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = {i810_fstatus, DRM_AUTH},
1371         [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = {i810_ov0_flip, DRM_AUTH},
1372         [DRM_IOCTL_NR(DRM_I810_MC)] = {i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
1373         [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = {i810_rstatus, DRM_AUTH},
1374         [DRM_IOCTL_NR(DRM_I810_FLIP)] = {i810_flip_bufs, DRM_AUTH}
1375 };
1376
1377 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1378
1379 /**
1380  * Determine if the device really is AGP or not.
1381  *
1382  * All Intel graphics chipsets are treated as AGP, even if they are really
1383  * PCI-e.
1384  *
1385  * \param dev   The device to be tested.
1386  *
1387  * \returns
1388  * A value of 1 is always retured to indictate every i810 is AGP.
1389  */
1390 int i810_driver_device_is_agp(drm_device_t * dev)
1391 {
1392         return 1;
1393 }