1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
31 #define EFX_MAX_MTU (9 * 1024)
33 /* RX slow fill workqueue. If memory allocation fails in the fast path,
34 * a work item is pushed onto this work queue to retry the allocation later,
35 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
36 * workqueue, there is nothing to be gained in making it per NIC
38 static struct workqueue_struct *refill_workqueue;
40 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
41 * queued onto this work queue. This is not a per-nic work queue, because
42 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
44 static struct workqueue_struct *reset_workqueue;
46 /**************************************************************************
50 *************************************************************************/
53 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
55 * This sets the default for new devices. It can be controlled later
58 static int lro = true;
59 module_param(lro, int, 0644);
60 MODULE_PARM_DESC(lro, "Large receive offload acceleration");
63 * Use separate channels for TX and RX events
65 * Set this to 1 to use separate channels for TX and RX. It allows us
66 * to control interrupt affinity separately for TX and RX.
68 * This is only used in MSI-X interrupt mode
70 static unsigned int separate_tx_channels;
71 module_param(separate_tx_channels, uint, 0644);
72 MODULE_PARM_DESC(separate_tx_channels,
73 "Use separate channels for TX and RX");
75 /* This is the weight assigned to each of the (per-channel) virtual
78 static int napi_weight = 64;
80 /* This is the time (in jiffies) between invocations of the hardware
81 * monitor, which checks for known hardware bugs and resets the
82 * hardware and driver as necessary.
84 unsigned int efx_monitor_interval = 1 * HZ;
86 /* This controls whether or not the driver will initialise devices
87 * with invalid MAC addresses stored in the EEPROM or flash. If true,
88 * such devices will be initialised with a random locally-generated
89 * MAC address. This allows for loading the sfc_mtd driver to
90 * reprogram the flash, even if the flash contents (including the MAC
91 * address) have previously been erased.
93 static unsigned int allow_bad_hwaddr;
95 /* Initial interrupt moderation settings. They can be modified after
96 * module load with ethtool.
98 * The default for RX should strike a balance between increasing the
99 * round-trip latency and reducing overhead.
101 static unsigned int rx_irq_mod_usec = 60;
103 /* Initial interrupt moderation settings. They can be modified after
104 * module load with ethtool.
106 * This default is chosen to ensure that a 10G link does not go idle
107 * while a TX queue is stopped after it has become full. A queue is
108 * restarted when it drops below half full. The time this takes (assuming
109 * worst case 3 descriptors per packet and 1024 descriptors) is
110 * 512 / 3 * 1.2 = 205 usec.
112 static unsigned int tx_irq_mod_usec = 150;
114 /* This is the first interrupt mode to try out of:
119 static unsigned int interrupt_mode;
121 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
122 * i.e. the number of CPUs among which we may distribute simultaneous
123 * interrupt handling.
125 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
126 * The default (0) means to assign an interrupt to each package (level II cache)
128 static unsigned int rss_cpus;
129 module_param(rss_cpus, uint, 0444);
130 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
132 static int phy_flash_cfg;
133 module_param(phy_flash_cfg, int, 0644);
134 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
136 /**************************************************************************
138 * Utility functions and prototypes
140 *************************************************************************/
141 static void efx_remove_channel(struct efx_channel *channel);
142 static void efx_remove_port(struct efx_nic *efx);
143 static void efx_fini_napi(struct efx_nic *efx);
144 static void efx_fini_channels(struct efx_nic *efx);
146 #define EFX_ASSERT_RESET_SERIALISED(efx) \
148 if (efx->state == STATE_RUNNING) \
152 /**************************************************************************
154 * Event queue processing
156 *************************************************************************/
158 /* Process channel's event queue
160 * This function is responsible for processing the event queue of a
161 * single channel. The caller must guarantee that this function will
162 * never be concurrently called more than once on the same channel,
163 * though different channels may be being processed concurrently.
165 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
167 struct efx_nic *efx = channel->efx;
170 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
174 rx_packets = falcon_process_eventq(channel, rx_quota);
178 /* Deliver last RX packet. */
179 if (channel->rx_pkt) {
180 __efx_rx_packet(channel, channel->rx_pkt,
181 channel->rx_pkt_csummed);
182 channel->rx_pkt = NULL;
185 efx_flush_lro(channel);
186 efx_rx_strategy(channel);
188 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
193 /* Mark channel as finished processing
195 * Note that since we will not receive further interrupts for this
196 * channel before we finish processing and call the eventq_read_ack()
197 * method, there is no need to use the interrupt hold-off timers.
199 static inline void efx_channel_processed(struct efx_channel *channel)
201 /* The interrupt handler for this channel may set work_pending
202 * as soon as we acknowledge the events we've seen. Make sure
203 * it's cleared before then. */
204 channel->work_pending = false;
207 falcon_eventq_read_ack(channel);
212 * NAPI guarantees serialisation of polls of the same device, which
213 * provides the guarantee required by efx_process_channel().
215 static int efx_poll(struct napi_struct *napi, int budget)
217 struct efx_channel *channel =
218 container_of(napi, struct efx_channel, napi_str);
221 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
222 channel->channel, raw_smp_processor_id());
224 rx_packets = efx_process_channel(channel, budget);
226 if (rx_packets < budget) {
227 /* There is no race here; although napi_disable() will
228 * only wait for netif_rx_complete(), this isn't a problem
229 * since efx_channel_processed() will have no effect if
230 * interrupts have already been disabled.
232 netif_rx_complete(napi);
233 efx_channel_processed(channel);
239 /* Process the eventq of the specified channel immediately on this CPU
241 * Disable hardware generated interrupts, wait for any existing
242 * processing to finish, then directly poll (and ack ) the eventq.
243 * Finally reenable NAPI and interrupts.
245 * Since we are touching interrupts the caller should hold the suspend lock
247 void efx_process_channel_now(struct efx_channel *channel)
249 struct efx_nic *efx = channel->efx;
251 BUG_ON(!channel->used_flags);
252 BUG_ON(!channel->enabled);
254 /* Disable interrupts and wait for ISRs to complete */
255 falcon_disable_interrupts(efx);
257 synchronize_irq(efx->legacy_irq);
259 synchronize_irq(channel->irq);
261 /* Wait for any NAPI processing to complete */
262 napi_disable(&channel->napi_str);
264 /* Poll the channel */
265 efx_process_channel(channel, efx->type->evq_size);
267 /* Ack the eventq. This may cause an interrupt to be generated
268 * when they are reenabled */
269 efx_channel_processed(channel);
271 napi_enable(&channel->napi_str);
272 falcon_enable_interrupts(efx);
275 /* Create event queue
276 * Event queue memory allocations are done only once. If the channel
277 * is reset, the memory buffer will be reused; this guards against
278 * errors during channel reset and also simplifies interrupt handling.
280 static int efx_probe_eventq(struct efx_channel *channel)
282 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
284 return falcon_probe_eventq(channel);
287 /* Prepare channel's event queue */
288 static void efx_init_eventq(struct efx_channel *channel)
290 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
292 channel->eventq_read_ptr = 0;
294 falcon_init_eventq(channel);
297 static void efx_fini_eventq(struct efx_channel *channel)
299 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
301 falcon_fini_eventq(channel);
304 static void efx_remove_eventq(struct efx_channel *channel)
306 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
308 falcon_remove_eventq(channel);
311 /**************************************************************************
315 *************************************************************************/
317 static int efx_probe_channel(struct efx_channel *channel)
319 struct efx_tx_queue *tx_queue;
320 struct efx_rx_queue *rx_queue;
323 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
325 rc = efx_probe_eventq(channel);
329 efx_for_each_channel_tx_queue(tx_queue, channel) {
330 rc = efx_probe_tx_queue(tx_queue);
335 efx_for_each_channel_rx_queue(rx_queue, channel) {
336 rc = efx_probe_rx_queue(rx_queue);
341 channel->n_rx_frm_trunc = 0;
346 efx_for_each_channel_rx_queue(rx_queue, channel)
347 efx_remove_rx_queue(rx_queue);
349 efx_for_each_channel_tx_queue(tx_queue, channel)
350 efx_remove_tx_queue(tx_queue);
356 static void efx_set_channel_names(struct efx_nic *efx)
358 struct efx_channel *channel;
359 const char *type = "";
362 efx_for_each_channel(channel, efx) {
363 number = channel->channel;
364 if (efx->n_channels > efx->n_rx_queues) {
365 if (channel->channel < efx->n_rx_queues) {
369 number -= efx->n_rx_queues;
372 snprintf(channel->name, sizeof(channel->name),
373 "%s%s-%d", efx->name, type, number);
377 /* Channels are shutdown and reinitialised whilst the NIC is running
378 * to propagate configuration changes (mtu, checksum offload), or
379 * to clear hardware error conditions
381 static void efx_init_channels(struct efx_nic *efx)
383 struct efx_tx_queue *tx_queue;
384 struct efx_rx_queue *rx_queue;
385 struct efx_channel *channel;
387 /* Calculate the rx buffer allocation parameters required to
388 * support the current MTU, including padding for header
389 * alignment and overruns.
391 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
392 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
393 efx->type->rx_buffer_padding);
394 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
396 /* Initialise the channels */
397 efx_for_each_channel(channel, efx) {
398 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
400 efx_init_eventq(channel);
402 efx_for_each_channel_tx_queue(tx_queue, channel)
403 efx_init_tx_queue(tx_queue);
405 /* The rx buffer allocation strategy is MTU dependent */
406 efx_rx_strategy(channel);
408 efx_for_each_channel_rx_queue(rx_queue, channel)
409 efx_init_rx_queue(rx_queue);
411 WARN_ON(channel->rx_pkt != NULL);
412 efx_rx_strategy(channel);
416 /* This enables event queue processing and packet transmission.
418 * Note that this function is not allowed to fail, since that would
419 * introduce too much complexity into the suspend/resume path.
421 static void efx_start_channel(struct efx_channel *channel)
423 struct efx_rx_queue *rx_queue;
425 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
427 if (!(channel->efx->net_dev->flags & IFF_UP))
428 netif_napi_add(channel->napi_dev, &channel->napi_str,
429 efx_poll, napi_weight);
431 /* The interrupt handler for this channel may set work_pending
432 * as soon as we enable it. Make sure it's cleared before
433 * then. Similarly, make sure it sees the enabled flag set. */
434 channel->work_pending = false;
435 channel->enabled = true;
438 napi_enable(&channel->napi_str);
440 /* Load up RX descriptors */
441 efx_for_each_channel_rx_queue(rx_queue, channel)
442 efx_fast_push_rx_descriptors(rx_queue);
445 /* This disables event queue processing and packet transmission.
446 * This function does not guarantee that all queue processing
447 * (e.g. RX refill) is complete.
449 static void efx_stop_channel(struct efx_channel *channel)
451 struct efx_rx_queue *rx_queue;
453 if (!channel->enabled)
456 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
458 channel->enabled = false;
459 napi_disable(&channel->napi_str);
461 /* Ensure that any worker threads have exited or will be no-ops */
462 efx_for_each_channel_rx_queue(rx_queue, channel) {
463 spin_lock_bh(&rx_queue->add_lock);
464 spin_unlock_bh(&rx_queue->add_lock);
468 static void efx_fini_channels(struct efx_nic *efx)
470 struct efx_channel *channel;
471 struct efx_tx_queue *tx_queue;
472 struct efx_rx_queue *rx_queue;
475 EFX_ASSERT_RESET_SERIALISED(efx);
476 BUG_ON(efx->port_enabled);
478 rc = falcon_flush_queues(efx);
480 EFX_ERR(efx, "failed to flush queues\n");
482 EFX_LOG(efx, "successfully flushed all queues\n");
484 efx_for_each_channel(channel, efx) {
485 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
487 efx_for_each_channel_rx_queue(rx_queue, channel)
488 efx_fini_rx_queue(rx_queue);
489 efx_for_each_channel_tx_queue(tx_queue, channel)
490 efx_fini_tx_queue(tx_queue);
491 efx_fini_eventq(channel);
495 static void efx_remove_channel(struct efx_channel *channel)
497 struct efx_tx_queue *tx_queue;
498 struct efx_rx_queue *rx_queue;
500 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
502 efx_for_each_channel_rx_queue(rx_queue, channel)
503 efx_remove_rx_queue(rx_queue);
504 efx_for_each_channel_tx_queue(tx_queue, channel)
505 efx_remove_tx_queue(tx_queue);
506 efx_remove_eventq(channel);
508 channel->used_flags = 0;
511 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
513 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
516 /**************************************************************************
520 **************************************************************************/
522 /* This ensures that the kernel is kept informed (via
523 * netif_carrier_on/off) of the link status, and also maintains the
524 * link status's stop on the port's TX queue.
526 static void efx_link_status_changed(struct efx_nic *efx)
528 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
529 * that no events are triggered between unregister_netdev() and the
530 * driver unloading. A more general condition is that NETDEV_CHANGE
531 * can only be generated between NETDEV_UP and NETDEV_DOWN */
532 if (!netif_running(efx->net_dev))
535 if (efx->port_inhibited) {
536 netif_carrier_off(efx->net_dev);
540 if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
541 efx->n_link_state_changes++;
544 netif_carrier_on(efx->net_dev);
546 netif_carrier_off(efx->net_dev);
549 /* Status message for kernel log */
551 EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
552 efx->link_speed, efx->link_fd ? "full" : "half",
554 (efx->promiscuous ? " [PROMISC]" : ""));
556 EFX_INFO(efx, "link down\n");
561 /* This call reinitialises the MAC to pick up new PHY settings. The
562 * caller must hold the mac_lock */
563 void __efx_reconfigure_port(struct efx_nic *efx)
565 WARN_ON(!mutex_is_locked(&efx->mac_lock));
567 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
568 raw_smp_processor_id());
570 /* Serialise the promiscuous flag with efx_set_multicast_list. */
571 if (efx_dev_registered(efx)) {
572 netif_addr_lock_bh(efx->net_dev);
573 netif_addr_unlock_bh(efx->net_dev);
576 falcon_deconfigure_mac_wrapper(efx);
578 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
579 if (LOOPBACK_INTERNAL(efx))
580 efx->phy_mode |= PHY_MODE_TX_DISABLED;
582 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
583 efx->phy_op->reconfigure(efx);
585 if (falcon_switch_mac(efx))
588 efx->mac_op->reconfigure(efx);
590 /* Inform kernel of loss/gain of carrier */
591 efx_link_status_changed(efx);
595 EFX_ERR(efx, "failed to reconfigure MAC\n");
596 efx->phy_op->fini(efx);
597 efx->port_initialized = false;
600 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
602 void efx_reconfigure_port(struct efx_nic *efx)
604 EFX_ASSERT_RESET_SERIALISED(efx);
606 mutex_lock(&efx->mac_lock);
607 __efx_reconfigure_port(efx);
608 mutex_unlock(&efx->mac_lock);
611 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
612 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
613 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
614 static void efx_phy_work(struct work_struct *data)
616 struct efx_nic *efx = container_of(data, struct efx_nic, phy_work);
618 mutex_lock(&efx->mac_lock);
619 if (efx->port_enabled)
620 __efx_reconfigure_port(efx);
621 mutex_unlock(&efx->mac_lock);
624 static void efx_mac_work(struct work_struct *data)
626 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
628 mutex_lock(&efx->mac_lock);
629 if (efx->port_enabled)
630 efx->mac_op->irq(efx);
631 mutex_unlock(&efx->mac_lock);
634 static int efx_probe_port(struct efx_nic *efx)
638 EFX_LOG(efx, "create port\n");
640 /* Connect up MAC/PHY operations table and read MAC address */
641 rc = falcon_probe_port(efx);
646 efx->phy_mode = PHY_MODE_SPECIAL;
648 /* Sanity check MAC address */
649 if (is_valid_ether_addr(efx->mac_address)) {
650 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
652 EFX_ERR(efx, "invalid MAC address %pM\n",
654 if (!allow_bad_hwaddr) {
658 random_ether_addr(efx->net_dev->dev_addr);
659 EFX_INFO(efx, "using locally-generated MAC %pM\n",
660 efx->net_dev->dev_addr);
666 efx_remove_port(efx);
670 static int efx_init_port(struct efx_nic *efx)
674 EFX_LOG(efx, "init port\n");
676 rc = efx->phy_op->init(efx);
679 mutex_lock(&efx->mac_lock);
680 efx->phy_op->reconfigure(efx);
681 rc = falcon_switch_mac(efx);
682 mutex_unlock(&efx->mac_lock);
685 efx->mac_op->reconfigure(efx);
687 efx->port_initialized = true;
688 efx_stats_enable(efx);
692 efx->phy_op->fini(efx);
696 /* Allow efx_reconfigure_port() to be scheduled, and close the window
697 * between efx_stop_port and efx_flush_all whereby a previously scheduled
698 * efx_phy_work()/efx_mac_work() may have been cancelled */
699 static void efx_start_port(struct efx_nic *efx)
701 EFX_LOG(efx, "start port\n");
702 BUG_ON(efx->port_enabled);
704 mutex_lock(&efx->mac_lock);
705 efx->port_enabled = true;
706 __efx_reconfigure_port(efx);
707 efx->mac_op->irq(efx);
708 mutex_unlock(&efx->mac_lock);
711 /* Prevent efx_phy_work, efx_mac_work, and efx_monitor() from executing,
712 * and efx_set_multicast_list() from scheduling efx_phy_work. efx_phy_work
713 * and efx_mac_work may still be scheduled via NAPI processing until
714 * efx_flush_all() is called */
715 static void efx_stop_port(struct efx_nic *efx)
717 EFX_LOG(efx, "stop port\n");
719 mutex_lock(&efx->mac_lock);
720 efx->port_enabled = false;
721 mutex_unlock(&efx->mac_lock);
723 /* Serialise against efx_set_multicast_list() */
724 if (efx_dev_registered(efx)) {
725 netif_addr_lock_bh(efx->net_dev);
726 netif_addr_unlock_bh(efx->net_dev);
730 static void efx_fini_port(struct efx_nic *efx)
732 EFX_LOG(efx, "shut down port\n");
734 if (!efx->port_initialized)
737 efx_stats_disable(efx);
738 efx->phy_op->fini(efx);
739 efx->port_initialized = false;
741 efx->link_up = false;
742 efx_link_status_changed(efx);
745 static void efx_remove_port(struct efx_nic *efx)
747 EFX_LOG(efx, "destroying port\n");
749 falcon_remove_port(efx);
752 /**************************************************************************
756 **************************************************************************/
758 /* This configures the PCI device to enable I/O and DMA. */
759 static int efx_init_io(struct efx_nic *efx)
761 struct pci_dev *pci_dev = efx->pci_dev;
762 dma_addr_t dma_mask = efx->type->max_dma_mask;
765 EFX_LOG(efx, "initialising I/O\n");
767 rc = pci_enable_device(pci_dev);
769 EFX_ERR(efx, "failed to enable PCI device\n");
773 pci_set_master(pci_dev);
775 /* Set the PCI DMA mask. Try all possibilities from our
776 * genuine mask down to 32 bits, because some architectures
777 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
778 * masks event though they reject 46 bit masks.
780 while (dma_mask > 0x7fffffffUL) {
781 if (pci_dma_supported(pci_dev, dma_mask) &&
782 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
787 EFX_ERR(efx, "could not find a suitable DMA mask\n");
790 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
791 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
793 /* pci_set_consistent_dma_mask() is not *allowed* to
794 * fail with a mask that pci_set_dma_mask() accepted,
795 * but just in case...
797 EFX_ERR(efx, "failed to set consistent DMA mask\n");
801 efx->membase_phys = pci_resource_start(efx->pci_dev,
803 rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
805 EFX_ERR(efx, "request for memory BAR failed\n");
809 efx->membase = ioremap_nocache(efx->membase_phys,
810 efx->type->mem_map_size);
812 EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
814 (unsigned long long)efx->membase_phys,
815 efx->type->mem_map_size);
819 EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
820 efx->type->mem_bar, (unsigned long long)efx->membase_phys,
821 efx->type->mem_map_size, efx->membase);
826 pci_release_region(efx->pci_dev, efx->type->mem_bar);
828 efx->membase_phys = 0;
830 pci_disable_device(efx->pci_dev);
835 static void efx_fini_io(struct efx_nic *efx)
837 EFX_LOG(efx, "shutting down I/O\n");
840 iounmap(efx->membase);
844 if (efx->membase_phys) {
845 pci_release_region(efx->pci_dev, efx->type->mem_bar);
846 efx->membase_phys = 0;
849 pci_disable_device(efx->pci_dev);
852 /* Get number of RX queues wanted. Return number of online CPU
853 * packages in the expectation that an IRQ balancer will spread
854 * interrupts across them. */
855 static int efx_wanted_rx_queues(void)
857 cpumask_var_t core_mask;
861 if (!alloc_cpumask_var(&core_mask, GFP_KERNEL)) {
863 "efx.c: allocation failure, irq balancing hobbled\n");
867 cpumask_clear(core_mask);
869 for_each_online_cpu(cpu) {
870 if (!cpumask_test_cpu(cpu, core_mask)) {
872 cpumask_or(core_mask, core_mask,
873 topology_core_cpumask(cpu));
877 free_cpumask_var(core_mask);
881 /* Probe the number and type of interrupts we are able to obtain, and
882 * the resulting numbers of channels and RX queues.
884 static void efx_probe_interrupts(struct efx_nic *efx)
887 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
890 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
891 struct msix_entry xentries[EFX_MAX_CHANNELS];
895 /* We want one RX queue and interrupt per CPU package
896 * (or as specified by the rss_cpus module parameter).
897 * We will need one channel per interrupt.
899 rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
900 wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
901 wanted_ints = min(wanted_ints, max_channels);
903 for (i = 0; i < wanted_ints; i++)
904 xentries[i].entry = i;
905 rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
907 EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
908 " available (%d < %d).\n", rc, wanted_ints);
909 EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
910 EFX_BUG_ON_PARANOID(rc >= wanted_ints);
912 rc = pci_enable_msix(efx->pci_dev, xentries,
917 efx->n_rx_queues = min(rx_queues, wanted_ints);
918 efx->n_channels = wanted_ints;
919 for (i = 0; i < wanted_ints; i++)
920 efx->channel[i].irq = xentries[i].vector;
922 /* Fall back to single channel MSI */
923 efx->interrupt_mode = EFX_INT_MODE_MSI;
924 EFX_ERR(efx, "could not enable MSI-X\n");
928 /* Try single interrupt MSI */
929 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
930 efx->n_rx_queues = 1;
932 rc = pci_enable_msi(efx->pci_dev);
934 efx->channel[0].irq = efx->pci_dev->irq;
936 EFX_ERR(efx, "could not enable MSI\n");
937 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
941 /* Assume legacy interrupts */
942 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
943 efx->n_rx_queues = 1;
944 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
945 efx->legacy_irq = efx->pci_dev->irq;
949 static void efx_remove_interrupts(struct efx_nic *efx)
951 struct efx_channel *channel;
953 /* Remove MSI/MSI-X interrupts */
954 efx_for_each_channel(channel, efx)
956 pci_disable_msi(efx->pci_dev);
957 pci_disable_msix(efx->pci_dev);
959 /* Remove legacy interrupt */
963 static void efx_set_channels(struct efx_nic *efx)
965 struct efx_tx_queue *tx_queue;
966 struct efx_rx_queue *rx_queue;
968 efx_for_each_tx_queue(tx_queue, efx) {
969 if (separate_tx_channels)
970 tx_queue->channel = &efx->channel[efx->n_channels-1];
972 tx_queue->channel = &efx->channel[0];
973 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
976 efx_for_each_rx_queue(rx_queue, efx) {
977 rx_queue->channel = &efx->channel[rx_queue->queue];
978 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
982 static int efx_probe_nic(struct efx_nic *efx)
986 EFX_LOG(efx, "creating NIC\n");
988 /* Carry out hardware-type specific initialisation */
989 rc = falcon_probe_nic(efx);
993 /* Determine the number of channels and RX queues by trying to hook
994 * in MSI-X interrupts. */
995 efx_probe_interrupts(efx);
997 efx_set_channels(efx);
999 /* Initialise the interrupt moderation settings */
1000 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec);
1005 static void efx_remove_nic(struct efx_nic *efx)
1007 EFX_LOG(efx, "destroying NIC\n");
1009 efx_remove_interrupts(efx);
1010 falcon_remove_nic(efx);
1013 /**************************************************************************
1015 * NIC startup/shutdown
1017 *************************************************************************/
1019 static int efx_probe_all(struct efx_nic *efx)
1021 struct efx_channel *channel;
1025 rc = efx_probe_nic(efx);
1027 EFX_ERR(efx, "failed to create NIC\n");
1032 rc = efx_probe_port(efx);
1034 EFX_ERR(efx, "failed to create port\n");
1038 /* Create channels */
1039 efx_for_each_channel(channel, efx) {
1040 rc = efx_probe_channel(channel);
1042 EFX_ERR(efx, "failed to create channel %d\n",
1047 efx_set_channel_names(efx);
1052 efx_for_each_channel(channel, efx)
1053 efx_remove_channel(channel);
1054 efx_remove_port(efx);
1056 efx_remove_nic(efx);
1061 /* Called after previous invocation(s) of efx_stop_all, restarts the
1062 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1063 * and ensures that the port is scheduled to be reconfigured.
1064 * This function is safe to call multiple times when the NIC is in any
1066 static void efx_start_all(struct efx_nic *efx)
1068 struct efx_channel *channel;
1070 EFX_ASSERT_RESET_SERIALISED(efx);
1072 /* Check that it is appropriate to restart the interface. All
1073 * of these flags are safe to read under just the rtnl lock */
1074 if (efx->port_enabled)
1076 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1078 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1081 /* Mark the port as enabled so port reconfigurations can start, then
1082 * restart the transmit interface early so the watchdog timer stops */
1083 efx_start_port(efx);
1084 if (efx_dev_registered(efx))
1085 efx_wake_queue(efx);
1087 efx_for_each_channel(channel, efx)
1088 efx_start_channel(channel);
1090 falcon_enable_interrupts(efx);
1092 /* Start hardware monitor if we're in RUNNING */
1093 if (efx->state == STATE_RUNNING)
1094 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1095 efx_monitor_interval);
1098 /* Flush all delayed work. Should only be called when no more delayed work
1099 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1100 * since we're holding the rtnl_lock at this point. */
1101 static void efx_flush_all(struct efx_nic *efx)
1103 struct efx_rx_queue *rx_queue;
1105 /* Make sure the hardware monitor is stopped */
1106 cancel_delayed_work_sync(&efx->monitor_work);
1108 /* Ensure that all RX slow refills are complete. */
1109 efx_for_each_rx_queue(rx_queue, efx)
1110 cancel_delayed_work_sync(&rx_queue->work);
1112 /* Stop scheduled port reconfigurations */
1113 cancel_work_sync(&efx->mac_work);
1114 cancel_work_sync(&efx->phy_work);
1118 /* Quiesce hardware and software without bringing the link down.
1119 * Safe to call multiple times, when the nic and interface is in any
1120 * state. The caller is guaranteed to subsequently be in a position
1121 * to modify any hardware and software state they see fit without
1123 static void efx_stop_all(struct efx_nic *efx)
1125 struct efx_channel *channel;
1127 EFX_ASSERT_RESET_SERIALISED(efx);
1129 /* port_enabled can be read safely under the rtnl lock */
1130 if (!efx->port_enabled)
1133 /* Disable interrupts and wait for ISR to complete */
1134 falcon_disable_interrupts(efx);
1135 if (efx->legacy_irq)
1136 synchronize_irq(efx->legacy_irq);
1137 efx_for_each_channel(channel, efx) {
1139 synchronize_irq(channel->irq);
1142 /* Stop all NAPI processing and synchronous rx refills */
1143 efx_for_each_channel(channel, efx)
1144 efx_stop_channel(channel);
1146 /* Stop all asynchronous port reconfigurations. Since all
1147 * event processing has already been stopped, there is no
1148 * window to loose phy events */
1151 /* Flush efx_phy_work, efx_mac_work, refill_workqueue, monitor_work */
1154 /* Isolate the MAC from the TX and RX engines, so that queue
1155 * flushes will complete in a timely fashion. */
1156 falcon_drain_tx_fifo(efx);
1158 /* Stop the kernel transmit interface late, so the watchdog
1159 * timer isn't ticking over the flush */
1160 if (efx_dev_registered(efx)) {
1161 efx_stop_queue(efx);
1162 netif_tx_lock_bh(efx->net_dev);
1163 netif_tx_unlock_bh(efx->net_dev);
1167 static void efx_remove_all(struct efx_nic *efx)
1169 struct efx_channel *channel;
1171 efx_for_each_channel(channel, efx)
1172 efx_remove_channel(channel);
1173 efx_remove_port(efx);
1174 efx_remove_nic(efx);
1177 /* A convinience function to safely flush all the queues */
1178 void efx_flush_queues(struct efx_nic *efx)
1180 EFX_ASSERT_RESET_SERIALISED(efx);
1184 efx_fini_channels(efx);
1185 efx_init_channels(efx);
1190 /**************************************************************************
1192 * Interrupt moderation
1194 **************************************************************************/
1196 /* Set interrupt moderation parameters */
1197 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs)
1199 struct efx_tx_queue *tx_queue;
1200 struct efx_rx_queue *rx_queue;
1202 EFX_ASSERT_RESET_SERIALISED(efx);
1204 efx_for_each_tx_queue(tx_queue, efx)
1205 tx_queue->channel->irq_moderation = tx_usecs;
1207 efx_for_each_rx_queue(rx_queue, efx)
1208 rx_queue->channel->irq_moderation = rx_usecs;
1211 /**************************************************************************
1215 **************************************************************************/
1217 /* Run periodically off the general workqueue. Serialised against
1218 * efx_reconfigure_port via the mac_lock */
1219 static void efx_monitor(struct work_struct *data)
1221 struct efx_nic *efx = container_of(data, struct efx_nic,
1225 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1226 raw_smp_processor_id());
1228 /* If the mac_lock is already held then it is likely a port
1229 * reconfiguration is already in place, which will likely do
1230 * most of the work of check_hw() anyway. */
1231 if (!mutex_trylock(&efx->mac_lock))
1233 if (!efx->port_enabled)
1235 rc = efx->board_info.monitor(efx);
1237 EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
1238 (rc == -ERANGE) ? "reported fault" : "failed");
1239 efx->phy_mode |= PHY_MODE_LOW_POWER;
1240 falcon_sim_phy_event(efx);
1242 efx->phy_op->poll(efx);
1243 efx->mac_op->poll(efx);
1246 mutex_unlock(&efx->mac_lock);
1248 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1249 efx_monitor_interval);
1252 /**************************************************************************
1256 *************************************************************************/
1259 * Context: process, rtnl_lock() held.
1261 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1263 struct efx_nic *efx = netdev_priv(net_dev);
1265 EFX_ASSERT_RESET_SERIALISED(efx);
1267 return generic_mii_ioctl(&efx->mii, if_mii(ifr), cmd, NULL);
1270 /**************************************************************************
1274 **************************************************************************/
1276 static int efx_init_napi(struct efx_nic *efx)
1278 struct efx_channel *channel;
1281 efx_for_each_channel(channel, efx) {
1282 channel->napi_dev = efx->net_dev;
1283 rc = efx_lro_init(&channel->lro_mgr, efx);
1293 static void efx_fini_napi(struct efx_nic *efx)
1295 struct efx_channel *channel;
1297 efx_for_each_channel(channel, efx) {
1298 efx_lro_fini(&channel->lro_mgr);
1299 channel->napi_dev = NULL;
1303 /**************************************************************************
1305 * Kernel netpoll interface
1307 *************************************************************************/
1309 #ifdef CONFIG_NET_POLL_CONTROLLER
1311 /* Although in the common case interrupts will be disabled, this is not
1312 * guaranteed. However, all our work happens inside the NAPI callback,
1313 * so no locking is required.
1315 static void efx_netpoll(struct net_device *net_dev)
1317 struct efx_nic *efx = netdev_priv(net_dev);
1318 struct efx_channel *channel;
1320 efx_for_each_channel(channel, efx)
1321 efx_schedule_channel(channel);
1326 /**************************************************************************
1328 * Kernel net device interface
1330 *************************************************************************/
1332 /* Context: process, rtnl_lock() held. */
1333 static int efx_net_open(struct net_device *net_dev)
1335 struct efx_nic *efx = netdev_priv(net_dev);
1336 EFX_ASSERT_RESET_SERIALISED(efx);
1338 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1339 raw_smp_processor_id());
1341 if (efx->state == STATE_DISABLED)
1343 if (efx->phy_mode & PHY_MODE_SPECIAL)
1350 /* Context: process, rtnl_lock() held.
1351 * Note that the kernel will ignore our return code; this method
1352 * should really be a void.
1354 static int efx_net_stop(struct net_device *net_dev)
1356 struct efx_nic *efx = netdev_priv(net_dev);
1358 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1359 raw_smp_processor_id());
1361 if (efx->state != STATE_DISABLED) {
1362 /* Stop the device and flush all the channels */
1364 efx_fini_channels(efx);
1365 efx_init_channels(efx);
1371 void efx_stats_disable(struct efx_nic *efx)
1373 spin_lock(&efx->stats_lock);
1374 ++efx->stats_disable_count;
1375 spin_unlock(&efx->stats_lock);
1378 void efx_stats_enable(struct efx_nic *efx)
1380 spin_lock(&efx->stats_lock);
1381 --efx->stats_disable_count;
1382 spin_unlock(&efx->stats_lock);
1385 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1386 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1388 struct efx_nic *efx = netdev_priv(net_dev);
1389 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1390 struct net_device_stats *stats = &net_dev->stats;
1392 /* Update stats if possible, but do not wait if another thread
1393 * is updating them or if MAC stats fetches are temporarily
1394 * disabled; slightly stale stats are acceptable.
1396 if (!spin_trylock(&efx->stats_lock))
1398 if (!efx->stats_disable_count) {
1399 efx->mac_op->update_stats(efx);
1400 falcon_update_nic_stats(efx);
1402 spin_unlock(&efx->stats_lock);
1404 stats->rx_packets = mac_stats->rx_packets;
1405 stats->tx_packets = mac_stats->tx_packets;
1406 stats->rx_bytes = mac_stats->rx_bytes;
1407 stats->tx_bytes = mac_stats->tx_bytes;
1408 stats->multicast = mac_stats->rx_multicast;
1409 stats->collisions = mac_stats->tx_collision;
1410 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1411 mac_stats->rx_length_error);
1412 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1413 stats->rx_crc_errors = mac_stats->rx_bad;
1414 stats->rx_frame_errors = mac_stats->rx_align_error;
1415 stats->rx_fifo_errors = mac_stats->rx_overflow;
1416 stats->rx_missed_errors = mac_stats->rx_missed;
1417 stats->tx_window_errors = mac_stats->tx_late_collision;
1419 stats->rx_errors = (stats->rx_length_errors +
1420 stats->rx_over_errors +
1421 stats->rx_crc_errors +
1422 stats->rx_frame_errors +
1423 stats->rx_fifo_errors +
1424 stats->rx_missed_errors +
1425 mac_stats->rx_symbol_error);
1426 stats->tx_errors = (stats->tx_window_errors +
1432 /* Context: netif_tx_lock held, BHs disabled. */
1433 static void efx_watchdog(struct net_device *net_dev)
1435 struct efx_nic *efx = netdev_priv(net_dev);
1437 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1438 " resetting channels\n",
1439 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1441 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1445 /* Context: process, rtnl_lock() held. */
1446 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1448 struct efx_nic *efx = netdev_priv(net_dev);
1451 EFX_ASSERT_RESET_SERIALISED(efx);
1453 if (new_mtu > EFX_MAX_MTU)
1458 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1460 efx_fini_channels(efx);
1461 net_dev->mtu = new_mtu;
1462 efx_init_channels(efx);
1468 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1470 struct efx_nic *efx = netdev_priv(net_dev);
1471 struct sockaddr *addr = data;
1472 char *new_addr = addr->sa_data;
1474 EFX_ASSERT_RESET_SERIALISED(efx);
1476 if (!is_valid_ether_addr(new_addr)) {
1477 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1482 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1484 /* Reconfigure the MAC */
1485 efx_reconfigure_port(efx);
1490 /* Context: netif_addr_lock held, BHs disabled. */
1491 static void efx_set_multicast_list(struct net_device *net_dev)
1493 struct efx_nic *efx = netdev_priv(net_dev);
1494 struct dev_mc_list *mc_list = net_dev->mc_list;
1495 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1496 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1497 bool changed = (efx->promiscuous != promiscuous);
1502 efx->promiscuous = promiscuous;
1504 /* Build multicast hash table */
1505 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1506 memset(mc_hash, 0xff, sizeof(*mc_hash));
1508 memset(mc_hash, 0x00, sizeof(*mc_hash));
1509 for (i = 0; i < net_dev->mc_count; i++) {
1510 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1511 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1512 set_bit_le(bit, mc_hash->byte);
1513 mc_list = mc_list->next;
1517 if (!efx->port_enabled)
1518 /* Delay pushing settings until efx_start_port() */
1522 queue_work(efx->workqueue, &efx->phy_work);
1524 /* Create and activate new global multicast hash table */
1525 falcon_set_multicast_hash(efx);
1528 static const struct net_device_ops efx_netdev_ops = {
1529 .ndo_open = efx_net_open,
1530 .ndo_stop = efx_net_stop,
1531 .ndo_get_stats = efx_net_stats,
1532 .ndo_tx_timeout = efx_watchdog,
1533 .ndo_start_xmit = efx_hard_start_xmit,
1534 .ndo_validate_addr = eth_validate_addr,
1535 .ndo_do_ioctl = efx_ioctl,
1536 .ndo_change_mtu = efx_change_mtu,
1537 .ndo_set_mac_address = efx_set_mac_address,
1538 .ndo_set_multicast_list = efx_set_multicast_list,
1539 #ifdef CONFIG_NET_POLL_CONTROLLER
1540 .ndo_poll_controller = efx_netpoll,
1544 static void efx_update_name(struct efx_nic *efx)
1546 strcpy(efx->name, efx->net_dev->name);
1547 efx_mtd_rename(efx);
1548 efx_set_channel_names(efx);
1551 static int efx_netdev_event(struct notifier_block *this,
1552 unsigned long event, void *ptr)
1554 struct net_device *net_dev = ptr;
1556 if (net_dev->netdev_ops == &efx_netdev_ops &&
1557 event == NETDEV_CHANGENAME)
1558 efx_update_name(netdev_priv(net_dev));
1563 static struct notifier_block efx_netdev_notifier = {
1564 .notifier_call = efx_netdev_event,
1568 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1570 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1571 return sprintf(buf, "%d\n", efx->phy_type);
1573 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1575 static int efx_register_netdev(struct efx_nic *efx)
1577 struct net_device *net_dev = efx->net_dev;
1580 net_dev->watchdog_timeo = 5 * HZ;
1581 net_dev->irq = efx->pci_dev->irq;
1582 net_dev->netdev_ops = &efx_netdev_ops;
1583 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1584 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1586 /* Always start with carrier off; PHY events will detect the link */
1587 netif_carrier_off(efx->net_dev);
1589 /* Clear MAC statistics */
1590 efx->mac_op->update_stats(efx);
1591 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1593 rc = register_netdev(net_dev);
1595 EFX_ERR(efx, "could not register net dev\n");
1600 efx_update_name(efx);
1603 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1605 EFX_ERR(efx, "failed to init net dev attributes\n");
1606 goto fail_registered;
1612 unregister_netdev(net_dev);
1616 static void efx_unregister_netdev(struct efx_nic *efx)
1618 struct efx_tx_queue *tx_queue;
1623 BUG_ON(netdev_priv(efx->net_dev) != efx);
1625 /* Free up any skbs still remaining. This has to happen before
1626 * we try to unregister the netdev as running their destructors
1627 * may be needed to get the device ref. count to 0. */
1628 efx_for_each_tx_queue(tx_queue, efx)
1629 efx_release_tx_buffers(tx_queue);
1631 if (efx_dev_registered(efx)) {
1632 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1633 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1634 unregister_netdev(efx->net_dev);
1638 /**************************************************************************
1640 * Device reset and suspend
1642 **************************************************************************/
1644 /* Tears down the entire software state and most of the hardware state
1646 void efx_reset_down(struct efx_nic *efx, enum reset_type method,
1647 struct ethtool_cmd *ecmd)
1649 EFX_ASSERT_RESET_SERIALISED(efx);
1651 efx_stats_disable(efx);
1653 mutex_lock(&efx->mac_lock);
1654 mutex_lock(&efx->spi_lock);
1656 efx->phy_op->get_settings(efx, ecmd);
1658 efx_fini_channels(efx);
1659 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1660 efx->phy_op->fini(efx);
1663 /* This function will always ensure that the locks acquired in
1664 * efx_reset_down() are released. A failure return code indicates
1665 * that we were unable to reinitialise the hardware, and the
1666 * driver should be disabled. If ok is false, then the rx and tx
1667 * engines are not restarted, pending a RESET_DISABLE. */
1668 int efx_reset_up(struct efx_nic *efx, enum reset_type method,
1669 struct ethtool_cmd *ecmd, bool ok)
1673 EFX_ASSERT_RESET_SERIALISED(efx);
1675 rc = falcon_init_nic(efx);
1677 EFX_ERR(efx, "failed to initialise NIC\n");
1681 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1683 rc = efx->phy_op->init(efx);
1687 efx->port_initialized = false;
1691 efx_init_channels(efx);
1693 if (efx->phy_op->set_settings(efx, ecmd))
1694 EFX_ERR(efx, "could not restore PHY settings\n");
1697 mutex_unlock(&efx->spi_lock);
1698 mutex_unlock(&efx->mac_lock);
1702 efx_stats_enable(efx);
1707 /* Reset the NIC as transparently as possible. Do not reset the PHY
1708 * Note that the reset may fail, in which case the card will be left
1709 * in a most-probably-unusable state.
1711 * This function will sleep. You cannot reset from within an atomic
1712 * state; use efx_schedule_reset() instead.
1714 * Grabs the rtnl_lock.
1716 static int efx_reset(struct efx_nic *efx)
1718 struct ethtool_cmd ecmd;
1719 enum reset_type method = efx->reset_pending;
1722 /* Serialise with kernel interfaces */
1725 /* If we're not RUNNING then don't reset. Leave the reset_pending
1726 * flag set so that efx_pci_probe_main will be retried */
1727 if (efx->state != STATE_RUNNING) {
1728 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1732 EFX_INFO(efx, "resetting (%d)\n", method);
1734 efx_reset_down(efx, method, &ecmd);
1736 rc = falcon_reset_hw(efx, method);
1738 EFX_ERR(efx, "failed to reset hardware\n");
1742 /* Allow resets to be rescheduled. */
1743 efx->reset_pending = RESET_TYPE_NONE;
1745 /* Reinitialise bus-mastering, which may have been turned off before
1746 * the reset was scheduled. This is still appropriate, even in the
1747 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1748 * can respond to requests. */
1749 pci_set_master(efx->pci_dev);
1751 /* Leave device stopped if necessary */
1752 if (method == RESET_TYPE_DISABLE) {
1753 efx_reset_up(efx, method, &ecmd, false);
1756 rc = efx_reset_up(efx, method, &ecmd, true);
1761 EFX_ERR(efx, "has been disabled\n");
1762 efx->state = STATE_DISABLED;
1763 dev_close(efx->net_dev);
1765 EFX_LOG(efx, "reset complete\n");
1773 /* The worker thread exists so that code that cannot sleep can
1774 * schedule a reset for later.
1776 static void efx_reset_work(struct work_struct *data)
1778 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1783 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1785 enum reset_type method;
1787 if (efx->reset_pending != RESET_TYPE_NONE) {
1788 EFX_INFO(efx, "quenching already scheduled reset\n");
1793 case RESET_TYPE_INVISIBLE:
1794 case RESET_TYPE_ALL:
1795 case RESET_TYPE_WORLD:
1796 case RESET_TYPE_DISABLE:
1799 case RESET_TYPE_RX_RECOVERY:
1800 case RESET_TYPE_RX_DESC_FETCH:
1801 case RESET_TYPE_TX_DESC_FETCH:
1802 case RESET_TYPE_TX_SKIP:
1803 method = RESET_TYPE_INVISIBLE;
1806 method = RESET_TYPE_ALL;
1811 EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
1813 EFX_LOG(efx, "scheduling reset (%d)\n", method);
1815 efx->reset_pending = method;
1817 queue_work(reset_workqueue, &efx->reset_work);
1820 /**************************************************************************
1822 * List of NICs we support
1824 **************************************************************************/
1826 /* PCI device ID table */
1827 static struct pci_device_id efx_pci_table[] __devinitdata = {
1828 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1829 .driver_data = (unsigned long) &falcon_a_nic_type},
1830 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1831 .driver_data = (unsigned long) &falcon_b_nic_type},
1832 {0} /* end of list */
1835 /**************************************************************************
1837 * Dummy PHY/MAC/Board operations
1839 * Can be used for some unimplemented operations
1840 * Needed so all function pointers are valid and do not have to be tested
1843 **************************************************************************/
1844 int efx_port_dummy_op_int(struct efx_nic *efx)
1848 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1849 void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
1851 static struct efx_mac_operations efx_dummy_mac_operations = {
1852 .reconfigure = efx_port_dummy_op_void,
1853 .poll = efx_port_dummy_op_void,
1854 .irq = efx_port_dummy_op_void,
1857 static struct efx_phy_operations efx_dummy_phy_operations = {
1858 .init = efx_port_dummy_op_int,
1859 .reconfigure = efx_port_dummy_op_void,
1860 .poll = efx_port_dummy_op_void,
1861 .fini = efx_port_dummy_op_void,
1862 .clear_interrupt = efx_port_dummy_op_void,
1865 static struct efx_board efx_dummy_board_info = {
1866 .init = efx_port_dummy_op_int,
1867 .init_leds = efx_port_dummy_op_int,
1868 .set_fault_led = efx_port_dummy_op_blink,
1869 .monitor = efx_port_dummy_op_int,
1870 .blink = efx_port_dummy_op_blink,
1871 .fini = efx_port_dummy_op_void,
1874 /**************************************************************************
1878 **************************************************************************/
1880 /* This zeroes out and then fills in the invariants in a struct
1881 * efx_nic (including all sub-structures).
1883 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1884 struct pci_dev *pci_dev, struct net_device *net_dev)
1886 struct efx_channel *channel;
1887 struct efx_tx_queue *tx_queue;
1888 struct efx_rx_queue *rx_queue;
1891 /* Initialise common structures */
1892 memset(efx, 0, sizeof(*efx));
1893 spin_lock_init(&efx->biu_lock);
1894 spin_lock_init(&efx->phy_lock);
1895 mutex_init(&efx->spi_lock);
1896 INIT_WORK(&efx->reset_work, efx_reset_work);
1897 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1898 efx->pci_dev = pci_dev;
1899 efx->state = STATE_INIT;
1900 efx->reset_pending = RESET_TYPE_NONE;
1901 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1902 efx->board_info = efx_dummy_board_info;
1904 efx->net_dev = net_dev;
1905 efx->rx_checksum_enabled = true;
1906 spin_lock_init(&efx->netif_stop_lock);
1907 spin_lock_init(&efx->stats_lock);
1908 efx->stats_disable_count = 1;
1909 mutex_init(&efx->mac_lock);
1910 efx->mac_op = &efx_dummy_mac_operations;
1911 efx->phy_op = &efx_dummy_phy_operations;
1912 efx->mii.dev = net_dev;
1913 INIT_WORK(&efx->phy_work, efx_phy_work);
1914 INIT_WORK(&efx->mac_work, efx_mac_work);
1915 atomic_set(&efx->netif_stop_count, 1);
1917 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1918 channel = &efx->channel[i];
1920 channel->channel = i;
1921 channel->work_pending = false;
1923 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1924 tx_queue = &efx->tx_queue[i];
1925 tx_queue->efx = efx;
1926 tx_queue->queue = i;
1927 tx_queue->buffer = NULL;
1928 tx_queue->channel = &efx->channel[0]; /* for safety */
1929 tx_queue->tso_headers_free = NULL;
1931 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1932 rx_queue = &efx->rx_queue[i];
1933 rx_queue->efx = efx;
1934 rx_queue->queue = i;
1935 rx_queue->channel = &efx->channel[0]; /* for safety */
1936 rx_queue->buffer = NULL;
1937 spin_lock_init(&rx_queue->add_lock);
1938 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1943 /* Sanity-check NIC type */
1944 EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
1945 (efx->type->txd_ring_mask + 1));
1946 EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
1947 (efx->type->rxd_ring_mask + 1));
1948 EFX_BUG_ON_PARANOID(efx->type->evq_size &
1949 (efx->type->evq_size - 1));
1950 /* As close as we can get to guaranteeing that we don't overflow */
1951 EFX_BUG_ON_PARANOID(efx->type->evq_size <
1952 (efx->type->txd_ring_mask + 1 +
1953 efx->type->rxd_ring_mask + 1));
1954 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1956 /* Higher numbered interrupt modes are less capable! */
1957 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
1960 /* Would be good to use the net_dev name, but we're too early */
1961 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
1963 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
1964 if (!efx->workqueue)
1970 static void efx_fini_struct(struct efx_nic *efx)
1972 if (efx->workqueue) {
1973 destroy_workqueue(efx->workqueue);
1974 efx->workqueue = NULL;
1978 /**************************************************************************
1982 **************************************************************************/
1984 /* Main body of final NIC shutdown code
1985 * This is called only at module unload (or hotplug removal).
1987 static void efx_pci_remove_main(struct efx_nic *efx)
1989 EFX_ASSERT_RESET_SERIALISED(efx);
1991 /* Skip everything if we never obtained a valid membase */
1995 efx_fini_channels(efx);
1998 /* Shutdown the board, then the NIC and board state */
1999 efx->board_info.fini(efx);
2000 falcon_fini_interrupt(efx);
2003 efx_remove_all(efx);
2006 /* Final NIC shutdown
2007 * This is called only at module unload (or hotplug removal).
2009 static void efx_pci_remove(struct pci_dev *pci_dev)
2011 struct efx_nic *efx;
2013 efx = pci_get_drvdata(pci_dev);
2017 /* Mark the NIC as fini, then stop the interface */
2019 efx->state = STATE_FINI;
2020 dev_close(efx->net_dev);
2022 /* Allow any queued efx_resets() to complete */
2025 if (efx->membase == NULL)
2028 efx_unregister_netdev(efx);
2030 efx_mtd_remove(efx);
2032 /* Wait for any scheduled resets to complete. No more will be
2033 * scheduled from this point because efx_stop_all() has been
2034 * called, we are no longer registered with driverlink, and
2035 * the net_device's have been removed. */
2036 cancel_work_sync(&efx->reset_work);
2038 efx_pci_remove_main(efx);
2042 EFX_LOG(efx, "shutdown successful\n");
2044 pci_set_drvdata(pci_dev, NULL);
2045 efx_fini_struct(efx);
2046 free_netdev(efx->net_dev);
2049 /* Main body of NIC initialisation
2050 * This is called at module load (or hotplug insertion, theoretically).
2052 static int efx_pci_probe_main(struct efx_nic *efx)
2056 /* Do start-of-day initialisation */
2057 rc = efx_probe_all(efx);
2061 rc = efx_init_napi(efx);
2065 /* Initialise the board */
2066 rc = efx->board_info.init(efx);
2068 EFX_ERR(efx, "failed to initialise board\n");
2072 rc = falcon_init_nic(efx);
2074 EFX_ERR(efx, "failed to initialise NIC\n");
2078 rc = efx_init_port(efx);
2080 EFX_ERR(efx, "failed to initialise port\n");
2084 efx_init_channels(efx);
2086 rc = falcon_init_interrupt(efx);
2093 efx_fini_channels(efx);
2097 efx->board_info.fini(efx);
2101 efx_remove_all(efx);
2106 /* NIC initialisation
2108 * This is called at module load (or hotplug insertion,
2109 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2110 * sets up and registers the network devices with the kernel and hooks
2111 * the interrupt service routine. It does not prepare the device for
2112 * transmission; this is left to the first time one of the network
2113 * interfaces is brought up (i.e. efx_net_open).
2115 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2116 const struct pci_device_id *entry)
2118 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2119 struct net_device *net_dev;
2120 struct efx_nic *efx;
2123 /* Allocate and initialise a struct net_device and struct efx_nic */
2124 net_dev = alloc_etherdev(sizeof(*efx));
2127 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2128 NETIF_F_HIGHDMA | NETIF_F_TSO);
2130 net_dev->features |= NETIF_F_LRO;
2131 /* Mask for features that also apply to VLAN devices */
2132 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2133 NETIF_F_HIGHDMA | NETIF_F_TSO);
2134 efx = netdev_priv(net_dev);
2135 pci_set_drvdata(pci_dev, efx);
2136 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2140 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2142 /* Set up basic I/O (BAR mappings etc) */
2143 rc = efx_init_io(efx);
2147 /* No serialisation is required with the reset path because
2148 * we're in STATE_INIT. */
2149 for (i = 0; i < 5; i++) {
2150 rc = efx_pci_probe_main(efx);
2152 /* Serialise against efx_reset(). No more resets will be
2153 * scheduled since efx_stop_all() has been called, and we
2154 * have not and never have been registered with either
2155 * the rtnetlink or driverlink layers. */
2156 cancel_work_sync(&efx->reset_work);
2159 if (efx->reset_pending != RESET_TYPE_NONE) {
2160 /* If there was a scheduled reset during
2161 * probe, the NIC is probably hosed anyway */
2162 efx_pci_remove_main(efx);
2169 /* Retry if a recoverably reset event has been scheduled */
2170 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2171 (efx->reset_pending != RESET_TYPE_ALL))
2174 efx->reset_pending = RESET_TYPE_NONE;
2178 EFX_ERR(efx, "Could not reset NIC\n");
2182 /* Switch to the running state before we expose the device to
2183 * the OS. This is to ensure that the initial gathering of
2184 * MAC stats succeeds. */
2185 efx->state = STATE_RUNNING;
2187 efx_mtd_probe(efx); /* allowed to fail */
2189 rc = efx_register_netdev(efx);
2193 EFX_LOG(efx, "initialisation successful\n");
2197 efx_pci_remove_main(efx);
2202 efx_fini_struct(efx);
2204 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2205 free_netdev(net_dev);
2209 static struct pci_driver efx_pci_driver = {
2210 .name = EFX_DRIVER_NAME,
2211 .id_table = efx_pci_table,
2212 .probe = efx_pci_probe,
2213 .remove = efx_pci_remove,
2216 /**************************************************************************
2218 * Kernel module interface
2220 *************************************************************************/
2222 module_param(interrupt_mode, uint, 0444);
2223 MODULE_PARM_DESC(interrupt_mode,
2224 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2226 static int __init efx_init_module(void)
2230 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2232 rc = register_netdevice_notifier(&efx_netdev_notifier);
2236 refill_workqueue = create_workqueue("sfc_refill");
2237 if (!refill_workqueue) {
2241 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2242 if (!reset_workqueue) {
2247 rc = pci_register_driver(&efx_pci_driver);
2254 destroy_workqueue(reset_workqueue);
2256 destroy_workqueue(refill_workqueue);
2258 unregister_netdevice_notifier(&efx_netdev_notifier);
2263 static void __exit efx_exit_module(void)
2265 printk(KERN_INFO "Solarflare NET driver unloading\n");
2267 pci_unregister_driver(&efx_pci_driver);
2268 destroy_workqueue(reset_workqueue);
2269 destroy_workqueue(refill_workqueue);
2270 unregister_netdevice_notifier(&efx_netdev_notifier);
2274 module_init(efx_init_module);
2275 module_exit(efx_exit_module);
2277 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2278 "Solarflare Communications");
2279 MODULE_DESCRIPTION("Solarflare Communications network driver");
2280 MODULE_LICENSE("GPL");
2281 MODULE_DEVICE_TABLE(pci, efx_pci_table);