2 * Xilinx SystemACE device driver
4 * Copyright 2007 Secret Lab Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 * The SystemACE chip is designed to configure FPGAs by loading an FPGA
13 * bitstream from a file on a CF card and squirting it into FPGAs connected
14 * to the SystemACE JTAG chain. It also has the advantage of providing an
15 * MPU interface which can be used to control the FPGA configuration process
16 * and to use the attached CF card for general purpose storage.
18 * This driver is a block device driver for the SystemACE.
21 * The driver registers itself as a platform_device driver at module
22 * load time. The platform bus will take care of calling the
23 * ace_probe() method for all SystemACE instances in the system. Any
24 * number of SystemACE instances are supported. ace_probe() calls
25 * ace_setup() which initialized all data structures, reads the CF
26 * id structure and registers the device.
29 * Just about all of the heavy lifting in this driver is performed by
30 * a Finite State Machine (FSM). The driver needs to wait on a number
31 * of events; some raised by interrupts, some which need to be polled
32 * for. Describing all of the behaviour in a FSM seems to be the
33 * easiest way to keep the complexity low and make it easy to
34 * understand what the driver is doing. If the block ops or the
35 * request function need to interact with the hardware, then they
36 * simply need to flag the request and kick of FSM processing.
38 * The FSM itself is atomic-safe code which can be run from any
39 * context. The general process flow is:
40 * 1. obtain the ace->lock spinlock.
41 * 2. loop on ace_fsm_dostate() until the ace->fsm_continue flag is
43 * 3. release the lock.
45 * Individual states do not sleep in any way. If a condition needs to
46 * be waited for then the state much clear the fsm_continue flag and
47 * either schedule the FSM to be run again at a later time, or expect
48 * an interrupt to call the FSM when the desired condition is met.
50 * In normal operation, the FSM is processed at interrupt context
51 * either when the driver's tasklet is scheduled, or when an irq is
52 * raised by the hardware. The tasklet can be scheduled at any time.
53 * The request method in particular schedules the tasklet when a new
54 * request has been indicated by the block layer. Once started, the
55 * FSM proceeds as far as it can processing the request until it
56 * needs on a hardware event. At this point, it must yield execution.
58 * A state has two options when yielding execution:
60 * - Call if need to poll for event.
61 * - clears the fsm_continue flag to exit the processing loop
62 * - reschedules the tasklet to run again as soon as possible
63 * 2. ace_fsm_yieldirq()
64 * - Call if an irq is expected from the HW
65 * - clears the fsm_continue flag to exit the processing loop
66 * - does not reschedule the tasklet so the FSM will not be processed
67 * again until an irq is received.
68 * After calling a yield function, the state must return control back
69 * to the FSM main loop.
71 * Additionally, the driver maintains a kernel timer which can process
72 * the FSM. If the FSM gets stalled, typically due to a missed
73 * interrupt, then the kernel timer will expire and the driver can
74 * continue where it left off.
77 * - Add FPGA configuration control interface.
78 * - Request major number from lanana
83 #include <linux/module.h>
84 #include <linux/ctype.h>
85 #include <linux/init.h>
86 #include <linux/interrupt.h>
87 #include <linux/errno.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/slab.h>
91 #include <linux/blkdev.h>
92 #include <linux/ata.h>
93 #include <linux/hdreg.h>
94 #include <linux/platform_device.h>
95 #if defined(CONFIG_OF)
96 #include <linux/of_device.h>
97 #include <linux/of_platform.h>
100 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
101 MODULE_DESCRIPTION("Xilinx SystemACE device driver");
102 MODULE_LICENSE("GPL");
104 /* SystemACE register definitions */
105 #define ACE_BUSMODE (0x00)
107 #define ACE_STATUS (0x04)
108 #define ACE_STATUS_CFGLOCK (0x00000001)
109 #define ACE_STATUS_MPULOCK (0x00000002)
110 #define ACE_STATUS_CFGERROR (0x00000004) /* config controller error */
111 #define ACE_STATUS_CFCERROR (0x00000008) /* CF controller error */
112 #define ACE_STATUS_CFDETECT (0x00000010)
113 #define ACE_STATUS_DATABUFRDY (0x00000020)
114 #define ACE_STATUS_DATABUFMODE (0x00000040)
115 #define ACE_STATUS_CFGDONE (0x00000080)
116 #define ACE_STATUS_RDYFORCFCMD (0x00000100)
117 #define ACE_STATUS_CFGMODEPIN (0x00000200)
118 #define ACE_STATUS_CFGADDR_MASK (0x0000e000)
119 #define ACE_STATUS_CFBSY (0x00020000)
120 #define ACE_STATUS_CFRDY (0x00040000)
121 #define ACE_STATUS_CFDWF (0x00080000)
122 #define ACE_STATUS_CFDSC (0x00100000)
123 #define ACE_STATUS_CFDRQ (0x00200000)
124 #define ACE_STATUS_CFCORR (0x00400000)
125 #define ACE_STATUS_CFERR (0x00800000)
127 #define ACE_ERROR (0x08)
128 #define ACE_CFGLBA (0x0c)
129 #define ACE_MPULBA (0x10)
131 #define ACE_SECCNTCMD (0x14)
132 #define ACE_SECCNTCMD_RESET (0x0100)
133 #define ACE_SECCNTCMD_IDENTIFY (0x0200)
134 #define ACE_SECCNTCMD_READ_DATA (0x0300)
135 #define ACE_SECCNTCMD_WRITE_DATA (0x0400)
136 #define ACE_SECCNTCMD_ABORT (0x0600)
138 #define ACE_VERSION (0x16)
139 #define ACE_VERSION_REVISION_MASK (0x00FF)
140 #define ACE_VERSION_MINOR_MASK (0x0F00)
141 #define ACE_VERSION_MAJOR_MASK (0xF000)
143 #define ACE_CTRL (0x18)
144 #define ACE_CTRL_FORCELOCKREQ (0x0001)
145 #define ACE_CTRL_LOCKREQ (0x0002)
146 #define ACE_CTRL_FORCECFGADDR (0x0004)
147 #define ACE_CTRL_FORCECFGMODE (0x0008)
148 #define ACE_CTRL_CFGMODE (0x0010)
149 #define ACE_CTRL_CFGSTART (0x0020)
150 #define ACE_CTRL_CFGSEL (0x0040)
151 #define ACE_CTRL_CFGRESET (0x0080)
152 #define ACE_CTRL_DATABUFRDYIRQ (0x0100)
153 #define ACE_CTRL_ERRORIRQ (0x0200)
154 #define ACE_CTRL_CFGDONEIRQ (0x0400)
155 #define ACE_CTRL_RESETIRQ (0x0800)
156 #define ACE_CTRL_CFGPROG (0x1000)
157 #define ACE_CTRL_CFGADDR_MASK (0xe000)
159 #define ACE_FATSTAT (0x1c)
161 #define ACE_NUM_MINORS 16
162 #define ACE_SECTOR_SIZE (512)
163 #define ACE_FIFO_SIZE (32)
164 #define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
166 #define ACE_BUS_WIDTH_8 0
167 #define ACE_BUS_WIDTH_16 1
172 /* driver state data */
176 struct list_head list;
178 /* finite state machine data */
179 struct tasklet_struct fsm_tasklet;
180 uint fsm_task; /* Current activity (ACE_TASK_*) */
181 uint fsm_state; /* Current state (ACE_FSM_STATE_*) */
182 uint fsm_continue_flag; /* cleared to exit FSM mainloop */
184 struct timer_list stall_timer;
186 /* Transfer state/result, use for both id and block request */
187 struct request *req; /* request being processed */
188 void *data_ptr; /* pointer to I/O buffer */
189 int data_count; /* number of buffers remaining */
190 int data_result; /* Result of transfer; 0 := success */
192 int id_req_count; /* count of id requests */
194 struct completion id_completion; /* used when id req finishes */
197 /* Details of hardware device */
198 resource_size_t physaddr;
199 void __iomem *baseaddr;
201 int bus_width; /* 0 := 8 bit; 1 := 16 bit */
202 struct ace_reg_ops *reg_ops;
205 /* Block device data structures */
208 struct request_queue *queue;
211 /* Inserted CF card parameters */
212 u16 cf_id[ATA_ID_WORDS];
215 static int ace_major;
217 /* ---------------------------------------------------------------------
218 * Low level register access
222 u16(*in) (struct ace_device * ace, int reg);
223 void (*out) (struct ace_device * ace, int reg, u16 val);
224 void (*datain) (struct ace_device * ace);
225 void (*dataout) (struct ace_device * ace);
228 /* 8 Bit bus width */
229 static u16 ace_in_8(struct ace_device *ace, int reg)
231 void __iomem *r = ace->baseaddr + reg;
232 return in_8(r) | (in_8(r + 1) << 8);
235 static void ace_out_8(struct ace_device *ace, int reg, u16 val)
237 void __iomem *r = ace->baseaddr + reg;
239 out_8(r + 1, val >> 8);
242 static void ace_datain_8(struct ace_device *ace)
244 void __iomem *r = ace->baseaddr + 0x40;
245 u8 *dst = ace->data_ptr;
246 int i = ACE_FIFO_SIZE;
252 static void ace_dataout_8(struct ace_device *ace)
254 void __iomem *r = ace->baseaddr + 0x40;
255 u8 *src = ace->data_ptr;
256 int i = ACE_FIFO_SIZE;
262 static struct ace_reg_ops ace_reg_8_ops = {
265 .datain = ace_datain_8,
266 .dataout = ace_dataout_8,
269 /* 16 bit big endian bus attachment */
270 static u16 ace_in_be16(struct ace_device *ace, int reg)
272 return in_be16(ace->baseaddr + reg);
275 static void ace_out_be16(struct ace_device *ace, int reg, u16 val)
277 out_be16(ace->baseaddr + reg, val);
280 static void ace_datain_be16(struct ace_device *ace)
282 int i = ACE_FIFO_SIZE / 2;
283 u16 *dst = ace->data_ptr;
285 *dst++ = in_le16(ace->baseaddr + 0x40);
289 static void ace_dataout_be16(struct ace_device *ace)
291 int i = ACE_FIFO_SIZE / 2;
292 u16 *src = ace->data_ptr;
294 out_le16(ace->baseaddr + 0x40, *src++);
298 /* 16 bit little endian bus attachment */
299 static u16 ace_in_le16(struct ace_device *ace, int reg)
301 return in_le16(ace->baseaddr + reg);
304 static void ace_out_le16(struct ace_device *ace, int reg, u16 val)
306 out_le16(ace->baseaddr + reg, val);
309 static void ace_datain_le16(struct ace_device *ace)
311 int i = ACE_FIFO_SIZE / 2;
312 u16 *dst = ace->data_ptr;
314 *dst++ = in_be16(ace->baseaddr + 0x40);
318 static void ace_dataout_le16(struct ace_device *ace)
320 int i = ACE_FIFO_SIZE / 2;
321 u16 *src = ace->data_ptr;
323 out_be16(ace->baseaddr + 0x40, *src++);
327 static struct ace_reg_ops ace_reg_be16_ops = {
330 .datain = ace_datain_be16,
331 .dataout = ace_dataout_be16,
334 static struct ace_reg_ops ace_reg_le16_ops = {
337 .datain = ace_datain_le16,
338 .dataout = ace_dataout_le16,
341 static inline u16 ace_in(struct ace_device *ace, int reg)
343 return ace->reg_ops->in(ace, reg);
346 static inline u32 ace_in32(struct ace_device *ace, int reg)
348 return ace_in(ace, reg) | (ace_in(ace, reg + 2) << 16);
351 static inline void ace_out(struct ace_device *ace, int reg, u16 val)
353 ace->reg_ops->out(ace, reg, val);
356 static inline void ace_out32(struct ace_device *ace, int reg, u32 val)
358 ace_out(ace, reg, val);
359 ace_out(ace, reg + 2, val >> 16);
362 /* ---------------------------------------------------------------------
363 * Debug support functions
367 static void ace_dump_mem(void *base, int len)
369 const char *ptr = base;
372 for (i = 0; i < len; i += 16) {
373 printk(KERN_INFO "%.8x:", i);
374 for (j = 0; j < 16; j++) {
377 printk("%.2x", ptr[i + j]);
380 for (j = 0; j < 16; j++)
381 printk("%c", isprint(ptr[i + j]) ? ptr[i + j] : '.');
386 static inline void ace_dump_mem(void *base, int len)
391 static void ace_dump_regs(struct ace_device *ace)
394 " ctrl: %.8x seccnt/cmd: %.4x ver:%.4x\n"
395 " status:%.8x mpu_lba:%.8x busmode:%4x\n"
396 " error: %.8x cfg_lba:%.8x fatstat:%.4x\n",
397 ace_in32(ace, ACE_CTRL),
398 ace_in(ace, ACE_SECCNTCMD),
399 ace_in(ace, ACE_VERSION),
400 ace_in32(ace, ACE_STATUS),
401 ace_in32(ace, ACE_MPULBA),
402 ace_in(ace, ACE_BUSMODE),
403 ace_in32(ace, ACE_ERROR),
404 ace_in32(ace, ACE_CFGLBA), ace_in(ace, ACE_FATSTAT));
407 void ace_fix_driveid(u16 *id)
409 #if defined(__BIG_ENDIAN)
412 /* All half words have wrong byte order; swap the bytes */
413 for (i = 0; i < ATA_ID_WORDS; i++, id++)
414 *id = le16_to_cpu(*id);
418 /* ---------------------------------------------------------------------
419 * Finite State Machine (FSM) implementation
422 /* FSM tasks; used to direct state transitions */
423 #define ACE_TASK_IDLE 0
424 #define ACE_TASK_IDENTIFY 1
425 #define ACE_TASK_READ 2
426 #define ACE_TASK_WRITE 3
427 #define ACE_FSM_NUM_TASKS 4
429 /* FSM state definitions */
430 #define ACE_FSM_STATE_IDLE 0
431 #define ACE_FSM_STATE_REQ_LOCK 1
432 #define ACE_FSM_STATE_WAIT_LOCK 2
433 #define ACE_FSM_STATE_WAIT_CFREADY 3
434 #define ACE_FSM_STATE_IDENTIFY_PREPARE 4
435 #define ACE_FSM_STATE_IDENTIFY_TRANSFER 5
436 #define ACE_FSM_STATE_IDENTIFY_COMPLETE 6
437 #define ACE_FSM_STATE_REQ_PREPARE 7
438 #define ACE_FSM_STATE_REQ_TRANSFER 8
439 #define ACE_FSM_STATE_REQ_COMPLETE 9
440 #define ACE_FSM_STATE_ERROR 10
441 #define ACE_FSM_NUM_STATES 11
443 /* Set flag to exit FSM loop and reschedule tasklet */
444 static inline void ace_fsm_yield(struct ace_device *ace)
446 dev_dbg(ace->dev, "ace_fsm_yield()\n");
447 tasklet_schedule(&ace->fsm_tasklet);
448 ace->fsm_continue_flag = 0;
451 /* Set flag to exit FSM loop and wait for IRQ to reschedule tasklet */
452 static inline void ace_fsm_yieldirq(struct ace_device *ace)
454 dev_dbg(ace->dev, "ace_fsm_yieldirq()\n");
456 if (ace->irq == NO_IRQ)
457 /* No IRQ assigned, so need to poll */
458 tasklet_schedule(&ace->fsm_tasklet);
459 ace->fsm_continue_flag = 0;
462 /* Get the next read/write request; ending requests that we don't handle */
463 struct request *ace_get_next_request(struct request_queue * q)
467 while ((req = blk_peek_request(q)) != NULL) {
468 if (blk_fs_request(req))
470 blk_start_request(req);
471 __blk_end_request_all(req, -EIO);
476 static void ace_fsm_dostate(struct ace_device *ace)
484 dev_dbg(ace->dev, "fsm_state=%i, id_req_count=%i\n",
485 ace->fsm_state, ace->id_req_count);
488 /* Verify that there is actually a CF in the slot. If not, then
489 * bail out back to the idle state and wake up all the waiters */
490 status = ace_in32(ace, ACE_STATUS);
491 if ((status & ACE_STATUS_CFDETECT) == 0) {
492 ace->fsm_state = ACE_FSM_STATE_IDLE;
493 ace->media_change = 1;
494 set_capacity(ace->gd, 0);
495 dev_info(ace->dev, "No CF in slot\n");
497 /* Drop all in-flight and pending requests */
499 __blk_end_request_all(ace->req, -EIO);
502 while ((req = blk_fetch_request(ace->queue)) != NULL)
503 __blk_end_request_all(req, -EIO);
505 /* Drop back to IDLE state and notify waiters */
506 ace->fsm_state = ACE_FSM_STATE_IDLE;
507 ace->id_result = -EIO;
508 while (ace->id_req_count) {
509 complete(&ace->id_completion);
514 switch (ace->fsm_state) {
515 case ACE_FSM_STATE_IDLE:
516 /* See if there is anything to do */
517 if (ace->id_req_count || ace_get_next_request(ace->queue)) {
519 ace->fsm_state = ACE_FSM_STATE_REQ_LOCK;
520 mod_timer(&ace->stall_timer, jiffies + HZ);
521 if (!timer_pending(&ace->stall_timer))
522 add_timer(&ace->stall_timer);
525 del_timer(&ace->stall_timer);
526 ace->fsm_continue_flag = 0;
529 case ACE_FSM_STATE_REQ_LOCK:
530 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
531 /* Already have the lock, jump to next state */
532 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
536 /* Request the lock */
537 val = ace_in(ace, ACE_CTRL);
538 ace_out(ace, ACE_CTRL, val | ACE_CTRL_LOCKREQ);
539 ace->fsm_state = ACE_FSM_STATE_WAIT_LOCK;
542 case ACE_FSM_STATE_WAIT_LOCK:
543 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
544 /* got the lock; move to next state */
545 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
549 /* wait a bit for the lock */
553 case ACE_FSM_STATE_WAIT_CFREADY:
554 status = ace_in32(ace, ACE_STATUS);
555 if (!(status & ACE_STATUS_RDYFORCFCMD) ||
556 (status & ACE_STATUS_CFBSY)) {
557 /* CF card isn't ready; it needs to be polled */
562 /* Device is ready for command; determine what to do next */
563 if (ace->id_req_count)
564 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_PREPARE;
566 ace->fsm_state = ACE_FSM_STATE_REQ_PREPARE;
569 case ACE_FSM_STATE_IDENTIFY_PREPARE:
570 /* Send identify command */
571 ace->fsm_task = ACE_TASK_IDENTIFY;
572 ace->data_ptr = ace->cf_id;
573 ace->data_count = ACE_BUF_PER_SECTOR;
574 ace_out(ace, ACE_SECCNTCMD, ACE_SECCNTCMD_IDENTIFY);
576 /* As per datasheet, put config controller in reset */
577 val = ace_in(ace, ACE_CTRL);
578 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
580 /* irq handler takes over from this point; wait for the
581 * transfer to complete */
582 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_TRANSFER;
583 ace_fsm_yieldirq(ace);
586 case ACE_FSM_STATE_IDENTIFY_TRANSFER:
587 /* Check that the sysace is ready to receive data */
588 status = ace_in32(ace, ACE_STATUS);
589 if (status & ACE_STATUS_CFBSY) {
590 dev_dbg(ace->dev, "CFBSY set; t=%i iter=%i dc=%i\n",
591 ace->fsm_task, ace->fsm_iter_num,
596 if (!(status & ACE_STATUS_DATABUFRDY)) {
601 /* Transfer the next buffer */
602 ace->reg_ops->datain(ace);
605 /* If there are still buffers to be transfers; jump out here */
606 if (ace->data_count != 0) {
607 ace_fsm_yieldirq(ace);
611 /* transfer finished; kick state machine */
612 dev_dbg(ace->dev, "identify finished\n");
613 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_COMPLETE;
616 case ACE_FSM_STATE_IDENTIFY_COMPLETE:
617 ace_fix_driveid(ace->cf_id);
618 ace_dump_mem(ace->cf_id, 512); /* Debug: Dump out disk ID */
620 if (ace->data_result) {
621 /* Error occured, disable the disk */
622 ace->media_change = 1;
623 set_capacity(ace->gd, 0);
624 dev_err(ace->dev, "error fetching CF id (%i)\n",
627 ace->media_change = 0;
629 /* Record disk parameters */
630 set_capacity(ace->gd,
631 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
632 dev_info(ace->dev, "capacity: %i sectors\n",
633 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
636 /* We're done, drop to IDLE state and notify waiters */
637 ace->fsm_state = ACE_FSM_STATE_IDLE;
638 ace->id_result = ace->data_result;
639 while (ace->id_req_count) {
640 complete(&ace->id_completion);
645 case ACE_FSM_STATE_REQ_PREPARE:
646 req = ace_get_next_request(ace->queue);
648 ace->fsm_state = ACE_FSM_STATE_IDLE;
651 blk_start_request(req);
653 /* Okay, it's a data request, set it up for transfer */
655 "request: sec=%llx hcnt=%x, ccnt=%x, dir=%i\n",
656 (unsigned long long)blk_rq_pos(req),
657 blk_rq_sectors(req), blk_rq_cur_sectors(req),
661 ace->data_ptr = req->buffer;
662 ace->data_count = blk_rq_cur_sectors(req) * ACE_BUF_PER_SECTOR;
663 ace_out32(ace, ACE_MPULBA, blk_rq_pos(req) & 0x0FFFFFFF);
665 count = blk_rq_sectors(req);
666 if (rq_data_dir(req)) {
667 /* Kick off write request */
668 dev_dbg(ace->dev, "write data\n");
669 ace->fsm_task = ACE_TASK_WRITE;
670 ace_out(ace, ACE_SECCNTCMD,
671 count | ACE_SECCNTCMD_WRITE_DATA);
673 /* Kick off read request */
674 dev_dbg(ace->dev, "read data\n");
675 ace->fsm_task = ACE_TASK_READ;
676 ace_out(ace, ACE_SECCNTCMD,
677 count | ACE_SECCNTCMD_READ_DATA);
680 /* As per datasheet, put config controller in reset */
681 val = ace_in(ace, ACE_CTRL);
682 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
684 /* Move to the transfer state. The systemace will raise
685 * an interrupt once there is something to do
687 ace->fsm_state = ACE_FSM_STATE_REQ_TRANSFER;
688 if (ace->fsm_task == ACE_TASK_READ)
689 ace_fsm_yieldirq(ace); /* wait for data ready */
692 case ACE_FSM_STATE_REQ_TRANSFER:
693 /* Check that the sysace is ready to receive data */
694 status = ace_in32(ace, ACE_STATUS);
695 if (status & ACE_STATUS_CFBSY) {
697 "CFBSY set; t=%i iter=%i c=%i dc=%i irq=%i\n",
698 ace->fsm_task, ace->fsm_iter_num,
699 blk_rq_cur_sectors(ace->req) * 16,
700 ace->data_count, ace->in_irq);
701 ace_fsm_yield(ace); /* need to poll CFBSY bit */
704 if (!(status & ACE_STATUS_DATABUFRDY)) {
706 "DATABUF not set; t=%i iter=%i c=%i dc=%i irq=%i\n",
707 ace->fsm_task, ace->fsm_iter_num,
708 blk_rq_cur_sectors(ace->req) * 16,
709 ace->data_count, ace->in_irq);
710 ace_fsm_yieldirq(ace);
714 /* Transfer the next buffer */
715 if (ace->fsm_task == ACE_TASK_WRITE)
716 ace->reg_ops->dataout(ace);
718 ace->reg_ops->datain(ace);
721 /* If there are still buffers to be transfers; jump out here */
722 if (ace->data_count != 0) {
723 ace_fsm_yieldirq(ace);
727 /* bio finished; is there another one? */
728 if (__blk_end_request_cur(ace->req, 0)) {
729 /* dev_dbg(ace->dev, "next block; h=%u c=%u\n",
730 * blk_rq_sectors(ace->req),
731 * blk_rq_cur_sectors(ace->req));
733 ace->data_ptr = ace->req->buffer;
734 ace->data_count = blk_rq_cur_sectors(ace->req) * 16;
735 ace_fsm_yieldirq(ace);
739 ace->fsm_state = ACE_FSM_STATE_REQ_COMPLETE;
742 case ACE_FSM_STATE_REQ_COMPLETE:
745 /* Finished request; go to idle state */
746 ace->fsm_state = ACE_FSM_STATE_IDLE;
750 ace->fsm_state = ACE_FSM_STATE_IDLE;
755 static void ace_fsm_tasklet(unsigned long data)
757 struct ace_device *ace = (void *)data;
760 spin_lock_irqsave(&ace->lock, flags);
762 /* Loop over state machine until told to stop */
763 ace->fsm_continue_flag = 1;
764 while (ace->fsm_continue_flag)
765 ace_fsm_dostate(ace);
767 spin_unlock_irqrestore(&ace->lock, flags);
770 static void ace_stall_timer(unsigned long data)
772 struct ace_device *ace = (void *)data;
776 "kicking stalled fsm; state=%i task=%i iter=%i dc=%i\n",
777 ace->fsm_state, ace->fsm_task, ace->fsm_iter_num,
779 spin_lock_irqsave(&ace->lock, flags);
781 /* Rearm the stall timer *before* entering FSM (which may then
782 * delete the timer) */
783 mod_timer(&ace->stall_timer, jiffies + HZ);
785 /* Loop over state machine until told to stop */
786 ace->fsm_continue_flag = 1;
787 while (ace->fsm_continue_flag)
788 ace_fsm_dostate(ace);
790 spin_unlock_irqrestore(&ace->lock, flags);
793 /* ---------------------------------------------------------------------
794 * Interrupt handling routines
796 static int ace_interrupt_checkstate(struct ace_device *ace)
798 u32 sreg = ace_in32(ace, ACE_STATUS);
799 u16 creg = ace_in(ace, ACE_CTRL);
801 /* Check for error occurance */
802 if ((sreg & (ACE_STATUS_CFGERROR | ACE_STATUS_CFCERROR)) &&
803 (creg & ACE_CTRL_ERRORIRQ)) {
804 dev_err(ace->dev, "transfer failure\n");
812 static irqreturn_t ace_interrupt(int irq, void *dev_id)
815 struct ace_device *ace = dev_id;
817 /* be safe and get the lock */
818 spin_lock(&ace->lock);
821 /* clear the interrupt */
822 creg = ace_in(ace, ACE_CTRL);
823 ace_out(ace, ACE_CTRL, creg | ACE_CTRL_RESETIRQ);
824 ace_out(ace, ACE_CTRL, creg);
826 /* check for IO failures */
827 if (ace_interrupt_checkstate(ace))
828 ace->data_result = -EIO;
830 if (ace->fsm_task == 0) {
832 "spurious irq; stat=%.8x ctrl=%.8x cmd=%.4x\n",
833 ace_in32(ace, ACE_STATUS), ace_in32(ace, ACE_CTRL),
834 ace_in(ace, ACE_SECCNTCMD));
835 dev_err(ace->dev, "fsm_task=%i fsm_state=%i data_count=%i\n",
836 ace->fsm_task, ace->fsm_state, ace->data_count);
839 /* Loop over state machine until told to stop */
840 ace->fsm_continue_flag = 1;
841 while (ace->fsm_continue_flag)
842 ace_fsm_dostate(ace);
844 /* done with interrupt; drop the lock */
846 spin_unlock(&ace->lock);
851 /* ---------------------------------------------------------------------
854 static void ace_request(struct request_queue * q)
857 struct ace_device *ace;
859 req = ace_get_next_request(q);
862 ace = req->rq_disk->private_data;
863 tasklet_schedule(&ace->fsm_tasklet);
867 static int ace_media_changed(struct gendisk *gd)
869 struct ace_device *ace = gd->private_data;
870 dev_dbg(ace->dev, "ace_media_changed(): %i\n", ace->media_change);
872 return ace->media_change;
875 static int ace_revalidate_disk(struct gendisk *gd)
877 struct ace_device *ace = gd->private_data;
880 dev_dbg(ace->dev, "ace_revalidate_disk()\n");
882 if (ace->media_change) {
883 dev_dbg(ace->dev, "requesting cf id and scheduling tasklet\n");
885 spin_lock_irqsave(&ace->lock, flags);
887 spin_unlock_irqrestore(&ace->lock, flags);
889 tasklet_schedule(&ace->fsm_tasklet);
890 wait_for_completion(&ace->id_completion);
893 dev_dbg(ace->dev, "revalidate complete\n");
894 return ace->id_result;
897 static int ace_open(struct block_device *bdev, fmode_t mode)
899 struct ace_device *ace = bdev->bd_disk->private_data;
902 dev_dbg(ace->dev, "ace_open() users=%i\n", ace->users + 1);
904 spin_lock_irqsave(&ace->lock, flags);
906 spin_unlock_irqrestore(&ace->lock, flags);
908 check_disk_change(bdev);
912 static int ace_release(struct gendisk *disk, fmode_t mode)
914 struct ace_device *ace = disk->private_data;
918 dev_dbg(ace->dev, "ace_release() users=%i\n", ace->users - 1);
920 spin_lock_irqsave(&ace->lock, flags);
922 if (ace->users == 0) {
923 val = ace_in(ace, ACE_CTRL);
924 ace_out(ace, ACE_CTRL, val & ~ACE_CTRL_LOCKREQ);
926 spin_unlock_irqrestore(&ace->lock, flags);
930 static int ace_getgeo(struct block_device *bdev, struct hd_geometry *geo)
932 struct ace_device *ace = bdev->bd_disk->private_data;
933 u16 *cf_id = ace->cf_id;
935 dev_dbg(ace->dev, "ace_getgeo()\n");
937 geo->heads = cf_id[ATA_ID_HEADS];
938 geo->sectors = cf_id[ATA_ID_SECTORS];
939 geo->cylinders = cf_id[ATA_ID_CYLS];
944 static struct block_device_operations ace_fops = {
945 .owner = THIS_MODULE,
947 .release = ace_release,
948 .media_changed = ace_media_changed,
949 .revalidate_disk = ace_revalidate_disk,
950 .getgeo = ace_getgeo,
953 /* --------------------------------------------------------------------
954 * SystemACE device setup/teardown code
956 static int __devinit ace_setup(struct ace_device *ace)
962 dev_dbg(ace->dev, "ace_setup(ace=0x%p)\n", ace);
963 dev_dbg(ace->dev, "physaddr=0x%llx irq=%i\n",
964 (unsigned long long)ace->physaddr, ace->irq);
966 spin_lock_init(&ace->lock);
967 init_completion(&ace->id_completion);
972 ace->baseaddr = ioremap(ace->physaddr, 0x80);
977 * Initialize the state machine tasklet and stall timer
979 tasklet_init(&ace->fsm_tasklet, ace_fsm_tasklet, (unsigned long)ace);
980 setup_timer(&ace->stall_timer, ace_stall_timer, (unsigned long)ace);
983 * Initialize the request queue
985 ace->queue = blk_init_queue(ace_request, &ace->lock);
986 if (ace->queue == NULL)
988 blk_queue_logical_block_size(ace->queue, 512);
991 * Allocate and initialize GD structure
993 ace->gd = alloc_disk(ACE_NUM_MINORS);
997 ace->gd->major = ace_major;
998 ace->gd->first_minor = ace->id * ACE_NUM_MINORS;
999 ace->gd->fops = &ace_fops;
1000 ace->gd->queue = ace->queue;
1001 ace->gd->private_data = ace;
1002 snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a');
1005 if (ace->bus_width == ACE_BUS_WIDTH_16) {
1006 /* 0x0101 should work regardless of endianess */
1007 ace_out_le16(ace, ACE_BUSMODE, 0x0101);
1009 /* read it back to determine endianess */
1010 if (ace_in_le16(ace, ACE_BUSMODE) == 0x0001)
1011 ace->reg_ops = &ace_reg_le16_ops;
1013 ace->reg_ops = &ace_reg_be16_ops;
1015 ace_out_8(ace, ACE_BUSMODE, 0x00);
1016 ace->reg_ops = &ace_reg_8_ops;
1019 /* Make sure version register is sane */
1020 version = ace_in(ace, ACE_VERSION);
1021 if ((version == 0) || (version == 0xFFFF))
1024 /* Put sysace in a sane state by clearing most control reg bits */
1025 ace_out(ace, ACE_CTRL, ACE_CTRL_FORCECFGMODE |
1026 ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ);
1028 /* Now we can hook up the irq handler */
1029 if (ace->irq != NO_IRQ) {
1030 rc = request_irq(ace->irq, ace_interrupt, 0, "systemace", ace);
1032 /* Failure - fall back to polled mode */
1033 dev_err(ace->dev, "request_irq failed\n");
1038 /* Enable interrupts */
1039 val = ace_in(ace, ACE_CTRL);
1040 val |= ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ;
1041 ace_out(ace, ACE_CTRL, val);
1043 /* Print the identification */
1044 dev_info(ace->dev, "Xilinx SystemACE revision %i.%i.%i\n",
1045 (version >> 12) & 0xf, (version >> 8) & 0x0f, version & 0xff);
1046 dev_dbg(ace->dev, "physaddr 0x%llx, mapped to 0x%p, irq=%i\n",
1047 (unsigned long long) ace->physaddr, ace->baseaddr, ace->irq);
1049 ace->media_change = 1;
1050 ace_revalidate_disk(ace->gd);
1052 /* Make the sysace device 'live' */
1060 blk_cleanup_queue(ace->queue);
1062 iounmap(ace->baseaddr);
1064 dev_info(ace->dev, "xsysace: error initializing device at 0x%llx\n",
1065 (unsigned long long) ace->physaddr);
1069 static void __devexit ace_teardown(struct ace_device *ace)
1072 del_gendisk(ace->gd);
1077 blk_cleanup_queue(ace->queue);
1079 tasklet_kill(&ace->fsm_tasklet);
1081 if (ace->irq != NO_IRQ)
1082 free_irq(ace->irq, ace);
1084 iounmap(ace->baseaddr);
1087 static int __devinit
1088 ace_alloc(struct device *dev, int id, resource_size_t physaddr,
1089 int irq, int bus_width)
1091 struct ace_device *ace;
1093 dev_dbg(dev, "ace_alloc(%p)\n", dev);
1100 /* Allocate and initialize the ace device structure */
1101 ace = kzalloc(sizeof(struct ace_device), GFP_KERNEL);
1109 ace->physaddr = physaddr;
1111 ace->bus_width = bus_width;
1113 /* Call the setup code */
1114 rc = ace_setup(ace);
1118 dev_set_drvdata(dev, ace);
1122 dev_set_drvdata(dev, NULL);
1126 dev_err(dev, "could not initialize device, err=%i\n", rc);
1130 static void __devexit ace_free(struct device *dev)
1132 struct ace_device *ace = dev_get_drvdata(dev);
1133 dev_dbg(dev, "ace_free(%p)\n", dev);
1137 dev_set_drvdata(dev, NULL);
1142 /* ---------------------------------------------------------------------
1143 * Platform Bus Support
1146 static int __devinit ace_probe(struct platform_device *dev)
1148 resource_size_t physaddr = 0;
1149 int bus_width = ACE_BUS_WIDTH_16; /* FIXME: should not be hard coded */
1154 dev_dbg(&dev->dev, "ace_probe(%p)\n", dev);
1156 for (i = 0; i < dev->num_resources; i++) {
1157 if (dev->resource[i].flags & IORESOURCE_MEM)
1158 physaddr = dev->resource[i].start;
1159 if (dev->resource[i].flags & IORESOURCE_IRQ)
1160 irq = dev->resource[i].start;
1163 /* Call the bus-independant setup code */
1164 return ace_alloc(&dev->dev, id, physaddr, irq, bus_width);
1168 * Platform bus remove() method
1170 static int __devexit ace_remove(struct platform_device *dev)
1172 ace_free(&dev->dev);
1176 static struct platform_driver ace_platform_driver = {
1178 .remove = __devexit_p(ace_remove),
1180 .owner = THIS_MODULE,
1185 /* ---------------------------------------------------------------------
1186 * OF_Platform Bus Support
1189 #if defined(CONFIG_OF)
1190 static int __devinit
1191 ace_of_probe(struct of_device *op, const struct of_device_id *match)
1193 struct resource res;
1194 resource_size_t physaddr;
1196 int irq, bus_width, rc;
1198 dev_dbg(&op->dev, "ace_of_probe(%p, %p)\n", op, match);
1201 id = of_get_property(op->node, "port-number", NULL);
1204 rc = of_address_to_resource(op->node, 0, &res);
1206 dev_err(&op->dev, "invalid address\n");
1209 physaddr = res.start;
1212 irq = irq_of_parse_and_map(op->node, 0);
1215 bus_width = ACE_BUS_WIDTH_16;
1216 if (of_find_property(op->node, "8-bit", NULL))
1217 bus_width = ACE_BUS_WIDTH_8;
1219 /* Call the bus-independant setup code */
1220 return ace_alloc(&op->dev, id ? *id : 0, physaddr, irq, bus_width);
1223 static int __devexit ace_of_remove(struct of_device *op)
1229 /* Match table for of_platform binding */
1230 static struct of_device_id ace_of_match[] __devinitdata = {
1231 { .compatible = "xlnx,opb-sysace-1.00.b", },
1232 { .compatible = "xlnx,opb-sysace-1.00.c", },
1233 { .compatible = "xlnx,xps-sysace-1.00.a", },
1234 { .compatible = "xlnx,sysace", },
1237 MODULE_DEVICE_TABLE(of, ace_of_match);
1239 static struct of_platform_driver ace_of_driver = {
1240 .owner = THIS_MODULE,
1242 .match_table = ace_of_match,
1243 .probe = ace_of_probe,
1244 .remove = __devexit_p(ace_of_remove),
1250 /* Registration helpers to keep the number of #ifdefs to a minimum */
1251 static inline int __init ace_of_register(void)
1253 pr_debug("xsysace: registering OF binding\n");
1254 return of_register_platform_driver(&ace_of_driver);
1257 static inline void __exit ace_of_unregister(void)
1259 of_unregister_platform_driver(&ace_of_driver);
1261 #else /* CONFIG_OF */
1262 /* CONFIG_OF not enabled; do nothing helpers */
1263 static inline int __init ace_of_register(void) { return 0; }
1264 static inline void __exit ace_of_unregister(void) { }
1265 #endif /* CONFIG_OF */
1267 /* ---------------------------------------------------------------------
1268 * Module init/exit routines
1270 static int __init ace_init(void)
1274 ace_major = register_blkdev(ace_major, "xsysace");
1275 if (ace_major <= 0) {
1280 rc = ace_of_register();
1284 pr_debug("xsysace: registering platform binding\n");
1285 rc = platform_driver_register(&ace_platform_driver);
1289 pr_info("Xilinx SystemACE device driver, major=%i\n", ace_major);
1293 ace_of_unregister();
1295 unregister_blkdev(ace_major, "xsysace");
1297 printk(KERN_ERR "xsysace: registration failed; err=%i\n", rc);
1301 static void __exit ace_exit(void)
1303 pr_debug("Unregistering Xilinx SystemACE driver\n");
1304 platform_driver_unregister(&ace_platform_driver);
1305 ace_of_unregister();
1306 unregister_blkdev(ace_major, "xsysace");
1309 module_init(ace_init);
1310 module_exit(ace_exit);