git.oblomov.eu Git - linux-2.6/blob - drivers/scsi/ips.c

   1 /*****************************************************************************/
   2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller                */
   3 /*                                                                           */
   4 /* Written By: Keith Mitchell, IBM Corporation                               */
   5 /*             Jack Hammer, Adaptec, Inc.                                    */
   6 /*             David Jeffery, Adaptec, Inc.                                  */
   7 /*                                                                           */
   8 /* Copyright (C) 2000 IBM Corporation                                        */
   9 /* Copyright (C) 2002,2003 Adaptec, Inc.                                     */
  10 /*                                                                           */
  11 /* This program is free software; you can redistribute it and/or modify      */
  12 /* it under the terms of the GNU General Public License as published by      */
  13 /* the Free Software Foundation; either version 2 of the License, or         */
  14 /* (at your option) any later version.                                       */
  15 /*                                                                           */
  16 /* This program is distributed in the hope that it will be useful,           */
  17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of            */
  18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             */
  19 /* GNU General Public License for more details.                              */
  20 /*                                                                           */
  21 /* NO WARRANTY                                                               */
  22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        */
  23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      */
  24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      */
  25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    */
  26 /* solely responsible for determining the appropriateness of using and       */
  27 /* distributing the Program and assumes all risks associated with its        */
  28 /* exercise of rights under this Agreement, including but not limited to     */
  29 /* the risks and costs of program errors, damage to or loss of data,         */
  30 /* programs or equipment, and unavailability or interruption of operations.  */
  31 /*                                                                           */
  32 /* DISCLAIMER OF LIABILITY                                                   */
  33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   */
  34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        */
  35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   */
  36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     */
  37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    */
  38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  */
  39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             */
  40 /*                                                                           */
  41 /* You should have received a copy of the GNU General Public License         */
  42 /* along with this program; if not, write to the Free Software               */
  43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */
  44 /*                                                                           */
  45 /* Bugs/Comments/Suggestions about this driver should be mailed to:          */
  46 /*      ipslinux@adaptec.com                                                 */
  47 /*                                                                           */
  48 /* For system support issues, contact your local IBM Customer support.       */
  49 /* Directions to find IBM Customer Support for each country can be found at: */
  50 /*      http://www.ibm.com/planetwide/                                       */
  51 /*                                                                           */
  52 /*****************************************************************************/
  53
  54 /*****************************************************************************/
  55 /* Change Log                                                                */
  56 /*                                                                           */
  57 /* 0.99.02  - Breakup commands that are bigger than 8 * the stripe size      */
  58 /* 0.99.03  - Make interrupt routine handle all completed request on the     */
  59 /*            adapter not just the first one                                 */
  60 /*          - Make sure passthru commands get woken up if we run out of      */
  61 /*            SCBs                                                           */
  62 /*          - Send all of the commands on the queue at once rather than      */
  63 /*            one at a time since the card will support it.                  */
  64 /* 0.99.04  - Fix race condition in the passthru mechanism -- this required  */
  65 /*            the interface to the utilities to change                       */
  66 /*          - Fix error recovery code                                        */
  67 /* 0.99.05  - Fix an oops when we get certain passthru commands              */
  68 /* 1.00.00  - Initial Public Release                                         */
  69 /*            Functionally equivalent to 0.99.05                             */
  70 /* 3.60.00  - Bump max commands to 128 for use with firmware 3.60            */
  71 /*          - Change version to 3.60 to coincide with release numbering.     */
  72 /* 3.60.01  - Remove bogus error check in passthru routine                   */
  73 /* 3.60.02  - Make DCDB direction based on lookup table                      */
  74 /*          - Only allow one DCDB command to a SCSI ID at a time             */
  75 /* 4.00.00  - Add support for ServeRAID 4                                    */
  76 /* 4.00.01  - Add support for First Failure Data Capture                     */
  77 /* 4.00.02  - Fix problem with PT DCDB with no buffer                        */
  78 /* 4.00.03  - Add alternative passthru interface                             */
  79 /*          - Add ability to flash BIOS                                      */
  80 /* 4.00.04  - Rename structures/constants to be prefixed with IPS_           */
  81 /* 4.00.05  - Remove wish_block from init routine                            */
  82 /*          - Use linux/spinlock.h instead of asm/spinlock.h for kernels     */
  83 /*            2.3.18 and later                                               */
  84 /*          - Sync with other changes from the 2.3 kernels                   */
  85 /* 4.00.06  - Fix timeout with initial FFDC command                          */
  86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
  87 /* 4.10.00  - Add support for ServeRAID 4M/4L                                */
  88 /* 4.10.13  - Fix for dynamic unload and proc file system                    */
  89 /* 4.20.03  - Rename version to coincide with new release schedules          */
  90 /*            Performance fixes                                              */
  91 /*            Fix truncation of /proc files with cat                         */
  92 /*            Merge in changes through kernel 2.4.0test1ac21                 */
  93 /* 4.20.13  - Fix some failure cases / reset code                            */
  94 /*          - Hook into the reboot_notifier to flush the controller cache    */
  95 /* 4.50.01  - Fix problem when there is a hole in logical drive numbering    */
  96 /* 4.70.09  - Use a Common ( Large Buffer ) for Flashing from the JCRM CD    */
  97 /*          - Add IPSSEND Flash Support                                      */
  98 /*          - Set Sense Data for Unknown SCSI Command                        */
  99 /*          - Use Slot Number from NVRAM Page 5                              */
 100 /*          - Restore caller's DCDB Structure                                */
 101 /* 4.70.12  - Corrective actions for bad controller ( during initialization )*/
 102 /* 4.70.13  - Don't Send CDB's if we already know the device is not present  */
 103 /*          - Don't release HA Lock in ips_next() until SC taken off queue   */
 104 /*          - Unregister SCSI device in ips_release()                        */
 105 /* 4.70.15  - Fix Breakup for very large ( non-SG ) requests in ips_done()   */
 106 /* 4.71.00  - Change all memory allocations to not use GFP_DMA flag          */
 107 /*            Code Clean-Up for 2.4.x kernel                                 */
 108 /* 4.72.00  - Allow for a Scatter-Gather Element to exceed MAX_XFER Size     */
 109 /* 4.72.01  - I/O Mapped Memory release ( so "insmod ips" does not Fail )    */
 110 /*          - Don't Issue Internal FFDC Command if there are Active Commands */
 111 /*          - Close Window for getting too many IOCTL's active               */
 112 /* 4.80.00  - Make ia64 Safe                                                 */
 113 /* 4.80.04  - Eliminate calls to strtok() if 2.4.x or greater                */
 114 /*          - Adjustments to Device Queue Depth                              */
 115 /* 4.80.14  - Take all semaphores off stack                                  */
 116 /*          - Clean Up New_IOCTL path                                        */
 117 /* 4.80.20  - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel )  */
 118 /*          - 5 second delay needed after resetting an i960 adapter          */
 119 /* 4.80.26  - Clean up potential code problems ( Arjan's recommendations )   */
 120 /* 4.90.01  - Version Matching for FirmWare, BIOS, and Driver                */
 121 /* 4.90.05  - Use New PCI Architecture to facilitate Hot Plug Development    */
 122 /* 4.90.08  - Increase Delays in Flashing ( Trombone Only - 4H )             */
 123 /* 4.90.08  - Data Corruption if First Scatter Gather Element is > 64K       */
 124 /* 4.90.11  - Don't actually RESET unless it's physically required           */
 125 /*          - Remove unused compile options                                  */
 126 /* 5.00.01  - Sarasota ( 5i ) adapters must always be scanned first          */
 127 /*          - Get rid on IOCTL_NEW_COMMAND code                              */
 128 /*          - Add Extended DCDB Commands for Tape Support in 5I              */
 129 /* 5.10.12  - use pci_dma interfaces, update for 2.5 kernel changes          */
 130 /* 5.10.15  - remove unused code (sem, macros, etc.)                         */
 131 /* 5.30.00  - use __devexit_p()                                              */
 132 /* 6.00.00  - Add 6x Adapters and Battery Flash                              */
 133 /* 6.10.00  - Remove 1G Addressing Limitations                               */
 134 /* 6.11.xx  - Get VersionInfo buffer off the stack !              DDTS 60401 */
 135 /* 6.11.xx  - Make Logical Drive Info structure safe for DMA      DDTS 60639 */
 136 /* 7.10.18  - Add highmem_io flag in SCSI Templete for 2.4 kernels           */
 137 /*          - Fix path/name for scsi_hosts.h include for 2.6 kernels         */
 138 /*          - Fix sort order of 7k                                           */
 139 /*          - Remove 3 unused "inline" functions                             */
 140 /* 7.12.xx  - Use STATIC functions whereever possible                        */
 141 /*          - Clean up deprecated MODULE_PARM calls                          */
 142 /* 7.12.05  - Remove Version Matching per IBM request                        */
 143 /*****************************************************************************/
 144
 145 /*
 146  * Conditional Compilation directives for this driver:
 147  *
 148  * IPS_DEBUG            - Turn on debugging info
 149  *
 150  * Parameters:
 151  *
 152  * debug:<number>       - Set debug level to <number>
 153  *                        NOTE: only works when IPS_DEBUG compile directive is used.
 154  *       1              - Normal debug messages
 155  *       2              - Verbose debug messages
 156  *       11             - Method trace (non interrupt)
 157  *       12             - Method trace (includes interrupt)
 158  *
 159  * noi2o                - Don't use I2O Queues (ServeRAID 4 only)
 160  * nommap               - Don't use memory mapped I/O
 161  * ioctlsize            - Initial size of the IOCTL buffer
 162  */
 163
 164 #include <asm/io.h>
 165 #include <asm/byteorder.h>
 166 #include <asm/page.h>
 167 #include <linux/stddef.h>
 168 #include <linux/version.h>
 169 #include <linux/string.h>
 170 #include <linux/errno.h>
 171 #include <linux/kernel.h>
 172 #include <linux/ioport.h>
 173 #include <linux/slab.h>
 174 #include <linux/delay.h>
 175 #include <linux/pci.h>
 176 #include <linux/proc_fs.h>
 177 #include <linux/reboot.h>
 178 #include <linux/interrupt.h>
 179
 180 #include <linux/blkdev.h>
 181 #include <linux/types.h>
 182 #include <linux/dma-mapping.h>
 183
 184 #include <scsi/sg.h>
 185 #include "scsi.h"
 186 #include <scsi/scsi_host.h>
 187
 188 #include "ips.h"
 189
 190 #include <linux/module.h>
 191
 192 #include <linux/stat.h>
 193
 194 #include <linux/spinlock.h>
 195 #include <linux/init.h>
 196
 197 #include <linux/smp.h>
 198
 199 #ifdef MODULE
 200 static char *ips = NULL;
 201 module_param(ips, charp, 0);
 202 #endif
 203
 204 /*
 205  * DRIVER_VER
 206  */
 207 #define IPS_VERSION_HIGH        "7.12"
 208 #define IPS_VERSION_LOW         ".05 "
 209
 210 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
 211 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
 212 #endif
 213
 214 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
 215                          DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
 216                          PCI_DMA_BIDIRECTIONAL : \
 217                          scb->scsi_cmd->sc_data_direction)
 218
 219 #ifdef IPS_DEBUG
 220 #define METHOD_TRACE(s, i)    if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
 221 #define DEBUG(i, s)           if (ips_debug >= i) printk(KERN_NOTICE s "\n");
 222 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
 223 #else
 224 #define METHOD_TRACE(s, i)
 225 #define DEBUG(i, s)
 226 #define DEBUG_VAR(i, s, v...)
 227 #endif
 228
 229 /*
 230  * Function prototypes
 231  */
 232 static int ips_detect(struct scsi_host_template *);
 233 static int ips_release(struct Scsi_Host *);
 234 static int ips_eh_abort(struct scsi_cmnd *);
 235 static int ips_eh_reset(struct scsi_cmnd *);
 236 static int ips_queue(struct scsi_cmnd *, void (*)(struct scsi_cmnd *));
 237 static const char *ips_info(struct Scsi_Host *);
 238 static irqreturn_t do_ipsintr(int, void *);
 239 static int ips_hainit(ips_ha_t *);
 240 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
 241 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
 242 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
 243 static int ips_online(ips_ha_t *, ips_scb_t *);
 244 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
 245 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
 246 static int ips_msense(ips_ha_t *, ips_scb_t *);
 247 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
 248 static int ips_deallocatescbs(ips_ha_t *, int);
 249 static int ips_allocatescbs(ips_ha_t *);
 250 static int ips_reset_copperhead(ips_ha_t *);
 251 static int ips_reset_copperhead_memio(ips_ha_t *);
 252 static int ips_reset_morpheus(ips_ha_t *);
 253 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
 254 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
 255 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
 256 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
 257 static int ips_isintr_copperhead(ips_ha_t *);
 258 static int ips_isintr_copperhead_memio(ips_ha_t *);
 259 static int ips_isintr_morpheus(ips_ha_t *);
 260 static int ips_wait(ips_ha_t *, int, int);
 261 static int ips_write_driver_status(ips_ha_t *, int);
 262 static int ips_read_adapter_status(ips_ha_t *, int);
 263 static int ips_read_subsystem_parameters(ips_ha_t *, int);
 264 static int ips_read_config(ips_ha_t *, int);
 265 static int ips_clear_adapter(ips_ha_t *, int);
 266 static int ips_readwrite_page5(ips_ha_t *, int, int);
 267 static int ips_init_copperhead(ips_ha_t *);
 268 static int ips_init_copperhead_memio(ips_ha_t *);
 269 static int ips_init_morpheus(ips_ha_t *);
 270 static int ips_isinit_copperhead(ips_ha_t *);
 271 static int ips_isinit_copperhead_memio(ips_ha_t *);
 272 static int ips_isinit_morpheus(ips_ha_t *);
 273 static int ips_erase_bios(ips_ha_t *);
 274 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 275 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 276 static int ips_erase_bios_memio(ips_ha_t *);
 277 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 278 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 279 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 280 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 281 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 282 static void ips_free_flash_copperhead(ips_ha_t * ha);
 283 static void ips_get_bios_version(ips_ha_t *, int);
 284 static void ips_identify_controller(ips_ha_t *);
 285 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
 286 static void ips_enable_int_copperhead(ips_ha_t *);
 287 static void ips_enable_int_copperhead_memio(ips_ha_t *);
 288 static void ips_enable_int_morpheus(ips_ha_t *);
 289 static int ips_intr_copperhead(ips_ha_t *);
 290 static int ips_intr_morpheus(ips_ha_t *);
 291 static void ips_next(ips_ha_t *, int);
 292 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
 293 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
 294 static void ips_done(ips_ha_t *, ips_scb_t *);
 295 static void ips_free(ips_ha_t *);
 296 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
 297 static void ips_freescb(ips_ha_t *, ips_scb_t *);
 298 static void ips_setup_funclist(ips_ha_t *);
 299 static void ips_statinit(ips_ha_t *);
 300 static void ips_statinit_memio(ips_ha_t *);
 301 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
 302 static void ips_ffdc_reset(ips_ha_t *, int);
 303 static void ips_ffdc_time(ips_ha_t *);
 304 static uint32_t ips_statupd_copperhead(ips_ha_t *);
 305 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
 306 static uint32_t ips_statupd_morpheus(ips_ha_t *);
 307 static ips_scb_t *ips_getscb(ips_ha_t *);
 308 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
 309 static void ips_putq_wait_tail(ips_wait_queue_t *, struct scsi_cmnd *);
 310 static void ips_putq_copp_tail(ips_copp_queue_t *,
 311                                       ips_copp_wait_item_t *);
 312 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
 313 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
 314 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
 315 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *,
 316                                           struct scsi_cmnd *);
 317 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
 318                                                      ips_copp_wait_item_t *);
 319 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
 320
 321 static int ips_is_passthru(struct scsi_cmnd *);
 322 static int ips_make_passthru(ips_ha_t *, struct scsi_cmnd *, ips_scb_t *, int);
 323 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 324 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
 325 static void ips_scmd_buf_write(struct scsi_cmnd * scmd, void *data,
 326                                unsigned int count);
 327 static void ips_scmd_buf_read(struct scsi_cmnd * scmd, void *data,
 328                               unsigned int count);
 329
 330 static int ips_proc_info(struct Scsi_Host *, char *, char **, off_t, int, int);
 331 static int ips_host_info(ips_ha_t *, char *, off_t, int);
 332 static void copy_mem_info(IPS_INFOSTR *, char *, int);
 333 static int copy_info(IPS_INFOSTR *, char *, ...);
 334 static int ips_abort_init(ips_ha_t * ha, int index);
 335 static int ips_init_phase2(int index);
 336
 337 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
 338 static int ips_register_scsi(int index);
 339
 340 static int  ips_poll_for_flush_complete(ips_ha_t * ha);
 341 static void ips_flush_and_reset(ips_ha_t *ha);
 342
 343 /*
 344  * global variables
 345  */
 346 static const char ips_name[] = "ips";
 347 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS];      /* Array of host controller structures */
 348 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS];      /* Array of HA structures */
 349 static unsigned int ips_next_controller;
 350 static unsigned int ips_num_controllers;
 351 static unsigned int ips_released_controllers;
 352 static int ips_hotplug;
 353 static int ips_cmd_timeout = 60;
 354 static int ips_reset_timeout = 60 * 5;
 355 static int ips_force_memio = 1;         /* Always use Memory Mapped I/O    */
 356 static int ips_force_i2o = 1;   /* Always use I2O command delivery */
 357 static int ips_ioctlsize = IPS_IOCTL_SIZE;      /* Size of the ioctl buffer        */
 358 static int ips_cd_boot;                 /* Booting from Manager CD         */
 359 static char *ips_FlashData = NULL;      /* CD Boot - Flash Data Buffer      */
 360 static dma_addr_t ips_flashbusaddr;
 361 static long ips_FlashDataInUse;         /* CD Boot - Flash Data In Use Flag */
 362 static uint32_t MaxLiteCmds = 32;       /* Max Active Cmds for a Lite Adapter */
 363 static struct scsi_host_template ips_driver_template = {
 364         .detect                 = ips_detect,
 365         .release                = ips_release,
 366         .info                   = ips_info,
 367         .queuecommand           = ips_queue,
 368         .eh_abort_handler       = ips_eh_abort,
 369         .eh_host_reset_handler  = ips_eh_reset,
 370         .proc_name              = "ips",
 371         .proc_info              = ips_proc_info,
 372         .slave_configure        = ips_slave_configure,
 373         .bios_param             = ips_biosparam,
 374         .this_id                = -1,
 375         .sg_tablesize           = IPS_MAX_SG,
 376         .cmd_per_lun            = 3,
 377         .use_clustering         = ENABLE_CLUSTERING,
 378 };
 379
 380
 381 /* This table describes all ServeRAID Adapters */
 382 static struct  pci_device_id  ips_pci_table[] = {
 383         { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 384         { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 385         { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 386         { 0, }
 387 };
 388
 389 MODULE_DEVICE_TABLE( pci, ips_pci_table );
 390
 391 static char ips_hot_plug_name[] = "ips";
 392
 393 static int __devinit  ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
 394 static void __devexit ips_remove_device(struct pci_dev *pci_dev);
 395
 396 static struct pci_driver ips_pci_driver = {
 397         .name           = ips_hot_plug_name,
 398         .id_table       = ips_pci_table,
 399         .probe          = ips_insert_device,
 400         .remove         = __devexit_p(ips_remove_device),
 401 };
 402
 403
 404 /*
 405  * Necessary forward function protoypes
 406  */
 407 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
 408
 409 #define MAX_ADAPTER_NAME 15
 410
 411 static char ips_adapter_name[][30] = {
 412         "ServeRAID",
 413         "ServeRAID II",
 414         "ServeRAID on motherboard",
 415         "ServeRAID on motherboard",
 416         "ServeRAID 3H",
 417         "ServeRAID 3L",
 418         "ServeRAID 4H",
 419         "ServeRAID 4M",
 420         "ServeRAID 4L",
 421         "ServeRAID 4Mx",
 422         "ServeRAID 4Lx",
 423         "ServeRAID 5i",
 424         "ServeRAID 5i",
 425         "ServeRAID 6M",
 426         "ServeRAID 6i",
 427         "ServeRAID 7t",
 428         "ServeRAID 7k",
 429         "ServeRAID 7M"
 430 };
 431
 432 static struct notifier_block ips_notifier = {
 433         ips_halt, NULL, 0
 434 };
 435
 436 /*
 437  * Direction table
 438  */
 439 static char ips_command_direction[] = {
 440         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
 441         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
 442         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 443         IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 444         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
 445         IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 446         IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
 447         IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 448         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
 449         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 450         IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
 451         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 452         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
 453         IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
 454         IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
 455         IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 456         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 457         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 458         IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 459         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 460         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 461         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 462         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 463         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 464         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 465         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 466         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 467         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 468         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 469         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 470         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 471         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 472         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 473         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
 474         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
 475         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
 476         IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
 477         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 478         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 479         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 480         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 481         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 482         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 483         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 484         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 485         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 486         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
 487         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 488         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 489         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 490         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
 491 };
 492
 493
 494 /****************************************************************************/
 495 /*                                                                          */
 496 /* Routine Name: ips_setup                                                  */
 497 /*                                                                          */
 498 /* Routine Description:                                                     */
 499 /*                                                                          */
 500 /*   setup parameters to the driver                                         */
 501 /*                                                                          */
 502 /****************************************************************************/
 503 static int
 504 ips_setup(char *ips_str)
 505 {
 506
 507         int i;
 508         char *key;
 509         char *value;
 510         IPS_OPTION options[] = {
 511                 {"noi2o", &ips_force_i2o, 0},
 512                 {"nommap", &ips_force_memio, 0},
 513                 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
 514                 {"cdboot", &ips_cd_boot, 0},
 515                 {"maxcmds", &MaxLiteCmds, 32},
 516         };
 517
 518         /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
 519         /* Search for value */
 520         while ((key = strsep(&ips_str, ",."))) {
 521                 if (!*key)
 522                         continue;
 523                 value = strchr(key, ':');
 524                 if (value)
 525                         *value++ = '\0';
 526                 /*
 527                  * We now have key/value pairs.
 528                  * Update the variables
 529                  */
 530                 for (i = 0; i < ARRAY_SIZE(options); i++) {
 531                         if (strnicmp
 532                             (key, options[i].option_name,
 533                              strlen(options[i].option_name)) == 0) {
 534                                 if (value)
 535                                         *options[i].option_flag =
 536                                             simple_strtoul(value, NULL, 0);
 537                                 else
 538                                         *options[i].option_flag =
 539                                             options[i].option_value;
 540                                 break;
 541                         }
 542                 }
 543         }
 544
 545         return (1);
 546 }
 547
 548 __setup("ips=", ips_setup);
 549
 550 /****************************************************************************/
 551 /*                                                                          */
 552 /* Routine Name: ips_detect                                                 */
 553 /*                                                                          */
 554 /* Routine Description:                                                     */
 555 /*                                                                          */
 556 /*   Detect and initialize the driver                                       */
 557 /*                                                                          */
 558 /* NOTE: this routine is called under the io_request_lock spinlock          */
 559 /*                                                                          */
 560 /****************************************************************************/
 561 static int
 562 ips_detect(struct scsi_host_template * SHT)
 563 {
 564         int i;
 565
 566         METHOD_TRACE("ips_detect", 1);
 567
 568 #ifdef MODULE
 569         if (ips)
 570                 ips_setup(ips);
 571 #endif
 572
 573         for (i = 0; i < ips_num_controllers; i++) {
 574                 if (ips_register_scsi(i))
 575                         ips_free(ips_ha[i]);
 576                 ips_released_controllers++;
 577         }
 578         ips_hotplug = 1;
 579         return (ips_num_controllers);
 580 }
 581
 582 /****************************************************************************/
 583 /*   configure the function pointers to use the functions that will work    */
 584 /*   with the found version of the adapter                                  */
 585 /****************************************************************************/
 586 static void
 587 ips_setup_funclist(ips_ha_t * ha)
 588 {
 589
 590         /*
 591          * Setup Functions
 592          */
 593         if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
 594                 /* morpheus / marco / sebring */
 595                 ha->func.isintr = ips_isintr_morpheus;
 596                 ha->func.isinit = ips_isinit_morpheus;
 597                 ha->func.issue = ips_issue_i2o_memio;
 598                 ha->func.init = ips_init_morpheus;
 599                 ha->func.statupd = ips_statupd_morpheus;
 600                 ha->func.reset = ips_reset_morpheus;
 601                 ha->func.intr = ips_intr_morpheus;
 602                 ha->func.enableint = ips_enable_int_morpheus;
 603         } else if (IPS_USE_MEMIO(ha)) {
 604                 /* copperhead w/MEMIO */
 605                 ha->func.isintr = ips_isintr_copperhead_memio;
 606                 ha->func.isinit = ips_isinit_copperhead_memio;
 607                 ha->func.init = ips_init_copperhead_memio;
 608                 ha->func.statupd = ips_statupd_copperhead_memio;
 609                 ha->func.statinit = ips_statinit_memio;
 610                 ha->func.reset = ips_reset_copperhead_memio;
 611                 ha->func.intr = ips_intr_copperhead;
 612                 ha->func.erasebios = ips_erase_bios_memio;
 613                 ha->func.programbios = ips_program_bios_memio;
 614                 ha->func.verifybios = ips_verify_bios_memio;
 615                 ha->func.enableint = ips_enable_int_copperhead_memio;
 616                 if (IPS_USE_I2O_DELIVER(ha))
 617                         ha->func.issue = ips_issue_i2o_memio;
 618                 else
 619                         ha->func.issue = ips_issue_copperhead_memio;
 620         } else {
 621                 /* copperhead */
 622                 ha->func.isintr = ips_isintr_copperhead;
 623                 ha->func.isinit = ips_isinit_copperhead;
 624                 ha->func.init = ips_init_copperhead;
 625                 ha->func.statupd = ips_statupd_copperhead;
 626                 ha->func.statinit = ips_statinit;
 627                 ha->func.reset = ips_reset_copperhead;
 628                 ha->func.intr = ips_intr_copperhead;
 629                 ha->func.erasebios = ips_erase_bios;
 630                 ha->func.programbios = ips_program_bios;
 631                 ha->func.verifybios = ips_verify_bios;
 632                 ha->func.enableint = ips_enable_int_copperhead;
 633
 634                 if (IPS_USE_I2O_DELIVER(ha))
 635                         ha->func.issue = ips_issue_i2o;
 636                 else
 637                         ha->func.issue = ips_issue_copperhead;
 638         }
 639 }
 640
 641 /****************************************************************************/
 642 /*                                                                          */
 643 /* Routine Name: ips_release                                                */
 644 /*                                                                          */
 645 /* Routine Description:                                                     */
 646 /*                                                                          */
 647 /*   Remove a driver                                                        */
 648 /*                                                                          */
 649 /****************************************************************************/
 650 static int
 651 ips_release(struct Scsi_Host *sh)
 652 {
 653         ips_scb_t *scb;
 654         ips_ha_t *ha;
 655         int i;
 656
 657         METHOD_TRACE("ips_release", 1);
 658
 659         for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
 660
 661         if (i == IPS_MAX_ADAPTERS) {
 662                 printk(KERN_WARNING
 663                        "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
 664                 BUG();
 665                 return (FALSE);
 666         }
 667
 668         ha = IPS_HA(sh);
 669
 670         if (!ha)
 671                 return (FALSE);
 672
 673         /* flush the cache on the controller */
 674         scb = &ha->scbs[ha->max_cmds - 1];
 675
 676         ips_init_scb(ha, scb);
 677
 678         scb->timeout = ips_cmd_timeout;
 679         scb->cdb[0] = IPS_CMD_FLUSH;
 680
 681         scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 682         scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 683         scb->cmd.flush_cache.state = IPS_NORM_STATE;
 684         scb->cmd.flush_cache.reserved = 0;
 685         scb->cmd.flush_cache.reserved2 = 0;
 686         scb->cmd.flush_cache.reserved3 = 0;
 687         scb->cmd.flush_cache.reserved4 = 0;
 688
 689         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 690
 691         /* send command */
 692         if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
 693                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
 694
 695         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
 696
 697         ips_sh[i] = NULL;
 698         ips_ha[i] = NULL;
 699
 700         /* free extra memory */
 701         ips_free(ha);
 702
 703         /* Free I/O Region */
 704         if (ha->io_addr)
 705                 release_region(ha->io_addr, ha->io_len);
 706
 707         /* free IRQ */
 708         free_irq(ha->irq, ha);
 709
 710         scsi_remove_host(sh);
 711         scsi_host_put(sh);
 712
 713         ips_released_controllers++;
 714
 715         return (FALSE);
 716 }
 717
 718 /****************************************************************************/
 719 /*                                                                          */
 720 /* Routine Name: ips_halt                                                   */
 721 /*                                                                          */
 722 /* Routine Description:                                                     */
 723 /*                                                                          */
 724 /*   Perform cleanup when the system reboots                                */
 725 /*                                                                          */
 726 /****************************************************************************/
 727 static int
 728 ips_halt(struct notifier_block *nb, ulong event, void *buf)
 729 {
 730         ips_scb_t *scb;
 731         ips_ha_t *ha;
 732         int i;
 733
 734         if ((event != SYS_RESTART) && (event != SYS_HALT) &&
 735             (event != SYS_POWER_OFF))
 736                 return (NOTIFY_DONE);
 737
 738         for (i = 0; i < ips_next_controller; i++) {
 739                 ha = (ips_ha_t *) ips_ha[i];
 740
 741                 if (!ha)
 742                         continue;
 743
 744                 if (!ha->active)
 745                         continue;
 746
 747                 /* flush the cache on the controller */
 748                 scb = &ha->scbs[ha->max_cmds - 1];
 749
 750                 ips_init_scb(ha, scb);
 751
 752                 scb->timeout = ips_cmd_timeout;
 753                 scb->cdb[0] = IPS_CMD_FLUSH;
 754
 755                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 756                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 757                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 758                 scb->cmd.flush_cache.reserved = 0;
 759                 scb->cmd.flush_cache.reserved2 = 0;
 760                 scb->cmd.flush_cache.reserved3 = 0;
 761                 scb->cmd.flush_cache.reserved4 = 0;
 762
 763                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 764
 765                 /* send command */
 766                 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
 767                     IPS_FAILURE)
 768                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 769                                    "Incomplete Flush.\n");
 770                 else
 771                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 772                                    "Flushing Complete.\n");
 773         }
 774
 775         return (NOTIFY_OK);
 776 }
 777
 778 /****************************************************************************/
 779 /*                                                                          */
 780 /* Routine Name: ips_eh_abort                                               */
 781 /*                                                                          */
 782 /* Routine Description:                                                     */
 783 /*                                                                          */
 784 /*   Abort a command (using the new error code stuff)                       */
 785 /* Note: this routine is called under the io_request_lock                   */
 786 /****************************************************************************/
 787 int ips_eh_abort(struct scsi_cmnd *SC)
 788 {
 789         ips_ha_t *ha;
 790         ips_copp_wait_item_t *item;
 791         int ret;
 792         struct Scsi_Host *host;
 793
 794         METHOD_TRACE("ips_eh_abort", 1);
 795
 796         if (!SC)
 797                 return (FAILED);
 798
 799         host = SC->device->host;
 800         ha = (ips_ha_t *) SC->device->host->hostdata;
 801
 802         if (!ha)
 803                 return (FAILED);
 804
 805         if (!ha->active)
 806                 return (FAILED);
 807
 808         spin_lock(host->host_lock);
 809
 810         /* See if the command is on the copp queue */
 811         item = ha->copp_waitlist.head;
 812         while ((item) && (item->scsi_cmd != SC))
 813                 item = item->next;
 814
 815         if (item) {
 816                 /* Found it */
 817                 ips_removeq_copp(&ha->copp_waitlist, item);
 818                 ret = (SUCCESS);
 819
 820                 /* See if the command is on the wait queue */
 821         } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 822                 /* command not sent yet */
 823                 ret = (SUCCESS);
 824         } else {
 825                 /* command must have already been sent */
 826                 ret = (FAILED);
 827         }
 828
 829         spin_unlock(host->host_lock);
 830         return ret;
 831 }
 832
 833 /****************************************************************************/
 834 /*                                                                          */
 835 /* Routine Name: ips_eh_reset                                               */
 836 /*                                                                          */
 837 /* Routine Description:                                                     */
 838 /*                                                                          */
 839 /*   Reset the controller (with new eh error code)                          */
 840 /*                                                                          */
 841 /* NOTE: this routine is called under the io_request_lock spinlock          */
 842 /*                                                                          */
 843 /****************************************************************************/
 844 static int __ips_eh_reset(struct scsi_cmnd *SC)
 845 {
 846         int ret;
 847         int i;
 848         ips_ha_t *ha;
 849         ips_scb_t *scb;
 850         ips_copp_wait_item_t *item;
 851
 852         METHOD_TRACE("ips_eh_reset", 1);
 853
 854 #ifdef NO_IPS_RESET
 855         return (FAILED);
 856 #else
 857
 858         if (!SC) {
 859                 DEBUG(1, "Reset called with NULL scsi command");
 860
 861                 return (FAILED);
 862         }
 863
 864         ha = (ips_ha_t *) SC->device->host->hostdata;
 865
 866         if (!ha) {
 867                 DEBUG(1, "Reset called with NULL ha struct");
 868
 869                 return (FAILED);
 870         }
 871
 872         if (!ha->active)
 873                 return (FAILED);
 874
 875         /* See if the command is on the copp queue */
 876         item = ha->copp_waitlist.head;
 877         while ((item) && (item->scsi_cmd != SC))
 878                 item = item->next;
 879
 880         if (item) {
 881                 /* Found it */
 882                 ips_removeq_copp(&ha->copp_waitlist, item);
 883                 return (SUCCESS);
 884         }
 885
 886         /* See if the command is on the wait queue */
 887         if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 888                 /* command not sent yet */
 889                 return (SUCCESS);
 890         }
 891
 892         /* An explanation for the casual observer:                              */
 893         /* Part of the function of a RAID controller is automatic error         */
 894         /* detection and recovery.  As such, the only problem that physically   */
 895         /* resetting an adapter will ever fix is when, for some reason,         */
 896         /* the driver is not successfully communicating with the adapter.       */
 897         /* Therefore, we will attempt to flush this adapter.  If that succeeds, */
 898         /* then there's no real purpose in a physical reset. This will complete */
 899         /* much faster and avoids any problems that might be caused by a        */
 900         /* physical reset ( such as having to fail all the outstanding I/O's ). */
 901
 902         if (ha->ioctl_reset == 0) {     /* IF Not an IOCTL Requested Reset */
 903                 scb = &ha->scbs[ha->max_cmds - 1];
 904
 905                 ips_init_scb(ha, scb);
 906
 907                 scb->timeout = ips_cmd_timeout;
 908                 scb->cdb[0] = IPS_CMD_FLUSH;
 909
 910                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 911                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 912                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 913                 scb->cmd.flush_cache.reserved = 0;
 914                 scb->cmd.flush_cache.reserved2 = 0;
 915                 scb->cmd.flush_cache.reserved3 = 0;
 916                 scb->cmd.flush_cache.reserved4 = 0;
 917
 918                 /* Attempt the flush command */
 919                 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
 920                 if (ret == IPS_SUCCESS) {
 921                         IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 922                                    "Reset Request - Flushed Cache\n");
 923                         return (SUCCESS);
 924                 }
 925         }
 926
 927         /* Either we can't communicate with the adapter or it's an IOCTL request */
 928         /* from a utility.  A physical reset is needed at this point.            */
 929
 930         ha->ioctl_reset = 0;    /* Reset the IOCTL Requested Reset Flag */
 931
 932         /*
 933          * command must have already been sent
 934          * reset the controller
 935          */
 936         IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
 937         ret = (*ha->func.reset) (ha);
 938
 939         if (!ret) {
 940                 struct scsi_cmnd *scsi_cmd;
 941
 942                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 943                            "Controller reset failed - controller now offline.\n");
 944
 945                 /* Now fail all of the active commands */
 946                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 947                           ips_name, ha->host_num);
 948
 949                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 950                         scb->scsi_cmd->result = DID_ERROR << 16;
 951                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 952                         ips_freescb(ha, scb);
 953                 }
 954
 955                 /* Now fail all of the pending commands */
 956                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 957                           ips_name, ha->host_num);
 958
 959                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 960                         scsi_cmd->result = DID_ERROR;
 961                         scsi_cmd->scsi_done(scsi_cmd);
 962                 }
 963
 964                 ha->active = FALSE;
 965                 return (FAILED);
 966         }
 967
 968         if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
 969                 struct scsi_cmnd *scsi_cmd;
 970
 971                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 972                            "Controller reset failed - controller now offline.\n");
 973
 974                 /* Now fail all of the active commands */
 975                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 976                           ips_name, ha->host_num);
 977
 978                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 979                         scb->scsi_cmd->result = DID_ERROR << 16;
 980                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 981                         ips_freescb(ha, scb);
 982                 }
 983
 984                 /* Now fail all of the pending commands */
 985                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 986                           ips_name, ha->host_num);
 987
 988                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 989                         scsi_cmd->result = DID_ERROR << 16;
 990                         scsi_cmd->scsi_done(scsi_cmd);
 991                 }
 992
 993                 ha->active = FALSE;
 994                 return (FAILED);
 995         }
 996
 997         /* FFDC */
 998         if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
 999                 struct timeval tv;
1000
1001                 do_gettimeofday(&tv);
1002                 ha->last_ffdc = tv.tv_sec;
1003                 ha->reset_count++;
1004                 ips_ffdc_reset(ha, IPS_INTR_IORL);
1005         }
1006
1007         /* Now fail all of the active commands */
1008         DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1009
1010         while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1011                 scb->scsi_cmd->result =
1012                     (DID_RESET << 16) | (SUGGEST_RETRY << 24);
1013                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1014                 ips_freescb(ha, scb);
1015         }
1016
1017         /* Reset DCDB active command bits */
1018         for (i = 1; i < ha->nbus; i++)
1019                 ha->dcdb_active[i - 1] = 0;
1020
1021         /* Reset the number of active IOCTLs */
1022         ha->num_ioctl = 0;
1023
1024         ips_next(ha, IPS_INTR_IORL);
1025
1026         return (SUCCESS);
1027 #endif                          /* NO_IPS_RESET */
1028
1029 }
1030
1031 static int ips_eh_reset(struct scsi_cmnd *SC)
1032 {
1033         int rc;
1034
1035         spin_lock_irq(SC->device->host->host_lock);
1036         rc = __ips_eh_reset(SC);
1037         spin_unlock_irq(SC->device->host->host_lock);
1038
1039         return rc;
1040 }
1041
1042 /****************************************************************************/
1043 /*                                                                          */
1044 /* Routine Name: ips_queue                                                  */
1045 /*                                                                          */
1046 /* Routine Description:                                                     */
1047 /*                                                                          */
1048 /*   Send a command to the controller                                       */
1049 /*                                                                          */
1050 /* NOTE:                                                                    */
1051 /*    Linux obtains io_request_lock before calling this function            */
1052 /*                                                                          */
1053 /****************************************************************************/
1054 static int ips_queue(struct scsi_cmnd *SC, void (*done) (struct scsi_cmnd *))
1055 {
1056         ips_ha_t *ha;
1057         ips_passthru_t *pt;
1058
1059         METHOD_TRACE("ips_queue", 1);
1060
1061         ha = (ips_ha_t *) SC->device->host->hostdata;
1062
1063         if (!ha)
1064                 return (1);
1065
1066         if (!ha->active)
1067                 return (DID_ERROR);
1068
1069         if (ips_is_passthru(SC)) {
1070                 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1071                         SC->result = DID_BUS_BUSY << 16;
1072                         done(SC);
1073
1074                         return (0);
1075                 }
1076         } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1077                 SC->result = DID_BUS_BUSY << 16;
1078                 done(SC);
1079
1080                 return (0);
1081         }
1082
1083         SC->scsi_done = done;
1084
1085         DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1086                   ips_name,
1087                   ha->host_num,
1088                   SC->cmnd[0],
1089                   SC->device->channel, SC->device->id, SC->device->lun);
1090
1091         /* Check for command to initiator IDs */
1092         if ((scmd_channel(SC) > 0)
1093             && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1094                 SC->result = DID_NO_CONNECT << 16;
1095                 done(SC);
1096
1097                 return (0);
1098         }
1099
1100         if (ips_is_passthru(SC)) {
1101
1102                 ips_copp_wait_item_t *scratch;
1103
1104                 /* A Reset IOCTL is only sent by the boot CD in extreme cases.           */
1105                 /* There can never be any system activity ( network or disk ), but check */
1106                 /* anyway just as a good practice.                                       */
1107                 pt = (ips_passthru_t *) scsi_sglist(SC);
1108                 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1109                     (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1110                         if (ha->scb_activelist.count != 0) {
1111                                 SC->result = DID_BUS_BUSY << 16;
1112                                 done(SC);
1113                                 return (0);
1114                         }
1115                         ha->ioctl_reset = 1;    /* This reset request is from an IOCTL */
1116                         __ips_eh_reset(SC);
1117                         SC->result = DID_OK << 16;
1118                         SC->scsi_done(SC);
1119                         return (0);
1120                 }
1121
1122                 /* allocate space for the scribble */
1123                 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1124
1125                 if (!scratch) {
1126                         SC->result = DID_ERROR << 16;
1127                         done(SC);
1128
1129                         return (0);
1130                 }
1131
1132                 scratch->scsi_cmd = SC;
1133                 scratch->next = NULL;
1134
1135                 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1136         } else {
1137                 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1138         }
1139
1140         ips_next(ha, IPS_INTR_IORL);
1141
1142         return (0);
1143 }
1144
1145 /****************************************************************************/
1146 /*                                                                          */
1147 /* Routine Name: ips_biosparam                                              */
1148 /*                                                                          */
1149 /* Routine Description:                                                     */
1150 /*                                                                          */
1151 /*   Set bios geometry for the controller                                   */
1152 /*                                                                          */
1153 /****************************************************************************/
1154 static int ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1155                          sector_t capacity, int geom[])
1156 {
1157         ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1158         int heads;
1159         int sectors;
1160         int cylinders;
1161
1162         METHOD_TRACE("ips_biosparam", 1);
1163
1164         if (!ha)
1165                 /* ?!?! host adater info invalid */
1166                 return (0);
1167
1168         if (!ha->active)
1169                 return (0);
1170
1171         if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1172                 /* ?!?! Enquiry command failed */
1173                 return (0);
1174
1175         if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1176                 heads = IPS_NORM_HEADS;
1177                 sectors = IPS_NORM_SECTORS;
1178         } else {
1179                 heads = IPS_COMP_HEADS;
1180                 sectors = IPS_COMP_SECTORS;
1181         }
1182
1183         cylinders = (unsigned long) capacity / (heads * sectors);
1184
1185         DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1186                   heads, sectors, cylinders);
1187
1188         geom[0] = heads;
1189         geom[1] = sectors;
1190         geom[2] = cylinders;
1191
1192         return (0);
1193 }
1194
1195 /****************************************************************************/
1196 /*                                                                          */
1197 /* Routine Name: ips_slave_configure                                        */
1198 /*                                                                          */
1199 /* Routine Description:                                                     */
1200 /*                                                                          */
1201 /*   Set queue depths on devices once scan is complete                      */
1202 /*                                                                          */
1203 /****************************************************************************/
1204 static int
1205 ips_slave_configure(struct scsi_device * SDptr)
1206 {
1207         ips_ha_t *ha;
1208         int min;
1209
1210         ha = IPS_HA(SDptr->host);
1211         if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1212                 min = ha->max_cmds / 2;
1213                 if (ha->enq->ucLogDriveCount <= 2)
1214                         min = ha->max_cmds - 1;
1215                 scsi_adjust_queue_depth(SDptr, MSG_ORDERED_TAG, min);
1216         }
1217
1218         SDptr->skip_ms_page_8 = 1;
1219         SDptr->skip_ms_page_3f = 1;
1220         return 0;
1221 }
1222
1223 /****************************************************************************/
1224 /*                                                                          */
1225 /* Routine Name: do_ipsintr                                                 */
1226 /*                                                                          */
1227 /* Routine Description:                                                     */
1228 /*                                                                          */
1229 /*   Wrapper for the interrupt handler                                      */
1230 /*                                                                          */
1231 /****************************************************************************/
1232 static irqreturn_t
1233 do_ipsintr(int irq, void *dev_id)
1234 {
1235         ips_ha_t *ha;
1236         struct Scsi_Host *host;
1237         int irqstatus;
1238
1239         METHOD_TRACE("do_ipsintr", 2);
1240
1241         ha = (ips_ha_t *) dev_id;
1242         if (!ha)
1243                 return IRQ_NONE;
1244         host = ips_sh[ha->host_num];
1245         /* interrupt during initialization */
1246         if (!host) {
1247                 (*ha->func.intr) (ha);
1248                 return IRQ_HANDLED;
1249         }
1250
1251         spin_lock(host->host_lock);
1252
1253         if (!ha->active) {
1254                 spin_unlock(host->host_lock);
1255                 return IRQ_HANDLED;
1256         }
1257
1258         irqstatus = (*ha->func.intr) (ha);
1259
1260         spin_unlock(host->host_lock);
1261
1262         /* start the next command */
1263         ips_next(ha, IPS_INTR_ON);
1264         return IRQ_RETVAL(irqstatus);
1265 }
1266
1267 /****************************************************************************/
1268 /*                                                                          */
1269 /* Routine Name: ips_intr_copperhead                                        */
1270 /*                                                                          */
1271 /* Routine Description:                                                     */
1272 /*                                                                          */
1273 /*   Polling interrupt handler                                              */
1274 /*                                                                          */
1275 /*   ASSUMES interrupts are disabled                                        */
1276 /*                                                                          */
1277 /****************************************************************************/
1278 int
1279 ips_intr_copperhead(ips_ha_t * ha)
1280 {
1281         ips_stat_t *sp;
1282         ips_scb_t *scb;
1283         IPS_STATUS cstatus;
1284         int intrstatus;
1285
1286         METHOD_TRACE("ips_intr", 2);
1287
1288         if (!ha)
1289                 return 0;
1290
1291         if (!ha->active)
1292                 return 0;
1293
1294         intrstatus = (*ha->func.isintr) (ha);
1295
1296         if (!intrstatus) {
1297                 /*
1298                  * Unexpected/Shared interrupt
1299                  */
1300
1301                 return 0;
1302         }
1303
1304         while (TRUE) {
1305                 sp = &ha->sp;
1306
1307                 intrstatus = (*ha->func.isintr) (ha);
1308
1309                 if (!intrstatus)
1310                         break;
1311                 else
1312                         cstatus.value = (*ha->func.statupd) (ha);
1313
1314                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1315                         /* Spurious Interupt ? */
1316                         continue;
1317                 }
1318
1319                 ips_chkstatus(ha, &cstatus);
1320                 scb = (ips_scb_t *) sp->scb_addr;
1321
1322                 /*
1323                  * use the callback function to finish things up
1324                  * NOTE: interrupts are OFF for this
1325                  */
1326                 (*scb->callback) (ha, scb);
1327         }                       /* end while */
1328         return 1;
1329 }
1330
1331 /****************************************************************************/
1332 /*                                                                          */
1333 /* Routine Name: ips_intr_morpheus                                          */
1334 /*                                                                          */
1335 /* Routine Description:                                                     */
1336 /*                                                                          */
1337 /*   Polling interrupt handler                                              */
1338 /*                                                                          */
1339 /*   ASSUMES interrupts are disabled                                        */
1340 /*                                                                          */
1341 /****************************************************************************/
1342 int
1343 ips_intr_morpheus(ips_ha_t * ha)
1344 {
1345         ips_stat_t *sp;
1346         ips_scb_t *scb;
1347         IPS_STATUS cstatus;
1348         int intrstatus;
1349
1350         METHOD_TRACE("ips_intr_morpheus", 2);
1351
1352         if (!ha)
1353                 return 0;
1354
1355         if (!ha->active)
1356                 return 0;
1357
1358         intrstatus = (*ha->func.isintr) (ha);
1359
1360         if (!intrstatus) {
1361                 /*
1362                  * Unexpected/Shared interrupt
1363                  */
1364
1365                 return 0;
1366         }
1367
1368         while (TRUE) {
1369                 sp = &ha->sp;
1370
1371                 intrstatus = (*ha->func.isintr) (ha);
1372
1373                 if (!intrstatus)
1374                         break;
1375                 else
1376                         cstatus.value = (*ha->func.statupd) (ha);
1377
1378                 if (cstatus.value == 0xffffffff)
1379                         /* No more to process */
1380                         break;
1381
1382                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1383                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1384                                    "Spurious interrupt; no ccb.\n");
1385
1386                         continue;
1387                 }
1388
1389                 ips_chkstatus(ha, &cstatus);
1390                 scb = (ips_scb_t *) sp->scb_addr;
1391
1392                 /*
1393                  * use the callback function to finish things up
1394                  * NOTE: interrupts are OFF for this
1395                  */
1396                 (*scb->callback) (ha, scb);
1397         }                       /* end while */
1398         return 1;
1399 }
1400
1401 /****************************************************************************/
1402 /*                                                                          */
1403 /* Routine Name: ips_info                                                   */
1404 /*                                                                          */
1405 /* Routine Description:                                                     */
1406 /*                                                                          */
1407 /*   Return info about the driver                                           */
1408 /*                                                                          */
1409 /****************************************************************************/
1410 static const char *
1411 ips_info(struct Scsi_Host *SH)
1412 {
1413         static char buffer[256];
1414         char *bp;
1415         ips_ha_t *ha;
1416
1417         METHOD_TRACE("ips_info", 1);
1418
1419         ha = IPS_HA(SH);
1420
1421         if (!ha)
1422                 return (NULL);
1423
1424         bp = &buffer[0];
1425         memset(bp, 0, sizeof (buffer));
1426
1427         sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1428                 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1429
1430         if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1431                 strcat(bp, " <");
1432                 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1433                 strcat(bp, ">");
1434         }
1435
1436         return (bp);
1437 }
1438
1439 /****************************************************************************/
1440 /*                                                                          */
1441 /* Routine Name: ips_proc_info                                              */
1442 /*                                                                          */
1443 /* Routine Description:                                                     */
1444 /*                                                                          */
1445 /*   The passthru interface for the driver                                  */
1446 /*                                                                          */
1447 /****************************************************************************/
1448 static int
1449 ips_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
1450               int length, int func)
1451 {
1452         int i;
1453         int ret;
1454         ips_ha_t *ha = NULL;
1455
1456         METHOD_TRACE("ips_proc_info", 1);
1457
1458         /* Find our host structure */
1459         for (i = 0; i < ips_next_controller; i++) {
1460                 if (ips_sh[i]) {
1461                         if (ips_sh[i] == host) {
1462                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1463                                 break;
1464                         }
1465                 }
1466         }
1467
1468         if (!ha)
1469                 return (-EINVAL);
1470
1471         if (func) {
1472                 /* write */
1473                 return (0);
1474         } else {
1475                 /* read */
1476                 if (start)
1477                         *start = buffer;
1478
1479                 ret = ips_host_info(ha, buffer, offset, length);
1480
1481                 return (ret);
1482         }
1483 }
1484
1485 /*--------------------------------------------------------------------------*/
1486 /* Helper Functions                                                         */
1487 /*--------------------------------------------------------------------------*/
1488
1489 /****************************************************************************/
1490 /*                                                                          */
1491 /* Routine Name: ips_is_passthru                                            */
1492 /*                                                                          */
1493 /* Routine Description:                                                     */
1494 /*                                                                          */
1495 /*   Determine if the specified SCSI command is really a passthru command   */
1496 /*                                                                          */
1497 /****************************************************************************/
1498 static int ips_is_passthru(struct scsi_cmnd *SC)
1499 {
1500         unsigned long flags;
1501
1502         METHOD_TRACE("ips_is_passthru", 1);
1503
1504         if (!SC)
1505                 return (0);
1506
1507         if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1508             (SC->device->channel == 0) &&
1509             (SC->device->id == IPS_ADAPTER_ID) &&
1510             (SC->device->lun == 0) && scsi_sglist(SC)) {
1511                 struct scatterlist *sg = scsi_sglist(SC);
1512                 char  *buffer;
1513
1514                 /* kmap_atomic() ensures addressability of the user buffer.*/
1515                 /* local_irq_save() protects the KM_IRQ0 address slot.     */
1516                 local_irq_save(flags);
1517                 buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1518                 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1519                     buffer[2] == 'P' && buffer[3] == 'P') {
1520                         kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1521                         local_irq_restore(flags);
1522                         return 1;
1523                 }
1524                 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1525                 local_irq_restore(flags);
1526         }
1527         return 0;
1528 }
1529
1530 /****************************************************************************/
1531 /*                                                                          */
1532 /* Routine Name: ips_alloc_passthru_buffer                                  */
1533 /*                                                                          */
1534 /* Routine Description:                                                     */
1535 /*   allocate a buffer large enough for the ioctl data if the ioctl buffer  */
1536 /*   is too small or doesn't exist                                          */
1537 /****************************************************************************/
1538 static int
1539 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1540 {
1541         void *bigger_buf;
1542         dma_addr_t dma_busaddr;
1543
1544         if (ha->ioctl_data && length <= ha->ioctl_len)
1545                 return 0;
1546         /* there is no buffer or it's not big enough, allocate a new one */
1547         bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1548         if (bigger_buf) {
1549                 /* free the old memory */
1550                 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1551                                     ha->ioctl_busaddr);
1552                 /* use the new memory */
1553                 ha->ioctl_data = (char *) bigger_buf;
1554                 ha->ioctl_len = length;
1555                 ha->ioctl_busaddr = dma_busaddr;
1556         } else {
1557                 return -1;
1558         }
1559         return 0;
1560 }
1561
1562 /****************************************************************************/
1563 /*                                                                          */
1564 /* Routine Name: ips_make_passthru                                          */
1565 /*                                                                          */
1566 /* Routine Description:                                                     */
1567 /*                                                                          */
1568 /*   Make a passthru command out of the info in the Scsi block              */
1569 /*                                                                          */
1570 /****************************************************************************/
1571 static int
1572 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)
1573 {
1574         ips_passthru_t *pt;
1575         int length = 0;
1576         int i, ret;
1577         struct scatterlist *sg = scsi_sglist(SC);
1578
1579         METHOD_TRACE("ips_make_passthru", 1);
1580
1581         scsi_for_each_sg(SC, sg, scsi_sg_count(SC), i)
1582                 length += sg[i].length;
1583
1584         if (length < sizeof (ips_passthru_t)) {
1585                 /* wrong size */
1586                 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1587                           ips_name, ha->host_num);
1588                 return (IPS_FAILURE);
1589         }
1590         if (ips_alloc_passthru_buffer(ha, length)) {
1591                 /* allocation failure!  If ha->ioctl_data exists, use it to return
1592                    some error codes.  Return a failed command to the scsi layer. */
1593                 if (ha->ioctl_data) {
1594                         pt = (ips_passthru_t *) ha->ioctl_data;
1595                         ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1596                         pt->BasicStatus = 0x0B;
1597                         pt->ExtendedStatus = 0x00;
1598                         ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1599                 }
1600                 return IPS_FAILURE;
1601         }
1602         ha->ioctl_datasize = length;
1603
1604         ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1605         pt = (ips_passthru_t *) ha->ioctl_data;
1606
1607         /*
1608          * Some notes about the passthru interface used
1609          *
1610          * IF the scsi op_code == 0x0d then we assume
1611          * that the data came along with/goes with the
1612          * packet we received from the sg driver. In this
1613          * case the CmdBSize field of the pt structure is
1614          * used for the size of the buffer.
1615          */
1616
1617         switch (pt->CoppCmd) {
1618         case IPS_NUMCTRLS:
1619                 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1620                        &ips_num_controllers, sizeof (int));
1621                 ips_scmd_buf_write(SC, ha->ioctl_data,
1622                                    sizeof (ips_passthru_t) + sizeof (int));
1623                 SC->result = DID_OK << 16;
1624
1625                 return (IPS_SUCCESS_IMM);
1626
1627         case IPS_COPPUSRCMD:
1628         case IPS_COPPIOCCMD:
1629                 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1630                         if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1631                                 /* wrong size */
1632                                 DEBUG_VAR(1,
1633                                           "(%s%d) Passthru structure wrong size",
1634                                           ips_name, ha->host_num);
1635
1636                                 return (IPS_FAILURE);
1637                         }
1638
1639                         if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
1640                             pt->CoppCP.cmd.flashfw.op_code ==
1641                             IPS_CMD_RW_BIOSFW) {
1642                                 ret = ips_flash_copperhead(ha, pt, scb);
1643                                 ips_scmd_buf_write(SC, ha->ioctl_data,
1644                                                    sizeof (ips_passthru_t));
1645                                 return ret;
1646                         }
1647                         if (ips_usrcmd(ha, pt, scb))
1648                                 return (IPS_SUCCESS);
1649                         else
1650                                 return (IPS_FAILURE);
1651                 }
1652
1653                 break;
1654
1655         }                       /* end switch */
1656
1657         return (IPS_FAILURE);
1658 }
1659
1660 /****************************************************************************/
1661 /* Routine Name: ips_flash_copperhead                                       */
1662 /* Routine Description:                                                     */
1663 /*   Flash the BIOS/FW on a Copperhead style controller                     */
1664 /****************************************************************************/
1665 static int
1666 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1667 {
1668         int datasize;
1669
1670         /* Trombone is the only copperhead that can do packet flash, but only
1671          * for firmware. No one said it had to make sence. */
1672         if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1673                 if (ips_usrcmd(ha, pt, scb))
1674                         return IPS_SUCCESS;
1675                 else
1676                         return IPS_FAILURE;
1677         }
1678         pt->BasicStatus = 0x0B;
1679         pt->ExtendedStatus = 0;
1680         scb->scsi_cmd->result = DID_OK << 16;
1681         /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can     */
1682         /* avoid allocating a huge buffer per adapter ( which can fail ). */
1683         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1684             pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1685                 pt->BasicStatus = 0;
1686                 return ips_flash_bios(ha, pt, scb);
1687         } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1688                 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1689                         ha->flash_data = ips_FlashData;
1690                         ha->flash_busaddr = ips_flashbusaddr;
1691                         ha->flash_len = PAGE_SIZE << 7;
1692                         ha->flash_datasize = 0;
1693                 } else if (!ha->flash_data) {
1694                         datasize = pt->CoppCP.cmd.flashfw.total_packets *
1695                             pt->CoppCP.cmd.flashfw.count;
1696                         ha->flash_data = pci_alloc_consistent(ha->pcidev,
1697                                                               datasize,
1698                                                               &ha->flash_busaddr);
1699                         if (!ha->flash_data){
1700                                 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1701                                 return IPS_FAILURE;
1702                         }
1703                         ha->flash_datasize = 0;
1704                         ha->flash_len = datasize;
1705                 } else
1706                         return IPS_FAILURE;
1707         } else {
1708                 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1709                     ha->flash_len) {
1710                         ips_free_flash_copperhead(ha);
1711                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1712                                    "failed size sanity check\n");
1713                         return IPS_FAILURE;
1714                 }
1715         }
1716         if (!ha->flash_data)
1717                 return IPS_FAILURE;
1718         pt->BasicStatus = 0;
1719         memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1720                pt->CoppCP.cmd.flashfw.count);
1721         ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1722         if (pt->CoppCP.cmd.flashfw.packet_num ==
1723             pt->CoppCP.cmd.flashfw.total_packets - 1) {
1724                 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1725                         return ips_flash_bios(ha, pt, scb);
1726                 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1727                         return ips_flash_firmware(ha, pt, scb);
1728         }
1729         return IPS_SUCCESS_IMM;
1730 }
1731
1732 /****************************************************************************/
1733 /* Routine Name: ips_flash_bios                                             */
1734 /* Routine Description:                                                     */
1735 /*   flashes the bios of a copperhead adapter                               */
1736 /****************************************************************************/
1737 static int
1738 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1739 {
1740
1741         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1742             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1743                 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1744                     (!ha->func.verifybios))
1745                         goto error;
1746                 if ((*ha->func.erasebios) (ha)) {
1747                         DEBUG_VAR(1,
1748                                   "(%s%d) flash bios failed - unable to erase flash",
1749                                   ips_name, ha->host_num);
1750                         goto error;
1751                 } else
1752                     if ((*ha->func.programbios) (ha,
1753                                                  ha->flash_data +
1754                                                  IPS_BIOS_HEADER,
1755                                                  ha->flash_datasize -
1756                                                  IPS_BIOS_HEADER, 0)) {
1757                         DEBUG_VAR(1,
1758                                   "(%s%d) flash bios failed - unable to flash",
1759                                   ips_name, ha->host_num);
1760                         goto error;
1761                 } else
1762                     if ((*ha->func.verifybios) (ha,
1763                                                 ha->flash_data +
1764                                                 IPS_BIOS_HEADER,
1765                                                 ha->flash_datasize -
1766                                                 IPS_BIOS_HEADER, 0)) {
1767                         DEBUG_VAR(1,
1768                                   "(%s%d) flash bios failed - unable to verify flash",
1769                                   ips_name, ha->host_num);
1770                         goto error;
1771                 }
1772                 ips_free_flash_copperhead(ha);
1773                 return IPS_SUCCESS_IMM;
1774         } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1775                    pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1776                 if (!ha->func.erasebios)
1777                         goto error;
1778                 if ((*ha->func.erasebios) (ha)) {
1779                         DEBUG_VAR(1,
1780                                   "(%s%d) flash bios failed - unable to erase flash",
1781                                   ips_name, ha->host_num);
1782                         goto error;
1783                 }
1784                 return IPS_SUCCESS_IMM;
1785         }
1786       error:
1787         pt->BasicStatus = 0x0B;
1788         pt->ExtendedStatus = 0x00;
1789         ips_free_flash_copperhead(ha);
1790         return IPS_FAILURE;
1791 }
1792
1793 /****************************************************************************/
1794 /*                                                                          */
1795 /* Routine Name: ips_fill_scb_sg_single                                     */
1796 /*                                                                          */
1797 /* Routine Description:                                                     */
1798 /*   Fill in a single scb sg_list element from an address                   */
1799 /*   return a -1 if a breakup occurred                                      */
1800 /****************************************************************************/
1801 static int
1802 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1803                        ips_scb_t * scb, int indx, unsigned int e_len)
1804 {
1805
1806         int ret_val = 0;
1807
1808         if ((scb->data_len + e_len) > ha->max_xfer) {
1809                 e_len = ha->max_xfer - scb->data_len;
1810                 scb->breakup = indx;
1811                 ++scb->sg_break;
1812                 ret_val = -1;
1813         } else {
1814                 scb->breakup = 0;
1815                 scb->sg_break = 0;
1816         }
1817         if (IPS_USE_ENH_SGLIST(ha)) {
1818                 scb->sg_list.enh_list[indx].address_lo =
1819                     cpu_to_le32(pci_dma_lo32(busaddr));
1820                 scb->sg_list.enh_list[indx].address_hi =
1821                     cpu_to_le32(pci_dma_hi32(busaddr));
1822                 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1823         } else {
1824                 scb->sg_list.std_list[indx].address =
1825                     cpu_to_le32(pci_dma_lo32(busaddr));
1826                 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1827         }
1828
1829         ++scb->sg_len;
1830         scb->data_len += e_len;
1831         return ret_val;
1832 }
1833
1834 /****************************************************************************/
1835 /* Routine Name: ips_flash_firmware                                         */
1836 /* Routine Description:                                                     */
1837 /*   flashes the firmware of a copperhead adapter                           */
1838 /****************************************************************************/
1839 static int
1840 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1841 {
1842         IPS_SG_LIST sg_list;
1843         uint32_t cmd_busaddr;
1844
1845         if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1846             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1847                 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1848                 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1849                 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1850         } else {
1851                 pt->BasicStatus = 0x0B;
1852                 pt->ExtendedStatus = 0x00;
1853                 ips_free_flash_copperhead(ha);
1854                 return IPS_FAILURE;
1855         }
1856         /* Save the S/G list pointer so it doesn't get clobbered */
1857         sg_list.list = scb->sg_list.list;
1858         cmd_busaddr = scb->scb_busaddr;
1859         /* copy in the CP */
1860         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1861         /* FIX stuff that might be wrong */
1862         scb->sg_list.list = sg_list.list;
1863         scb->scb_busaddr = cmd_busaddr;
1864         scb->bus = scb->scsi_cmd->device->channel;
1865         scb->target_id = scb->scsi_cmd->device->id;
1866         scb->lun = scb->scsi_cmd->device->lun;
1867         scb->sg_len = 0;
1868         scb->data_len = 0;
1869         scb->flags = 0;
1870         scb->op_code = 0;
1871         scb->callback = ipsintr_done;
1872         scb->timeout = ips_cmd_timeout;
1873
1874         scb->data_len = ha->flash_datasize;
1875         scb->data_busaddr =
1876             pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1877                            IPS_DMA_DIR(scb));
1878         scb->flags |= IPS_SCB_MAP_SINGLE;
1879         scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
1880         scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
1881         if (pt->TimeOut)
1882                 scb->timeout = pt->TimeOut;
1883         scb->scsi_cmd->result = DID_OK << 16;
1884         return IPS_SUCCESS;
1885 }
1886
1887 /****************************************************************************/
1888 /* Routine Name: ips_free_flash_copperhead                                  */
1889 /* Routine Description:                                                     */
1890 /*   release the memory resources used to hold the flash image              */
1891 /****************************************************************************/
1892 static void
1893 ips_free_flash_copperhead(ips_ha_t * ha)
1894 {
1895         if (ha->flash_data == ips_FlashData)
1896                 test_and_clear_bit(0, &ips_FlashDataInUse);
1897         else if (ha->flash_data)
1898                 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
1899                                     ha->flash_busaddr);
1900         ha->flash_data = NULL;
1901 }
1902
1903 /****************************************************************************/
1904 /*                                                                          */
1905 /* Routine Name: ips_usrcmd                                                 */
1906 /*                                                                          */
1907 /* Routine Description:                                                     */
1908 /*                                                                          */
1909 /*   Process a user command and make it ready to send                       */
1910 /*                                                                          */
1911 /****************************************************************************/
1912 static int
1913 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1914 {
1915         IPS_SG_LIST sg_list;
1916         uint32_t cmd_busaddr;
1917
1918         METHOD_TRACE("ips_usrcmd", 1);
1919
1920         if ((!scb) || (!pt) || (!ha))
1921                 return (0);
1922
1923         /* Save the S/G list pointer so it doesn't get clobbered */
1924         sg_list.list = scb->sg_list.list;
1925         cmd_busaddr = scb->scb_busaddr;
1926         /* copy in the CP */
1927         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1928         memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
1929
1930         /* FIX stuff that might be wrong */
1931         scb->sg_list.list = sg_list.list;
1932         scb->scb_busaddr = cmd_busaddr;
1933         scb->bus = scb->scsi_cmd->device->channel;
1934         scb->target_id = scb->scsi_cmd->device->id;
1935         scb->lun = scb->scsi_cmd->device->lun;
1936         scb->sg_len = 0;
1937         scb->data_len = 0;
1938         scb->flags = 0;
1939         scb->op_code = 0;
1940         scb->callback = ipsintr_done;
1941         scb->timeout = ips_cmd_timeout;
1942         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
1943
1944         /* we don't support DCDB/READ/WRITE Scatter Gather */
1945         if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
1946             (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
1947             (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
1948                 return (0);
1949
1950         if (pt->CmdBSize) {
1951                 scb->data_len = pt->CmdBSize;
1952                 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
1953         } else {
1954                 scb->data_busaddr = 0L;
1955         }
1956
1957         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1958                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
1959                                                          (unsigned long) &scb->
1960                                                          dcdb -
1961                                                          (unsigned long) scb);
1962
1963         if (pt->CmdBSize) {
1964                 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1965                         scb->dcdb.buffer_pointer =
1966                             cpu_to_le32(scb->data_busaddr);
1967                 else
1968                         scb->cmd.basic_io.sg_addr =
1969                             cpu_to_le32(scb->data_busaddr);
1970         }
1971
1972         /* set timeouts */
1973         if (pt->TimeOut) {
1974                 scb->timeout = pt->TimeOut;
1975
1976                 if (pt->TimeOut <= 10)
1977                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
1978                 else if (pt->TimeOut <= 60)
1979                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
1980                 else
1981                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
1982         }
1983
1984         /* assume success */
1985         scb->scsi_cmd->result = DID_OK << 16;
1986
1987         /* success */
1988         return (1);
1989 }
1990
1991 /****************************************************************************/
1992 /*                                                                          */
1993 /* Routine Name: ips_cleanup_passthru                                       */
1994 /*                                                                          */
1995 /* Routine Description:                                                     */
1996 /*                                                                          */
1997 /*   Cleanup after a passthru command                                       */
1998 /*                                                                          */
1999 /****************************************************************************/
2000 static void
2001 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
2002 {
2003         ips_passthru_t *pt;
2004
2005         METHOD_TRACE("ips_cleanup_passthru", 1);
2006
2007         if ((!scb) || (!scb->scsi_cmd) || (!scsi_sglist(scb->scsi_cmd))) {
2008                 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2009                           ips_name, ha->host_num);
2010
2011                 return;
2012         }
2013         pt = (ips_passthru_t *) ha->ioctl_data;
2014
2015         /* Copy data back to the user */
2016         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)      /* Copy DCDB Back to Caller's Area */
2017                 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2018
2019         pt->BasicStatus = scb->basic_status;
2020         pt->ExtendedStatus = scb->extended_status;
2021         pt->AdapterType = ha->ad_type;
2022
2023         if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
2024             (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2025              scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2026                 ips_free_flash_copperhead(ha);
2027
2028         ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2029 }
2030
2031 /****************************************************************************/
2032 /*                                                                          */
2033 /* Routine Name: ips_host_info                                              */
2034 /*                                                                          */
2035 /* Routine Description:                                                     */
2036 /*                                                                          */
2037 /*   The passthru interface for the driver                                  */
2038 /*                                                                          */
2039 /****************************************************************************/
2040 static int
2041 ips_host_info(ips_ha_t * ha, char *ptr, off_t offset, int len)
2042 {
2043         IPS_INFOSTR info;
2044
2045         METHOD_TRACE("ips_host_info", 1);
2046
2047         info.buffer = ptr;
2048         info.length = len;
2049         info.offset = offset;
2050         info.pos = 0;
2051         info.localpos = 0;
2052
2053         copy_info(&info, "\nIBM ServeRAID General Information:\n\n");
2054
2055         if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2056             (le16_to_cpu(ha->nvram->adapter_type) != 0))
2057                 copy_info(&info, "\tController Type                   : %s\n",
2058                           ips_adapter_name[ha->ad_type - 1]);
2059         else
2060                 copy_info(&info,
2061                           "\tController Type                   : Unknown\n");
2062
2063         if (ha->io_addr)
2064                 copy_info(&info,
2065                           "\tIO region                         : 0x%lx (%d bytes)\n",
2066                           ha->io_addr, ha->io_len);
2067
2068         if (ha->mem_addr) {
2069                 copy_info(&info,
2070                           "\tMemory region                     : 0x%lx (%d bytes)\n",
2071                           ha->mem_addr, ha->mem_len);
2072                 copy_info(&info,
2073                           "\tShared memory address             : 0x%lx\n",
2074                           ha->mem_ptr);
2075         }
2076
2077         copy_info(&info, "\tIRQ number                        : %d\n", ha->irq);
2078
2079     /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2080     /* That keeps everything happy for "text" operations on the proc file.                    */
2081
2082         if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2083         if (ha->nvram->bios_low[3] == 0) {
2084             copy_info(&info,
2085                                   "\tBIOS Version                      : %c%c%c%c%c%c%c\n",
2086                                   ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2087                                   ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2088                                   ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2089                                   ha->nvram->bios_low[2]);
2090
2091         } else {
2092                     copy_info(&info,
2093                                   "\tBIOS Version                      : %c%c%c%c%c%c%c%c\n",
2094                                   ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2095                                   ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2096                                   ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2097                                   ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2098         }
2099
2100     }
2101
2102     if (ha->enq->CodeBlkVersion[7] == 0) {
2103         copy_info(&info,
2104                           "\tFirmware Version                  : %c%c%c%c%c%c%c\n",
2105                           ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2106                           ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2107                           ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2108                           ha->enq->CodeBlkVersion[6]);
2109     } else {
2110         copy_info(&info,
2111                           "\tFirmware Version                  : %c%c%c%c%c%c%c%c\n",
2112                           ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2113                           ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2114                           ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2115                           ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2116     }
2117
2118     if (ha->enq->BootBlkVersion[7] == 0) {
2119         copy_info(&info,
2120                           "\tBoot Block Version                : %c%c%c%c%c%c%c\n",
2121                           ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2122                           ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2123                           ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2124                           ha->enq->BootBlkVersion[6]);
2125     } else {
2126         copy_info(&info,
2127                           "\tBoot Block Version                : %c%c%c%c%c%c%c%c\n",
2128                           ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2129                           ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2130                           ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2131                           ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2132     }
2133
2134         copy_info(&info, "\tDriver Version                    : %s%s\n",
2135                   IPS_VERSION_HIGH, IPS_VERSION_LOW);
2136
2137         copy_info(&info, "\tDriver Build                      : %d\n",
2138                   IPS_BUILD_IDENT);
2139
2140         copy_info(&info, "\tMax Physical Devices              : %d\n",
2141                   ha->enq->ucMaxPhysicalDevices);
2142         copy_info(&info, "\tMax Active Commands               : %d\n",
2143                   ha->max_cmds);
2144         copy_info(&info, "\tCurrent Queued Commands           : %d\n",
2145                   ha->scb_waitlist.count);
2146         copy_info(&info, "\tCurrent Active Commands           : %d\n",
2147                   ha->scb_activelist.count - ha->num_ioctl);
2148         copy_info(&info, "\tCurrent Queued PT Commands        : %d\n",
2149                   ha->copp_waitlist.count);
2150         copy_info(&info, "\tCurrent Active PT Commands        : %d\n",
2151                   ha->num_ioctl);
2152
2153         copy_info(&info, "\n");
2154
2155         return (info.localpos);
2156 }
2157
2158 /****************************************************************************/
2159 /*                                                                          */
2160 /* Routine Name: copy_mem_info                                              */
2161 /*                                                                          */
2162 /* Routine Description:                                                     */
2163 /*                                                                          */
2164 /*   Copy data into an IPS_INFOSTR structure                                */
2165 /*                                                                          */
2166 /****************************************************************************/
2167 static void
2168 copy_mem_info(IPS_INFOSTR * info, char *data, int len)
2169 {
2170         METHOD_TRACE("copy_mem_info", 1);
2171
2172         if (info->pos + len < info->offset) {
2173                 info->pos += len;
2174                 return;
2175         }
2176
2177         if (info->pos < info->offset) {
2178                 data += (info->offset - info->pos);
2179                 len -= (info->offset - info->pos);
2180                 info->pos += (info->offset - info->pos);
2181         }
2182
2183         if (info->localpos + len > info->length)
2184                 len = info->length - info->localpos;
2185
2186         if (len > 0) {
2187                 memcpy(info->buffer + info->localpos, data, len);
2188                 info->pos += len;
2189                 info->localpos += len;
2190         }
2191 }
2192
2193 /****************************************************************************/
2194 /*                                                                          */
2195 /* Routine Name: copy_info                                                  */
2196 /*                                                                          */
2197 /* Routine Description:                                                     */
2198 /*                                                                          */
2199 /*   printf style wrapper for an info structure                             */
2200 /*                                                                          */
2201 /****************************************************************************/
2202 static int
2203 copy_info(IPS_INFOSTR * info, char *fmt, ...)
2204 {
2205         va_list args;
2206         char buf[128];
2207         int len;
2208
2209         METHOD_TRACE("copy_info", 1);
2210
2211         va_start(args, fmt);
2212         len = vsprintf(buf, fmt, args);
2213         va_end(args);
2214
2215         copy_mem_info(info, buf, len);
2216
2217         return (len);
2218 }
2219
2220 /****************************************************************************/
2221 /*                                                                          */
2222 /* Routine Name: ips_identify_controller                                    */
2223 /*                                                                          */
2224 /* Routine Description:                                                     */
2225 /*                                                                          */
2226 /*   Identify this controller                                               */
2227 /*                                                                          */
2228 /****************************************************************************/
2229 static void
2230 ips_identify_controller(ips_ha_t * ha)
2231 {
2232         METHOD_TRACE("ips_identify_controller", 1);
2233
2234         switch (ha->device_id) {
2235         case IPS_DEVICEID_COPPERHEAD:
2236                 if (ha->revision_id <= IPS_REVID_SERVERAID) {
2237                         ha->ad_type = IPS_ADTYPE_SERVERAID;
2238                 } else if (ha->revision_id == IPS_REVID_SERVERAID2) {
2239                         ha->ad_type = IPS_ADTYPE_SERVERAID2;
2240                 } else if (ha->revision_id == IPS_REVID_NAVAJO) {
2241                         ha->ad_type = IPS_ADTYPE_NAVAJO;
2242                 } else if ((ha->revision_id == IPS_REVID_SERVERAID2)
2243                            && (ha->slot_num == 0)) {
2244                         ha->ad_type = IPS_ADTYPE_KIOWA;
2245                 } else if ((ha->revision_id >= IPS_REVID_CLARINETP1) &&
2246                            (ha->revision_id <= IPS_REVID_CLARINETP3)) {
2247                         if (ha->enq->ucMaxPhysicalDevices == 15)
2248                                 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2249                         else
2250                                 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2251                 } else if ((ha->revision_id >= IPS_REVID_TROMBONE32) &&
2252                            (ha->revision_id <= IPS_REVID_TROMBONE64)) {
2253                         ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2254                 }
2255                 break;
2256
2257         case IPS_DEVICEID_MORPHEUS:
2258                 switch (ha->subdevice_id) {
2259                 case IPS_SUBDEVICEID_4L:
2260                         ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2261                         break;
2262
2263                 case IPS_SUBDEVICEID_4M:
2264                         ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2265                         break;
2266
2267                 case IPS_SUBDEVICEID_4MX:
2268                         ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2269                         break;
2270
2271                 case IPS_SUBDEVICEID_4LX:
2272                         ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2273                         break;
2274
2275                 case IPS_SUBDEVICEID_5I2:
2276                         ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2277                         break;
2278
2279                 case IPS_SUBDEVICEID_5I1:
2280                         ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2281                         break;
2282                 }
2283
2284                 break;
2285
2286         case IPS_DEVICEID_MARCO:
2287                 switch (ha->subdevice_id) {
2288                 case IPS_SUBDEVICEID_6M:
2289                         ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2290                         break;
2291                 case IPS_SUBDEVICEID_6I:
2292                         ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2293                         break;
2294                 case IPS_SUBDEVICEID_7k:
2295                         ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2296                         break;
2297                 case IPS_SUBDEVICEID_7M:
2298                         ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2299                         break;
2300                 }
2301                 break;
2302         }
2303 }
2304
2305 /****************************************************************************/
2306 /*                                                                          */
2307 /* Routine Name: ips_get_bios_version                                       */
2308 /*                                                                          */
2309 /* Routine Description:                                                     */
2310 /*                                                                          */
2311 /*   Get the BIOS revision number                                           */
2312 /*                                                                          */
2313 /****************************************************************************/
2314 static void
2315 ips_get_bios_version(ips_ha_t * ha, int intr)
2316 {
2317         ips_scb_t *scb;
2318         int ret;
2319         uint8_t major;
2320         uint8_t minor;
2321         uint8_t subminor;
2322         uint8_t *buffer;
2323         char hexDigits[] =
2324             { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2325      'D', 'E', 'F' };
2326
2327         METHOD_TRACE("ips_get_bios_version", 1);
2328
2329         major = 0;
2330         minor = 0;
2331
2332         strncpy(ha->bios_version, "       ?", 8);
2333
2334         if (ha->device_id == IPS_DEVICEID_COPPERHEAD) {
2335                 if (IPS_USE_MEMIO(ha)) {
2336                         /* Memory Mapped I/O */
2337
2338                         /* test 1st byte */
2339                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
2340                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2341                                 udelay(25);     /* 25 us */
2342
2343                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2344                                 return;
2345
2346                         writel(1, ha->mem_ptr + IPS_REG_FLAP);
2347                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2348                                 udelay(25);     /* 25 us */
2349
2350                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2351                                 return;
2352
2353                         /* Get Major version */
2354                         writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2355                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2356                                 udelay(25);     /* 25 us */
2357
2358                         major = readb(ha->mem_ptr + IPS_REG_FLDP);
2359
2360                         /* Get Minor version */
2361                         writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2362                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2363                                 udelay(25);     /* 25 us */
2364                         minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2365
2366                         /* Get SubMinor version */
2367                         writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2368                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2369                                 udelay(25);     /* 25 us */
2370                         subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2371
2372                 } else {
2373                         /* Programmed I/O */
2374
2375                         /* test 1st byte */
2376                         outl(0, ha->io_addr + IPS_REG_FLAP);
2377                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2378                                 udelay(25);     /* 25 us */
2379
2380                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2381                                 return;
2382
2383                         outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
2384                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2385                                 udelay(25);     /* 25 us */
2386
2387                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2388                                 return;
2389
2390                         /* Get Major version */
2391                         outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP);
2392                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2393                                 udelay(25);     /* 25 us */
2394
2395                         major = inb(ha->io_addr + IPS_REG_FLDP);
2396
2397                         /* Get Minor version */
2398                         outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP);
2399                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2400                                 udelay(25);     /* 25 us */
2401
2402                         minor = inb(ha->io_addr + IPS_REG_FLDP);
2403
2404                         /* Get SubMinor version */
2405                         outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP);
2406                         if (ha->revision_id == IPS_REVID_TROMBONE64)
2407                                 udelay(25);     /* 25 us */
2408
2409                         subminor = inb(ha->io_addr + IPS_REG_FLDP);
2410
2411                 }
2412         } else {
2413                 /* Morpheus Family - Send Command to the card */
2414
2415                 buffer = ha->ioctl_data;
2416
2417                 memset(buffer, 0, 0x1000);
2418
2419                 scb = &ha->scbs[ha->max_cmds - 1];
2420
2421                 ips_init_scb(ha, scb);
2422
2423                 scb->timeout = ips_cmd_timeout;
2424                 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2425
2426                 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2427                 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2428                 scb->cmd.flashfw.type = 1;
2429                 scb->cmd.flashfw.direction = 0;
2430                 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2431                 scb->cmd.flashfw.total_packets = 1;
2432                 scb->cmd.flashfw.packet_num = 0;
2433                 scb->data_len = 0x1000;
2434                 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2435
2436                 /* issue the command */
2437                 if (((ret =
2438                       ips_send_wait(ha, scb, ips_cmd_timeout,
2439                                     intr)) == IPS_FAILURE)
2440                     || (ret == IPS_SUCCESS_IMM)
2441                     || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2442                         /* Error occurred */
2443
2444                         return;
2445                 }
2446
2447                 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2448                         major = buffer[0x1ff + 0xC0];   /* Offset 0x1ff after the header (0xc0) */
2449                         minor = buffer[0x1fe + 0xC0];   /* Offset 0x1fe after the header (0xc0) */
2450                         subminor = buffer[0x1fd + 0xC0];        /* Offset 0x1fd after the header (0xc0) */
2451                 } else {
2452                         return;
2453                 }
2454         }
2455
2456         ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2457         ha->bios_version[1] = '.';
2458         ha->bios_version[2] = hexDigits[major & 0x0F];
2459         ha->bios_version[3] = hexDigits[subminor];
2460         ha->bios_version[4] = '.';
2461         ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2462         ha->bios_version[6] = hexDigits[minor & 0x0F];
2463         ha->bios_version[7] = 0;
2464 }
2465
2466 /****************************************************************************/
2467 /*                                                                          */
2468 /* Routine Name: ips_hainit                                                 */
2469 /*                                                                          */
2470 /* Routine Description:                                                     */
2471 /*                                                                          */
2472 /*   Initialize the controller                                              */
2473 /*                                                                          */
2474 /* NOTE: Assumes to be called from with a lock                              */
2475 /*                                                                          */
2476 /****************************************************************************/
2477 static int
2478 ips_hainit(ips_ha_t * ha)
2479 {
2480         int i;
2481         struct timeval tv;
2482
2483         METHOD_TRACE("ips_hainit", 1);
2484
2485         if (!ha)
2486                 return (0);
2487
2488         if (ha->func.statinit)
2489                 (*ha->func.statinit) (ha);
2490
2491         if (ha->func.enableint)
2492                 (*ha->func.enableint) (ha);
2493
2494         /* Send FFDC */
2495         ha->reset_count = 1;
2496         do_gettimeofday(&tv);
2497         ha->last_ffdc = tv.tv_sec;
2498         ips_ffdc_reset(ha, IPS_INTR_IORL);
2499
2500         if (!ips_read_config(ha, IPS_INTR_IORL)) {
2501                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2502                            "unable to read config from controller.\n");
2503
2504                 return (0);
2505         }
2506         /* end if */
2507         if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2508                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2509                            "unable to read controller status.\n");
2510
2511                 return (0);
2512         }
2513
2514         /* Identify this controller */
2515         ips_identify_controller(ha);
2516
2517         if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2518                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2519                            "unable to read subsystem parameters.\n");
2520
2521                 return (0);
2522         }
2523
2524         /* write nvram user page 5 */
2525         if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2526                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2527                            "unable to write driver info to controller.\n");
2528
2529                 return (0);
2530         }
2531
2532         /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2533         if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2534                 ips_clear_adapter(ha, IPS_INTR_IORL);
2535
2536         /* set limits on SID, LUN, BUS */
2537         ha->ntargets = IPS_MAX_TARGETS + 1;
2538         ha->nlun = 1;
2539         ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2540
2541         switch (ha->conf->logical_drive[0].ucStripeSize) {
2542         case 4:
2543                 ha->max_xfer = 0x10000;
2544                 break;
2545
2546         case 5:
2547                 ha->max_xfer = 0x20000;
2548                 break;
2549
2550         case 6:
2551                 ha->max_xfer = 0x40000;
2552                 break;
2553
2554         case 7:
2555         default:
2556                 ha->max_xfer = 0x80000;
2557                 break;
2558         }
2559
2560         /* setup max concurrent commands */
2561         if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2562                 /* Use the new method */
2563                 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2564         } else {
2565                 /* use the old method */
2566                 switch (ha->conf->logical_drive[0].ucStripeSize) {
2567                 case 4:
2568                         ha->max_cmds = 32;
2569                         break;
2570
2571                 case 5:
2572                         ha->max_cmds = 16;
2573                         break;
2574
2575                 case 6:
2576                         ha->max_cmds = 8;
2577                         break;
2578
2579                 case 7:
2580                 default:
2581                         ha->max_cmds = 4;
2582                         break;
2583                 }
2584         }
2585
2586         /* Limit the Active Commands on a Lite Adapter */
2587         if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2588             (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2589             (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2590                 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2591                         ha->max_cmds = MaxLiteCmds;
2592         }
2593
2594         /* set controller IDs */
2595         ha->ha_id[0] = IPS_ADAPTER_ID;
2596         for (i = 1; i < ha->nbus; i++) {
2597                 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2598                 ha->dcdb_active[i - 1] = 0;
2599         }
2600
2601         return (1);
2602 }
2603
2604 /****************************************************************************/
2605 /*                                                                          */
2606 /* Routine Name: ips_next                                                   */
2607 /*                                                                          */
2608 /* Routine Description:                                                     */
2609 /*                                                                          */
2610 /*   Take the next command off the queue and send it to the controller      */
2611 /*                                                                          */
2612 /****************************************************************************/
2613 static void
2614 ips_next(ips_ha_t * ha, int intr)
2615 {
2616         ips_scb_t *scb;
2617         struct scsi_cmnd *SC;
2618         struct scsi_cmnd *p;
2619         struct scsi_cmnd *q;
2620         ips_copp_wait_item_t *item;
2621         int ret;
2622         struct Scsi_Host *host;
2623         METHOD_TRACE("ips_next", 1);
2624
2625         if (!ha)
2626                 return;
2627         host = ips_sh[ha->host_num];
2628         /*
2629          * Block access to the queue function so
2630          * this command won't time out
2631          */
2632         if (intr == IPS_INTR_ON)
2633                 spin_lock(host->host_lock);
2634
2635         if ((ha->subsys->param[3] & 0x300000)
2636             && (ha->scb_activelist.count == 0)) {
2637                 struct timeval tv;
2638
2639                 do_gettimeofday(&tv);
2640
2641                 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2642                         ha->last_ffdc = tv.tv_sec;
2643                         ips_ffdc_time(ha);
2644                 }
2645         }
2646
2647         /*
2648          * Send passthru commands
2649          * These have priority over normal I/O
2650          * but shouldn't affect performance too much
2651          * since we limit the number that can be active
2652          * on the card at any one time
2653          */
2654         while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2655                (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2656
2657                 item = ips_removeq_copp_head(&ha->copp_waitlist);
2658                 ha->num_ioctl++;
2659                 if (intr == IPS_INTR_ON)
2660                         spin_unlock(host->host_lock);
2661                 scb->scsi_cmd = item->scsi_cmd;
2662                 kfree(item);
2663
2664                 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2665
2666                 if (intr == IPS_INTR_ON)
2667                         spin_lock(host->host_lock);
2668                 switch (ret) {
2669                 case IPS_FAILURE:
2670                         if (scb->scsi_cmd) {
2671                                 scb->scsi_cmd->result = DID_ERROR << 16;
2672                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2673                         }
2674
2675                         ips_freescb(ha, scb);
2676                         break;
2677                 case IPS_SUCCESS_IMM:
2678                         if (scb->scsi_cmd) {
2679                                 scb->scsi_cmd->result = DID_OK << 16;
2680                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2681                         }
2682
2683                         ips_freescb(ha, scb);
2684                         break;
2685                 default:
2686                         break;
2687                 }               /* end case */
2688
2689                 if (ret != IPS_SUCCESS) {
2690                         ha->num_ioctl--;
2691                         continue;
2692                 }
2693
2694                 ret = ips_send_cmd(ha, scb);
2695
2696                 if (ret == IPS_SUCCESS)
2697                         ips_putq_scb_head(&ha->scb_activelist, scb);
2698                 else
2699                         ha->num_ioctl--;
2700
2701                 switch (ret) {
2702                 case IPS_FAILURE:
2703                         if (scb->scsi_cmd) {
2704                                 scb->scsi_cmd->result = DID_ERROR << 16;
2705                         }
2706
2707                         ips_freescb(ha, scb);
2708                         break;
2709                 case IPS_SUCCESS_IMM:
2710                         ips_freescb(ha, scb);
2711                         break;
2712                 default:
2713                         break;
2714                 }               /* end case */
2715
2716         }
2717
2718         /*
2719          * Send "Normal" I/O commands
2720          */
2721
2722         p = ha->scb_waitlist.head;
2723         while ((p) && (scb = ips_getscb(ha))) {
2724                 if ((scmd_channel(p) > 0)
2725                     && (ha->
2726                         dcdb_active[scmd_channel(p) -
2727                                     1] & (1 << scmd_id(p)))) {
2728                         ips_freescb(ha, scb);
2729                         p = (struct scsi_cmnd *) p->host_scribble;
2730                         continue;
2731                 }
2732
2733                 q = p;
2734                 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2735
2736                 if (intr == IPS_INTR_ON)
2737                         spin_unlock(host->host_lock);   /* Unlock HA after command is taken off queue */
2738
2739                 SC->result = DID_OK;
2740                 SC->host_scribble = NULL;
2741
2742                 memset(SC->sense_buffer, 0, sizeof (SC->sense_buffer));
2743
2744                 scb->target_id = SC->device->id;
2745                 scb->lun = SC->device->lun;
2746                 scb->bus = SC->device->channel;
2747                 scb->scsi_cmd = SC;
2748                 scb->breakup = 0;
2749                 scb->data_len = 0;
2750                 scb->callback = ipsintr_done;
2751                 scb->timeout = ips_cmd_timeout;
2752                 memset(&scb->cmd, 0, 16);
2753
2754                 /* copy in the CDB */
2755                 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2756
2757                 scb->sg_count = scsi_dma_map(SC);
2758                 BUG_ON(scb->sg_count < 0);
2759                 if (scb->sg_count) {
2760                         struct scatterlist *sg;
2761                         int i;
2762
2763                         scb->flags |= IPS_SCB_MAP_SG;
2764
2765                         scsi_for_each_sg(SC, sg, scb->sg_count, i) {
2766                                 if (ips_fill_scb_sg_single
2767                                     (ha, sg_dma_address(sg), scb, i,
2768                                      sg_dma_len(sg)) < 0)
2769                                         break;
2770                         }
2771                         scb->dcdb.transfer_length = scb->data_len;
2772                 } else {
2773                         scb->data_busaddr = 0L;
2774                         scb->sg_len = 0;
2775                         scb->data_len = 0;
2776                         scb->dcdb.transfer_length = 0;
2777                 }
2778
2779                 scb->dcdb.cmd_attribute =
2780                     ips_command_direction[scb->scsi_cmd->cmnd[0]];
2781
2782         /* Allow a WRITE BUFFER Command to Have no Data */
2783         /* This is Used by Tape Flash Utilites          */
2784         if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) && (scb->data_len == 0))
2785             scb->dcdb.cmd_attribute = 0;
2786
2787                 if (!(scb->dcdb.cmd_attribute & 0x3))
2788                         scb->dcdb.transfer_length = 0;
2789
2790                 if (scb->data_len >= IPS_MAX_XFER) {
2791                         scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2792                         scb->dcdb.transfer_length = 0;
2793                 }
2794                 if (intr == IPS_INTR_ON)
2795                         spin_lock(host->host_lock);
2796
2797                 ret = ips_send_cmd(ha, scb);
2798
2799                 switch (ret) {
2800                 case IPS_SUCCESS:
2801                         ips_putq_scb_head(&ha->scb_activelist, scb);
2802                         break;
2803                 case IPS_FAILURE:
2804                         if (scb->scsi_cmd) {
2805                                 scb->scsi_cmd->result = DID_ERROR << 16;
2806                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2807                         }
2808
2809                         if (scb->bus)
2810                                 ha->dcdb_active[scb->bus - 1] &=
2811                                     ~(1 << scb->target_id);
2812
2813                         ips_freescb(ha, scb);
2814                         break;
2815                 case IPS_SUCCESS_IMM:
2816                         if (scb->scsi_cmd)
2817                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2818
2819                         if (scb->bus)
2820                                 ha->dcdb_active[scb->bus - 1] &=
2821                                     ~(1 << scb->target_id);
2822
2823                         ips_freescb(ha, scb);
2824                         break;
2825                 default:
2826                         break;
2827                 }               /* end case */
2828
2829                 p = (struct scsi_cmnd *) p->host_scribble;
2830
2831         }                       /* end while */
2832
2833         if (intr == IPS_INTR_ON)
2834                 spin_unlock(host->host_lock);
2835 }
2836
2837 /****************************************************************************/
2838 /*                                                                          */
2839 /* Routine Name: ips_putq_scb_head                                          */
2840 /*                                                                          */
2841 /* Routine Description:                                                     */
2842 /*                                                                          */
2843 /*   Add an item to the head of the queue                                   */
2844 /*                                                                          */
2845 /* ASSUMED to be called from within the HA lock                             */
2846 /*                                                                          */
2847 /****************************************************************************/
2848 static void
2849 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2850 {
2851         METHOD_TRACE("ips_putq_scb_head", 1);
2852
2853         if (!item)
2854                 return;
2855
2856         item->q_next = queue->head;
2857         queue->head = item;
2858
2859         if (!queue->tail)
2860                 queue->tail = item;
2861
2862         queue->count++;
2863 }
2864
2865 /****************************************************************************/
2866 /*                                                                          */
2867 /* Routine Name: ips_removeq_scb_head                                       */
2868 /*                                                                          */
2869 /* Routine Description:                                                     */
2870 /*                                                                          */
2871 /*   Remove the head of the queue                                           */
2872 /*                                                                          */
2873 /* ASSUMED to be called from within the HA lock                             */
2874 /*                                                                          */
2875 /****************************************************************************/
2876 static ips_scb_t *
2877 ips_removeq_scb_head(ips_scb_queue_t * queue)
2878 {
2879         ips_scb_t *item;
2880
2881         METHOD_TRACE("ips_removeq_scb_head", 1);
2882
2883         item = queue->head;
2884
2885         if (!item) {
2886                 return (NULL);
2887         }
2888
2889         queue->head = item->q_next;
2890         item->q_next = NULL;
2891
2892         if (queue->tail == item)
2893                 queue->tail = NULL;
2894
2895         queue->count--;
2896
2897         return (item);
2898 }
2899
2900 /****************************************************************************/
2901 /*                                                                          */
2902 /* Routine Name: ips_removeq_scb                                            */
2903 /*                                                                          */
2904 /* Routine Description:                                                     */
2905 /*                                                                          */
2906 /*   Remove an item from a queue                                            */
2907 /*                                                                          */
2908 /* ASSUMED to be called from within the HA lock                             */
2909 /*                                                                          */
2910 /****************************************************************************/
2911 static ips_scb_t *
2912 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
2913 {
2914         ips_scb_t *p;
2915
2916         METHOD_TRACE("ips_removeq_scb", 1);
2917
2918         if (!item)
2919                 return (NULL);
2920
2921         if (item == queue->head) {
2922                 return (ips_removeq_scb_head(queue));
2923         }
2924
2925         p = queue->head;
2926
2927         while ((p) && (item != p->q_next))
2928                 p = p->q_next;
2929
2930         if (p) {
2931                 /* found a match */
2932                 p->q_next = item->q_next;
2933
2934                 if (!item->q_next)
2935                         queue->tail = p;
2936
2937                 item->q_next = NULL;
2938                 queue->count--;
2939
2940                 return (item);
2941         }
2942
2943         return (NULL);
2944 }
2945
2946 /****************************************************************************/
2947 /*                                                                          */
2948 /* Routine Name: ips_putq_wait_tail                                         */
2949 /*                                                                          */
2950 /* Routine Description:                                                     */
2951 /*                                                                          */
2952 /*   Add an item to the tail of the queue                                   */
2953 /*                                                                          */
2954 /* ASSUMED to be called from within the HA lock                             */
2955 /*                                                                          */
2956 /****************************************************************************/
2957 static void ips_putq_wait_tail(ips_wait_queue_t *queue, struct scsi_cmnd *item)
2958 {
2959         METHOD_TRACE("ips_putq_wait_tail", 1);
2960
2961         if (!item)
2962                 return;
2963
2964         item->host_scribble = NULL;
2965
2966         if (queue->tail)
2967                 queue->tail->host_scribble = (char *) item;
2968
2969         queue->tail = item;
2970
2971         if (!queue->head)
2972                 queue->head = item;
2973
2974         queue->count++;
2975 }
2976
2977 /****************************************************************************/
2978 /*                                                                          */
2979 /* Routine Name: ips_removeq_wait_head                                      */
2980 /*                                                                          */
2981 /* Routine Description:                                                     */
2982 /*                                                                          */
2983 /*   Remove the head of the queue                                           */
2984 /*                                                                          */
2985 /* ASSUMED to be called from within the HA lock                             */
2986 /*                                                                          */
2987 /****************************************************************************/
2988 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *queue)
2989 {
2990         struct scsi_cmnd *item;
2991
2992         METHOD_TRACE("ips_removeq_wait_head", 1);
2993
2994         item = queue->head;
2995
2996         if (!item) {
2997                 return (NULL);
2998         }
2999
3000         queue->head = (struct scsi_cmnd *) item->host_scribble;
3001         item->host_scribble = NULL;
3002
3003         if (queue->tail == item)
3004                 queue->tail = NULL;
3005
3006         queue->count--;
3007
3008         return (item);
3009 }
3010
3011 /****************************************************************************/
3012 /*                                                                          */
3013 /* Routine Name: ips_removeq_wait                                           */
3014 /*                                                                          */
3015 /* Routine Description:                                                     */
3016 /*                                                                          */
3017 /*   Remove an item from a queue                                            */
3018 /*                                                                          */
3019 /* ASSUMED to be called from within the HA lock                             */
3020 /*                                                                          */
3021 /****************************************************************************/
3022 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *queue,
3023                                           struct scsi_cmnd *item)
3024 {
3025         struct scsi_cmnd *p;
3026
3027         METHOD_TRACE("ips_removeq_wait", 1);
3028
3029         if (!item)
3030                 return (NULL);
3031
3032         if (item == queue->head) {
3033                 return (ips_removeq_wait_head(queue));
3034         }
3035
3036         p = queue->head;
3037
3038         while ((p) && (item != (struct scsi_cmnd *) p->host_scribble))
3039                 p = (struct scsi_cmnd *) p->host_scribble;
3040
3041         if (p) {
3042                 /* found a match */
3043                 p->host_scribble = item->host_scribble;
3044
3045                 if (!item->host_scribble)
3046                         queue->tail = p;
3047
3048                 item->host_scribble = NULL;
3049                 queue->count--;
3050
3051                 return (item);
3052         }
3053
3054         return (NULL);
3055 }
3056
3057 /****************************************************************************/
3058 /*                                                                          */
3059 /* Routine Name: ips_putq_copp_tail                                         */
3060 /*                                                                          */
3061 /* Routine Description:                                                     */
3062 /*                                                                          */
3063 /*   Add an item to the tail of the queue                                   */
3064 /*                                                                          */
3065 /* ASSUMED to be called from within the HA lock                             */
3066 /*                                                                          */
3067 /****************************************************************************/
3068 static void
3069 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3070 {
3071         METHOD_TRACE("ips_putq_copp_tail", 1);
3072
3073         if (!item)
3074                 return;
3075
3076         item->next = NULL;
3077
3078         if (queue->tail)
3079                 queue->tail->next = item;
3080
3081         queue->tail = item;
3082
3083         if (!queue->head)
3084                 queue->head = item;
3085
3086         queue->count++;
3087 }
3088
3089 /****************************************************************************/
3090 /*                                                                          */
3091 /* Routine Name: ips_removeq_copp_head                                      */
3092 /*                                                                          */
3093 /* Routine Description:                                                     */
3094 /*                                                                          */
3095 /*   Remove the head of the queue                                           */
3096 /*                                                                          */
3097 /* ASSUMED to be called from within the HA lock                             */
3098 /*                                                                          */
3099 /****************************************************************************/
3100 static ips_copp_wait_item_t *
3101 ips_removeq_copp_head(ips_copp_queue_t * queue)
3102 {
3103         ips_copp_wait_item_t *item;
3104
3105         METHOD_TRACE("ips_removeq_copp_head", 1);
3106
3107         item = queue->head;
3108
3109         if (!item) {
3110                 return (NULL);
3111         }
3112
3113         queue->head = item->next;
3114         item->next = NULL;
3115
3116         if (queue->tail == item)
3117                 queue->tail = NULL;
3118
3119         queue->count--;
3120
3121         return (item);
3122 }
3123
3124 /****************************************************************************/
3125 /*                                                                          */
3126 /* Routine Name: ips_removeq_copp                                           */
3127 /*                                                                          */
3128 /* Routine Description:                                                     */
3129 /*                                                                          */
3130 /*   Remove an item from a queue                                            */
3131 /*                                                                          */
3132 /* ASSUMED to be called from within the HA lock                             */
3133 /*                                                                          */
3134 /****************************************************************************/
3135 static ips_copp_wait_item_t *
3136 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3137 {
3138         ips_copp_wait_item_t *p;
3139
3140         METHOD_TRACE("ips_removeq_copp", 1);
3141
3142         if (!item)
3143                 return (NULL);
3144
3145         if (item == queue->head) {
3146                 return (ips_removeq_copp_head(queue));
3147         }
3148
3149         p = queue->head;
3150
3151         while ((p) && (item != p->next))
3152                 p = p->next;
3153
3154         if (p) {
3155                 /* found a match */
3156                 p->next = item->next;
3157
3158                 if (!item->next)
3159                         queue->tail = p;
3160
3161                 item->next = NULL;
3162                 queue->count--;
3163
3164                 return (item);
3165         }
3166
3167         return (NULL);
3168 }
3169
3170 /****************************************************************************/
3171 /*                                                                          */
3172 /* Routine Name: ipsintr_blocking                                           */
3173 /*                                                                          */
3174 /* Routine Description:                                                     */
3175 /*                                                                          */
3176 /*   Finalize an interrupt for internal commands                            */
3177 /*                                                                          */
3178 /****************************************************************************/
3179 static void
3180 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3181 {
3182         METHOD_TRACE("ipsintr_blocking", 2);
3183
3184         ips_freescb(ha, scb);
3185         if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3186                 ha->waitflag = FALSE;
3187
3188                 return;
3189         }
3190 }
3191
3192 /****************************************************************************/
3193 /*                                                                          */
3194 /* Routine Name: ipsintr_done                                               */
3195 /*                                                                          */
3196 /* Routine Description:                                                     */
3197 /*                                                                          */
3198 /*   Finalize an interrupt for non-internal commands                        */
3199 /*                                                                          */
3200 /****************************************************************************/
3201 static void
3202 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3203 {
3204         METHOD_TRACE("ipsintr_done", 2);
3205
3206         if (!scb) {
3207                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3208                            "Spurious interrupt; scb NULL.\n");
3209
3210                 return;
3211         }
3212
3213         if (scb->scsi_cmd == NULL) {
3214                 /* unexpected interrupt */
3215                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3216                            "Spurious interrupt; scsi_cmd not set.\n");
3217
3218                 return;
3219         }
3220
3221         ips_done(ha, scb);
3222 }
3223
3224 /****************************************************************************/
3225 /*                                                                          */
3226 /* Routine Name: ips_done                                                   */
3227 /*                                                                          */
3228 /* Routine Description:                                                     */
3229 /*                                                                          */
3230 /*   Do housekeeping on completed commands                                  */
3231 /*  ASSUMED to be called form within the request lock                       */
3232 /****************************************************************************/
3233 static void
3234 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3235 {
3236         int ret;
3237
3238         METHOD_TRACE("ips_done", 1);
3239
3240         if (!scb)
3241                 return;
3242
3243         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3244                 ips_cleanup_passthru(ha, scb);
3245                 ha->num_ioctl--;
3246         } else {
3247                 /*
3248                  * Check to see if this command had too much
3249                  * data and had to be broke up.  If so, queue
3250                  * the rest of the data and continue.
3251                  */
3252                 if ((scb->breakup) || (scb->sg_break)) {
3253                         struct scatterlist *sg;
3254                         int sg_dma_index, ips_sg_index = 0;
3255
3256                         /* we had a data breakup */
3257                         scb->data_len = 0;
3258
3259                         sg = scsi_sglist(scb->scsi_cmd);
3260
3261                         /* Spin forward to last dma chunk */
3262                         sg_dma_index = scb->breakup;
3263
3264                         /* Take care of possible partial on last chunk */
3265                         ips_fill_scb_sg_single(ha,
3266                                                sg_dma_address(&sg[sg_dma_index]),
3267                                                scb, ips_sg_index++,
3268                                                sg_dma_len(&sg[sg_dma_index]));
3269
3270                         for (; sg_dma_index < scsi_sg_count(scb->scsi_cmd);
3271                              sg_dma_index++) {
3272                                 if (ips_fill_scb_sg_single
3273                                     (ha,
3274                                      sg_dma_address(&sg[sg_dma_index]),
3275                                      scb, ips_sg_index++,
3276                                      sg_dma_len(&sg[sg_dma_index])) < 0)
3277                                         break;
3278                         }
3279
3280                         scb->dcdb.transfer_length = scb->data_len;
3281                         scb->dcdb.cmd_attribute |=
3282                             ips_command_direction[scb->scsi_cmd->cmnd[0]];
3283
3284                         if (!(scb->dcdb.cmd_attribute & 0x3))
3285                                 scb->dcdb.transfer_length = 0;
3286
3287                         if (scb->data_len >= IPS_MAX_XFER) {
3288                                 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3289                                 scb->dcdb.transfer_length = 0;
3290                         }
3291
3292                         ret = ips_send_cmd(ha, scb);
3293
3294                         switch (ret) {
3295                         case IPS_FAILURE:
3296                                 if (scb->scsi_cmd) {
3297                                         scb->scsi_cmd->result = DID_ERROR << 16;
3298                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3299                                 }
3300
3301                                 ips_freescb(ha, scb);
3302                                 break;
3303                         case IPS_SUCCESS_IMM:
3304                                 if (scb->scsi_cmd) {
3305                                         scb->scsi_cmd->result = DID_ERROR << 16;
3306                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3307                                 }
3308
3309                                 ips_freescb(ha, scb);
3310                                 break;
3311                         default:
3312                                 break;
3313                         }       /* end case */
3314
3315                         return;
3316                 }
3317         }                       /* end if passthru */
3318
3319         if (scb->bus) {
3320                 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3321         }
3322
3323         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3324
3325         ips_freescb(ha, scb);
3326 }
3327
3328 /****************************************************************************/
3329 /*                                                                          */
3330 /* Routine Name: ips_map_status                                             */
3331 /*                                                                          */
3332 /* Routine Description:                                                     */
3333 /*                                                                          */
3334 /*   Map Controller Error codes to Linux Error Codes                        */
3335 /*                                                                          */
3336 /****************************************************************************/
3337 static int
3338 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3339 {
3340         int errcode;
3341         int device_error;
3342         uint32_t transfer_len;
3343         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3344         IPS_SCSI_INQ_DATA inquiryData;
3345
3346         METHOD_TRACE("ips_map_status", 1);
3347
3348         if (scb->bus) {
3349                 DEBUG_VAR(2,
3350                           "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3351                           ips_name, ha->host_num,
3352                           scb->scsi_cmd->device->channel,
3353                           scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3354                           scb->basic_status, scb->extended_status,
3355                           scb->extended_status ==
3356                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3357                           scb->extended_status ==
3358                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3359                           scb->extended_status ==
3360                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3361         }
3362
3363         /* default driver error */
3364         errcode = DID_ERROR;
3365         device_error = 0;
3366
3367         switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3368         case IPS_CMD_TIMEOUT:
3369                 errcode = DID_TIME_OUT;
3370                 break;
3371
3372         case IPS_INVAL_OPCO:
3373         case IPS_INVAL_CMD_BLK:
3374         case IPS_INVAL_PARM_BLK:
3375         case IPS_LD_ERROR:
3376         case IPS_CMD_CMPLT_WERROR:
3377                 break;
3378
3379         case IPS_PHYS_DRV_ERROR:
3380                 switch (scb->extended_status) {
3381                 case IPS_ERR_SEL_TO:
3382                         if (scb->bus)
3383                                 errcode = DID_NO_CONNECT;
3384
3385                         break;
3386
3387                 case IPS_ERR_OU_RUN:
3388                         if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3389                             (scb->cmd.dcdb.op_code ==
3390                              IPS_CMD_EXTENDED_DCDB_SG)) {
3391                                 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3392                                 transfer_len = tapeDCDB->transfer_length;
3393                         } else {
3394                                 transfer_len =
3395                                     (uint32_t) scb->dcdb.transfer_length;
3396                         }
3397
3398                         if ((scb->bus) && (transfer_len < scb->data_len)) {
3399                                 /* Underrun - set default to no error */
3400                                 errcode = DID_OK;
3401
3402                                 /* Restrict access to physical DASD */
3403                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3404                                     ips_scmd_buf_read(scb->scsi_cmd,
3405                                       &inquiryData, sizeof (inquiryData));
3406                                     if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
3407                                         errcode = DID_TIME_OUT;
3408                                         break;
3409                                     }
3410                                 }
3411                         } else
3412                                 errcode = DID_ERROR;
3413
3414                         break;
3415
3416                 case IPS_ERR_RECOVERY:
3417                         /* don't fail recovered errors */
3418                         if (scb->bus)
3419                                 errcode = DID_OK;
3420
3421                         break;
3422
3423                 case IPS_ERR_HOST_RESET:
3424                 case IPS_ERR_DEV_RESET:
3425                         errcode = DID_RESET;
3426                         break;
3427
3428                 case IPS_ERR_CKCOND:
3429                         if (scb->bus) {
3430                                 if ((scb->cmd.dcdb.op_code ==
3431                                      IPS_CMD_EXTENDED_DCDB)
3432                                     || (scb->cmd.dcdb.op_code ==
3433                                         IPS_CMD_EXTENDED_DCDB_SG)) {
3434                                         tapeDCDB =
3435                                             (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3436                                         memcpy(scb->scsi_cmd->sense_buffer,
3437                                                tapeDCDB->sense_info,
3438                                                sizeof (scb->scsi_cmd->
3439                                                        sense_buffer));
3440                                 } else {
3441                                         memcpy(scb->scsi_cmd->sense_buffer,
3442                                                scb->dcdb.sense_info,
3443                                                sizeof (scb->scsi_cmd->
3444                                                        sense_buffer));
3445                                 }
3446                                 device_error = 2;       /* check condition */
3447                         }
3448
3449                         errcode = DID_OK;
3450
3451                         break;
3452
3453                 default:
3454                         errcode = DID_ERROR;
3455                         break;
3456
3457                 }               /* end switch */
3458         }                       /* end switch */
3459
3460         scb->scsi_cmd->result = device_error | (errcode << 16);
3461
3462         return (1);
3463 }
3464
3465 /****************************************************************************/
3466 /*                                                                          */
3467 /* Routine Name: ips_send_wait                                              */
3468 /*                                                                          */
3469 /* Routine Description:                                                     */
3470 /*                                                                          */
3471 /*   Send a command to the controller and wait for it to return             */
3472 /*                                                                          */
3473 /*   The FFDC Time Stamp use this function for the callback, but doesn't    */
3474 /*   actually need to wait.                                                 */
3475 /****************************************************************************/
3476 static int
3477 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3478 {
3479         int ret;
3480
3481         METHOD_TRACE("ips_send_wait", 1);
3482
3483         if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3484                 ha->waitflag = TRUE;
3485                 ha->cmd_in_progress = scb->cdb[0];
3486         }
3487         scb->callback = ipsintr_blocking;
3488         ret = ips_send_cmd(ha, scb);
3489
3490         if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3491                 return (ret);
3492
3493         if (intr != IPS_FFDC)   /* Don't Wait around if this is a Time Stamp */
3494                 ret = ips_wait(ha, timeout, intr);
3495
3496         return (ret);
3497 }
3498
3499 /****************************************************************************/
3500 /*                                                                          */
3501 /* Routine Name: ips_scmd_buf_write                                         */
3502 /*                                                                          */
3503 /* Routine Description:                                                     */
3504 /*  Write data to struct scsi_cmnd request_buffer at proper offsets         */
3505 /****************************************************************************/
3506 static void
3507 ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count)
3508 {
3509         int i;
3510         unsigned int min_cnt, xfer_cnt;
3511         char *cdata = (char *) data;
3512         unsigned char *buffer;
3513         unsigned long flags;
3514         struct scatterlist *sg = scsi_sglist(scmd);
3515
3516         for (i = 0, xfer_cnt = 0;
3517              (i < scsi_sg_count(scmd)) && (xfer_cnt < count); i++) {
3518                 min_cnt = min(count - xfer_cnt, sg[i].length);
3519
3520                 /* kmap_atomic() ensures addressability of the data buffer.*/
3521                 /* local_irq_save() protects the KM_IRQ0 address slot.     */
3522                 local_irq_save(flags);
3523                 buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3524                 memcpy(buffer, &cdata[xfer_cnt], min_cnt);
3525                 kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3526                 local_irq_restore(flags);
3527
3528                 xfer_cnt += min_cnt;
3529         }
3530 }
3531
3532 /****************************************************************************/
3533 /*                                                                          */
3534 /* Routine Name: ips_scmd_buf_read                                          */
3535 /*                                                                          */
3536 /* Routine Description:                                                     */
3537 /*  Copy data from a struct scsi_cmnd to a new, linear buffer               */
3538 /****************************************************************************/
3539 static void
3540 ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count)
3541 {
3542         int i;
3543         unsigned int min_cnt, xfer_cnt;
3544         char *cdata = (char *) data;
3545         unsigned char *buffer;
3546         unsigned long flags;
3547         struct scatterlist *sg = scsi_sglist(scmd);
3548
3549         for (i = 0, xfer_cnt = 0;
3550              (i < scsi_sg_count(scmd)) && (xfer_cnt < count); i++) {
3551                 min_cnt = min(count - xfer_cnt, sg[i].length);
3552
3553                 /* kmap_atomic() ensures addressability of the data buffer.*/
3554                 /* local_irq_save() protects the KM_IRQ0 address slot.     */
3555                 local_irq_save(flags);
3556                 buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3557                 memcpy(&cdata[xfer_cnt], buffer, min_cnt);
3558                 kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3559                 local_irq_restore(flags);
3560
3561                 xfer_cnt += min_cnt;
3562         }
3563 }
3564
3565 /****************************************************************************/
3566 /*                                                                          */
3567 /* Routine Name: ips_send_cmd                                               */
3568 /*                                                                          */
3569 /* Routine Description:                                                     */
3570 /*                                                                          */
3571 /*   Map SCSI commands to ServeRAID commands for logical drives             */
3572 /*                                                                          */
3573 /****************************************************************************/
3574 static int
3575 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3576 {
3577         int ret;
3578         char *sp;
3579         int device_error;
3580         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3581         int TimeOut;
3582
3583         METHOD_TRACE("ips_send_cmd", 1);
3584
3585         ret = IPS_SUCCESS;
3586
3587         if (!scb->scsi_cmd) {
3588                 /* internal command */
3589
3590                 if (scb->bus > 0) {
3591                         /* Controller commands can't be issued */
3592                         /* to real devices -- fail them        */
3593                         if ((ha->waitflag == TRUE) &&
3594                             (ha->cmd_in_progress == scb->cdb[0])) {
3595                                 ha->waitflag = FALSE;
3596                         }
3597
3598                         return (1);
3599                 }
3600         } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3601                 /* command to logical bus -- interpret */
3602                 ret = IPS_SUCCESS_IMM;
3603
3604                 switch (scb->scsi_cmd->cmnd[0]) {
3605                 case ALLOW_MEDIUM_REMOVAL:
3606                 case REZERO_UNIT:
3607                 case ERASE:
3608                 case WRITE_FILEMARKS:
3609                 case SPACE:
3610                         scb->scsi_cmd->result = DID_ERROR << 16;
3611                         break;
3612
3613                 case START_STOP:
3614                         scb->scsi_cmd->result = DID_OK << 16;
3615
3616                 case TEST_UNIT_READY:
3617                 case INQUIRY:
3618                         if (scb->target_id == IPS_ADAPTER_ID) {
3619                                 /*
3620                                  * Either we have a TUR
3621                                  * or we have a SCSI inquiry
3622                                  */
3623                                 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3624                                         scb->scsi_cmd->result = DID_OK << 16;
3625
3626                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3627                                         IPS_SCSI_INQ_DATA inquiry;
3628
3629                                         memset(&inquiry, 0,
3630                                                sizeof (IPS_SCSI_INQ_DATA));
3631
3632                                         inquiry.DeviceType =
3633                                             IPS_SCSI_INQ_TYPE_PROCESSOR;
3634                                         inquiry.DeviceTypeQualifier =
3635                                             IPS_SCSI_INQ_LU_CONNECTED;
3636                                         inquiry.Version = IPS_SCSI_INQ_REV2;
3637                                         inquiry.ResponseDataFormat =
3638                                             IPS_SCSI_INQ_RD_REV2;
3639                                         inquiry.AdditionalLength = 31;
3640                                         inquiry.Flags[0] =
3641                                             IPS_SCSI_INQ_Address16;
3642                                         inquiry.Flags[1] =
3643                                             IPS_SCSI_INQ_WBus16 |
3644                                             IPS_SCSI_INQ_Sync;
3645                                         strncpy(inquiry.VendorId, "IBM     ",
3646                                                 8);
3647                                         strncpy(inquiry.ProductId,
3648                                                 "SERVERAID       ", 16);
3649                                         strncpy(inquiry.ProductRevisionLevel,
3650                                                 "1.00", 4);
3651
3652                                         ips_scmd_buf_write(scb->scsi_cmd,
3653                                                            &inquiry,
3654                                                            sizeof (inquiry));
3655
3656                                         scb->scsi_cmd->result = DID_OK << 16;
3657                                 }
3658                         } else {
3659                                 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3660                                 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3661                                 scb->cmd.logical_info.reserved = 0;
3662                                 scb->cmd.logical_info.reserved2 = 0;
3663                                 scb->data_len = sizeof (IPS_LD_INFO);
3664                                 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3665                                 scb->flags = 0;
3666                                 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3667                                 ret = IPS_SUCCESS;
3668                         }
3669
3670                         break;
3671
3672                 case REQUEST_SENSE:
3673                         ips_reqsen(ha, scb);
3674                         scb->scsi_cmd->result = DID_OK << 16;
3675                         break;
3676
3677                 case READ_6:
3678                 case WRITE_6:
3679                         if (!scb->sg_len) {
3680                                 scb->cmd.basic_io.op_code =
3681                                     (scb->scsi_cmd->cmnd[0] ==
3682                                      READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3683                                 scb->cmd.basic_io.enhanced_sg = 0;
3684                                 scb->cmd.basic_io.sg_addr =
3685                                     cpu_to_le32(scb->data_busaddr);
3686                         } else {
3687                                 scb->cmd.basic_io.op_code =
3688                                     (scb->scsi_cmd->cmnd[0] ==
3689                                      READ_6) ? IPS_CMD_READ_SG :
3690                                     IPS_CMD_WRITE_SG;
3691                                 scb->cmd.basic_io.enhanced_sg =
3692                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3693                                 scb->cmd.basic_io.sg_addr =
3694                                     cpu_to_le32(scb->sg_busaddr);
3695                         }
3696
3697                         scb->cmd.basic_io.segment_4G = 0;
3698                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3699                         scb->cmd.basic_io.log_drv = scb->target_id;
3700                         scb->cmd.basic_io.sg_count = scb->sg_len;
3701
3702                         if (scb->cmd.basic_io.lba)
3703                                 scb->cmd.basic_io.lba =
3704                                     cpu_to_le32(le32_to_cpu
3705                                                 (scb->cmd.basic_io.lba) +
3706                                                 le16_to_cpu(scb->cmd.basic_io.
3707                                                             sector_count));
3708                         else
3709                                 scb->cmd.basic_io.lba =
3710                                     (((scb->scsi_cmd->
3711                                        cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3712                                                                  cmnd[2] << 8) |
3713                                      (scb->scsi_cmd->cmnd[3]));
3714
3715                         scb->cmd.basic_io.sector_count =
3716                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3717
3718                         if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3719                                 scb->cmd.basic_io.sector_count =
3720                                     cpu_to_le16(256);
3721
3722                         ret = IPS_SUCCESS;
3723                         break;
3724
3725                 case READ_10:
3726                 case WRITE_10:
3727                         if (!scb->sg_len) {
3728                                 scb->cmd.basic_io.op_code =
3729                                     (scb->scsi_cmd->cmnd[0] ==
3730                                      READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3731                                 scb->cmd.basic_io.enhanced_sg = 0;
3732                                 scb->cmd.basic_io.sg_addr =
3733                                     cpu_to_le32(scb->data_busaddr);
3734                         } else {
3735                                 scb->cmd.basic_io.op_code =
3736                                     (scb->scsi_cmd->cmnd[0] ==
3737                                      READ_10) ? IPS_CMD_READ_SG :
3738                                     IPS_CMD_WRITE_SG;
3739                                 scb->cmd.basic_io.enhanced_sg =
3740                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3741                                 scb->cmd.basic_io.sg_addr =
3742                                     cpu_to_le32(scb->sg_busaddr);
3743                         }
3744
3745                         scb->cmd.basic_io.segment_4G = 0;
3746                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3747                         scb->cmd.basic_io.log_drv = scb->target_id;
3748                         scb->cmd.basic_io.sg_count = scb->sg_len;
3749
3750                         if (scb->cmd.basic_io.lba)
3751                                 scb->cmd.basic_io.lba =
3752                                     cpu_to_le32(le32_to_cpu
3753                                                 (scb->cmd.basic_io.lba) +
3754                                                 le16_to_cpu(scb->cmd.basic_io.
3755                                                             sector_count));
3756                         else
3757                                 scb->cmd.basic_io.lba =
3758                                     ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3759                                                                        scsi_cmd->
3760                                                                        cmnd[3]
3761                                                                        << 16) |
3762                                      (scb->scsi_cmd->cmnd[4] << 8) | scb->
3763                                      scsi_cmd->cmnd[5]);
3764
3765                         scb->cmd.basic_io.sector_count =
3766                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3767
3768                         if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3769                                 /*
3770                                  * This is a null condition
3771                                  * we don't have to do anything
3772                                  * so just return
3773                                  */
3774                                 scb->scsi_cmd->result = DID_OK << 16;
3775                         } else
3776                                 ret = IPS_SUCCESS;
3777
3778                         break;
3779
3780                 case RESERVE:
3781                 case RELEASE:
3782                         scb->scsi_cmd->result = DID_OK << 16;
3783                         break;
3784
3785                 case MODE_SENSE:
3786                         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3787                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3788                         scb->cmd.basic_io.segment_4G = 0;
3789                         scb->cmd.basic_io.enhanced_sg = 0;
3790                         scb->data_len = sizeof (*ha->enq);
3791                         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3792                         ret = IPS_SUCCESS;
3793                         break;
3794
3795                 case READ_CAPACITY:
3796                         scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3797                         scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3798                         scb->cmd.logical_info.reserved = 0;
3799                         scb->cmd.logical_info.reserved2 = 0;
3800                         scb->cmd.logical_info.reserved3 = 0;
3801                         scb->data_len = sizeof (IPS_LD_INFO);
3802                         scb->data_busaddr = ha->logical_drive_info_dma_addr;
3803                         scb->flags = 0;
3804                         scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3805                         ret = IPS_SUCCESS;
3806                         break;
3807
3808                 case SEND_DIAGNOSTIC:
3809                 case REASSIGN_BLOCKS:
3810                 case FORMAT_UNIT:
3811                 case SEEK_10:
3812                 case VERIFY:
3813                 case READ_DEFECT_DATA:
3814                 case READ_BUFFER:
3815                 case WRITE_BUFFER:
3816                         scb->scsi_cmd->result = DID_OK << 16;
3817                         break;
3818
3819                 default:
3820                         /* Set the Return Info to appear like the Command was */
3821                         /* attempted, a Check Condition occurred, and Sense   */
3822                         /* Data indicating an Invalid CDB OpCode is returned. */
3823                         sp = (char *) scb->scsi_cmd->sense_buffer;
3824                         memset(sp, 0, sizeof (scb->scsi_cmd->sense_buffer));
3825
3826                         sp[0] = 0x70;   /* Error Code               */
3827                         sp[2] = ILLEGAL_REQUEST;        /* Sense Key 5 Illegal Req. */
3828                         sp[7] = 0x0A;   /* Additional Sense Length  */
3829                         sp[12] = 0x20;  /* ASC = Invalid OpCode     */
3830                         sp[13] = 0x00;  /* ASCQ                     */
3831
3832                         device_error = 2;       /* Indicate Check Condition */
3833                         scb->scsi_cmd->result = device_error | (DID_OK << 16);
3834                         break;
3835                 }               /* end switch */
3836         }
3837         /* end if */
3838         if (ret == IPS_SUCCESS_IMM)
3839                 return (ret);
3840
3841         /* setup DCDB */
3842         if (scb->bus > 0) {
3843
3844                 /* If we already know the Device is Not there, no need to attempt a Command   */
3845                 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3846                 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
3847                         scb->scsi_cmd->result = DID_NO_CONNECT << 16;
3848                         return (IPS_SUCCESS_IMM);
3849                 }
3850
3851                 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
3852                 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
3853                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
3854                                                          (unsigned long) &scb->
3855                                                          dcdb -
3856                                                          (unsigned long) scb);
3857                 scb->cmd.dcdb.reserved = 0;
3858                 scb->cmd.dcdb.reserved2 = 0;
3859                 scb->cmd.dcdb.reserved3 = 0;
3860                 scb->cmd.dcdb.segment_4G = 0;
3861                 scb->cmd.dcdb.enhanced_sg = 0;
3862
3863                 TimeOut = scb->scsi_cmd->timeout_per_command;
3864
3865                 if (ha->subsys->param[4] & 0x00100000) {        /* If NEW Tape DCDB is Supported */
3866                         if (!scb->sg_len) {
3867                                 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
3868                         } else {
3869                                 scb->cmd.dcdb.op_code =
3870                                     IPS_CMD_EXTENDED_DCDB_SG;
3871                                 scb->cmd.dcdb.enhanced_sg =
3872                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3873                         }
3874
3875                         tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
3876                         tapeDCDB->device_address =
3877                             ((scb->bus - 1) << 4) | scb->target_id;
3878                         tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3879                         tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K;    /* Always Turn OFF 64K Size Flag */
3880
3881                         if (TimeOut) {
3882                                 if (TimeOut < (10 * HZ))
3883                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3884                                 else if (TimeOut < (60 * HZ))
3885                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3886                                 else if (TimeOut < (1200 * HZ))
3887                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3888                         }
3889
3890                         tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
3891                         tapeDCDB->reserved_for_LUN = 0;
3892                         tapeDCDB->transfer_length = scb->data_len;
3893                         if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
3894                                 tapeDCDB->buffer_pointer =
3895                                     cpu_to_le32(scb->sg_busaddr);
3896                         else
3897                                 tapeDCDB->buffer_pointer =
3898                                     cpu_to_le32(scb->data_busaddr);
3899                         tapeDCDB->sg_count = scb->sg_len;
3900                         tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
3901                         tapeDCDB->scsi_status = 0;
3902                         tapeDCDB->reserved = 0;
3903                         memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
3904                                scb->scsi_cmd->cmd_len);
3905                 } else {
3906                         if (!scb->sg_len) {
3907                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
3908                         } else {
3909                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
3910                                 scb->cmd.dcdb.enhanced_sg =
3911                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3912                         }
3913
3914                         scb->dcdb.device_address =
3915                             ((scb->bus - 1) << 4) | scb->target_id;
3916                         scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3917
3918                         if (TimeOut) {
3919                                 if (TimeOut < (10 * HZ))
3920                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3921                                 else if (TimeOut < (60 * HZ))
3922                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3923                                 else if (TimeOut < (1200 * HZ))
3924                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3925                         }
3926
3927                         scb->dcdb.transfer_length = scb->data_len;
3928                         if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
3929                                 scb->dcdb.transfer_length = 0;
3930                         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
3931                                 scb->dcdb.buffer_pointer =
3932                                     cpu_to_le32(scb->sg_busaddr);
3933                         else
3934                                 scb->dcdb.buffer_pointer =
3935                                     cpu_to_le32(scb->data_busaddr);
3936                         scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
3937                         scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
3938                         scb->dcdb.sg_count = scb->sg_len;
3939                         scb->dcdb.reserved = 0;
3940                         memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
3941                                scb->scsi_cmd->cmd_len);
3942                         scb->dcdb.scsi_status = 0;
3943                         scb->dcdb.reserved2[0] = 0;
3944                         scb->dcdb.reserved2[1] = 0;
3945                         scb->dcdb.reserved2[2] = 0;
3946                 }
3947         }
3948
3949         return ((*ha->func.issue) (ha, scb));
3950 }
3951
3952 /****************************************************************************/
3953 /*                                                                          */
3954 /* Routine Name: ips_chk_status                                             */
3955 /*                                                                          */
3956 /* Routine Description:                                                     */
3957 /*                                                                          */
3958 /*   Check the status of commands to logical drives                         */
3959 /*   Assumed to be called with the HA lock                                  */
3960 /****************************************************************************/
3961 static void
3962 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
3963 {
3964         ips_scb_t *scb;
3965         ips_stat_t *sp;
3966         uint8_t basic_status;
3967         uint8_t ext_status;
3968         int errcode;
3969         IPS_SCSI_INQ_DATA inquiryData;
3970
3971         METHOD_TRACE("ips_chkstatus", 1);
3972
3973         scb = &ha->scbs[pstatus->fields.command_id];
3974         scb->basic_status = basic_status =
3975             pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
3976         scb->extended_status = ext_status = pstatus->fields.extended_status;
3977
3978         sp = &ha->sp;
3979         sp->residue_len = 0;
3980         sp->scb_addr = (void *) scb;
3981
3982         /* Remove the item from the active queue */
3983         ips_removeq_scb(&ha->scb_activelist, scb);
3984
3985         if (!scb->scsi_cmd)
3986                 /* internal commands are handled in do_ipsintr */
3987                 return;
3988
3989         DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3990                   ips_name,
3991                   ha->host_num,
3992                   scb->cdb[0],
3993                   scb->cmd.basic_io.command_id,
3994                   scb->bus, scb->target_id, scb->lun);
3995
3996         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
3997                 /* passthru - just returns the raw result */
3998                 return;
3999
4000         errcode = DID_OK;
4001
4002         if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
4003             ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
4004
4005                 if (scb->bus == 0) {
4006                         if ((basic_status & IPS_GSC_STATUS_MASK) ==
4007                             IPS_CMD_RECOVERED_ERROR) {
4008                                 DEBUG_VAR(1,
4009                                           "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4010                                           ips_name, ha->host_num,
4011                                           scb->cmd.basic_io.op_code,
4012                                           basic_status, ext_status);
4013                         }
4014
4015                         switch (scb->scsi_cmd->cmnd[0]) {
4016                         case ALLOW_MEDIUM_REMOVAL:
4017                         case REZERO_UNIT:
4018                         case ERASE:
4019                         case WRITE_FILEMARKS:
4020                         case SPACE:
4021                                 errcode = DID_ERROR;
4022                                 break;
4023
4024                         case START_STOP:
4025                                 break;
4026
4027                         case TEST_UNIT_READY:
4028                                 if (!ips_online(ha, scb)) {
4029                                         errcode = DID_TIME_OUT;
4030                                 }
4031                                 break;
4032
4033                         case INQUIRY:
4034                                 if (ips_online(ha, scb)) {
4035                                         ips_inquiry(ha, scb);
4036                                 } else {
4037                                         errcode = DID_TIME_OUT;
4038                                 }
4039                                 break;
4040
4041                         case REQUEST_SENSE:
4042                                 ips_reqsen(ha, scb);
4043                                 break;
4044
4045                         case READ_6:
4046                         case WRITE_6:
4047                         case READ_10:
4048                         case WRITE_10:
4049                         case RESERVE:
4050                         case RELEASE:
4051                                 break;
4052
4053                         case MODE_SENSE:
4054                                 if (!ips_online(ha, scb)
4055                                     || !ips_msense(ha, scb)) {
4056                                         errcode = DID_ERROR;
4057                                 }
4058                                 break;
4059
4060                         case READ_CAPACITY:
4061                                 if (ips_online(ha, scb))
4062                                         ips_rdcap(ha, scb);
4063                                 else {
4064                                         errcode = DID_TIME_OUT;
4065                                 }
4066                                 break;
4067
4068                         case SEND_DIAGNOSTIC:
4069                         case REASSIGN_BLOCKS:
4070                                 break;
4071
4072                         case FORMAT_UNIT:
4073                                 errcode = DID_ERROR;
4074                                 break;
4075
4076                         case SEEK_10:
4077                         case VERIFY:
4078                         case READ_DEFECT_DATA:
4079                         case READ_BUFFER:
4080                         case WRITE_BUFFER:
4081                                 break;
4082
4083                         default:
4084                                 errcode = DID_ERROR;
4085                         }       /* end switch */
4086
4087                         scb->scsi_cmd->result = errcode << 16;
4088                 } else {        /* bus == 0 */
4089                         /* restrict access to physical drives */
4090                         if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
4091                             ips_scmd_buf_read(scb->scsi_cmd,
4092                                   &inquiryData, sizeof (inquiryData));
4093                             if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
4094                                 scb->scsi_cmd->result = DID_TIME_OUT << 16;
4095                         }
4096                 }               /* else */
4097         } else {                /* recovered error / success */
4098                 if (scb->bus == 0) {
4099                         DEBUG_VAR(1,
4100                                   "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4101                                   ips_name, ha->host_num,
4102                                   scb->cmd.basic_io.op_code, basic_status,
4103                                   ext_status);
4104                 }
4105
4106                 ips_map_status(ha, scb, sp);
4107         }                       /* else */
4108 }
4109
4110 /****************************************************************************/
4111 /*                                                                          */
4112 /* Routine Name: ips_online                                                 */
4113 /*                                                                          */
4114 /* Routine Description:                                                     */
4115 /*                                                                          */
4116 /*   Determine if a logical drive is online                                 */
4117 /*                                                                          */
4118 /****************************************************************************/
4119 static int
4120 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4121 {
4122         METHOD_TRACE("ips_online", 1);
4123
4124         if (scb->target_id >= IPS_MAX_LD)
4125                 return (0);
4126
4127         if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4128                 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4129                 return (0);
4130         }
4131
4132         if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4133             IPS_LD_OFFLINE
4134             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4135             IPS_LD_FREE
4136             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4137             IPS_LD_CRS
4138             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4139             IPS_LD_SYS)
4140                 return (1);
4141         else
4142                 return (0);
4143 }
4144
4145 /****************************************************************************/
4146 /*                                                                          */
4147 /* Routine Name: ips_inquiry                                                */
4148 /*                                                                          */
4149 /* Routine Description:                                                     */
4150 /*                                                                          */
4151 /*   Simulate an inquiry command to a logical drive                         */
4152 /*                                                                          */
4153 /****************************************************************************/
4154 static int
4155 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4156 {
4157         IPS_SCSI_INQ_DATA inquiry;
4158
4159         METHOD_TRACE("ips_inquiry", 1);
4160
4161         memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4162
4163         inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4164         inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4165         inquiry.Version = IPS_SCSI_INQ_REV2;
4166         inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4167         inquiry.AdditionalLength = 31;
4168         inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4169         inquiry.Flags[1] =
4170             IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4171         strncpy(inquiry.VendorId, "IBM     ", 8);
4172         strncpy(inquiry.ProductId, "SERVERAID       ", 16);
4173         strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4174
4175         ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4176
4177         return (1);
4178 }
4179
4180 /****************************************************************************/
4181 /*                                                                          */
4182 /* Routine Name: ips_rdcap                                                  */
4183 /*                                                                          */
4184 /* Routine Description:                                                     */
4185 /*                                                                          */
4186 /*   Simulate a read capacity command to a logical drive                    */
4187 /*                                                                          */
4188 /****************************************************************************/
4189 static int
4190 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4191 {
4192         IPS_SCSI_CAPACITY cap;
4193
4194         METHOD_TRACE("ips_rdcap", 1);
4195
4196         if (scsi_bufflen(scb->scsi_cmd) < 8)
4197                 return (0);
4198
4199         cap.lba =
4200             cpu_to_be32(le32_to_cpu
4201                         (ha->logical_drive_info->
4202                          drive_info[scb->target_id].sector_count) - 1);
4203         cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4204
4205         ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4206
4207         return (1);
4208 }
4209
4210 /****************************************************************************/
4211 /*                                                                          */
4212 /* Routine Name: ips_msense                                                 */
4213 /*                                                                          */
4214 /* Routine Description:                                                     */
4215 /*                                                                          */
4216 /*   Simulate a mode sense command to a logical drive                       */
4217 /*                                                                          */
4218 /****************************************************************************/
4219 static int
4220 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4221 {
4222         uint16_t heads;
4223         uint16_t sectors;
4224         uint32_t cylinders;
4225         IPS_SCSI_MODE_PAGE_DATA mdata;
4226
4227         METHOD_TRACE("ips_msense", 1);
4228
4229         if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4230             (ha->enq->ucMiscFlag & 0x8) == 0) {
4231                 heads = IPS_NORM_HEADS;
4232                 sectors = IPS_NORM_SECTORS;
4233         } else {
4234                 heads = IPS_COMP_HEADS;
4235                 sectors = IPS_COMP_SECTORS;
4236         }
4237
4238         cylinders =
4239             (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4240              1) / (heads * sectors);
4241
4242         memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4243
4244         mdata.hdr.BlockDescLength = 8;
4245
4246         switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4247         case 0x03:              /* page 3 */
4248                 mdata.pdata.pg3.PageCode = 3;
4249                 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4250                 mdata.hdr.DataLength =
4251                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4252                 mdata.pdata.pg3.TracksPerZone = 0;
4253                 mdata.pdata.pg3.AltSectorsPerZone = 0;
4254                 mdata.pdata.pg3.AltTracksPerZone = 0;
4255                 mdata.pdata.pg3.AltTracksPerVolume = 0;
4256                 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4257                 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4258                 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4259                 mdata.pdata.pg3.TrackSkew = 0;
4260                 mdata.pdata.pg3.CylinderSkew = 0;
4261                 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4262                 break;
4263
4264         case 0x4:
4265                 mdata.pdata.pg4.PageCode = 4;
4266                 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4267                 mdata.hdr.DataLength =
4268                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4269                 mdata.pdata.pg4.CylindersHigh =
4270                     cpu_to_be16((cylinders >> 8) & 0xFFFF);
4271                 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4272                 mdata.pdata.pg4.Heads = heads;
4273                 mdata.pdata.pg4.WritePrecompHigh = 0;
4274                 mdata.pdata.pg4.WritePrecompLow = 0;
4275                 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4276                 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4277                 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4278                 mdata.pdata.pg4.LandingZoneHigh = 0;
4279                 mdata.pdata.pg4.LandingZoneLow = 0;
4280                 mdata.pdata.pg4.flags = 0;
4281                 mdata.pdata.pg4.RotationalOffset = 0;
4282                 mdata.pdata.pg4.MediumRotationRate = 0;
4283                 break;
4284         case 0x8:
4285                 mdata.pdata.pg8.PageCode = 8;
4286                 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4287                 mdata.hdr.DataLength =
4288                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4289                 /* everything else is left set to 0 */
4290                 break;
4291
4292         default:
4293                 return (0);
4294         }                       /* end switch */
4295
4296         ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4297
4298         return (1);
4299 }
4300
4301 /****************************************************************************/
4302 /*                                                                          */
4303 /* Routine Name: ips_reqsen                                                 */
4304 /*                                                                          */
4305 /* Routine Description:                                                     */
4306 /*                                                                          */
4307 /*   Simulate a request sense command to a logical drive                    */
4308 /*                                                                          */
4309 /****************************************************************************/
4310 static int
4311 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4312 {
4313         IPS_SCSI_REQSEN reqsen;
4314
4315         METHOD_TRACE("ips_reqsen", 1);
4316
4317         memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4318
4319         reqsen.ResponseCode =
4320             IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4321         reqsen.AdditionalLength = 10;
4322         reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4323         reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4324
4325         ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4326
4327         return (1);
4328 }
4329
4330 /****************************************************************************/
4331 /*                                                                          */
4332 /* Routine Name: ips_free                                                   */
4333 /*                                                                          */
4334 /* Routine Description:                                                     */
4335 /*                                                                          */
4336 /*   Free any allocated space for this controller                           */
4337 /*                                                                          */
4338 /****************************************************************************/
4339 static void
4340 ips_free(ips_ha_t * ha)
4341 {
4342
4343         METHOD_TRACE("ips_free", 1);
4344
4345         if (ha) {
4346                 if (ha->enq) {
4347                         pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4348                                             ha->enq, ha->enq_busaddr);
4349                         ha->enq = NULL;
4350                 }
4351
4352                 kfree(ha->conf);
4353                 ha->conf = NULL;
4354
4355                 if (ha->adapt) {
4356                         pci_free_consistent(ha->pcidev,
4357                                             sizeof (IPS_ADAPTER) +
4358                                             sizeof (IPS_IO_CMD), ha->adapt,
4359                                             ha->adapt->hw_status_start);
4360                         ha->adapt = NULL;
4361                 }
4362
4363                 if (ha->logical_drive_info) {
4364                         pci_free_consistent(ha->pcidev,
4365                                             sizeof (IPS_LD_INFO),
4366                                             ha->logical_drive_info,
4367                                             ha->logical_drive_info_dma_addr);
4368                         ha->logical_drive_info = NULL;
4369                 }
4370
4371                 kfree(ha->nvram);
4372                 ha->nvram = NULL;
4373
4374                 kfree(ha->subsys);
4375                 ha->subsys = NULL;
4376
4377                 if (ha->ioctl_data) {
4378                         pci_free_consistent(ha->pcidev, ha->ioctl_len,
4379                                             ha->ioctl_data, ha->ioctl_busaddr);
4380                         ha->ioctl_data = NULL;
4381                         ha->ioctl_datasize = 0;
4382                         ha->ioctl_len = 0;
4383                 }
4384                 ips_deallocatescbs(ha, ha->max_cmds);
4385
4386                 /* free memory mapped (if applicable) */
4387                 if (ha->mem_ptr) {
4388                         iounmap(ha->ioremap_ptr);
4389                         ha->ioremap_ptr = NULL;
4390                         ha->mem_ptr = NULL;
4391                 }
4392
4393                 if (ha->mem_addr)
4394                         release_mem_region(ha->mem_addr, ha->mem_len);
4395                 ha->mem_addr = 0;
4396
4397         }
4398 }
4399
4400 /****************************************************************************/
4401 /*                                                                          */
4402 /* Routine Name: ips_deallocatescbs                                         */
4403 /*                                                                          */
4404 /* Routine Description:                                                     */
4405 /*                                                                          */
4406 /*   Free the command blocks                                                */
4407 /*                                                                          */
4408 /****************************************************************************/
4409 static int
4410 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4411 {
4412         if (ha->scbs) {
4413                 pci_free_consistent(ha->pcidev,
4414                                     IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4415                                     ha->scbs->sg_list.list,
4416                                     ha->scbs->sg_busaddr);
4417                 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4418                                     ha->scbs, ha->scbs->scb_busaddr);
4419                 ha->scbs = NULL;
4420         }                       /* end if */
4421         return 1;
4422 }
4423
4424 /****************************************************************************/
4425 /*                                                                          */
4426 /* Routine Name: ips_allocatescbs                                           */
4427 /*                                                                          */
4428 /* Routine Description:                                                     */
4429 /*                                                                          */
4430 /*   Allocate the command blocks                                            */
4431 /*                                                                          */
4432 /****************************************************************************/
4433 static int
4434 ips_allocatescbs(ips_ha_t * ha)
4435 {
4436         ips_scb_t *scb_p;
4437         IPS_SG_LIST ips_sg;
4438         int i;
4439         dma_addr_t command_dma, sg_dma;
4440
4441         METHOD_TRACE("ips_allocatescbs", 1);
4442
4443         /* Allocate memory for the SCBs */
4444         ha->scbs =
4445             pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4446                                  &command_dma);
4447         if (ha->scbs == NULL)
4448                 return 0;
4449         ips_sg.list =
4450             pci_alloc_consistent(ha->pcidev,
4451                                  IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4452                                  ha->max_cmds, &sg_dma);
4453         if (ips_sg.list == NULL) {
4454                 pci_free_consistent(ha->pcidev,
4455                                     ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4456                                     command_dma);
4457                 return 0;
4458         }
4459
4460         memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4461
4462         for (i = 0; i < ha->max_cmds; i++) {
4463                 scb_p = &ha->scbs[i];
4464                 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4465                 /* set up S/G list */
4466                 if (IPS_USE_ENH_SGLIST(ha)) {
4467                         scb_p->sg_list.enh_list =
4468                             ips_sg.enh_list + i * IPS_MAX_SG;
4469                         scb_p->sg_busaddr =
4470                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4471                 } else {
4472                         scb_p->sg_list.std_list =
4473                             ips_sg.std_list + i * IPS_MAX_SG;
4474                         scb_p->sg_busaddr =
4475                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4476                 }
4477
4478                 /* add to the free list */
4479                 if (i < ha->max_cmds - 1) {
4480                         scb_p->q_next = ha->scb_freelist;
4481                         ha->scb_freelist = scb_p;
4482                 }
4483         }
4484
4485         /* success */
4486         return (1);
4487 }
4488
4489 /****************************************************************************/
4490 /*                                                                          */
4491 /* Routine Name: ips_init_scb                                               */
4492 /*                                                                          */
4493 /* Routine Description:                                                     */
4494 /*                                                                          */
4495 /*   Initialize a CCB to default values                                     */
4496 /*                                                                          */
4497 /****************************************************************************/
4498 static void
4499 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4500 {
4501         IPS_SG_LIST sg_list;
4502         uint32_t cmd_busaddr, sg_busaddr;
4503         METHOD_TRACE("ips_init_scb", 1);
4504
4505         if (scb == NULL)
4506                 return;
4507
4508         sg_list.list = scb->sg_list.list;
4509         cmd_busaddr = scb->scb_busaddr;
4510         sg_busaddr = scb->sg_busaddr;
4511         /* zero fill */
4512         memset(scb, 0, sizeof (ips_scb_t));
4513         memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4514
4515         /* Initialize dummy command bucket */
4516         ha->dummy->op_code = 0xFF;
4517         ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4518                                        + sizeof (IPS_ADAPTER));
4519         ha->dummy->command_id = IPS_MAX_CMDS;
4520
4521         /* set bus address of scb */
4522         scb->scb_busaddr = cmd_busaddr;
4523         scb->sg_busaddr = sg_busaddr;
4524         scb->sg_list.list = sg_list.list;
4525
4526         /* Neptune Fix */
4527         scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4528         scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4529                                               + sizeof (IPS_ADAPTER));
4530 }
4531
4532 /****************************************************************************/
4533 /*                                                                          */
4534 /* Routine Name: ips_get_scb                                                */
4535 /*                                                                          */
4536 /* Routine Description:                                                     */
4537 /*                                                                          */
4538 /*   Initialize a CCB to default values                                     */
4539 /*                                                                          */
4540 /* ASSUMED to be callled from within a lock                                 */
4541 /*                                                                          */
4542 /****************************************************************************/
4543 static ips_scb_t *
4544 ips_getscb(ips_ha_t * ha)
4545 {
4546         ips_scb_t *scb;
4547
4548         METHOD_TRACE("ips_getscb", 1);
4549
4550         if ((scb = ha->scb_freelist) == NULL) {
4551
4552                 return (NULL);
4553         }
4554
4555         ha->scb_freelist = scb->q_next;
4556         scb->flags = 0;
4557         scb->q_next = NULL;
4558
4559         ips_init_scb(ha, scb);
4560
4561         return (scb);
4562 }
4563
4564 /****************************************************************************/
4565 /*                                                                          */
4566 /* Routine Name: ips_free_scb                                               */
4567 /*                                                                          */
4568 /* Routine Description:                                                     */
4569 /*                                                                          */
4570 /*   Return an unused CCB back to the free list                             */
4571 /*                                                                          */
4572 /* ASSUMED to be called from within a lock                                  */
4573 /*                                                                          */
4574 /****************************************************************************/
4575 static void
4576 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4577 {
4578
4579         METHOD_TRACE("ips_freescb", 1);
4580         if (scb->flags & IPS_SCB_MAP_SG)
4581                 scsi_dma_unmap(scb->scsi_cmd);
4582         else if (scb->flags & IPS_SCB_MAP_SINGLE)
4583                 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4584                                  IPS_DMA_DIR(scb));
4585
4586         /* check to make sure this is not our "special" scb */
4587         if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4588                 scb->q_next = ha->scb_freelist;
4589                 ha->scb_freelist = scb;
4590         }
4591 }
4592
4593 /****************************************************************************/
4594 /*                                                                          */
4595 /* Routine Name: ips_isinit_copperhead                                      */
4596 /*                                                                          */
4597 /* Routine Description:                                                     */
4598 /*                                                                          */
4599 /*   Is controller initialized ?                                            */
4600 /*                                                                          */
4601 /****************************************************************************/
4602 static int
4603 ips_isinit_copperhead(ips_ha_t * ha)
4604 {
4605         uint8_t scpr;
4606         uint8_t isr;
4607
4608         METHOD_TRACE("ips_isinit_copperhead", 1);
4609
4610         isr = inb(ha->io_addr + IPS_REG_HISR);
4611         scpr = inb(ha->io_addr + IPS_REG_SCPR);
4612
4613         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4614                 return (0);
4615         else
4616                 return (1);
4617 }
4618
4619 /****************************************************************************/
4620 /*                                                                          */
4621 /* Routine Name: ips_isinit_copperhead_memio                                */
4622 /*                                                                          */
4623 /* Routine Description:                                                     */
4624 /*                                                                          */
4625 /*   Is controller initialized ?                                            */
4626 /*                                                                          */
4627 /****************************************************************************/
4628 static int
4629 ips_isinit_copperhead_memio(ips_ha_t * ha)
4630 {
4631         uint8_t isr = 0;
4632         uint8_t scpr;
4633
4634         METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4635
4636         isr = readb(ha->mem_ptr + IPS_REG_HISR);
4637         scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4638
4639         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4640                 return (0);
4641         else
4642                 return (1);
4643 }
4644
4645 /****************************************************************************/
4646 /*                                                                          */
4647 /* Routine Name: ips_isinit_morpheus                                        */
4648 /*                                                                          */
4649 /* Routine Description:                                                     */
4650 /*                                                                          */
4651 /*   Is controller initialized ?                                            */
4652 /*                                                                          */
4653 /****************************************************************************/
4654 static int
4655 ips_isinit_morpheus(ips_ha_t * ha)
4656 {
4657         uint32_t post;
4658         uint32_t bits;
4659
4660         METHOD_TRACE("ips_is_init_morpheus", 1);
4661
4662         if (ips_isintr_morpheus(ha))
4663             ips_flush_and_reset(ha);
4664
4665         post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4666         bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4667
4668         if (post == 0)
4669                 return (0);
4670         else if (bits & 0x3)
4671                 return (0);
4672         else
4673                 return (1);
4674 }
4675
4676 /****************************************************************************/
4677 /*                                                                          */
4678 /* Routine Name: ips_flush_and_reset                                        */
4679 /*                                                                          */
4680 /* Routine Description:                                                     */
4681 /*                                                                          */
4682 /*   Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown  */
4683 /*   state ( was trying to INIT and an interrupt was already pending ) ...  */
4684 /*                                                                          */
4685 /****************************************************************************/
4686 static void
4687 ips_flush_and_reset(ips_ha_t *ha)
4688 {
4689         ips_scb_t *scb;
4690         int  ret;
4691         int  time;
4692         int  done;
4693         dma_addr_t command_dma;
4694
4695         /* Create a usuable SCB */
4696         scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4697         if (scb) {
4698             memset(scb, 0, sizeof(ips_scb_t));
4699             ips_init_scb(ha, scb);
4700             scb->scb_busaddr = command_dma;
4701
4702             scb->timeout = ips_cmd_timeout;
4703             scb->cdb[0] = IPS_CMD_FLUSH;
4704
4705             scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4706             scb->cmd.flush_cache.command_id = IPS_MAX_CMDS;   /* Use an ID that would otherwise not exist */
4707             scb->cmd.flush_cache.state = IPS_NORM_STATE;
4708             scb->cmd.flush_cache.reserved = 0;
4709             scb->cmd.flush_cache.reserved2 = 0;
4710             scb->cmd.flush_cache.reserved3 = 0;
4711             scb->cmd.flush_cache.reserved4 = 0;
4712
4713             ret = ips_send_cmd(ha, scb);                      /* Send the Flush Command */
4714
4715             if (ret == IPS_SUCCESS) {
4716                 time = 60 * IPS_ONE_SEC;                      /* Max Wait time is 60 seconds */
4717                 done = 0;
4718
4719                 while ((time > 0) && (!done)) {
4720                    done = ips_poll_for_flush_complete(ha);
4721                    /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4722                    udelay(1000);
4723                    time--;
4724                 }
4725         }
4726         }
4727
4728         /* Now RESET and INIT the adapter */
4729         (*ha->func.reset) (ha);
4730
4731         pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4732         return;
4733 }
4734
4735 /****************************************************************************/
4736 /*                                                                          */
4737 /* Routine Name: ips_poll_for_flush_complete                                */
4738 /*                                                                          */
4739 /* Routine Description:                                                     */
4740 /*                                                                          */
4741 /*   Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4742 /*   All other responses are just taken off the queue and ignored           */
4743 /*                                                                          */
4744 /****************************************************************************/
4745 static int
4746 ips_poll_for_flush_complete(ips_ha_t * ha)
4747 {
4748         IPS_STATUS cstatus;
4749
4750         while (TRUE) {
4751             cstatus.value = (*ha->func.statupd) (ha);
4752
4753             if (cstatus.value == 0xffffffff)      /* If No Interrupt to process */
4754                         break;
4755
4756             /* Success is when we see the Flush Command ID */
4757             if (cstatus.fields.command_id == IPS_MAX_CMDS )
4758                 return 1;
4759          }
4760
4761         return 0;
4762 }
4763
4764 /****************************************************************************/
4765 /*                                                                          */
4766 /* Routine Name: ips_enable_int_copperhead                                  */
4767 /*                                                                          */
4768 /* Routine Description:                                                     */
4769 /*   Turn on interrupts                                                     */
4770 /*                                                                          */
4771 /****************************************************************************/
4772 static void
4773 ips_enable_int_copperhead(ips_ha_t * ha)
4774 {
4775         METHOD_TRACE("ips_enable_int_copperhead", 1);
4776
4777         outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4778         inb(ha->io_addr + IPS_REG_HISR);        /*Ensure PCI Posting Completes*/
4779 }
4780
4781 /****************************************************************************/
4782 /*                                                                          */
4783 /* Routine Name: ips_enable_int_copperhead_memio                            */
4784 /*                                                                          */
4785 /* Routine Description:                                                     */
4786 /*   Turn on interrupts                                                     */
4787 /*                                                                          */
4788 /****************************************************************************/
4789 static void
4790 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4791 {
4792         METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4793
4794         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4795         readb(ha->mem_ptr + IPS_REG_HISR);      /*Ensure PCI Posting Completes*/
4796 }
4797
4798 /****************************************************************************/
4799 /*                                                                          */
4800 /* Routine Name: ips_enable_int_morpheus                                    */
4801 /*                                                                          */
4802 /* Routine Description:                                                     */
4803 /*   Turn on interrupts                                                     */
4804 /*                                                                          */
4805 /****************************************************************************/
4806 static void
4807 ips_enable_int_morpheus(ips_ha_t * ha)
4808 {
4809         uint32_t Oimr;
4810
4811         METHOD_TRACE("ips_enable_int_morpheus", 1);
4812
4813         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4814         Oimr &= ~0x08;
4815         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4816         readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4817 }
4818
4819 /****************************************************************************/
4820 /*                                                                          */
4821 /* Routine Name: ips_init_copperhead                                        */
4822 /*                                                                          */
4823 /* Routine Description:                                                     */
4824 /*                                                                          */
4825 /*   Initialize a copperhead controller                                     */
4826 /*                                                                          */
4827 /****************************************************************************/
4828 static int
4829 ips_init_copperhead(ips_ha_t * ha)
4830 {
4831         uint8_t Isr;
4832         uint8_t Cbsp;
4833         uint8_t PostByte[IPS_MAX_POST_BYTES];
4834         uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4835         int i, j;
4836
4837         METHOD_TRACE("ips_init_copperhead", 1);
4838
4839         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4840                 for (j = 0; j < 45; j++) {
4841                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4842                         if (Isr & IPS_BIT_GHI)
4843                                 break;
4844
4845                         /* Delay for 1 Second */
4846                         MDELAY(IPS_ONE_SEC);
4847                 }
4848
4849                 if (j >= 45)
4850                         /* error occurred */
4851                         return (0);
4852
4853                 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4854                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4855         }
4856
4857         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4858                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4859                            "reset controller fails (post status %x %x).\n",
4860                            PostByte[0], PostByte[1]);
4861
4862                 return (0);
4863         }
4864
4865         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4866                 for (j = 0; j < 240; j++) {
4867                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4868                         if (Isr & IPS_BIT_GHI)
4869                                 break;
4870
4871                         /* Delay for 1 Second */
4872                         MDELAY(IPS_ONE_SEC);
4873                 }
4874
4875                 if (j >= 240)
4876                         /* error occurred */
4877                         return (0);
4878
4879                 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4880                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4881         }
4882
4883         for (i = 0; i < 240; i++) {
4884                 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
4885
4886                 if ((Cbsp & IPS_BIT_OP) == 0)
4887                         break;
4888
4889                 /* Delay for 1 Second */
4890                 MDELAY(IPS_ONE_SEC);
4891         }
4892
4893         if (i >= 240)
4894                 /* reset failed */
4895                 return (0);
4896
4897         /* setup CCCR */
4898         outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR);
4899
4900         /* Enable busmastering */
4901         outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
4902
4903         if (ha->revision_id == IPS_REVID_TROMBONE64)
4904                 /* fix for anaconda64 */
4905                 outl(0, ha->io_addr + IPS_REG_NDAE);
4906
4907         /* Enable interrupts */
4908         outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
4909
4910         return (1);
4911 }
4912
4913 /****************************************************************************/
4914 /*                                                                          */
4915 /* Routine Name: ips_init_copperhead_memio                                  */
4916 /*                                                                          */
4917 /* Routine Description:                                                     */
4918 /*                                                                          */
4919 /*   Initialize a copperhead controller with memory mapped I/O              */
4920 /*                                                                          */
4921 /****************************************************************************/
4922 static int
4923 ips_init_copperhead_memio(ips_ha_t * ha)
4924 {
4925         uint8_t Isr = 0;
4926         uint8_t Cbsp;
4927         uint8_t PostByte[IPS_MAX_POST_BYTES];
4928         uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4929         int i, j;
4930
4931         METHOD_TRACE("ips_init_copperhead_memio", 1);
4932
4933         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4934                 for (j = 0; j < 45; j++) {
4935                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4936                         if (Isr & IPS_BIT_GHI)
4937                                 break;
4938
4939                         /* Delay for 1 Second */
4940                         MDELAY(IPS_ONE_SEC);
4941                 }
4942
4943                 if (j >= 45)
4944                         /* error occurred */
4945                         return (0);
4946
4947                 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4948                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4949         }
4950
4951         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4952                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4953                            "reset controller fails (post status %x %x).\n",
4954                            PostByte[0], PostByte[1]);
4955
4956                 return (0);
4957         }
4958
4959         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4960                 for (j = 0; j < 240; j++) {
4961                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4962                         if (Isr & IPS_BIT_GHI)
4963                                 break;
4964
4965                         /* Delay for 1 Second */
4966                         MDELAY(IPS_ONE_SEC);
4967                 }
4968
4969                 if (j >= 240)
4970                         /* error occurred */
4971                         return (0);
4972
4973                 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4974                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4975         }
4976
4977         for (i = 0; i < 240; i++) {
4978                 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
4979
4980                 if ((Cbsp & IPS_BIT_OP) == 0)
4981                         break;
4982
4983                 /* Delay for 1 Second */
4984                 MDELAY(IPS_ONE_SEC);
4985         }
4986
4987         if (i >= 240)
4988                 /* error occurred */
4989                 return (0);
4990
4991         /* setup CCCR */
4992         writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
4993
4994         /* Enable busmastering */
4995         writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
4996
4997         if (ha->revision_id == IPS_REVID_TROMBONE64)
4998                 /* fix for anaconda64 */
4999                 writel(0, ha->mem_ptr + IPS_REG_NDAE);
5000
5001         /* Enable interrupts */
5002         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
5003
5004         /* if we get here then everything went OK */
5005         return (1);
5006 }
5007
5008 /****************************************************************************/
5009 /*                                                                          */
5010 /* Routine Name: ips_init_morpheus                                          */
5011 /*                                                                          */
5012 /* Routine Description:                                                     */
5013 /*                                                                          */
5014 /*   Initialize a morpheus controller                                       */
5015 /*                                                                          */
5016 /****************************************************************************/
5017 static int
5018 ips_init_morpheus(ips_ha_t * ha)
5019 {
5020         uint32_t Post;
5021         uint32_t Config;
5022         uint32_t Isr;
5023         uint32_t Oimr;
5024         int i;
5025
5026         METHOD_TRACE("ips_init_morpheus", 1);
5027
5028         /* Wait up to 45 secs for Post */
5029         for (i = 0; i < 45; i++) {
5030                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5031
5032                 if (Isr & IPS_BIT_I960_MSG0I)
5033                         break;
5034
5035                 /* Delay for 1 Second */
5036                 MDELAY(IPS_ONE_SEC);
5037         }
5038
5039         if (i >= 45) {
5040                 /* error occurred */
5041                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5042                            "timeout waiting for post.\n");
5043
5044                 return (0);
5045         }
5046
5047         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5048
5049         if (Post == 0x4F00) {   /* If Flashing the Battery PIC         */
5050                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5051                            "Flashing Battery PIC, Please wait ...\n");
5052
5053                 /* Clear the interrupt bit */
5054                 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5055                 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5056
5057                 for (i = 0; i < 120; i++) {     /*    Wait Up to 2 Min. for Completion */
5058                         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5059                         if (Post != 0x4F00)
5060                                 break;
5061                         /* Delay for 1 Second */
5062                         MDELAY(IPS_ONE_SEC);
5063                 }
5064
5065                 if (i >= 120) {
5066                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5067                                    "timeout waiting for Battery PIC Flash\n");
5068                         return (0);
5069                 }
5070
5071         }
5072
5073         /* Clear the interrupt bit */
5074         Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5075         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5076
5077         if (Post < (IPS_GOOD_POST_STATUS << 8)) {
5078                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5079                            "reset controller fails (post status %x).\n", Post);
5080
5081                 return (0);
5082         }
5083
5084         /* Wait up to 240 secs for config bytes */
5085         for (i = 0; i < 240; i++) {
5086                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5087
5088                 if (Isr & IPS_BIT_I960_MSG1I)
5089                         break;
5090
5091                 /* Delay for 1 Second */
5092                 MDELAY(IPS_ONE_SEC);
5093         }
5094
5095         if (i >= 240) {
5096                 /* error occurred */
5097                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5098                            "timeout waiting for config.\n");
5099
5100                 return (0);
5101         }
5102
5103         Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
5104
5105         /* Clear interrupt bit */
5106         Isr = (uint32_t) IPS_BIT_I960_MSG1I;
5107         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5108
5109         /* Turn on the interrupts */
5110         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
5111         Oimr &= ~0x8;
5112         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
5113
5114         /* if we get here then everything went OK */
5115
5116         /* Since we did a RESET, an EraseStripeLock may be needed */
5117         if (Post == 0xEF10) {
5118                 if ((Config == 0x000F) || (Config == 0x0009))
5119                         ha->requires_esl = 1;
5120         }
5121
5122         return (1);
5123 }
5124
5125 /****************************************************************************/
5126 /*                                                                          */
5127 /* Routine Name: ips_reset_copperhead                                       */
5128 /*                                                                          */
5129 /* Routine Description:                                                     */
5130 /*                                                                          */
5131 /*   Reset the controller                                                   */
5132 /*                                                                          */
5133 /****************************************************************************/
5134 static int
5135 ips_reset_copperhead(ips_ha_t * ha)
5136 {
5137         int reset_counter;
5138
5139         METHOD_TRACE("ips_reset_copperhead", 1);
5140
5141         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5142                   ips_name, ha->host_num, ha->io_addr, ha->irq);
5143
5144         reset_counter = 0;
5145
5146         while (reset_counter < 2) {
5147                 reset_counter++;
5148
5149                 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5150
5151                 /* Delay for 1 Second */
5152                 MDELAY(IPS_ONE_SEC);
5153
5154                 outb(0, ha->io_addr + IPS_REG_SCPR);
5155
5156                 /* Delay for 1 Second */
5157                 MDELAY(IPS_ONE_SEC);
5158
5159                 if ((*ha->func.init) (ha))
5160                         break;
5161                 else if (reset_counter >= 2) {
5162
5163                         return (0);
5164                 }
5165         }
5166
5167         return (1);
5168 }
5169
5170 /****************************************************************************/
5171 /*                                                                          */
5172 /* Routine Name: ips_reset_copperhead_memio                                 */
5173 /*                                                                          */
5174 /* Routine Description:                                                     */
5175 /*                                                                          */
5176 /*   Reset the controller                                                   */
5177 /*                                                                          */
5178 /****************************************************************************/
5179 static int
5180 ips_reset_copperhead_memio(ips_ha_t * ha)
5181 {
5182         int reset_counter;
5183
5184         METHOD_TRACE("ips_reset_copperhead_memio", 1);
5185
5186         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5187                   ips_name, ha->host_num, ha->mem_addr, ha->irq);
5188
5189         reset_counter = 0;
5190
5191         while (reset_counter < 2) {
5192                 reset_counter++;
5193
5194                 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5195
5196                 /* Delay for 1 Second */
5197                 MDELAY(IPS_ONE_SEC);
5198
5199                 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5200
5201                 /* Delay for 1 Second */
5202                 MDELAY(IPS_ONE_SEC);
5203
5204                 if ((*ha->func.init) (ha))
5205                         break;
5206                 else if (reset_counter >= 2) {
5207
5208                         return (0);
5209                 }
5210         }
5211
5212         return (1);
5213 }
5214
5215 /****************************************************************************/
5216 /*                                                                          */
5217 /* Routine Name: ips_reset_morpheus                                         */
5218 /*                                                                          */
5219 /* Routine Description:                                                     */
5220 /*                                                                          */
5221 /*   Reset the controller                                                   */
5222 /*                                                                          */
5223 /****************************************************************************/
5224 static int
5225 ips_reset_morpheus(ips_ha_t * ha)
5226 {
5227         int reset_counter;
5228         uint8_t junk;
5229
5230         METHOD_TRACE("ips_reset_morpheus", 1);
5231
5232         DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5233                   ips_name, ha->host_num, ha->mem_addr, ha->irq);
5234
5235         reset_counter = 0;
5236
5237         while (reset_counter < 2) {
5238                 reset_counter++;
5239
5240                 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5241
5242                 /* Delay for 5 Seconds */
5243                 MDELAY(5 * IPS_ONE_SEC);
5244
5245                 /* Do a PCI config read to wait for adapter */
5246                 pci_read_config_byte(ha->pcidev, 4, &junk);
5247
5248                 if ((*ha->func.init) (ha))
5249                         break;
5250                 else if (reset_counter >= 2) {
5251
5252                         return (0);
5253                 }
5254         }
5255
5256         return (1);
5257 }
5258
5259 /****************************************************************************/
5260 /*                                                                          */
5261 /* Routine Name: ips_statinit                                               */
5262 /*                                                                          */
5263 /* Routine Description:                                                     */
5264 /*                                                                          */
5265 /*   Initialize the status queues on the controller                         */
5266 /*                                                                          */
5267 /****************************************************************************/
5268 static void
5269 ips_statinit(ips_ha_t * ha)
5270 {
5271         uint32_t phys_status_start;
5272
5273         METHOD_TRACE("ips_statinit", 1);
5274
5275         ha->adapt->p_status_start = ha->adapt->status;
5276         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5277         ha->adapt->p_status_tail = ha->adapt->status;
5278
5279         phys_status_start = ha->adapt->hw_status_start;
5280         outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR);
5281         outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE),
5282              ha->io_addr + IPS_REG_SQER);
5283         outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE),
5284              ha->io_addr + IPS_REG_SQHR);
5285         outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR);
5286
5287         ha->adapt->hw_status_tail = phys_status_start;
5288 }
5289
5290 /****************************************************************************/
5291 /*                                                                          */
5292 /* Routine Name: ips_statinit_memio                                         */
5293 /*                                                                          */
5294 /* Routine Description:                                                     */
5295 /*                                                                          */
5296 /*   Initialize the status queues on the controller                         */
5297 /*                                                                          */
5298 /****************************************************************************/
5299 static void
5300 ips_statinit_memio(ips_ha_t * ha)
5301 {
5302         uint32_t phys_status_start;
5303
5304         METHOD_TRACE("ips_statinit_memio", 1);
5305
5306         ha->adapt->p_status_start = ha->adapt->status;
5307         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5308         ha->adapt->p_status_tail = ha->adapt->status;
5309
5310         phys_status_start = ha->adapt->hw_status_start;
5311         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5312         writel(phys_status_start + IPS_STATUS_Q_SIZE,
5313                ha->mem_ptr + IPS_REG_SQER);
5314         writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5315         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5316
5317         ha->adapt->hw_status_tail = phys_status_start;
5318 }
5319
5320 /****************************************************************************/
5321 /*                                                                          */
5322 /* Routine Name: ips_statupd_copperhead                                     */
5323 /*                                                                          */
5324 /* Routine Description:                                                     */
5325 /*                                                                          */
5326 /*   Remove an element from the status queue                                */
5327 /*                                                                          */
5328 /****************************************************************************/
5329 static uint32_t
5330 ips_statupd_copperhead(ips_ha_t * ha)
5331 {
5332         METHOD_TRACE("ips_statupd_copperhead", 1);
5333
5334         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5335                 ha->adapt->p_status_tail++;
5336                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5337         } else {
5338                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5339                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5340         }
5341
5342         outl(cpu_to_le32(ha->adapt->hw_status_tail),
5343              ha->io_addr + IPS_REG_SQTR);
5344
5345         return (ha->adapt->p_status_tail->value);
5346 }
5347
5348 /****************************************************************************/
5349 /*                                                                          */
5350 /* Routine Name: ips_statupd_copperhead_memio                               */
5351 /*                                                                          */
5352 /* Routine Description:                                                     */
5353 /*                                                                          */
5354 /*   Remove an element from the status queue                                */
5355 /*                                                                          */
5356 /****************************************************************************/
5357 static uint32_t
5358 ips_statupd_copperhead_memio(ips_ha_t * ha)
5359 {
5360         METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5361
5362         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5363                 ha->adapt->p_status_tail++;
5364                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5365         } else {
5366                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5367                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5368         }
5369
5370         writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5371
5372         return (ha->adapt->p_status_tail->value);
5373 }
5374
5375 /****************************************************************************/
5376 /*                                                                          */
5377 /* Routine Name: ips_statupd_morpheus                                       */
5378 /*                                                                          */
5379 /* Routine Description:                                                     */
5380 /*                                                                          */
5381 /*   Remove an element from the status queue                                */
5382 /*                                                                          */
5383 /****************************************************************************/
5384 static uint32_t
5385 ips_statupd_morpheus(ips_ha_t * ha)
5386 {
5387         uint32_t val;
5388
5389         METHOD_TRACE("ips_statupd_morpheus", 1);
5390
5391         val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5392
5393         return (val);
5394 }
5395
5396 /****************************************************************************/
5397 /*                                                                          */
5398 /* Routine Name: ips_issue_copperhead                                       */
5399 /*                                                                          */
5400 /* Routine Description:                                                     */
5401 /*                                                                          */
5402 /*   Send a command down to the controller                                  */
5403 /*                                                                          */
5404 /****************************************************************************/
5405 static int
5406 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5407 {
5408         uint32_t TimeOut;
5409         uint32_t val;
5410
5411         METHOD_TRACE("ips_issue_copperhead", 1);
5412
5413         if (scb->scsi_cmd) {
5414                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5415                           ips_name,
5416                           ha->host_num,
5417                           scb->cdb[0],
5418                           scb->cmd.basic_io.command_id,
5419                           scb->bus, scb->target_id, scb->lun);
5420         } else {
5421                 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5422                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5423         }
5424
5425         TimeOut = 0;
5426
5427         while ((val =
5428                 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5429                 udelay(1000);
5430
5431                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5432                         if (!(val & IPS_BIT_START_STOP))
5433                                 break;
5434
5435                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5436                                    "ips_issue val [0x%x].\n", val);
5437                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5438                                    "ips_issue semaphore chk timeout.\n");
5439
5440                         return (IPS_FAILURE);
5441                 }               /* end if */
5442         }                       /* end while */
5443
5444         outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR);
5445         outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR);
5446
5447         return (IPS_SUCCESS);
5448 }
5449
5450 /****************************************************************************/
5451 /*                                                                          */
5452 /* Routine Name: ips_issue_copperhead_memio                                 */
5453 /*                                                                          */
5454 /* Routine Description:                                                     */
5455 /*                                                                          */
5456 /*   Send a command down to the controller                                  */
5457 /*                                                                          */
5458 /****************************************************************************/
5459 static int
5460 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5461 {
5462         uint32_t TimeOut;
5463         uint32_t val;
5464
5465         METHOD_TRACE("ips_issue_copperhead_memio", 1);
5466
5467         if (scb->scsi_cmd) {
5468                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5469                           ips_name,
5470                           ha->host_num,
5471                           scb->cdb[0],
5472                           scb->cmd.basic_io.command_id,
5473                           scb->bus, scb->target_id, scb->lun);
5474         } else {
5475                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5476                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5477         }
5478
5479         TimeOut = 0;
5480
5481         while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5482                 udelay(1000);
5483
5484                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5485                         if (!(val & IPS_BIT_START_STOP))
5486                                 break;
5487
5488                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5489                                    "ips_issue val [0x%x].\n", val);
5490                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5491                                    "ips_issue semaphore chk timeout.\n");
5492
5493                         return (IPS_FAILURE);
5494                 }               /* end if */
5495         }                       /* end while */
5496
5497         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5498         writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5499
5500         return (IPS_SUCCESS);
5501 }
5502
5503 /****************************************************************************/
5504 /*                                                                          */
5505 /* Routine Name: ips_issue_i2o                                              */
5506 /*                                                                          */
5507 /* Routine Description:                                                     */
5508 /*                                                                          */
5509 /*   Send a command down to the controller                                  */
5510 /*                                                                          */
5511 /****************************************************************************/
5512 static int
5513 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5514 {
5515
5516         METHOD_TRACE("ips_issue_i2o", 1);
5517
5518         if (scb->scsi_cmd) {
5519                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5520                           ips_name,
5521                           ha->host_num,
5522                           scb->cdb[0],
5523                           scb->cmd.basic_io.command_id,
5524                           scb->bus, scb->target_id, scb->lun);
5525         } else {
5526                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5527                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5528         }
5529
5530         outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ);
5531
5532         return (IPS_SUCCESS);
5533 }
5534
5535 /****************************************************************************/
5536 /*                                                                          */
5537 /* Routine Name: ips_issue_i2o_memio                                        */
5538 /*                                                                          */
5539 /* Routine Description:                                                     */
5540 /*                                                                          */
5541 /*   Send a command down to the controller                                  */
5542 /*                                                                          */
5543 /****************************************************************************/
5544 static int
5545 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5546 {
5547
5548         METHOD_TRACE("ips_issue_i2o_memio", 1);
5549
5550         if (scb->scsi_cmd) {
5551                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5552                           ips_name,
5553                           ha->host_num,
5554                           scb->cdb[0],
5555                           scb->cmd.basic_io.command_id,
5556                           scb->bus, scb->target_id, scb->lun);
5557         } else {
5558                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5559                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5560         }
5561
5562         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5563
5564         return (IPS_SUCCESS);
5565 }
5566
5567 /****************************************************************************/
5568 /*                                                                          */
5569 /* Routine Name: ips_isintr_copperhead                                      */
5570 /*                                                                          */
5571 /* Routine Description:                                                     */
5572 /*                                                                          */
5573 /*   Test to see if an interrupt is for us                                  */
5574 /*                                                                          */
5575 /****************************************************************************/
5576 static int
5577 ips_isintr_copperhead(ips_ha_t * ha)
5578 {
5579         uint8_t Isr;
5580
5581         METHOD_TRACE("ips_isintr_copperhead", 2);
5582
5583         Isr = inb(ha->io_addr + IPS_REG_HISR);
5584
5585         if (Isr == 0xFF)
5586                 /* ?!?! Nothing really there */
5587                 return (0);
5588
5589         if (Isr & IPS_BIT_SCE)
5590                 return (1);
5591         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5592                 /* status queue overflow or GHI */
5593                 /* just clear the interrupt */
5594                 outb(Isr, ha->io_addr + IPS_REG_HISR);
5595         }
5596
5597         return (0);
5598 }
5599
5600 /****************************************************************************/
5601 /*                                                                          */
5602 /* Routine Name: ips_isintr_copperhead_memio                                */
5603 /*                                                                          */
5604 /* Routine Description:                                                     */
5605 /*                                                                          */
5606 /*   Test to see if an interrupt is for us                                  */
5607 /*                                                                          */
5608 /****************************************************************************/
5609 static int
5610 ips_isintr_copperhead_memio(ips_ha_t * ha)
5611 {
5612         uint8_t Isr;
5613
5614         METHOD_TRACE("ips_isintr_memio", 2);
5615
5616         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5617
5618         if (Isr == 0xFF)
5619                 /* ?!?! Nothing really there */
5620                 return (0);
5621
5622         if (Isr & IPS_BIT_SCE)
5623                 return (1);
5624         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5625                 /* status queue overflow or GHI */
5626                 /* just clear the interrupt */
5627                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5628         }
5629
5630         return (0);
5631 }
5632
5633 /****************************************************************************/
5634 /*                                                                          */
5635 /* Routine Name: ips_isintr_morpheus                                        */
5636 /*                                                                          */
5637 /* Routine Description:                                                     */
5638 /*                                                                          */
5639 /*   Test to see if an interrupt is for us                                  */
5640 /*                                                                          */
5641 /****************************************************************************/
5642 static int
5643 ips_isintr_morpheus(ips_ha_t * ha)
5644 {
5645         uint32_t Isr;
5646
5647         METHOD_TRACE("ips_isintr_morpheus", 2);
5648
5649         Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5650
5651         if (Isr & IPS_BIT_I2O_OPQI)
5652                 return (1);
5653         else
5654                 return (0);
5655 }
5656
5657 /****************************************************************************/
5658 /*                                                                          */
5659 /* Routine Name: ips_wait                                                   */
5660 /*                                                                          */
5661 /* Routine Description:                                                     */
5662 /*                                                                          */
5663 /*   Wait for a command to complete                                         */
5664 /*                                                                          */
5665 /****************************************************************************/
5666 static int
5667 ips_wait(ips_ha_t * ha, int time, int intr)
5668 {
5669         int ret;
5670         int done;
5671
5672         METHOD_TRACE("ips_wait", 1);
5673
5674         ret = IPS_FAILURE;
5675         done = FALSE;
5676
5677         time *= IPS_ONE_SEC;    /* convert seconds */
5678
5679         while ((time > 0) && (!done)) {
5680                 if (intr == IPS_INTR_ON) {
5681                         if (ha->waitflag == FALSE) {
5682                                 ret = IPS_SUCCESS;
5683                                 done = TRUE;
5684                                 break;
5685                         }
5686                 } else if (intr == IPS_INTR_IORL) {
5687                         if (ha->waitflag == FALSE) {
5688                                 /*
5689                                  * controller generated an interrupt to
5690                                  * acknowledge completion of the command
5691                                  * and ips_intr() has serviced the interrupt.
5692                                  */
5693                                 ret = IPS_SUCCESS;
5694                                 done = TRUE;
5695                                 break;
5696                         }
5697
5698                         /*
5699                          * NOTE: we already have the io_request_lock so
5700                          * even if we get an interrupt it won't get serviced
5701                          * until after we finish.
5702                          */
5703
5704                         (*ha->func.intr) (ha);
5705                 }
5706
5707                 /* This looks like a very evil loop, but it only does this during start-up */
5708                 udelay(1000);
5709                 time--;
5710         }
5711
5712         return (ret);
5713 }
5714
5715 /****************************************************************************/
5716 /*                                                                          */
5717 /* Routine Name: ips_write_driver_status                                    */
5718 /*                                                                          */
5719 /* Routine Description:                                                     */
5720 /*                                                                          */
5721 /*   Write OS/Driver version to Page 5 of the nvram on the controller       */
5722 /*                                                                          */
5723 /****************************************************************************/
5724 static int
5725 ips_write_driver_status(ips_ha_t * ha, int intr)
5726 {
5727         METHOD_TRACE("ips_write_driver_status", 1);
5728
5729         if (!ips_readwrite_page5(ha, FALSE, intr)) {
5730                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5731                            "unable to read NVRAM page 5.\n");
5732
5733                 return (0);
5734         }
5735
5736         /* check to make sure the page has a valid */
5737         /* signature */
5738         if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5739                 DEBUG_VAR(1,
5740                           "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5741                           ips_name, ha->host_num, ha->nvram->signature);
5742                 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5743         }
5744
5745         DEBUG_VAR(2,
5746                   "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5747                   ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5748                   ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5749                   ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5750                   ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5751                   ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5752                   ha->nvram->bios_low[3]);
5753
5754         ips_get_bios_version(ha, intr);
5755
5756         /* change values (as needed) */
5757         ha->nvram->operating_system = IPS_OS_LINUX;
5758         ha->nvram->adapter_type = ha->ad_type;
5759         strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5760         strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5761         strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5762         strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5763
5764         ha->nvram->versioning = 0;      /* Indicate the Driver Does Not Support Versioning */
5765
5766         /* now update the page */
5767         if (!ips_readwrite_page5(ha, TRUE, intr)) {
5768                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5769                            "unable to write NVRAM page 5.\n");
5770
5771                 return (0);
5772         }
5773
5774         /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5775         ha->slot_num = ha->nvram->adapter_slot;
5776
5777         return (1);
5778 }
5779
5780 /****************************************************************************/
5781 /*                                                                          */
5782 /* Routine Name: ips_read_adapter_status                                    */
5783 /*                                                                          */
5784 /* Routine Description:                                                     */
5785 /*                                                                          */
5786 /*   Do an Inquiry command to the adapter                                   */
5787 /*                                                                          */
5788 /****************************************************************************/
5789 static int
5790 ips_read_adapter_status(ips_ha_t * ha, int intr)
5791 {
5792         ips_scb_t *scb;
5793         int ret;
5794
5795         METHOD_TRACE("ips_read_adapter_status", 1);
5796
5797         scb = &ha->scbs[ha->max_cmds - 1];
5798
5799         ips_init_scb(ha, scb);
5800
5801         scb->timeout = ips_cmd_timeout;
5802         scb->cdb[0] = IPS_CMD_ENQUIRY;
5803
5804         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5805         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5806         scb->cmd.basic_io.sg_count = 0;
5807         scb->cmd.basic_io.lba = 0;
5808         scb->cmd.basic_io.sector_count = 0;
5809         scb->cmd.basic_io.log_drv = 0;
5810         scb->data_len = sizeof (*ha->enq);
5811         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5812
5813         /* send command */
5814         if (((ret =
5815               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5816             || (ret == IPS_SUCCESS_IMM)
5817             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5818                 return (0);
5819
5820         return (1);
5821 }
5822
5823 /****************************************************************************/
5824 /*                                                                          */
5825 /* Routine Name: ips_read_subsystem_parameters                              */
5826 /*                                                                          */
5827 /* Routine Description:                                                     */
5828 /*                                                                          */
5829 /*   Read subsystem parameters from the adapter                             */
5830 /*                                                                          */
5831 /****************************************************************************/
5832 static int
5833 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
5834 {
5835         ips_scb_t *scb;
5836         int ret;
5837
5838         METHOD_TRACE("ips_read_subsystem_parameters", 1);
5839
5840         scb = &ha->scbs[ha->max_cmds - 1];
5841
5842         ips_init_scb(ha, scb);
5843
5844         scb->timeout = ips_cmd_timeout;
5845         scb->cdb[0] = IPS_CMD_GET_SUBSYS;
5846
5847         scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
5848         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5849         scb->cmd.basic_io.sg_count = 0;
5850         scb->cmd.basic_io.lba = 0;
5851         scb->cmd.basic_io.sector_count = 0;
5852         scb->cmd.basic_io.log_drv = 0;
5853         scb->data_len = sizeof (*ha->subsys);
5854         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5855
5856         /* send command */
5857         if (((ret =
5858               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5859             || (ret == IPS_SUCCESS_IMM)
5860             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5861                 return (0);
5862
5863         memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
5864         return (1);
5865 }
5866
5867 /****************************************************************************/
5868 /*                                                                          */
5869 /* Routine Name: ips_read_config                                            */
5870 /*                                                                          */
5871 /* Routine Description:                                                     */
5872 /*                                                                          */
5873 /*   Read the configuration on the adapter                                  */
5874 /*                                                                          */
5875 /****************************************************************************/
5876 static int
5877 ips_read_config(ips_ha_t * ha, int intr)
5878 {
5879         ips_scb_t *scb;
5880         int i;
5881         int ret;
5882
5883         METHOD_TRACE("ips_read_config", 1);
5884
5885         /* set defaults for initiator IDs */
5886         for (i = 0; i < 4; i++)
5887                 ha->conf->init_id[i] = 7;
5888
5889         scb = &ha->scbs[ha->max_cmds - 1];
5890
5891         ips_init_scb(ha, scb);
5892
5893         scb->timeout = ips_cmd_timeout;
5894         scb->cdb[0] = IPS_CMD_READ_CONF;
5895
5896         scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
5897         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5898         scb->data_len = sizeof (*ha->conf);
5899         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5900
5901         /* send command */
5902         if (((ret =
5903               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5904             || (ret == IPS_SUCCESS_IMM)
5905             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5906
5907                 memset(ha->conf, 0, sizeof (IPS_CONF));
5908
5909                 /* reset initiator IDs */
5910                 for (i = 0; i < 4; i++)
5911                         ha->conf->init_id[i] = 7;
5912
5913                 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5914                 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
5915                     IPS_CMD_CMPLT_WERROR)
5916                         return (1);
5917
5918                 return (0);
5919         }
5920
5921         memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
5922         return (1);
5923 }
5924
5925 /****************************************************************************/
5926 /*                                                                          */
5927 /* Routine Name: ips_readwrite_page5                                        */
5928 /*                                                                          */
5929 /* Routine Description:                                                     */
5930 /*                                                                          */
5931 /*   Read nvram page 5 from the adapter                                     */
5932 /*                                                                          */
5933 /****************************************************************************/
5934 static int
5935 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
5936 {
5937         ips_scb_t *scb;
5938         int ret;
5939
5940         METHOD_TRACE("ips_readwrite_page5", 1);
5941
5942         scb = &ha->scbs[ha->max_cmds - 1];
5943
5944         ips_init_scb(ha, scb);
5945
5946         scb->timeout = ips_cmd_timeout;
5947         scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
5948
5949         scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
5950         scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
5951         scb->cmd.nvram.page = 5;
5952         scb->cmd.nvram.write = write;
5953         scb->cmd.nvram.reserved = 0;
5954         scb->cmd.nvram.reserved2 = 0;
5955         scb->data_len = sizeof (*ha->nvram);
5956         scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
5957         if (write)
5958                 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
5959
5960         /* issue the command */
5961         if (((ret =
5962               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5963             || (ret == IPS_SUCCESS_IMM)
5964             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5965
5966                 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
5967
5968                 return (0);
5969         }
5970         if (!write)
5971                 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
5972         return (1);
5973 }
5974
5975 /****************************************************************************/
5976 /*                                                                          */
5977 /* Routine Name: ips_clear_adapter                                          */
5978 /*                                                                          */
5979 /* Routine Description:                                                     */
5980 /*                                                                          */
5981 /*   Clear the stripe lock tables                                           */
5982 /*                                                                          */
5983 /****************************************************************************/
5984 static int
5985 ips_clear_adapter(ips_ha_t * ha, int intr)
5986 {
5987         ips_scb_t *scb;
5988         int ret;
5989
5990         METHOD_TRACE("ips_clear_adapter", 1);
5991
5992         scb = &ha->scbs[ha->max_cmds - 1];
5993
5994         ips_init_scb(ha, scb);
5995
5996         scb->timeout = ips_reset_timeout;
5997         scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
5998
5999         scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
6000         scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
6001         scb->cmd.config_sync.channel = 0;
6002         scb->cmd.config_sync.source_target = IPS_POCL;
6003         scb->cmd.config_sync.reserved = 0;
6004         scb->cmd.config_sync.reserved2 = 0;
6005         scb->cmd.config_sync.reserved3 = 0;
6006
6007         /* issue command */
6008         if (((ret =
6009               ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
6010             || (ret == IPS_SUCCESS_IMM)
6011             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6012                 return (0);
6013
6014         /* send unlock stripe command */
6015         ips_init_scb(ha, scb);
6016
6017         scb->cdb[0] = IPS_CMD_ERROR_TABLE;
6018         scb->timeout = ips_reset_timeout;
6019
6020         scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
6021         scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
6022         scb->cmd.unlock_stripe.log_drv = 0;
6023         scb->cmd.unlock_stripe.control = IPS_CSL;
6024         scb->cmd.unlock_stripe.reserved = 0;
6025         scb->cmd.unlock_stripe.reserved2 = 0;
6026         scb->cmd.unlock_stripe.reserved3 = 0;
6027
6028         /* issue command */
6029         if (((ret =
6030               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6031             || (ret == IPS_SUCCESS_IMM)
6032             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6033                 return (0);
6034
6035         return (1);
6036 }
6037
6038 /****************************************************************************/
6039 /*                                                                          */
6040 /* Routine Name: ips_ffdc_reset                                             */
6041 /*                                                                          */
6042 /* Routine Description:                                                     */
6043 /*                                                                          */
6044 /*   FFDC: write reset info                                                 */
6045 /*                                                                          */
6046 /****************************************************************************/
6047 static void
6048 ips_ffdc_reset(ips_ha_t * ha, int intr)
6049 {
6050         ips_scb_t *scb;
6051
6052         METHOD_TRACE("ips_ffdc_reset", 1);
6053
6054         scb = &ha->scbs[ha->max_cmds - 1];
6055
6056         ips_init_scb(ha, scb);
6057
6058         scb->timeout = ips_cmd_timeout;
6059         scb->cdb[0] = IPS_CMD_FFDC;
6060         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6061         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6062         scb->cmd.ffdc.reset_count = ha->reset_count;
6063         scb->cmd.ffdc.reset_type = 0x80;
6064
6065         /* convert time to what the card wants */
6066         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6067
6068         /* issue command */
6069         ips_send_wait(ha, scb, ips_cmd_timeout, intr);
6070 }
6071
6072 /****************************************************************************/
6073 /*                                                                          */
6074 /* Routine Name: ips_ffdc_time                                              */
6075 /*                                                                          */
6076 /* Routine Description:                                                     */
6077 /*                                                                          */
6078 /*   FFDC: write time info                                                  */
6079 /*                                                                          */
6080 /****************************************************************************/
6081 static void
6082 ips_ffdc_time(ips_ha_t * ha)
6083 {
6084         ips_scb_t *scb;
6085
6086         METHOD_TRACE("ips_ffdc_time", 1);
6087
6088         DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
6089
6090         scb = &ha->scbs[ha->max_cmds - 1];
6091
6092         ips_init_scb(ha, scb);
6093
6094         scb->timeout = ips_cmd_timeout;
6095         scb->cdb[0] = IPS_CMD_FFDC;
6096         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6097         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6098         scb->cmd.ffdc.reset_count = 0;
6099         scb->cmd.ffdc.reset_type = 0;
6100
6101         /* convert time to what the card wants */
6102         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6103
6104         /* issue command */
6105         ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
6106 }
6107
6108 /****************************************************************************/
6109 /*                                                                          */
6110 /* Routine Name: ips_fix_ffdc_time                                          */
6111 /*                                                                          */
6112 /* Routine Description:                                                     */
6113 /*   Adjust time_t to what the card wants                                   */
6114 /*                                                                          */
6115 /****************************************************************************/
6116 static void
6117 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6118 {
6119         long days;
6120         long rem;
6121         int i;
6122         int year;
6123         int yleap;
6124         int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6125         int month_lengths[12][2] = { {31, 31},
6126         {28, 29},
6127         {31, 31},
6128         {30, 30},
6129         {31, 31},
6130         {30, 30},
6131         {31, 31},
6132         {31, 31},
6133         {30, 30},
6134         {31, 31},
6135         {30, 30},
6136         {31, 31}
6137         };
6138
6139         METHOD_TRACE("ips_fix_ffdc_time", 1);
6140
6141         days = current_time / IPS_SECS_DAY;
6142         rem = current_time % IPS_SECS_DAY;
6143
6144         scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6145         rem = rem % IPS_SECS_HOUR;
6146         scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6147         scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6148
6149         year = IPS_EPOCH_YEAR;
6150         while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6151                 int newy;
6152
6153                 newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6154                 if (days < 0)
6155                         --newy;
6156                 days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6157                     IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6158                     IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6159                 year = newy;
6160         }
6161
6162         scb->cmd.ffdc.yearH = year / 100;
6163         scb->cmd.ffdc.yearL = year % 100;
6164
6165         for (i = 0; days >= month_lengths[i][yleap]; ++i)
6166                 days -= month_lengths[i][yleap];
6167
6168         scb->cmd.ffdc.month = i + 1;
6169         scb->cmd.ffdc.day = days + 1;
6170 }
6171
6172 /****************************************************************************
6173  * BIOS Flash Routines                                                      *
6174  ****************************************************************************/
6175
6176 /****************************************************************************/
6177 /*                                                                          */
6178 /* Routine Name: ips_erase_bios                                             */
6179 /*                                                                          */
6180 /* Routine Description:                                                     */
6181 /*   Erase the BIOS on the adapter                                          */
6182 /*                                                                          */
6183 /****************************************************************************/
6184 static int
6185 ips_erase_bios(ips_ha_t * ha)
6186 {
6187         int timeout;
6188         uint8_t status = 0;
6189
6190         METHOD_TRACE("ips_erase_bios", 1);
6191
6192         status = 0;
6193
6194         /* Clear the status register */
6195         outl(0, ha->io_addr + IPS_REG_FLAP);
6196         if (ha->revision_id == IPS_REVID_TROMBONE64)
6197                 udelay(25);     /* 25 us */
6198
6199         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6200         if (ha->revision_id == IPS_REVID_TROMBONE64)
6201                 udelay(25);     /* 25 us */
6202
6203         /* Erase Setup */
6204         outb(0x20, ha->io_addr + IPS_REG_FLDP);
6205         if (ha->revision_id == IPS_REVID_TROMBONE64)
6206                 udelay(25);     /* 25 us */
6207
6208         /* Erase Confirm */
6209         outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6210         if (ha->revision_id == IPS_REVID_TROMBONE64)
6211                 udelay(25);     /* 25 us */
6212
6213         /* Erase Status */
6214         outb(0x70, ha->io_addr + IPS_REG_FLDP);
6215         if (ha->revision_id == IPS_REVID_TROMBONE64)
6216                 udelay(25);     /* 25 us */
6217
6218         timeout = 80000;        /* 80 seconds */
6219
6220         while (timeout > 0) {
6221                 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6222                         outl(0, ha->io_addr + IPS_REG_FLAP);
6223                         udelay(25);     /* 25 us */
6224                 }
6225
6226                 status = inb(ha->io_addr + IPS_REG_FLDP);
6227
6228                 if (status & 0x80)
6229                         break;
6230
6231                 MDELAY(1);
6232                 timeout--;
6233         }
6234
6235         /* check for timeout */
6236         if (timeout <= 0) {
6237                 /* timeout */
6238
6239                 /* try to suspend the erase */
6240                 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6241                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6242                         udelay(25);     /* 25 us */
6243
6244                 /* wait for 10 seconds */
6245                 timeout = 10000;
6246                 while (timeout > 0) {
6247                         if (ha->revision_id == IPS_REVID_TROMBONE64) {
6248                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6249                                 udelay(25);     /* 25 us */
6250                         }
6251
6252                         status = inb(ha->io_addr + IPS_REG_FLDP);
6253
6254                         if (status & 0xC0)
6255                                 break;
6256
6257                         MDELAY(1);
6258                         timeout--;
6259                 }
6260
6261                 return (1);
6262         }
6263
6264         /* check for valid VPP */
6265         if (status & 0x08)
6266                 /* VPP failure */
6267                 return (1);
6268
6269         /* check for successful flash */
6270         if (status & 0x30)
6271                 /* sequence error */
6272                 return (1);
6273
6274         /* Otherwise, we were successful */
6275         /* clear status */
6276         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6277         if (ha->revision_id == IPS_REVID_TROMBONE64)
6278                 udelay(25);     /* 25 us */
6279
6280         /* enable reads */
6281         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6282         if (ha->revision_id == IPS_REVID_TROMBONE64)
6283                 udelay(25);     /* 25 us */
6284
6285         return (0);
6286 }
6287
6288 /****************************************************************************/
6289 /*                                                                          */
6290 /* Routine Name: ips_erase_bios_memio                                       */
6291 /*                                                                          */
6292 /* Routine Description:                                                     */
6293 /*   Erase the BIOS on the adapter                                          */
6294 /*                                                                          */
6295 /****************************************************************************/
6296 static int
6297 ips_erase_bios_memio(ips_ha_t * ha)
6298 {
6299         int timeout;
6300         uint8_t status;
6301
6302         METHOD_TRACE("ips_erase_bios_memio", 1);
6303
6304         status = 0;
6305
6306         /* Clear the status register */
6307         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6308         if (ha->revision_id == IPS_REVID_TROMBONE64)
6309                 udelay(25);     /* 25 us */
6310
6311         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6312         if (ha->revision_id == IPS_REVID_TROMBONE64)
6313                 udelay(25);     /* 25 us */
6314
6315         /* Erase Setup */
6316         writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6317         if (ha->revision_id == IPS_REVID_TROMBONE64)
6318                 udelay(25);     /* 25 us */
6319
6320         /* Erase Confirm */
6321         writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6322         if (ha->revision_id == IPS_REVID_TROMBONE64)
6323                 udelay(25);     /* 25 us */
6324
6325         /* Erase Status */
6326         writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6327         if (ha->revision_id == IPS_REVID_TROMBONE64)
6328                 udelay(25);     /* 25 us */
6329
6330         timeout = 80000;        /* 80 seconds */
6331
6332         while (timeout > 0) {
6333                 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6334                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6335                         udelay(25);     /* 25 us */
6336                 }
6337
6338                 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6339
6340                 if (status & 0x80)
6341                         break;
6342
6343                 MDELAY(1);
6344                 timeout--;
6345         }
6346
6347         /* check for timeout */
6348         if (timeout <= 0) {
6349                 /* timeout */
6350
6351                 /* try to suspend the erase */
6352                 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6353                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6354                         udelay(25);     /* 25 us */
6355
6356                 /* wait for 10 seconds */
6357                 timeout = 10000;
6358                 while (timeout > 0) {
6359                         if (ha->revision_id == IPS_REVID_TROMBONE64) {
6360                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6361                                 udelay(25);     /* 25 us */
6362                         }
6363
6364                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6365
6366                         if (status & 0xC0)
6367                                 break;
6368
6369                         MDELAY(1);
6370                         timeout--;
6371                 }
6372
6373                 return (1);
6374         }
6375
6376         /* check for valid VPP */
6377         if (status & 0x08)
6378                 /* VPP failure */
6379                 return (1);
6380
6381         /* check for successful flash */
6382         if (status & 0x30)
6383                 /* sequence error */
6384                 return (1);
6385
6386         /* Otherwise, we were successful */
6387         /* clear status */
6388         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6389         if (ha->revision_id == IPS_REVID_TROMBONE64)
6390                 udelay(25);     /* 25 us */
6391
6392         /* enable reads */
6393         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6394         if (ha->revision_id == IPS_REVID_TROMBONE64)
6395                 udelay(25);     /* 25 us */
6396
6397         return (0);
6398 }
6399
6400 /****************************************************************************/
6401 /*                                                                          */
6402 /* Routine Name: ips_program_bios                                           */
6403 /*                                                                          */
6404 /* Routine Description:                                                     */
6405 /*   Program the BIOS on the adapter                                        */
6406 /*                                                                          */
6407 /****************************************************************************/
6408 static int
6409 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6410                  uint32_t offset)
6411 {
6412         int i;
6413         int timeout;
6414         uint8_t status = 0;
6415
6416         METHOD_TRACE("ips_program_bios", 1);
6417
6418         status = 0;
6419
6420         for (i = 0; i < buffersize; i++) {
6421                 /* write a byte */
6422                 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6423                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6424                         udelay(25);     /* 25 us */
6425
6426                 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6427                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6428                         udelay(25);     /* 25 us */
6429
6430                 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6431                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6432                         udelay(25);     /* 25 us */
6433
6434                 /* wait up to one second */
6435                 timeout = 1000;
6436                 while (timeout > 0) {
6437                         if (ha->revision_id == IPS_REVID_TROMBONE64) {
6438                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6439                                 udelay(25);     /* 25 us */
6440                         }
6441
6442                         status = inb(ha->io_addr + IPS_REG_FLDP);
6443
6444                         if (status & 0x80)
6445                                 break;
6446
6447                         MDELAY(1);
6448                         timeout--;
6449                 }
6450
6451                 if (timeout == 0) {
6452                         /* timeout error */
6453                         outl(0, ha->io_addr + IPS_REG_FLAP);
6454                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6455                                 udelay(25);     /* 25 us */
6456
6457                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6458                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6459                                 udelay(25);     /* 25 us */
6460
6461                         return (1);
6462                 }
6463
6464                 /* check the status */
6465                 if (status & 0x18) {
6466                         /* programming error */
6467                         outl(0, ha->io_addr + IPS_REG_FLAP);
6468                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6469                                 udelay(25);     /* 25 us */
6470
6471                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6472                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6473                                 udelay(25);     /* 25 us */
6474
6475                         return (1);
6476                 }
6477         }                       /* end for */
6478
6479         /* Enable reading */
6480         outl(0, ha->io_addr + IPS_REG_FLAP);
6481         if (ha->revision_id == IPS_REVID_TROMBONE64)
6482                 udelay(25);     /* 25 us */
6483
6484         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6485         if (ha->revision_id == IPS_REVID_TROMBONE64)
6486                 udelay(25);     /* 25 us */
6487
6488         return (0);
6489 }
6490
6491 /****************************************************************************/
6492 /*                                                                          */
6493 /* Routine Name: ips_program_bios_memio                                     */
6494 /*                                                                          */
6495 /* Routine Description:                                                     */
6496 /*   Program the BIOS on the adapter                                        */
6497 /*                                                                          */
6498 /****************************************************************************/
6499 static int
6500 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6501                        uint32_t offset)
6502 {
6503         int i;
6504         int timeout;
6505         uint8_t status = 0;
6506
6507         METHOD_TRACE("ips_program_bios_memio", 1);
6508
6509         status = 0;
6510
6511         for (i = 0; i < buffersize; i++) {
6512                 /* write a byte */
6513                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6514                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6515                         udelay(25);     /* 25 us */
6516
6517                 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6518                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6519                         udelay(25);     /* 25 us */
6520
6521                 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6522                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6523                         udelay(25);     /* 25 us */
6524
6525                 /* wait up to one second */
6526                 timeout = 1000;
6527                 while (timeout > 0) {
6528                         if (ha->revision_id == IPS_REVID_TROMBONE64) {
6529                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6530                                 udelay(25);     /* 25 us */
6531                         }
6532
6533                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6534
6535                         if (status & 0x80)
6536                                 break;
6537
6538                         MDELAY(1);
6539                         timeout--;
6540                 }
6541
6542                 if (timeout == 0) {
6543                         /* timeout error */
6544                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6545                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6546                                 udelay(25);     /* 25 us */
6547
6548                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6549                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6550                                 udelay(25);     /* 25 us */
6551
6552                         return (1);
6553                 }
6554
6555                 /* check the status */
6556                 if (status & 0x18) {
6557                         /* programming error */
6558                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6559                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6560                                 udelay(25);     /* 25 us */
6561
6562                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6563                         if (ha->revision_id == IPS_REVID_TROMBONE64)
6564                                 udelay(25);     /* 25 us */
6565
6566                         return (1);
6567                 }
6568         }                       /* end for */
6569
6570         /* Enable reading */
6571         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6572         if (ha->revision_id == IPS_REVID_TROMBONE64)
6573                 udelay(25);     /* 25 us */
6574
6575         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6576         if (ha->revision_id == IPS_REVID_TROMBONE64)
6577                 udelay(25);     /* 25 us */
6578
6579         return (0);
6580 }
6581
6582 /****************************************************************************/
6583 /*                                                                          */
6584 /* Routine Name: ips_verify_bios                                            */
6585 /*                                                                          */
6586 /* Routine Description:                                                     */
6587 /*   Verify the BIOS on the adapter                                         */
6588 /*                                                                          */
6589 /****************************************************************************/
6590 static int
6591 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6592                 uint32_t offset)
6593 {
6594         uint8_t checksum;
6595         int i;
6596
6597         METHOD_TRACE("ips_verify_bios", 1);
6598
6599         /* test 1st byte */
6600         outl(0, ha->io_addr + IPS_REG_FLAP);
6601         if (ha->revision_id == IPS_REVID_TROMBONE64)
6602                 udelay(25);     /* 25 us */
6603
6604         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6605                 return (1);
6606
6607         outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
6608         if (ha->revision_id == IPS_REVID_TROMBONE64)
6609                 udelay(25);     /* 25 us */
6610         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6611                 return (1);
6612
6613         checksum = 0xff;
6614         for (i = 2; i < buffersize; i++) {
6615
6616                 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6617                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6618                         udelay(25);     /* 25 us */
6619
6620                 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6621         }
6622
6623         if (checksum != 0)
6624                 /* failure */
6625                 return (1);
6626         else
6627                 /* success */
6628                 return (0);
6629 }
6630
6631 /****************************************************************************/
6632 /*                                                                          */
6633 /* Routine Name: ips_verify_bios_memio                                      */
6634 /*                                                                          */
6635 /* Routine Description:                                                     */
6636 /*   Verify the BIOS on the adapter                                         */
6637 /*                                                                          */
6638 /****************************************************************************/
6639 static int
6640 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6641                       uint32_t offset)
6642 {
6643         uint8_t checksum;
6644         int i;
6645
6646         METHOD_TRACE("ips_verify_bios_memio", 1);
6647
6648         /* test 1st byte */
6649         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6650         if (ha->revision_id == IPS_REVID_TROMBONE64)
6651                 udelay(25);     /* 25 us */
6652
6653         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6654                 return (1);
6655
6656         writel(1, ha->mem_ptr + IPS_REG_FLAP);
6657         if (ha->revision_id == IPS_REVID_TROMBONE64)
6658                 udelay(25);     /* 25 us */
6659         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6660                 return (1);
6661
6662         checksum = 0xff;
6663         for (i = 2; i < buffersize; i++) {
6664
6665                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6666                 if (ha->revision_id == IPS_REVID_TROMBONE64)
6667                         udelay(25);     /* 25 us */
6668
6669                 checksum =
6670                     (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6671         }
6672
6673         if (checksum != 0)
6674                 /* failure */
6675                 return (1);
6676         else
6677                 /* success */
6678                 return (0);
6679 }
6680
6681 /****************************************************************************/
6682 /*                                                                          */
6683 /* Routine Name: ips_abort_init                                             */
6684 /*                                                                          */
6685 /* Routine Description:                                                     */
6686 /*   cleanup routine for a failed adapter initialization                    */
6687 /****************************************************************************/
6688 static int
6689 ips_abort_init(ips_ha_t * ha, int index)
6690 {
6691         ha->active = 0;
6692         ips_free(ha);
6693         ips_ha[index] = NULL;
6694         ips_sh[index] = NULL;
6695         return -1;
6696 }
6697
6698 /****************************************************************************/
6699 /*                                                                          */
6700 /* Routine Name: ips_shift_controllers                                      */
6701 /*                                                                          */
6702 /* Routine Description:                                                     */
6703 /*   helper function for ordering adapters                                  */
6704 /****************************************************************************/
6705 static void
6706 ips_shift_controllers(int lowindex, int highindex)
6707 {
6708         ips_ha_t *ha_sav = ips_ha[highindex];
6709         struct Scsi_Host *sh_sav = ips_sh[highindex];
6710         int i;
6711
6712         for (i = highindex; i > lowindex; i--) {
6713                 ips_ha[i] = ips_ha[i - 1];
6714                 ips_sh[i] = ips_sh[i - 1];
6715                 ips_ha[i]->host_num = i;
6716         }
6717         ha_sav->host_num = lowindex;
6718         ips_ha[lowindex] = ha_sav;
6719         ips_sh[lowindex] = sh_sav;
6720 }
6721
6722 /****************************************************************************/
6723 /*                                                                          */
6724 /* Routine Name: ips_order_controllers                                      */
6725 /*                                                                          */
6726 /* Routine Description:                                                     */
6727 /*   place controllers is the "proper" boot order                           */
6728 /****************************************************************************/
6729 static void
6730 ips_order_controllers(void)
6731 {
6732         int i, j, tmp, position = 0;
6733         IPS_NVRAM_P5 *nvram;
6734         if (!ips_ha[0])
6735                 return;
6736         nvram = ips_ha[0]->nvram;
6737
6738         if (nvram->adapter_order[0]) {
6739                 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6740                         for (j = position; j < ips_num_controllers; j++) {
6741                                 switch (ips_ha[j]->ad_type) {
6742                                 case IPS_ADTYPE_SERVERAID6M:
6743                                 case IPS_ADTYPE_SERVERAID7M:
6744                                         if (nvram->adapter_order[i] == 'M') {
6745                                                 ips_shift_controllers(position,
6746                                                                       j);
6747                                                 position++;
6748                                         }
6749                                         break;
6750                                 case IPS_ADTYPE_SERVERAID4L:
6751                                 case IPS_ADTYPE_SERVERAID4M:
6752                                 case IPS_ADTYPE_SERVERAID4MX:
6753                                 case IPS_ADTYPE_SERVERAID4LX:
6754                                         if (nvram->adapter_order[i] == 'N') {
6755                                                 ips_shift_controllers(position,
6756                                                                       j);
6757                                                 position++;
6758                                         }
6759                                         break;
6760                                 case IPS_ADTYPE_SERVERAID6I:
6761                                 case IPS_ADTYPE_SERVERAID5I2:
6762                                 case IPS_ADTYPE_SERVERAID5I1:
6763                                 case IPS_ADTYPE_SERVERAID7k:
6764                                         if (nvram->adapter_order[i] == 'S') {
6765                                                 ips_shift_controllers(position,
6766                                                                       j);
6767                                                 position++;
6768                                         }
6769                                         break;
6770                                 case IPS_ADTYPE_SERVERAID:
6771                                 case IPS_ADTYPE_SERVERAID2:
6772                                 case IPS_ADTYPE_NAVAJO:
6773                                 case IPS_ADTYPE_KIOWA:
6774                                 case IPS_ADTYPE_SERVERAID3L:
6775                                 case IPS_ADTYPE_SERVERAID3:
6776                                 case IPS_ADTYPE_SERVERAID4H:
6777                                         if (nvram->adapter_order[i] == 'A') {
6778                                                 ips_shift_controllers(position,
6779                                                                       j);
6780                                                 position++;
6781                                         }
6782                                         break;
6783                                 default:
6784                                         break;
6785                                 }
6786                         }
6787                 }
6788                 /* if adapter_order[0], then ordering is complete */
6789                 return;
6790         }
6791         /* old bios, use older ordering */
6792         tmp = 0;
6793         for (i = position; i < ips_num_controllers; i++) {
6794                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6795                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6796                         ips_shift_controllers(position, i);
6797                         position++;
6798                         tmp = 1;
6799                 }
6800         }
6801         /* if there were no 5I cards, then don't do any extra ordering */
6802         if (!tmp)
6803                 return;
6804         for (i = position; i < ips_num_controllers; i++) {
6805                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6806                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6807                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6808                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6809                         ips_shift_controllers(position, i);
6810                         position++;
6811                 }
6812         }
6813
6814         return;
6815 }
6816
6817 /****************************************************************************/
6818 /*                                                                          */
6819 /* Routine Name: ips_register_scsi                                          */
6820 /*                                                                          */
6821 /* Routine Description:                                                     */
6822 /*   perform any registration and setup with the scsi layer                 */
6823 /****************************************************************************/
6824 static int
6825 ips_register_scsi(int index)
6826 {
6827         struct Scsi_Host *sh;
6828         ips_ha_t *ha, *oldha = ips_ha[index];
6829         sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
6830         if (!sh) {
6831                 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
6832                            "Unable to register controller with SCSI subsystem\n");
6833                 return -1;
6834         }
6835         ha = IPS_HA(sh);
6836         memcpy(ha, oldha, sizeof (ips_ha_t));
6837         free_irq(oldha->irq, oldha);
6838         /* Install the interrupt handler with the new ha */
6839         if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
6840                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
6841                            "Unable to install interrupt handler\n");
6842                 scsi_host_put(sh);
6843                 return -1;
6844         }
6845
6846         kfree(oldha);
6847         ips_sh[index] = sh;
6848         ips_ha[index] = ha;
6849
6850         /* Store away needed values for later use */
6851         sh->io_port = ha->io_addr;
6852         sh->n_io_port = ha->io_addr ? 255 : 0;
6853         sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
6854         sh->irq = ha->irq;
6855         sh->sg_tablesize = sh->hostt->sg_tablesize;
6856         sh->can_queue = sh->hostt->can_queue;
6857         sh->cmd_per_lun = sh->hostt->cmd_per_lun;
6858         sh->unchecked_isa_dma = sh->hostt->unchecked_isa_dma;
6859         sh->use_clustering = sh->hostt->use_clustering;
6860         sh->max_sectors = 128;
6861
6862         sh->max_id = ha->ntargets;
6863         sh->max_lun = ha->nlun;
6864         sh->max_channel = ha->nbus - 1;
6865         sh->can_queue = ha->max_cmds - 1;
6866
6867         scsi_add_host(sh, NULL);
6868         scsi_scan_host(sh);
6869
6870         return 0;
6871 }
6872
6873 /*---------------------------------------------------------------------------*/
6874 /*   Routine Name: ips_remove_device                                         */
6875 /*                                                                           */
6876 /*   Routine Description:                                                    */
6877 /*     Remove one Adapter ( Hot Plugging )                                   */
6878 /*---------------------------------------------------------------------------*/
6879 static void __devexit
6880 ips_remove_device(struct pci_dev *pci_dev)
6881 {
6882         int i;
6883         struct Scsi_Host *sh;
6884         ips_ha_t *ha;
6885
6886         for (i = 0; i < IPS_MAX_ADAPTERS; i++) {
6887                 ha = ips_ha[i];
6888                 if (ha) {
6889                         if ((pci_dev->bus->number == ha->pcidev->bus->number) &&
6890                             (pci_dev->devfn == ha->pcidev->devfn)) {
6891                                 sh = ips_sh[i];
6892                                 ips_release(sh);
6893                         }
6894                 }
6895         }
6896 }
6897
6898 /****************************************************************************/
6899 /*                                                                          */
6900 /* Routine Name: ips_module_init                                            */
6901 /*                                                                          */
6902 /* Routine Description:                                                     */
6903 /*   function called on module load                                         */
6904 /****************************************************************************/
6905 static int __init
6906 ips_module_init(void)
6907 {
6908         if (pci_register_driver(&ips_pci_driver) < 0)
6909                 return -ENODEV;
6910         ips_driver_template.module = THIS_MODULE;
6911         ips_order_controllers();
6912         if (!ips_detect(&ips_driver_template)) {
6913                 pci_unregister_driver(&ips_pci_driver);
6914                 return -ENODEV;
6915         }
6916         register_reboot_notifier(&ips_notifier);
6917         return 0;
6918 }
6919
6920 /****************************************************************************/
6921 /*                                                                          */
6922 /* Routine Name: ips_module_exit                                            */
6923 /*                                                                          */
6924 /* Routine Description:                                                     */
6925 /*   function called on module unload                                       */
6926 /****************************************************************************/
6927 static void __exit
6928 ips_module_exit(void)
6929 {
6930         pci_unregister_driver(&ips_pci_driver);
6931         unregister_reboot_notifier(&ips_notifier);
6932 }
6933
6934 module_init(ips_module_init);
6935 module_exit(ips_module_exit);
6936
6937 /*---------------------------------------------------------------------------*/
6938 /*   Routine Name: ips_insert_device                                         */
6939 /*                                                                           */
6940 /*   Routine Description:                                                    */
6941 /*     Add One Adapter ( Hot Plug )                                          */
6942 /*                                                                           */
6943 /*   Return Value:                                                           */
6944 /*     0 if Successful, else non-zero                                        */
6945 /*---------------------------------------------------------------------------*/
6946 static int __devinit
6947 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
6948 {
6949         int index;
6950         int rc;
6951
6952         METHOD_TRACE("ips_insert_device", 1);
6953         if (pci_enable_device(pci_dev))
6954                 return -1;
6955
6956         rc = ips_init_phase1(pci_dev, &index);
6957         if (rc == SUCCESS)
6958                 rc = ips_init_phase2(index);
6959
6960         if (ips_hotplug)
6961                 if (ips_register_scsi(index)) {
6962                         ips_free(ips_ha[index]);
6963                         rc = -1;
6964                 }
6965
6966         if (rc == SUCCESS)
6967                 ips_num_controllers++;
6968
6969         ips_next_controller = ips_num_controllers;
6970         return rc;
6971 }
6972
6973 /*---------------------------------------------------------------------------*/
6974 /*   Routine Name: ips_init_phase1                                           */
6975 /*                                                                           */
6976 /*   Routine Description:                                                    */
6977 /*     Adapter Initialization                                                */
6978 /*                                                                           */
6979 /*   Return Value:                                                           */
6980 /*     0 if Successful, else non-zero                                        */
6981 /*---------------------------------------------------------------------------*/
6982 static int
6983 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
6984 {
6985         ips_ha_t *ha;
6986         uint32_t io_addr;
6987         uint32_t mem_addr;
6988         uint32_t io_len;
6989         uint32_t mem_len;
6990         uint8_t bus;
6991         uint8_t func;
6992         uint8_t irq;
6993         uint16_t subdevice_id;
6994         int j;
6995         int index;
6996         dma_addr_t dma_address;
6997         char __iomem *ioremap_ptr;
6998         char __iomem *mem_ptr;
6999         uint32_t IsDead;
7000
7001         METHOD_TRACE("ips_init_phase1", 1);
7002         index = IPS_MAX_ADAPTERS;
7003         for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
7004                 if (ips_ha[j] == 0) {
7005                         index = j;
7006                         break;
7007                 }
7008         }
7009
7010         if (index >= IPS_MAX_ADAPTERS)
7011                 return -1;
7012
7013         /* stuff that we get in dev */
7014         irq = pci_dev->irq;
7015         bus = pci_dev->bus->number;
7016         func = pci_dev->devfn;
7017
7018         /* Init MEM/IO addresses to 0 */
7019         mem_addr = 0;
7020         io_addr = 0;
7021         mem_len = 0;
7022         io_len = 0;
7023
7024         for (j = 0; j < 2; j++) {
7025                 if (!pci_resource_start(pci_dev, j))
7026                         break;
7027
7028                 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
7029                         io_addr = pci_resource_start(pci_dev, j);
7030                         io_len = pci_resource_len(pci_dev, j);
7031                 } else {
7032                         mem_addr = pci_resource_start(pci_dev, j);
7033                         mem_len = pci_resource_len(pci_dev, j);
7034                 }
7035         }
7036
7037         /* setup memory mapped area (if applicable) */
7038         if (mem_addr) {
7039                 uint32_t base;
7040                 uint32_t offs;
7041
7042                 if (!request_mem_region(mem_addr, mem_len, "ips")) {
7043                         IPS_PRINTK(KERN_WARNING, pci_dev,
7044                                    "Couldn't allocate IO Memory space %x len %d.\n",
7045                                    mem_addr, mem_len);
7046                         return -1;
7047                 }
7048
7049                 base = mem_addr & PAGE_MASK;
7050                 offs = mem_addr - base;
7051                 ioremap_ptr = ioremap(base, PAGE_SIZE);
7052                 mem_ptr = ioremap_ptr + offs;
7053         } else {
7054                 ioremap_ptr = NULL;
7055                 mem_ptr = NULL;
7056         }
7057
7058         /* setup I/O mapped area (if applicable) */
7059         if (io_addr) {
7060                 if (!request_region(io_addr, io_len, "ips")) {
7061                         IPS_PRINTK(KERN_WARNING, pci_dev,
7062                                    "Couldn't allocate IO space %x len %d.\n",
7063                                    io_addr, io_len);
7064                         return -1;
7065                 }
7066         }
7067
7068         subdevice_id = pci_dev->subsystem_device;
7069
7070         /* found a controller */
7071         ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL);
7072         if (ha == NULL) {
7073                 IPS_PRINTK(KERN_WARNING, pci_dev,
7074                            "Unable to allocate temporary ha struct\n");
7075                 return -1;
7076         }
7077
7078
7079         ips_sh[index] = NULL;
7080         ips_ha[index] = ha;
7081         ha->active = 1;
7082
7083         /* Store info in HA structure */
7084         ha->irq = irq;
7085         ha->io_addr = io_addr;
7086         ha->io_len = io_len;
7087         ha->mem_addr = mem_addr;
7088         ha->mem_len = mem_len;
7089         ha->mem_ptr = mem_ptr;
7090         ha->ioremap_ptr = ioremap_ptr;
7091         ha->host_num = (uint32_t) index;
7092         ha->revision_id = pci_dev->revision;
7093         ha->slot_num = PCI_SLOT(pci_dev->devfn);
7094         ha->device_id = pci_dev->device;
7095         ha->subdevice_id = subdevice_id;
7096         ha->pcidev = pci_dev;
7097
7098         /*
7099          * Set the pci_dev's dma_mask.  Not all adapters support 64bit
7100          * addressing so don't enable it if the adapter can't support
7101          * it!  Also, don't use 64bit addressing if dma addresses
7102          * are guaranteed to be < 4G.
7103          */
7104         if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
7105             !pci_set_dma_mask(ha->pcidev, DMA_64BIT_MASK)) {
7106                 (ha)->flags |= IPS_HA_ENH_SG;
7107         } else {
7108                 if (pci_set_dma_mask(ha->pcidev, DMA_32BIT_MASK) != 0) {
7109                         printk(KERN_WARNING "Unable to set DMA Mask\n");
7110                         return ips_abort_init(ha, index);
7111                 }
7112         }
7113         if(ips_cd_boot && !ips_FlashData){
7114                 ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
7115                                                      &ips_flashbusaddr);
7116         }
7117
7118         ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
7119                                        &ha->enq_busaddr);
7120         if (!ha->enq) {
7121                 IPS_PRINTK(KERN_WARNING, pci_dev,
7122                            "Unable to allocate host inquiry structure\n");
7123                 return ips_abort_init(ha, index);
7124         }
7125
7126         ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7127                                          sizeof (IPS_IO_CMD), &dma_address);
7128         if (!ha->adapt) {
7129                 IPS_PRINTK(KERN_WARNING, pci_dev,
7130                            "Unable to allocate host adapt & dummy structures\n");
7131                 return ips_abort_init(ha, index);
7132         }
7133         ha->adapt->hw_status_start = dma_address;
7134         ha->dummy = (void *) (ha->adapt + 1);
7135
7136
7137
7138         ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7139         if (!ha->logical_drive_info) {
7140                 IPS_PRINTK(KERN_WARNING, pci_dev,
7141                            "Unable to allocate logical drive info structure\n");
7142                 return ips_abort_init(ha, index);
7143         }
7144         ha->logical_drive_info_dma_addr = dma_address;
7145
7146
7147         ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7148
7149         if (!ha->conf) {
7150                 IPS_PRINTK(KERN_WARNING, pci_dev,
7151                            "Unable to allocate host conf structure\n");
7152                 return ips_abort_init(ha, index);
7153         }
7154
7155         ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7156
7157         if (!ha->nvram) {
7158                 IPS_PRINTK(KERN_WARNING, pci_dev,
7159                            "Unable to allocate host NVRAM structure\n");
7160                 return ips_abort_init(ha, index);
7161         }
7162
7163         ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7164
7165         if (!ha->subsys) {
7166                 IPS_PRINTK(KERN_WARNING, pci_dev,
7167                            "Unable to allocate host subsystem structure\n");
7168                 return ips_abort_init(ha, index);
7169         }
7170
7171         /* the ioctl buffer is now used during adapter initialization, so its
7172          * successful allocation is now required */
7173         if (ips_ioctlsize < PAGE_SIZE)
7174                 ips_ioctlsize = PAGE_SIZE;
7175
7176         ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7177                                               &ha->ioctl_busaddr);
7178         ha->ioctl_len = ips_ioctlsize;
7179         if (!ha->ioctl_data) {
7180                 IPS_PRINTK(KERN_WARNING, pci_dev,
7181                            "Unable to allocate IOCTL data\n");
7182                 return ips_abort_init(ha, index);
7183         }
7184
7185         /*
7186          * Setup Functions
7187          */
7188         ips_setup_funclist(ha);
7189
7190         if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7191                 /* If Morpheus appears dead, reset it */
7192                 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7193                 if (IsDead == 0xDEADBEEF) {
7194                         ips_reset_morpheus(ha);
7195                 }
7196         }
7197
7198         /*
7199          * Initialize the card if it isn't already
7200          */
7201
7202         if (!(*ha->func.isinit) (ha)) {
7203                 if (!(*ha->func.init) (ha)) {
7204                         /*
7205                          * Initialization failed
7206                          */
7207                         IPS_PRINTK(KERN_WARNING, pci_dev,
7208                                    "Unable to initialize controller\n");
7209                         return ips_abort_init(ha, index);
7210                 }
7211         }
7212
7213         *indexPtr = index;
7214         return SUCCESS;
7215 }
7216
7217 /*---------------------------------------------------------------------------*/
7218 /*   Routine Name: ips_init_phase2                                           */
7219 /*                                                                           */
7220 /*   Routine Description:                                                    */
7221 /*     Adapter Initialization Phase 2                                        */
7222 /*                                                                           */
7223 /*   Return Value:                                                           */
7224 /*     0 if Successful, else non-zero                                        */
7225 /*---------------------------------------------------------------------------*/
7226 static int
7227 ips_init_phase2(int index)
7228 {
7229         ips_ha_t *ha;
7230
7231         ha = ips_ha[index];
7232
7233         METHOD_TRACE("ips_init_phase2", 1);
7234         if (!ha->active) {
7235                 ips_ha[index] = NULL;
7236                 return -1;
7237         }
7238
7239         /* Install the interrupt handler */
7240         if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
7241                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7242                            "Unable to install interrupt handler\n");
7243                 return ips_abort_init(ha, index);
7244         }
7245
7246         /*
7247          * Allocate a temporary SCB for initialization
7248          */
7249         ha->max_cmds = 1;
7250         if (!ips_allocatescbs(ha)) {
7251                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7252                            "Unable to allocate a CCB\n");
7253                 free_irq(ha->irq, ha);
7254                 return ips_abort_init(ha, index);
7255         }
7256
7257         if (!ips_hainit(ha)) {
7258                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7259                            "Unable to initialize controller\n");
7260                 free_irq(ha->irq, ha);
7261                 return ips_abort_init(ha, index);
7262         }
7263         /* Free the temporary SCB */
7264         ips_deallocatescbs(ha, 1);
7265
7266         /* allocate CCBs */
7267         if (!ips_allocatescbs(ha)) {
7268                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7269                            "Unable to allocate CCBs\n");
7270                 free_irq(ha->irq, ha);
7271                 return ips_abort_init(ha, index);
7272         }
7273
7274         return SUCCESS;
7275 }
7276
7277 MODULE_LICENSE("GPL");
7278 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7279 MODULE_VERSION(IPS_VER_STRING);
7280
7281
7282 /*
7283  * Overrides for Emacs so that we almost follow Linus's tabbing style.
7284  * Emacs will notice this stuff at the end of the file and automatically
7285  * adjust the settings for this buffer only.  This must remain at the end
7286  * of the file.
7287  * ---------------------------------------------------------------------------
7288  * Local variables:
7289  * c-indent-level: 2
7290  * c-brace-imaginary-offset: 0
7291  * c-brace-offset: -2
7292  * c-argdecl-indent: 2
7293  * c-label-offset: -2
7294  * c-continued-statement-offset: 2
7295  * c-continued-brace-offset: 0
7296  * indent-tabs-mode: nil
7297  * tab-width: 8
7298  * End:
7299  */