2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
33 #include <linux/mutex.h>
34 #include <linux/linux_logo.h>
36 #include <asm/spu_priv1.h>
39 #include "spu_priv1_mmio.h"
41 const struct spu_management_ops *spu_management_ops;
42 EXPORT_SYMBOL_GPL(spu_management_ops);
44 const struct spu_priv1_ops *spu_priv1_ops;
46 static LIST_HEAD(spu_full_list);
47 static DEFINE_MUTEX(spu_mutex);
48 static DEFINE_SPINLOCK(spu_list_lock);
50 EXPORT_SYMBOL_GPL(spu_priv1_ops);
52 void spu_invalidate_slbs(struct spu *spu)
54 struct spu_priv2 __iomem *priv2 = spu->priv2;
56 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
57 out_be64(&priv2->slb_invalidate_all_W, 0UL);
59 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
61 /* This is called by the MM core when a segment size is changed, to
62 * request a flush of all the SPEs using a given mm
64 void spu_flush_all_slbs(struct mm_struct *mm)
69 spin_lock_irqsave(&spu_list_lock, flags);
70 list_for_each_entry(spu, &spu_full_list, full_list) {
72 spu_invalidate_slbs(spu);
74 spin_unlock_irqrestore(&spu_list_lock, flags);
77 /* The hack below stinks... try to do something better one of
78 * these days... Does it even work properly with NR_CPUS == 1 ?
80 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
82 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
84 /* Global TLBIE broadcast required with SPEs. */
85 __cpus_setall(&mm->cpu_vm_mask, nr);
88 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
92 spin_lock_irqsave(&spu_list_lock, flags);
94 spin_unlock_irqrestore(&spu_list_lock, flags);
96 mm_needs_global_tlbie(mm);
98 EXPORT_SYMBOL_GPL(spu_associate_mm);
100 static int __spu_trap_invalid_dma(struct spu *spu)
102 pr_debug("%s\n", __FUNCTION__);
103 spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
107 static int __spu_trap_dma_align(struct spu *spu)
109 pr_debug("%s\n", __FUNCTION__);
110 spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
114 static int __spu_trap_error(struct spu *spu)
116 pr_debug("%s\n", __FUNCTION__);
117 spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
121 static void spu_restart_dma(struct spu *spu)
123 struct spu_priv2 __iomem *priv2 = spu->priv2;
125 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
126 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
129 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
131 struct spu_priv2 __iomem *priv2 = spu->priv2;
132 struct mm_struct *mm = spu->mm;
136 pr_debug("%s\n", __FUNCTION__);
138 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
139 /* SLBs are pre-loaded for context switch, so
140 * we should never get here!
142 printk("%s: invalid access during switch!\n", __func__);
145 esid = (ea & ESID_MASK) | SLB_ESID_V;
147 switch(REGION_ID(ea)) {
149 #ifdef CONFIG_PPC_MM_SLICES
150 psize = get_slice_psize(mm, ea);
152 psize = mm->context.user_psize;
154 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
157 case VMALLOC_REGION_ID:
158 if (ea < VMALLOC_END)
159 psize = mmu_vmalloc_psize;
161 psize = mmu_io_psize;
162 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
165 case KERNEL_REGION_ID:
166 psize = mmu_linear_psize;
167 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
171 /* Future: support kernel segments so that drivers
174 pr_debug("invalid region access at %016lx\n", ea);
177 llp = mmu_psize_defs[psize].sllp;
179 out_be64(&priv2->slb_index_W, spu->slb_replace);
180 out_be64(&priv2->slb_vsid_RW, vsid | llp);
181 out_be64(&priv2->slb_esid_RW, esid);
184 if (spu->slb_replace >= 8)
185 spu->slb_replace = 0;
187 spu_restart_dma(spu);
188 spu->stats.slb_flt++;
192 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
193 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
195 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
197 /* Handle kernel space hash faults immediately.
198 User hash faults need to be deferred to process context. */
199 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
200 && REGION_ID(ea) != USER_REGION_ID
201 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
202 spu_restart_dma(spu);
206 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
207 printk("%s: invalid access during switch!\n", __func__);
214 spu->stop_callback(spu);
219 spu_irq_class_0(int irq, void *data)
224 spu->class_0_pending = 1;
225 spu->stop_callback(spu);
231 spu_irq_class_0_bottom(struct spu *spu)
233 unsigned long stat, mask;
236 spu->class_0_pending = 0;
238 spin_lock_irqsave(&spu->register_lock, flags);
239 mask = spu_int_mask_get(spu, 0);
240 stat = spu_int_stat_get(spu, 0);
244 if (stat & 1) /* invalid DMA alignment */
245 __spu_trap_dma_align(spu);
247 if (stat & 2) /* invalid MFC DMA */
248 __spu_trap_invalid_dma(spu);
250 if (stat & 4) /* error on SPU */
251 __spu_trap_error(spu);
253 spu_int_stat_clear(spu, 0, stat);
254 spin_unlock_irqrestore(&spu->register_lock, flags);
256 return (stat & 0x7) ? -EIO : 0;
258 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
261 spu_irq_class_1(int irq, void *data)
264 unsigned long stat, mask, dar, dsisr;
268 /* atomically read & clear class1 status. */
269 spin_lock(&spu->register_lock);
270 mask = spu_int_mask_get(spu, 1);
271 stat = spu_int_stat_get(spu, 1) & mask;
272 dar = spu_mfc_dar_get(spu);
273 dsisr = spu_mfc_dsisr_get(spu);
274 if (stat & 2) /* mapping fault */
275 spu_mfc_dsisr_set(spu, 0ul);
276 spu_int_stat_clear(spu, 1, stat);
277 spin_unlock(&spu->register_lock);
278 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
281 if (stat & 1) /* segment fault */
282 __spu_trap_data_seg(spu, dar);
284 if (stat & 2) { /* mapping fault */
285 __spu_trap_data_map(spu, dar, dsisr);
288 if (stat & 4) /* ls compare & suspend on get */
291 if (stat & 8) /* ls compare & suspend on put */
294 return stat ? IRQ_HANDLED : IRQ_NONE;
298 spu_irq_class_2(int irq, void *data)
305 spin_lock(&spu->register_lock);
306 stat = spu_int_stat_get(spu, 2);
307 mask = spu_int_mask_get(spu, 2);
308 /* ignore interrupts we're not waiting for */
311 * mailbox interrupts (0x1 and 0x10) are level triggered.
312 * mask them now before acknowledging.
315 spu_int_mask_and(spu, 2, ~(stat & 0x11));
316 /* acknowledge all interrupts before the callbacks */
317 spu_int_stat_clear(spu, 2, stat);
318 spin_unlock(&spu->register_lock);
320 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
322 if (stat & 1) /* PPC core mailbox */
323 spu->ibox_callback(spu);
325 if (stat & 2) /* SPU stop-and-signal */
326 spu->stop_callback(spu);
328 if (stat & 4) /* SPU halted */
329 spu->stop_callback(spu);
331 if (stat & 8) /* DMA tag group complete */
332 spu->mfc_callback(spu);
334 if (stat & 0x10) /* SPU mailbox threshold */
335 spu->wbox_callback(spu);
337 spu->stats.class2_intr++;
338 return stat ? IRQ_HANDLED : IRQ_NONE;
341 static int spu_request_irqs(struct spu *spu)
345 if (spu->irqs[0] != NO_IRQ) {
346 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
348 ret = request_irq(spu->irqs[0], spu_irq_class_0,
354 if (spu->irqs[1] != NO_IRQ) {
355 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
357 ret = request_irq(spu->irqs[1], spu_irq_class_1,
363 if (spu->irqs[2] != NO_IRQ) {
364 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
366 ret = request_irq(spu->irqs[2], spu_irq_class_2,
375 if (spu->irqs[1] != NO_IRQ)
376 free_irq(spu->irqs[1], spu);
378 if (spu->irqs[0] != NO_IRQ)
379 free_irq(spu->irqs[0], spu);
384 static void spu_free_irqs(struct spu *spu)
386 if (spu->irqs[0] != NO_IRQ)
387 free_irq(spu->irqs[0], spu);
388 if (spu->irqs[1] != NO_IRQ)
389 free_irq(spu->irqs[1], spu);
390 if (spu->irqs[2] != NO_IRQ)
391 free_irq(spu->irqs[2], spu);
394 static void spu_init_channels(struct spu *spu)
396 static const struct {
400 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
401 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
403 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
404 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
405 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
407 struct spu_priv2 __iomem *priv2;
412 /* initialize all channel data to zero */
413 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
416 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
417 for (count = 0; count < zero_list[i].count; count++)
418 out_be64(&priv2->spu_chnldata_RW, 0);
421 /* initialize channel counts to meaningful values */
422 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
423 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
424 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
428 struct spu *spu_alloc_spu(struct spu *req_spu)
430 struct spu *spu, *ret = NULL;
432 mutex_lock(&spu_mutex);
433 list_for_each_entry(spu, &cbe_spu_info[req_spu->node].free_spus, list) {
434 if (spu == req_spu) {
435 list_del_init(&spu->list);
436 pr_debug("Got SPU %d %d\n", spu->number, spu->node);
437 spu_init_channels(spu);
442 mutex_unlock(&spu_mutex);
445 EXPORT_SYMBOL_GPL(spu_alloc_spu);
447 struct spu *spu_alloc_node(int node)
449 struct spu *spu = NULL;
451 mutex_lock(&spu_mutex);
452 if (!list_empty(&cbe_spu_info[node].free_spus)) {
453 spu = list_entry(cbe_spu_info[node].free_spus.next, struct spu,
455 list_del_init(&spu->list);
456 pr_debug("Got SPU %d %d\n", spu->number, spu->node);
458 mutex_unlock(&spu_mutex);
461 spu_init_channels(spu);
464 EXPORT_SYMBOL_GPL(spu_alloc_node);
466 struct spu *spu_alloc(void)
468 struct spu *spu = NULL;
471 for (node = 0; node < MAX_NUMNODES; node++) {
472 spu = spu_alloc_node(node);
480 void spu_free(struct spu *spu)
482 mutex_lock(&spu_mutex);
483 list_add_tail(&spu->list, &cbe_spu_info[spu->node].free_spus);
484 mutex_unlock(&spu_mutex);
486 EXPORT_SYMBOL_GPL(spu_free);
488 static int spu_shutdown(struct sys_device *sysdev)
490 struct spu *spu = container_of(sysdev, struct spu, sysdev);
493 spu_destroy_spu(spu);
497 struct sysdev_class spu_sysdev_class = {
498 set_kset_name("spu"),
499 .shutdown = spu_shutdown,
502 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
505 mutex_lock(&spu_mutex);
507 list_for_each_entry(spu, &spu_full_list, full_list)
508 sysdev_create_file(&spu->sysdev, attr);
510 mutex_unlock(&spu_mutex);
513 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
515 int spu_add_sysdev_attr_group(struct attribute_group *attrs)
518 mutex_lock(&spu_mutex);
520 list_for_each_entry(spu, &spu_full_list, full_list)
521 sysfs_create_group(&spu->sysdev.kobj, attrs);
523 mutex_unlock(&spu_mutex);
526 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
529 void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
532 mutex_lock(&spu_mutex);
534 list_for_each_entry(spu, &spu_full_list, full_list)
535 sysdev_remove_file(&spu->sysdev, attr);
537 mutex_unlock(&spu_mutex);
539 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
541 void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
544 mutex_lock(&spu_mutex);
546 list_for_each_entry(spu, &spu_full_list, full_list)
547 sysfs_remove_group(&spu->sysdev.kobj, attrs);
549 mutex_unlock(&spu_mutex);
551 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
553 static int spu_create_sysdev(struct spu *spu)
557 spu->sysdev.id = spu->number;
558 spu->sysdev.cls = &spu_sysdev_class;
559 ret = sysdev_register(&spu->sysdev);
561 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
566 sysfs_add_device_to_node(&spu->sysdev, spu->node);
571 static int __init create_spu(void *data)
580 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
584 spin_lock_init(&spu->register_lock);
585 mutex_lock(&spu_mutex);
586 spu->number = number++;
587 mutex_unlock(&spu_mutex);
589 ret = spu_create_spu(spu, data);
594 spu_mfc_sdr_setup(spu);
595 spu_mfc_sr1_set(spu, 0x33);
596 ret = spu_request_irqs(spu);
600 ret = spu_create_sysdev(spu);
604 mutex_lock(&spu_mutex);
605 spin_lock_irqsave(&spu_list_lock, flags);
606 list_add(&spu->list, &cbe_spu_info[spu->node].free_spus);
607 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
608 cbe_spu_info[spu->node].n_spus++;
609 list_add(&spu->full_list, &spu_full_list);
610 spin_unlock_irqrestore(&spu_list_lock, flags);
611 mutex_unlock(&spu_mutex);
613 spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
615 spu->stats.tstamp = timespec_to_ns(&ts);
617 INIT_LIST_HEAD(&spu->aff_list);
624 spu_destroy_spu(spu);
631 static const char *spu_state_names[] = {
632 "user", "system", "iowait", "idle"
635 static unsigned long long spu_acct_time(struct spu *spu,
636 enum spu_utilization_state state)
639 unsigned long long time = spu->stats.times[state];
642 * If the spu is idle or the context is stopped, utilization
643 * statistics are not updated. Apply the time delta from the
644 * last recorded state of the spu.
646 if (spu->stats.util_state == state) {
648 time += timespec_to_ns(&ts) - spu->stats.tstamp;
651 return time / NSEC_PER_MSEC;
655 static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
657 struct spu *spu = container_of(sysdev, struct spu, sysdev);
659 return sprintf(buf, "%s %llu %llu %llu %llu "
660 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
661 spu_state_names[spu->stats.util_state],
662 spu_acct_time(spu, SPU_UTIL_USER),
663 spu_acct_time(spu, SPU_UTIL_SYSTEM),
664 spu_acct_time(spu, SPU_UTIL_IOWAIT),
665 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
666 spu->stats.vol_ctx_switch,
667 spu->stats.invol_ctx_switch,
672 spu->stats.class2_intr,
673 spu->stats.libassist);
676 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
678 struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
679 EXPORT_SYMBOL_GPL(cbe_spu_info);
681 /* Hardcoded affinity idxs for QS20 */
682 #define SPES_PER_BE 8
683 static int QS20_reg_idxs[SPES_PER_BE] = { 0, 2, 4, 6, 7, 5, 3, 1 };
684 static int QS20_reg_memory[SPES_PER_BE] = { 1, 1, 0, 0, 0, 0, 0, 0 };
686 static struct spu *spu_lookup_reg(int node, u32 reg)
690 list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
691 if (*(u32 *)get_property(spu_devnode(spu), "reg", NULL) == reg)
697 static void init_aff_QS20_harcoded(void)
700 struct spu *last_spu, *spu;
703 for (node = 0; node < MAX_NUMNODES; node++) {
705 for (i = 0; i < SPES_PER_BE; i++) {
706 reg = QS20_reg_idxs[i];
707 spu = spu_lookup_reg(node, reg);
710 spu->has_mem_affinity = QS20_reg_memory[reg];
712 list_add_tail(&spu->aff_list,
713 &last_spu->aff_list);
719 static int of_has_vicinity(void)
723 spu = list_entry(cbe_spu_info[0].spus.next, struct spu, cbe_list);
724 return of_find_property(spu_devnode(spu), "vicinity", NULL) != NULL;
727 static struct spu *aff_devnode_spu(int cbe, struct device_node *dn)
731 list_for_each_entry(spu, &cbe_spu_info[cbe].spus, cbe_list)
732 if (spu_devnode(spu) == dn)
738 aff_node_next_to(int cbe, struct device_node *target, struct device_node *avoid)
741 const phandle *vic_handles;
744 list_for_each_entry(spu, &cbe_spu_info[cbe].spus, cbe_list) {
745 if (spu_devnode(spu) == avoid)
747 vic_handles = get_property(spu_devnode(spu), "vicinity", &lenp);
748 for (i=0; i < (lenp / sizeof(phandle)); i++) {
749 if (vic_handles[i] == target->linux_phandle)
756 static void init_aff_fw_vicinity_node(int cbe)
758 struct spu *spu, *last_spu;
759 struct device_node *vic_dn, *last_spu_dn;
761 const phandle *vic_handles;
763 int lenp, i, added, mem_aff;
765 last_spu = list_entry(cbe_spu_info[cbe].spus.next, struct spu, cbe_list);
767 for (added = 1; added < cbe_spu_info[cbe].n_spus; added++) {
768 last_spu_dn = spu_devnode(last_spu);
769 vic_handles = get_property(last_spu_dn, "vicinity", &lenp);
771 for (i = 0; i < (lenp / sizeof(phandle)); i++) {
772 if (vic_handles[i] == avoid_ph)
775 vic_dn = of_find_node_by_phandle(vic_handles[i]);
779 name = get_property(vic_dn, "name", NULL);
780 if (strcmp(name, "spe") == 0) {
781 spu = aff_devnode_spu(cbe, vic_dn);
782 avoid_ph = last_spu_dn->linux_phandle;
785 mem_aff = strcmp(name, "mic-tm") == 0;
786 spu = aff_node_next_to(cbe, vic_dn, last_spu_dn);
790 last_spu->has_mem_affinity = 1;
791 spu->has_mem_affinity = 1;
793 avoid_ph = vic_dn->linux_phandle;
795 list_add_tail(&spu->aff_list, &last_spu->aff_list);
802 static void init_aff_fw_vicinity(void)
806 /* sets has_mem_affinity for each spu, as long as the
807 * spu->aff_list list, linking each spu to its neighbors
809 for (cbe = 0; cbe < MAX_NUMNODES; cbe++)
810 init_aff_fw_vicinity_node(cbe);
813 static int __init init_spu_base(void)
817 for (i = 0; i < MAX_NUMNODES; i++) {
818 INIT_LIST_HEAD(&cbe_spu_info[i].spus);
819 INIT_LIST_HEAD(&cbe_spu_info[i].free_spus);
822 if (!spu_management_ops)
825 /* create sysdev class for spus */
826 ret = sysdev_class_register(&spu_sysdev_class);
830 ret = spu_enumerate_spus(create_spu);
833 printk(KERN_WARNING "%s: Error initializing spus\n",
835 goto out_unregister_sysdev_class;
840 * We cannot put the forward declaration in
841 * <linux/linux_logo.h> because of conflicting session type
842 * conflicts for const and __initdata with different compiler
845 extern const struct linux_logo logo_spe_clut224;
847 fb_append_extra_logo(&logo_spe_clut224, ret);
850 xmon_register_spus(&spu_full_list);
851 crash_register_spus(&spu_full_list);
852 spu_add_sysdev_attr(&attr_stat);
854 if (of_has_vicinity()) {
855 init_aff_fw_vicinity();
857 long root = of_get_flat_dt_root();
858 if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
859 init_aff_QS20_harcoded();
864 out_unregister_sysdev_class:
865 sysdev_class_unregister(&spu_sysdev_class);
869 module_init(init_spu_base);
871 MODULE_LICENSE("GPL");
872 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");