iwlwifi: differentiate 4965 and 5000 hw ampdu queues number
[linux-2.6] / drivers / net / wireless / rtl8187_dev.c
1 /*
2  * Linux device driver for RTL8187
3  *
4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6  *
7  * Based on the r8187 driver, which is:
8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9  *
10  * Magic delays and register offsets below are taken from the original
11  * r8187 driver sources.  Thanks to Realtek for their support!
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  */
17
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8187.h"
26 #include "rtl8187_rtl8225.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
31 MODULE_LICENSE("GPL");
32
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
34         /* Realtek */
35         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
36         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
37         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
38         /* Netgear */
39         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
40         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
41         /* HP */
42         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
43         /* Sitecom */
44         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
45         {}
46 };
47
48 MODULE_DEVICE_TABLE(usb, rtl8187_table);
49
50 static const struct ieee80211_rate rtl818x_rates[] = {
51         { .bitrate = 10, .hw_value = 0, },
52         { .bitrate = 20, .hw_value = 1, },
53         { .bitrate = 55, .hw_value = 2, },
54         { .bitrate = 110, .hw_value = 3, },
55         { .bitrate = 60, .hw_value = 4, },
56         { .bitrate = 90, .hw_value = 5, },
57         { .bitrate = 120, .hw_value = 6, },
58         { .bitrate = 180, .hw_value = 7, },
59         { .bitrate = 240, .hw_value = 8, },
60         { .bitrate = 360, .hw_value = 9, },
61         { .bitrate = 480, .hw_value = 10, },
62         { .bitrate = 540, .hw_value = 11, },
63 };
64
65 static const struct ieee80211_channel rtl818x_channels[] = {
66         { .center_freq = 2412 },
67         { .center_freq = 2417 },
68         { .center_freq = 2422 },
69         { .center_freq = 2427 },
70         { .center_freq = 2432 },
71         { .center_freq = 2437 },
72         { .center_freq = 2442 },
73         { .center_freq = 2447 },
74         { .center_freq = 2452 },
75         { .center_freq = 2457 },
76         { .center_freq = 2462 },
77         { .center_freq = 2467 },
78         { .center_freq = 2472 },
79         { .center_freq = 2484 },
80 };
81
82 static void rtl8187_iowrite_async_cb(struct urb *urb)
83 {
84         kfree(urb->context);
85         usb_free_urb(urb);
86 }
87
88 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
89                                   void *data, u16 len)
90 {
91         struct usb_ctrlrequest *dr;
92         struct urb *urb;
93         struct rtl8187_async_write_data {
94                 u8 data[4];
95                 struct usb_ctrlrequest dr;
96         } *buf;
97         int rc;
98
99         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
100         if (!buf)
101                 return;
102
103         urb = usb_alloc_urb(0, GFP_ATOMIC);
104         if (!urb) {
105                 kfree(buf);
106                 return;
107         }
108
109         dr = &buf->dr;
110
111         dr->bRequestType = RTL8187_REQT_WRITE;
112         dr->bRequest = RTL8187_REQ_SET_REG;
113         dr->wValue = addr;
114         dr->wIndex = 0;
115         dr->wLength = cpu_to_le16(len);
116
117         memcpy(buf, data, len);
118
119         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
120                              (unsigned char *)dr, buf, len,
121                              rtl8187_iowrite_async_cb, buf);
122         rc = usb_submit_urb(urb, GFP_ATOMIC);
123         if (rc < 0) {
124                 kfree(buf);
125                 usb_free_urb(urb);
126         }
127 }
128
129 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
130                                            __le32 *addr, u32 val)
131 {
132         __le32 buf = cpu_to_le32(val);
133
134         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
135                               &buf, sizeof(buf));
136 }
137
138 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
139 {
140         struct rtl8187_priv *priv = dev->priv;
141
142         data <<= 8;
143         data |= addr | 0x80;
144
145         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
146         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
147         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
148         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
149
150         msleep(1);
151 }
152
153 static void rtl8187_tx_cb(struct urb *urb)
154 {
155         struct sk_buff *skb = (struct sk_buff *)urb->context;
156         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
157         struct ieee80211_hw *hw = info->driver_data[0];
158         struct rtl8187_priv *priv = hw->priv;
159
160         usb_free_urb(info->driver_data[1]);
161         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
162                                           sizeof(struct rtl8187_tx_hdr));
163         memset(&info->status, 0, sizeof(info->status));
164         info->flags |= IEEE80211_TX_STAT_ACK;
165         ieee80211_tx_status_irqsafe(hw, skb);
166 }
167
168 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
169 {
170         struct rtl8187_priv *priv = dev->priv;
171         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
172         unsigned int ep;
173         void *buf;
174         struct urb *urb;
175         __le16 rts_dur = 0;
176         u32 flags;
177         int rc;
178
179         urb = usb_alloc_urb(0, GFP_ATOMIC);
180         if (!urb) {
181                 kfree_skb(skb);
182                 return 0;
183         }
184
185         flags = skb->len;
186         flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
187
188         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
189         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
190                 flags |= RTL8187_TX_FLAG_MORE_FRAG;
191         if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
192                 flags |= RTL8187_TX_FLAG_RTS;
193                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
194                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
195                                                  skb->len, info);
196         } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
197                 flags |= RTL8187_TX_FLAG_CTS;
198                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
199         }
200
201         if (!priv->is_rtl8187b) {
202                 struct rtl8187_tx_hdr *hdr =
203                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
204                 hdr->flags = cpu_to_le32(flags);
205                 hdr->len = 0;
206                 hdr->rts_duration = rts_dur;
207                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
208                 buf = hdr;
209
210                 ep = 2;
211         } else {
212                 /* fc needs to be calculated before skb_push() */
213                 unsigned int epmap[4] = { 6, 7, 5, 4 };
214                 struct ieee80211_hdr *tx_hdr =
215                         (struct ieee80211_hdr *)(skb->data);
216                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
217
218                 struct rtl8187b_tx_hdr *hdr =
219                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
220                 struct ieee80211_rate *txrate =
221                         ieee80211_get_tx_rate(dev, info);
222                 memset(hdr, 0, sizeof(*hdr));
223                 hdr->flags = cpu_to_le32(flags);
224                 hdr->rts_duration = rts_dur;
225                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
226                 hdr->tx_duration =
227                         ieee80211_generic_frame_duration(dev, priv->vif,
228                                                          skb->len, txrate);
229                 buf = hdr;
230
231                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
232                         ep = 12;
233                 else
234                         ep = epmap[skb_get_queue_mapping(skb)];
235         }
236
237         info->driver_data[0] = dev;
238         info->driver_data[1] = urb;
239
240         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
241                           buf, skb->len, rtl8187_tx_cb, skb);
242         rc = usb_submit_urb(urb, GFP_ATOMIC);
243         if (rc < 0) {
244                 usb_free_urb(urb);
245                 kfree_skb(skb);
246         }
247
248         return 0;
249 }
250
251 static void rtl8187_rx_cb(struct urb *urb)
252 {
253         struct sk_buff *skb = (struct sk_buff *)urb->context;
254         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
255         struct ieee80211_hw *dev = info->dev;
256         struct rtl8187_priv *priv = dev->priv;
257         struct ieee80211_rx_status rx_status = { 0 };
258         int rate, signal;
259         u32 flags;
260
261         spin_lock(&priv->rx_queue.lock);
262         if (skb->next)
263                 __skb_unlink(skb, &priv->rx_queue);
264         else {
265                 spin_unlock(&priv->rx_queue.lock);
266                 return;
267         }
268         spin_unlock(&priv->rx_queue.lock);
269
270         if (unlikely(urb->status)) {
271                 usb_free_urb(urb);
272                 dev_kfree_skb_irq(skb);
273                 return;
274         }
275
276         skb_put(skb, urb->actual_length);
277         if (!priv->is_rtl8187b) {
278                 struct rtl8187_rx_hdr *hdr =
279                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
280                 flags = le32_to_cpu(hdr->flags);
281                 signal = hdr->signal & 0x7f;
282                 rx_status.antenna = (hdr->signal >> 7) & 1;
283                 rx_status.signal = signal;
284                 rx_status.noise = hdr->noise;
285                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
286                 priv->signal = signal;
287                 priv->quality = signal;
288                 priv->noise = hdr->noise;
289         } else {
290                 struct rtl8187b_rx_hdr *hdr =
291                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
292                 flags = le32_to_cpu(hdr->flags);
293                 signal = hdr->agc >> 1;
294                 rx_status.antenna = (hdr->signal >> 7) & 1;
295                 rx_status.signal = 64 - min(hdr->noise, (u8)64);
296                 rx_status.noise = hdr->noise;
297                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
298                 priv->signal = hdr->signal;
299                 priv->quality = hdr->agc >> 1;
300                 priv->noise = hdr->noise;
301         }
302
303         skb_trim(skb, flags & 0x0FFF);
304         rate = (flags >> 20) & 0xF;
305         if (rate > 3) { /* OFDM rate */
306                 if (signal > 90)
307                         signal = 90;
308                 else if (signal < 25)
309                         signal = 25;
310                 signal = 90 - signal;
311         } else {        /* CCK rate */
312                 if (signal > 95)
313                         signal = 95;
314                 else if (signal < 30)
315                         signal = 30;
316                 signal = 95 - signal;
317         }
318
319         rx_status.qual = priv->quality;
320         rx_status.signal = signal;
321         rx_status.rate_idx = rate;
322         rx_status.freq = dev->conf.channel->center_freq;
323         rx_status.band = dev->conf.channel->band;
324         rx_status.flag |= RX_FLAG_TSFT;
325         if (flags & (1 << 13))
326                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
327         ieee80211_rx_irqsafe(dev, skb, &rx_status);
328
329         skb = dev_alloc_skb(RTL8187_MAX_RX);
330         if (unlikely(!skb)) {
331                 usb_free_urb(urb);
332                 /* TODO check rx queue length and refill *somewhere* */
333                 return;
334         }
335
336         info = (struct rtl8187_rx_info *)skb->cb;
337         info->urb = urb;
338         info->dev = dev;
339         urb->transfer_buffer = skb_tail_pointer(skb);
340         urb->context = skb;
341         skb_queue_tail(&priv->rx_queue, skb);
342
343         usb_submit_urb(urb, GFP_ATOMIC);
344 }
345
346 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
347 {
348         struct rtl8187_priv *priv = dev->priv;
349         struct urb *entry;
350         struct sk_buff *skb;
351         struct rtl8187_rx_info *info;
352
353         while (skb_queue_len(&priv->rx_queue) < 8) {
354                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
355                 if (!skb)
356                         break;
357                 entry = usb_alloc_urb(0, GFP_KERNEL);
358                 if (!entry) {
359                         kfree_skb(skb);
360                         break;
361                 }
362                 usb_fill_bulk_urb(entry, priv->udev,
363                                   usb_rcvbulkpipe(priv->udev,
364                                   priv->is_rtl8187b ? 3 : 1),
365                                   skb_tail_pointer(skb),
366                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
367                 info = (struct rtl8187_rx_info *)skb->cb;
368                 info->urb = entry;
369                 info->dev = dev;
370                 skb_queue_tail(&priv->rx_queue, skb);
371                 usb_submit_urb(entry, GFP_KERNEL);
372         }
373
374         return 0;
375 }
376
377 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
378 {
379         struct rtl8187_priv *priv = dev->priv;
380         u8 reg;
381         int i;
382
383         reg = rtl818x_ioread8(priv, &priv->map->CMD);
384         reg &= (1 << 1);
385         reg |= RTL818X_CMD_RESET;
386         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
387
388         i = 10;
389         do {
390                 msleep(2);
391                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
392                       RTL818X_CMD_RESET))
393                         break;
394         } while (--i);
395
396         if (!i) {
397                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
398                 return -ETIMEDOUT;
399         }
400
401         /* reload registers from eeprom */
402         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
403
404         i = 10;
405         do {
406                 msleep(4);
407                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
408                       RTL818X_EEPROM_CMD_CONFIG))
409                         break;
410         } while (--i);
411
412         if (!i) {
413                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
414                        wiphy_name(dev->wiphy));
415                 return -ETIMEDOUT;
416         }
417
418         return 0;
419 }
420
421 static int rtl8187_init_hw(struct ieee80211_hw *dev)
422 {
423         struct rtl8187_priv *priv = dev->priv;
424         u8 reg;
425         int res;
426
427         /* reset */
428         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
429                          RTL818X_EEPROM_CMD_CONFIG);
430         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
431         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
432                          RTL818X_CONFIG3_ANAPARAM_WRITE);
433         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
434                           RTL8187_RTL8225_ANAPARAM_ON);
435         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
436                           RTL8187_RTL8225_ANAPARAM2_ON);
437         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
438                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
439         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
440                          RTL818X_EEPROM_CMD_NORMAL);
441
442         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
443
444         msleep(200);
445         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
446         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
447         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
448         msleep(200);
449
450         res = rtl8187_cmd_reset(dev);
451         if (res)
452                 return res;
453
454         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
455         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
456         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
457                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
458         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
459                           RTL8187_RTL8225_ANAPARAM_ON);
460         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
461                           RTL8187_RTL8225_ANAPARAM2_ON);
462         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
463                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
464         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
465
466         /* setup card */
467         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
468         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
469
470         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
471         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
472         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
473
474         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
475
476         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
477         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
478         reg &= 0x3F;
479         reg |= 0x80;
480         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
481
482         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
483
484         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
485         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
486         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
487
488         // TODO: set RESP_RATE and BRSR properly
489         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
490         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
491
492         /* host_usb_init */
493         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
494         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
495         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
496         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
497         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
498         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
499         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
500         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
501         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
502         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
503         msleep(100);
504
505         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
506         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
507         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
508         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
509                          RTL818X_EEPROM_CMD_CONFIG);
510         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
511         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
512                          RTL818X_EEPROM_CMD_NORMAL);
513         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
514         msleep(100);
515
516         priv->rf->init(dev);
517
518         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
519         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
520         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
521         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
522         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
523         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
524         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
525
526         return 0;
527 }
528
529 static const u8 rtl8187b_reg_table[][3] = {
530         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
531         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
532         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
533         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
534
535         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
536         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
537         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
538         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
539         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
540         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
541
542         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
543         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
544         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
545         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
546         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
547         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
548         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
549         {0x73, 0x9A, 2},
550
551         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
552         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
553         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
554         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
555         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
556
557         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
558         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
559 };
560
561 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
562 {
563         struct rtl8187_priv *priv = dev->priv;
564         int res, i;
565         u8 reg;
566
567         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
568                          RTL818X_EEPROM_CMD_CONFIG);
569
570         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
571         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
572         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
573         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
574                           RTL8187B_RTL8225_ANAPARAM2_ON);
575         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
576                           RTL8187B_RTL8225_ANAPARAM_ON);
577         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
578                          RTL8187B_RTL8225_ANAPARAM3_ON);
579
580         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
581         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
582         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
583         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
584
585         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
586         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
587         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
588
589         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
590                          RTL818X_EEPROM_CMD_NORMAL);
591
592         res = rtl8187_cmd_reset(dev);
593         if (res)
594                 return res;
595
596         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
597         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
598         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
599         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
600         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
601         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
602                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
603         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
604
605         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
606         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
607         reg |= RTL818X_RATE_FALLBACK_ENABLE;
608         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
609
610         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
611         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
612         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
613
614         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
615                          RTL818X_EEPROM_CMD_CONFIG);
616         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
617         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
618         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
619                          RTL818X_EEPROM_CMD_NORMAL);
620
621         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
622         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
623                 rtl818x_iowrite8_idx(priv,
624                                      (u8 *)(uintptr_t)
625                                      (rtl8187b_reg_table[i][0] | 0xFF00),
626                                      rtl8187b_reg_table[i][1],
627                                      rtl8187b_reg_table[i][2]);
628         }
629
630         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
631         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
632
633         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
634         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
635         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
636
637         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
638
639         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
640
641         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
642                          RTL818X_EEPROM_CMD_CONFIG);
643         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
644         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
645         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
646         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
647                          RTL818X_EEPROM_CMD_NORMAL);
648
649         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
650         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
651         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
652         msleep(1100);
653
654         priv->rf->init(dev);
655
656         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
657         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
658         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
659
660         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
661         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
662         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
663         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
664         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
665         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
666         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
667
668         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
669         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
670         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
671         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
672         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
673         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
674         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
675         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
676         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
677         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
678         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
679         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
680         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
681
682         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
683
684         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
685
686         return 0;
687 }
688
689 static int rtl8187_start(struct ieee80211_hw *dev)
690 {
691         struct rtl8187_priv *priv = dev->priv;
692         u32 reg;
693         int ret;
694
695         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
696                                      rtl8187b_init_hw(dev);
697         if (ret)
698                 return ret;
699
700         if (priv->is_rtl8187b) {
701                 reg = RTL818X_RX_CONF_MGMT |
702                       RTL818X_RX_CONF_DATA |
703                       RTL818X_RX_CONF_BROADCAST |
704                       RTL818X_RX_CONF_NICMAC |
705                       RTL818X_RX_CONF_BSSID |
706                       (7 << 13 /* RX FIFO threshold NONE */) |
707                       (7 << 10 /* MAX RX DMA */) |
708                       RTL818X_RX_CONF_RX_AUTORESETPHY |
709                       RTL818X_RX_CONF_ONLYERLPKT |
710                       RTL818X_RX_CONF_MULTICAST;
711                 priv->rx_conf = reg;
712                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
713
714                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
715                                   RTL818X_TX_CONF_HW_SEQNUM |
716                                   RTL818X_TX_CONF_DISREQQSIZE |
717                                   (7 << 8  /* short retry limit */) |
718                                   (7 << 0  /* long retry limit */) |
719                                   (7 << 21 /* MAX TX DMA */));
720                 rtl8187_init_urbs(dev);
721                 return 0;
722         }
723
724         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
725
726         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
727         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
728
729         rtl8187_init_urbs(dev);
730
731         reg = RTL818X_RX_CONF_ONLYERLPKT |
732               RTL818X_RX_CONF_RX_AUTORESETPHY |
733               RTL818X_RX_CONF_BSSID |
734               RTL818X_RX_CONF_MGMT |
735               RTL818X_RX_CONF_DATA |
736               (7 << 13 /* RX FIFO threshold NONE */) |
737               (7 << 10 /* MAX RX DMA */) |
738               RTL818X_RX_CONF_BROADCAST |
739               RTL818X_RX_CONF_NICMAC;
740
741         priv->rx_conf = reg;
742         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
743
744         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
745         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
746         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
747         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
748
749         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
750         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
751         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
752         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
753         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
754
755         reg  = RTL818X_TX_CONF_CW_MIN |
756                (7 << 21 /* MAX TX DMA */) |
757                RTL818X_TX_CONF_NO_ICV;
758         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
759
760         reg = rtl818x_ioread8(priv, &priv->map->CMD);
761         reg |= RTL818X_CMD_TX_ENABLE;
762         reg |= RTL818X_CMD_RX_ENABLE;
763         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
764
765         return 0;
766 }
767
768 static void rtl8187_stop(struct ieee80211_hw *dev)
769 {
770         struct rtl8187_priv *priv = dev->priv;
771         struct rtl8187_rx_info *info;
772         struct sk_buff *skb;
773         u32 reg;
774
775         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
776
777         reg = rtl818x_ioread8(priv, &priv->map->CMD);
778         reg &= ~RTL818X_CMD_TX_ENABLE;
779         reg &= ~RTL818X_CMD_RX_ENABLE;
780         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
781
782         priv->rf->stop(dev);
783
784         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
785         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
786         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
787         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
788
789         while ((skb = skb_dequeue(&priv->rx_queue))) {
790                 info = (struct rtl8187_rx_info *)skb->cb;
791                 usb_kill_urb(info->urb);
792                 kfree_skb(skb);
793         }
794         return;
795 }
796
797 static int rtl8187_add_interface(struct ieee80211_hw *dev,
798                                  struct ieee80211_if_init_conf *conf)
799 {
800         struct rtl8187_priv *priv = dev->priv;
801         int i;
802
803         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
804                 return -EOPNOTSUPP;
805
806         switch (conf->type) {
807         case IEEE80211_IF_TYPE_STA:
808                 priv->mode = conf->type;
809                 break;
810         default:
811                 return -EOPNOTSUPP;
812         }
813
814         priv->vif = conf->vif;
815
816         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
817         for (i = 0; i < ETH_ALEN; i++)
818                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
819                                  ((u8 *)conf->mac_addr)[i]);
820         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
821
822         return 0;
823 }
824
825 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
826                                      struct ieee80211_if_init_conf *conf)
827 {
828         struct rtl8187_priv *priv = dev->priv;
829         priv->mode = IEEE80211_IF_TYPE_MNTR;
830         priv->vif = NULL;
831 }
832
833 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
834 {
835         struct rtl8187_priv *priv = dev->priv;
836         u32 reg;
837
838         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
839         /* Enable TX loopback on MAC level to avoid TX during channel
840          * changes, as this has be seen to causes problems and the
841          * card will stop work until next reset
842          */
843         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
844                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
845         msleep(10);
846         priv->rf->set_chan(dev, conf);
847         msleep(10);
848         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
849
850         if (!priv->is_rtl8187b) {
851                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
852
853                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
854                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
855                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
856                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
857                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
858                 } else {
859                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
860                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
861                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
862                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
863                 }
864         }
865
866         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
867         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
868         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
869         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
870         return 0;
871 }
872
873 static int rtl8187_config_interface(struct ieee80211_hw *dev,
874                                     struct ieee80211_vif *vif,
875                                     struct ieee80211_if_conf *conf)
876 {
877         struct rtl8187_priv *priv = dev->priv;
878         int i;
879         u8 reg;
880
881         for (i = 0; i < ETH_ALEN; i++)
882                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
883
884         if (is_valid_ether_addr(conf->bssid)) {
885                 reg = RTL818X_MSR_INFRA;
886                 if (priv->is_rtl8187b)
887                         reg |= RTL818X_MSR_ENEDCA;
888                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
889         } else {
890                 reg = RTL818X_MSR_NO_LINK;
891                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
892         }
893
894         return 0;
895 }
896
897 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
898                                      unsigned int changed_flags,
899                                      unsigned int *total_flags,
900                                      int mc_count, struct dev_addr_list *mclist)
901 {
902         struct rtl8187_priv *priv = dev->priv;
903
904         if (changed_flags & FIF_FCSFAIL)
905                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
906         if (changed_flags & FIF_CONTROL)
907                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
908         if (changed_flags & FIF_OTHER_BSS)
909                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
910         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
911                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
912         else
913                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
914
915         *total_flags = 0;
916
917         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
918                 *total_flags |= FIF_FCSFAIL;
919         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
920                 *total_flags |= FIF_CONTROL;
921         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
922                 *total_flags |= FIF_OTHER_BSS;
923         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
924                 *total_flags |= FIF_ALLMULTI;
925
926         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
927 }
928
929 static const struct ieee80211_ops rtl8187_ops = {
930         .tx                     = rtl8187_tx,
931         .start                  = rtl8187_start,
932         .stop                   = rtl8187_stop,
933         .add_interface          = rtl8187_add_interface,
934         .remove_interface       = rtl8187_remove_interface,
935         .config                 = rtl8187_config,
936         .config_interface       = rtl8187_config_interface,
937         .configure_filter       = rtl8187_configure_filter,
938 };
939
940 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
941 {
942         struct ieee80211_hw *dev = eeprom->data;
943         struct rtl8187_priv *priv = dev->priv;
944         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
945
946         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
947         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
948         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
949         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
950 }
951
952 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
953 {
954         struct ieee80211_hw *dev = eeprom->data;
955         struct rtl8187_priv *priv = dev->priv;
956         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
957
958         if (eeprom->reg_data_in)
959                 reg |= RTL818X_EEPROM_CMD_WRITE;
960         if (eeprom->reg_data_out)
961                 reg |= RTL818X_EEPROM_CMD_READ;
962         if (eeprom->reg_data_clock)
963                 reg |= RTL818X_EEPROM_CMD_CK;
964         if (eeprom->reg_chip_select)
965                 reg |= RTL818X_EEPROM_CMD_CS;
966
967         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
968         udelay(10);
969 }
970
971 static int __devinit rtl8187_probe(struct usb_interface *intf,
972                                    const struct usb_device_id *id)
973 {
974         struct usb_device *udev = interface_to_usbdev(intf);
975         struct ieee80211_hw *dev;
976         struct rtl8187_priv *priv;
977         struct eeprom_93cx6 eeprom;
978         struct ieee80211_channel *channel;
979         const char *chip_name;
980         u16 txpwr, reg;
981         int err, i;
982         DECLARE_MAC_BUF(mac);
983
984         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
985         if (!dev) {
986                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
987                 return -ENOMEM;
988         }
989
990         priv = dev->priv;
991         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
992
993         SET_IEEE80211_DEV(dev, &intf->dev);
994         usb_set_intfdata(intf, dev);
995         priv->udev = udev;
996
997         usb_get_dev(udev);
998
999         skb_queue_head_init(&priv->rx_queue);
1000
1001         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1002         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1003
1004         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1005         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1006         priv->map = (struct rtl818x_csr *)0xFF00;
1007
1008         priv->band.band = IEEE80211_BAND_2GHZ;
1009         priv->band.channels = priv->channels;
1010         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1011         priv->band.bitrates = priv->rates;
1012         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1013         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1014
1015
1016         priv->mode = IEEE80211_IF_TYPE_MNTR;
1017         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1018                      IEEE80211_HW_RX_INCLUDES_FCS |
1019                      IEEE80211_HW_SIGNAL_UNSPEC;
1020         dev->max_signal = 65;
1021
1022         eeprom.data = dev;
1023         eeprom.register_read = rtl8187_eeprom_register_read;
1024         eeprom.register_write = rtl8187_eeprom_register_write;
1025         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1026                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1027         else
1028                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1029
1030         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1031         udelay(10);
1032
1033         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1034                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1035         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1036                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1037                        "generated MAC address\n");
1038                 random_ether_addr(dev->wiphy->perm_addr);
1039         }
1040
1041         channel = priv->channels;
1042         for (i = 0; i < 3; i++) {
1043                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1044                                   &txpwr);
1045                 (*channel++).hw_value = txpwr & 0xFF;
1046                 (*channel++).hw_value = txpwr >> 8;
1047         }
1048         for (i = 0; i < 2; i++) {
1049                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1050                                   &txpwr);
1051                 (*channel++).hw_value = txpwr & 0xFF;
1052                 (*channel++).hw_value = txpwr >> 8;
1053         }
1054
1055         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1056                           &priv->txpwr_base);
1057
1058         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1059         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1060         /* 0 means asic B-cut, we should use SW 3 wire
1061          * bit-by-bit banging for radio. 1 means we can use
1062          * USB specific request to write radio registers */
1063         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1064         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1065         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1066
1067         if (!priv->is_rtl8187b) {
1068                 u32 reg32;
1069                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1070                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1071                 switch (reg32) {
1072                 case RTL818X_TX_CONF_R8187vD_B:
1073                         /* Some RTL8187B devices have a USB ID of 0x8187
1074                          * detect them here */
1075                         chip_name = "RTL8187BvB(early)";
1076                         priv->is_rtl8187b = 1;
1077                         priv->hw_rev = RTL8187BvB;
1078                         break;
1079                 case RTL818X_TX_CONF_R8187vD:
1080                         chip_name = "RTL8187vD";
1081                         break;
1082                 default:
1083                         chip_name = "RTL8187vB (default)";
1084                 }
1085        } else {
1086                 /*
1087                  * Force USB request to write radio registers for 8187B, Realtek
1088                  * only uses it in their sources
1089                  */
1090                 /*if (priv->asic_rev == 0) {
1091                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1092                                "requests to write to radio registers\n");
1093                         priv->asic_rev = 1;
1094                 }*/
1095                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1096                 case RTL818X_R8187B_B:
1097                         chip_name = "RTL8187BvB";
1098                         priv->hw_rev = RTL8187BvB;
1099                         break;
1100                 case RTL818X_R8187B_D:
1101                         chip_name = "RTL8187BvD";
1102                         priv->hw_rev = RTL8187BvD;
1103                         break;
1104                 case RTL818X_R8187B_E:
1105                         chip_name = "RTL8187BvE";
1106                         priv->hw_rev = RTL8187BvE;
1107                         break;
1108                 default:
1109                         chip_name = "RTL8187BvB (default)";
1110                         priv->hw_rev = RTL8187BvB;
1111                 }
1112         }
1113
1114         if (!priv->is_rtl8187b) {
1115                 for (i = 0; i < 2; i++) {
1116                         eeprom_93cx6_read(&eeprom,
1117                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1118                                           &txpwr);
1119                         (*channel++).hw_value = txpwr & 0xFF;
1120                         (*channel++).hw_value = txpwr >> 8;
1121                 }
1122         } else {
1123                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1124                                   &txpwr);
1125                 (*channel++).hw_value = txpwr & 0xFF;
1126
1127                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1128                 (*channel++).hw_value = txpwr & 0xFF;
1129
1130                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1131                 (*channel++).hw_value = txpwr & 0xFF;
1132                 (*channel++).hw_value = txpwr >> 8;
1133         }
1134
1135         if (priv->is_rtl8187b)
1136                 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1137                         "is EXPERIMENTAL, and could damage your\n"
1138                         "         hardware, use at your own risk\n");
1139         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1140                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1141                        " info!\n");
1142
1143         priv->rf = rtl8187_detect_rf(dev);
1144         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1145                                   sizeof(struct rtl8187_tx_hdr) :
1146                                   sizeof(struct rtl8187b_tx_hdr);
1147         if (!priv->is_rtl8187b)
1148                 dev->queues = 1;
1149         else
1150                 dev->queues = 4;
1151
1152         err = ieee80211_register_hw(dev);
1153         if (err) {
1154                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1155                 goto err_free_dev;
1156         }
1157
1158         printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n",
1159                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1160                chip_name, priv->asic_rev, priv->rf->name);
1161
1162         return 0;
1163
1164  err_free_dev:
1165         ieee80211_free_hw(dev);
1166         usb_set_intfdata(intf, NULL);
1167         usb_put_dev(udev);
1168         return err;
1169 }
1170
1171 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1172 {
1173         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1174         struct rtl8187_priv *priv;
1175
1176         if (!dev)
1177                 return;
1178
1179         ieee80211_unregister_hw(dev);
1180
1181         priv = dev->priv;
1182         usb_put_dev(interface_to_usbdev(intf));
1183         ieee80211_free_hw(dev);
1184 }
1185
1186 static struct usb_driver rtl8187_driver = {
1187         .name           = KBUILD_MODNAME,
1188         .id_table       = rtl8187_table,
1189         .probe          = rtl8187_probe,
1190         .disconnect     = __devexit_p(rtl8187_disconnect),
1191 };
1192
1193 static int __init rtl8187_init(void)
1194 {
1195         return usb_register(&rtl8187_driver);
1196 }
1197
1198 static void __exit rtl8187_exit(void)
1199 {
1200         usb_deregister(&rtl8187_driver);
1201 }
1202
1203 module_init(rtl8187_init);
1204 module_exit(rtl8187_exit);