2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/major.h>
39 #include <linux/slab.h>
42 #include <linux/signal.h>
44 #include <asm/pgtable.h>
46 #include <linux/types.h>
48 #include <linux/videodev.h>
49 #include <asm/uaccess.h>
51 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
52 MODULE_AUTHOR("Maxim Yevtyushkin");
53 MODULE_LICENSE("GPL");
55 #include <linux/i2c.h>
57 #define I2C_NAME(x) (x)->name
59 #include <linux/video_decoder.h>
62 module_param(debug, int, 0);
63 MODULE_PARM_DESC(debug, "Debug level (0-1)");
65 #define dprintk(num, format, args...) \
68 printk(format, ##args); \
71 /* ----------------------------------------------------------------------- */
74 unsigned char reg[0xf0 * 2];
86 #define I2C_SAA7114 0x42
87 #define I2C_SAA7114A 0x40
92 //#define SAA_7114_NTSC_HSYNC_START (-3)
93 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
95 #define SAA_7114_NTSC_HSYNC_START (-17)
96 #define SAA_7114_NTSC_HSYNC_STOP (-32)
98 //#define SAA_7114_NTSC_HOFFSET (5)
99 #define SAA_7114_NTSC_HOFFSET (6)
100 #define SAA_7114_NTSC_VOFFSET (10)
101 #define SAA_7114_NTSC_WIDTH (720)
102 #define SAA_7114_NTSC_HEIGHT (250)
104 #define SAA_7114_SECAM_HSYNC_START (-17)
105 #define SAA_7114_SECAM_HSYNC_STOP (-32)
107 #define SAA_7114_SECAM_HOFFSET (2)
108 #define SAA_7114_SECAM_VOFFSET (10)
109 #define SAA_7114_SECAM_WIDTH (720)
110 #define SAA_7114_SECAM_HEIGHT (300)
112 #define SAA_7114_PAL_HSYNC_START (-17)
113 #define SAA_7114_PAL_HSYNC_STOP (-32)
115 #define SAA_7114_PAL_HOFFSET (2)
116 #define SAA_7114_PAL_VOFFSET (10)
117 #define SAA_7114_PAL_WIDTH (720)
118 #define SAA_7114_PAL_HEIGHT (300)
122 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
123 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
125 #define REG_ADDR(x) (((x) << 1) + 1)
126 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
127 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
128 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
129 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
132 /* ----------------------------------------------------------------------- */
135 saa7114_write (struct i2c_client *client,
139 return i2c_smbus_write_byte_data(client, reg, value);
143 saa7114_write_block (struct i2c_client *client,
150 /* the saa7114 has an autoincrement function, use it if
151 * the adapter understands raw I2C */
152 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
153 /* do raw I2C, not smbus compatible */
159 block_data[block_len++] = reg = data[0];
161 block_data[block_len++] = data[1];
165 } while (len >= 2 && data[0] == reg &&
167 if ((ret = i2c_master_send(client, block_data,
172 /* do some slow I2C emulation kind of thing */
175 if ((ret = saa7114_write(client, reg,
186 saa7114_read (struct i2c_client *client,
189 return i2c_smbus_read_byte_data(client, reg);
192 /* ----------------------------------------------------------------------- */
194 // initially set NTSC, composite
197 static const unsigned char init[] = {
198 0x00, 0x00, /* 00 - ID byte , chip version,
200 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
201 * horizontal increment delay,
202 * recommended position */
203 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
205 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
206 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
207 0x04, 0x90, /* 04 - GAI1=256 */
208 0x05, 0x90, /* 05 - GAI2=256 */
209 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
210 * depends on the video standard */
211 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
212 *on the video standard */
213 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
214 * HPLL: free running in playback, locked
215 * in capture, VNOI=0 */
216 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
217 * UPTCV=0, APER=1; depends from input */
218 0x0a, 0x80, /* 0a - BRIG=128 */
219 0x0b, 0x44, /* 0b - CONT=1.109 */
220 0x0c, 0x40, /* 0c - SATN=1.0 */
221 0x0d, 0x00, /* 0d - HUE=0 */
222 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
223 * CCOMB; depends from video standard */
224 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
225 * from video standard */
226 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
228 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
230 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
232 0x13, 0x80, /* 13 - RT/X port output control */
233 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
234 0x15, 0x00, /* 15 - VGATE start FID change */
235 0x16, 0xfe, /* 16 - VGATE stop */
236 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
237 0x18, 0x40, /* RAWG */
238 0x19, 0x80, /* RAWO */
244 0x1f, 0x00, /* status byte, read only */
245 0x20, 0x00, /* video decoder reserved part */
261 0x30, 0xbc, /* audio clock generator */
277 0x40, 0x00, /* VBI data slicer */
301 0x58, 0x40, // framing code
302 0x59, 0x47, // horizontal offset
303 0x5a, 0x06, // vertical offset
304 0x5b, 0x83, // field offset
305 0x5c, 0x00, // reserved
306 0x5d, 0x3e, // header and data
307 0x5e, 0x00, // sliced data
308 0x5f, 0x00, // reserved
309 0x60, 0x00, /* video decoder reserved part */
325 0x70, 0x00, /* video decoder reserved part */
341 0x80, 0x00, /* X-port, I-port and scaler */
346 0x85, 0x0d, // hsync and vsync ?
357 0x90, 0x03, /* Task A definition */
361 0x94, 0x00, // window settings
373 0xa0, 0x01, /* horizontal integer prescaling ratio */
374 0xa1, 0x00, /* horizontal prescaler accumulation
376 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
379 0xa4, 0x80, // luminance brightness
380 0xa5, 0x40, // luminance gain
381 0xa6, 0x40, // chrominance saturation
383 0xa8, 0x00, // horizontal luminance scaling increment
385 0xaa, 0x00, // horizontal luminance phase offset
387 0xac, 0x00, // horizontal chrominance scaling increment
389 0xae, 0x00, // horizontal chrominance phase offset
391 0xb0, 0x00, // vertical luminance scaling increment
393 0xb2, 0x00, // vertical chrominance scaling increment
407 0xc0, 0x02, // Task B definition
411 0xc4, 0x00, // window settings
423 0xd0, 0x01, // horizontal integer prescaling ratio
424 0xd1, 0x00, // horizontal prescaler accumulation sequence length
425 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
427 0xd4, 0x80, // luminance brightness
428 0xd5, 0x40, // luminance gain
429 0xd6, 0x40, // chrominance saturation
431 0xd8, 0x00, // horizontal luminance scaling increment
433 0xda, 0x00, // horizontal luminance phase offset
435 0xdc, 0x00, // horizontal chrominance scaling increment
437 0xde, 0x00, // horizontal chrominance phase offset
439 0xe0, 0x00, // vertical luminance scaling increment
441 0xe2, 0x00, // vertical chrominance scaling increment
458 saa7114_command (struct i2c_client *client,
462 struct saa7114 *decoder = i2c_get_clientdata(client);
467 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
468 //saa7114_write_block(client, init, sizeof(init));
475 dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
477 for (i = 0; i < 32; i += 16) {
480 printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
481 for (j = 0; j < 16; ++j) {
483 saa7114_read(client, i + j));
490 case DECODER_GET_CAPABILITIES:
492 struct video_decoder_capability *cap = arg;
494 dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
497 cap->flags = VIDEO_DECODER_PAL |
506 case DECODER_GET_STATUS:
512 status = saa7114_read(client, 0x1f);
514 dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
517 if ((status & (1 << 6)) == 0) {
518 res |= DECODER_STATUS_GOOD;
520 switch (decoder->norm) {
521 case VIDEO_MODE_NTSC:
522 res |= DECODER_STATUS_NTSC;
525 res |= DECODER_STATUS_PAL;
527 case VIDEO_MODE_SECAM:
528 res |= DECODER_STATUS_SECAM;
531 case VIDEO_MODE_AUTO:
532 if ((status & (1 << 5)) != 0) {
533 res |= DECODER_STATUS_NTSC;
535 res |= DECODER_STATUS_PAL;
539 if ((status & (1 << 0)) != 0) {
540 res |= DECODER_STATUS_COLOR;
546 case DECODER_SET_NORM:
550 short int hoff = 0, voff = 0, w = 0, h = 0;
552 dprintk(1, KERN_DEBUG "%s: decoder set norm ",
556 case VIDEO_MODE_NTSC:
557 dprintk(1, "NTSC\n");
558 decoder->reg[REG_ADDR(0x06)] =
559 SAA_7114_NTSC_HSYNC_START;
560 decoder->reg[REG_ADDR(0x07)] =
561 SAA_7114_NTSC_HSYNC_STOP;
563 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
565 decoder->reg[REG_ADDR(0x0e)] = 0x85;
566 decoder->reg[REG_ADDR(0x0f)] = 0x24;
568 hoff = SAA_7114_NTSC_HOFFSET;
569 voff = SAA_7114_NTSC_VOFFSET;
570 w = SAA_7114_NTSC_WIDTH;
571 h = SAA_7114_NTSC_HEIGHT;
577 decoder->reg[REG_ADDR(0x06)] =
578 SAA_7114_PAL_HSYNC_START;
579 decoder->reg[REG_ADDR(0x07)] =
580 SAA_7114_PAL_HSYNC_STOP;
582 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
584 decoder->reg[REG_ADDR(0x0e)] = 0x81;
585 decoder->reg[REG_ADDR(0x0f)] = 0x24;
587 hoff = SAA_7114_PAL_HOFFSET;
588 voff = SAA_7114_PAL_VOFFSET;
589 w = SAA_7114_PAL_WIDTH;
590 h = SAA_7114_PAL_HEIGHT;
595 dprintk(1, " Unknown video mode!!!\n");
601 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
602 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
603 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
604 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
605 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
606 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
607 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
608 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
609 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
610 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
611 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
612 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
614 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
615 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
616 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
617 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
618 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
619 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
620 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
621 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
622 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
623 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
624 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
625 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
628 saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
629 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
630 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
632 saa7114_write_block(client, decoder->reg + (0x06 << 1),
634 saa7114_write_block(client, decoder->reg + (0x0e << 1),
636 saa7114_write_block(client, decoder->reg + (0x5a << 1),
639 saa7114_write_block(client, decoder->reg + (0x94 << 1),
640 (0x9f + 1 - 0x94) << 1);
641 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
642 (0xcf + 1 - 0xc4) << 1);
644 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
645 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
646 saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
648 decoder->norm = *iarg;
652 case DECODER_SET_INPUT:
656 dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
657 I2C_NAME(client), *iarg);
658 if (*iarg < 0 || *iarg > 7) {
662 if (decoder->input != *iarg) {
663 dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
665 *iarg >= 6 ? "S-Video" : "Composite");
666 decoder->input = *iarg;
669 decoder->reg[REG_ADDR(0x02)] =
671 reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
674 saa7114_write(client, 0x02,
675 decoder->reg[REG_ADDR(0x02)]);
677 /* bypass chrominance trap for modes 6..9 */
678 decoder->reg[REG_ADDR(0x09)] =
680 reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
684 saa7114_write(client, 0x09,
685 decoder->reg[REG_ADDR(0x09)]);
687 decoder->reg[REG_ADDR(0x0e)] =
690 reg[REG_ADDR(0x0e)] | 1 : decoder->
691 reg[REG_ADDR(0x0e)] & ~1;
692 saa7114_write(client, 0x0e,
693 decoder->reg[REG_ADDR(0x0e)]);
698 case DECODER_SET_OUTPUT:
702 dprintk(1, KERN_DEBUG "%s: decoder set output\n",
705 /* not much choice of outputs */
712 case DECODER_ENABLE_OUTPUT:
715 int enable = (*iarg != 0);
717 dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
718 I2C_NAME(client), enable ? "enable" : "disable");
720 decoder->playback = !enable;
722 if (decoder->enable != enable) {
723 decoder->enable = enable;
725 /* RJ: If output should be disabled (for
726 * playing videos), we also need a open PLL.
727 * The input is set to 0 (where no input
728 * source is connected), although this
731 * If output should be enabled, we have to
735 if (decoder->enable) {
736 decoder->reg[REG_ADDR(0x08)] = 0xb8;
737 decoder->reg[REG_ADDR(0x12)] = 0xc9;
738 decoder->reg[REG_ADDR(0x13)] = 0x80;
739 decoder->reg[REG_ADDR(0x87)] = 0x01;
741 decoder->reg[REG_ADDR(0x08)] = 0x7c;
742 decoder->reg[REG_ADDR(0x12)] = 0x00;
743 decoder->reg[REG_ADDR(0x13)] = 0x00;
744 decoder->reg[REG_ADDR(0x87)] = 0x00;
747 saa7114_write_block(client,
748 decoder->reg + (0x12 << 1),
750 saa7114_write(client, 0x08,
751 decoder->reg[REG_ADDR(0x08)]);
752 saa7114_write(client, 0x87,
753 decoder->reg[REG_ADDR(0x87)]);
754 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
755 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
756 saa7114_write(client, 0x80, 0x36);
762 case DECODER_SET_PICTURE:
764 struct video_picture *pic = arg;
768 "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
769 I2C_NAME(client), pic->brightness, pic->contrast,
770 pic->colour, pic->hue);
772 if (decoder->bright != pic->brightness) {
773 /* We want 0 to 255 we get 0-65535 */
774 decoder->bright = pic->brightness;
775 saa7114_write(client, 0x0a, decoder->bright >> 8);
777 if (decoder->contrast != pic->contrast) {
778 /* We want 0 to 127 we get 0-65535 */
779 decoder->contrast = pic->contrast;
780 saa7114_write(client, 0x0b,
781 decoder->contrast >> 9);
783 if (decoder->sat != pic->colour) {
784 /* We want 0 to 127 we get 0-65535 */
785 decoder->sat = pic->colour;
786 saa7114_write(client, 0x0c, decoder->sat >> 9);
788 if (decoder->hue != pic->hue) {
789 /* We want -128 to 127 we get 0-65535 */
790 decoder->hue = pic->hue;
791 saa7114_write(client, 0x0d,
792 (decoder->hue - 32768) >> 8);
804 /* ----------------------------------------------------------------------- */
808 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
810 static unsigned short normal_i2c[] =
811 { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
813 static unsigned short ignore = I2C_CLIENT_END;
815 static struct i2c_client_address_data addr_data = {
816 .normal_i2c = normal_i2c,
821 static struct i2c_driver i2c_driver_saa7114;
824 saa7114_detect_client (struct i2c_adapter *adapter,
829 short int hoff = SAA_7114_NTSC_HOFFSET;
830 short int voff = SAA_7114_NTSC_VOFFSET;
831 short int w = SAA_7114_NTSC_WIDTH;
832 short int h = SAA_7114_NTSC_HEIGHT;
833 struct i2c_client *client;
834 struct saa7114 *decoder;
838 "saa7114.c: detecting saa7114 client on address 0x%x\n",
841 /* Check if the adapter supports the needed features */
842 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
845 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
848 client->addr = address;
849 client->adapter = adapter;
850 client->driver = &i2c_driver_saa7114;
851 strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
853 decoder = kzalloc(sizeof(struct saa7114), GFP_KERNEL);
854 if (decoder == NULL) {
858 decoder->norm = VIDEO_MODE_NTSC;
861 decoder->bright = 32768;
862 decoder->contrast = 32768;
863 decoder->hue = 32768;
864 decoder->sat = 32768;
865 decoder->playback = 0; // initially capture mode useda
866 i2c_set_clientdata(client, decoder);
868 memcpy(decoder->reg, init, sizeof(init));
870 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
871 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
872 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
873 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
874 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
875 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
876 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
877 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
878 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
879 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
880 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
881 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
883 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
884 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
885 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
886 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
887 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
888 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
889 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
890 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
891 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
892 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
893 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
894 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
896 decoder->reg[REG_ADDR(0xb8)] =
897 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
898 decoder->reg[REG_ADDR(0xb9)] =
899 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
900 decoder->reg[REG_ADDR(0xba)] =
901 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
902 decoder->reg[REG_ADDR(0xbb)] =
903 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
905 decoder->reg[REG_ADDR(0xbc)] =
906 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
907 decoder->reg[REG_ADDR(0xbd)] =
908 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
909 decoder->reg[REG_ADDR(0xbe)] =
910 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
911 decoder->reg[REG_ADDR(0xbf)] =
912 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
914 decoder->reg[REG_ADDR(0xe8)] =
915 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
916 decoder->reg[REG_ADDR(0xe9)] =
917 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
918 decoder->reg[REG_ADDR(0xea)] =
919 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
920 decoder->reg[REG_ADDR(0xeb)] =
921 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
923 decoder->reg[REG_ADDR(0xec)] =
924 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
925 decoder->reg[REG_ADDR(0xed)] =
926 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
927 decoder->reg[REG_ADDR(0xee)] =
928 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
929 decoder->reg[REG_ADDR(0xef)] =
930 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
933 decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
934 decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
935 decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
937 decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
938 decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
939 decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
942 dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
946 saa7114_write_block(client, decoder->reg + (0x20 << 1),
949 saa7114_write_block(client, decoder->reg + (0x30 << 1),
952 saa7114_write_block(client, decoder->reg + (0x63 << 1),
953 (0x7f + 1 - 0x63) << 1);
955 saa7114_write_block(client, decoder->reg + (0x89 << 1),
958 saa7114_write_block(client, decoder->reg + (0xb8 << 1),
961 saa7114_write_block(client, decoder->reg + (0xe8 << 1),
965 for (i = 0; i <= 5; i++) {
969 "%s_attach: init error %d at stage %d, leaving attach.\n",
970 I2C_NAME(client), i, err[i]);
977 for (i = 6; i < 8; i++) {
980 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
981 I2C_NAME(client), i, saa7114_read(client, i),
982 decoder->reg[REG_ADDR(i)]);
987 "%s_attach: performing decoder reset sequence\n",
990 err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
991 err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
992 err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
994 for (i = 6; i <= 8; i++) {
998 "%s_attach: init error %d at stage %d, leaving attach.\n",
999 I2C_NAME(client), i, err[i]);
1006 dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
1010 err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
1011 err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
1012 err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
1013 err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
1014 err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
1015 err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
1017 saa7114_write_block(client, decoder->reg + (0x94 << 1),
1020 saa7114_write_block(client, decoder->reg + (0xa0 << 1),
1023 saa7114_write_block(client, decoder->reg + (0xa8 << 1),
1026 saa7114_write_block(client, decoder->reg + (0xb0 << 1),
1028 err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
1030 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
1033 saa7114_write_block(client, decoder->reg + (0xd0 << 1),
1036 saa7114_write_block(client, decoder->reg + (0xd8 << 1),
1039 saa7114_write_block(client, decoder->reg + (0xe0 << 1),
1042 for (i = 9; i <= 18; i++) {
1046 "%s_attach: init error %d at stage %d, leaving attach.\n",
1047 I2C_NAME(client), i, err[i]);
1055 for (i = 6; i < 8; i++) {
1058 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1059 I2C_NAME(client), i, saa7114_read(client, i),
1060 decoder->reg[REG_ADDR(i)]);
1064 for (i = 0x11; i <= 0x13; i++) {
1067 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1068 I2C_NAME(client), i, saa7114_read(client, i),
1069 decoder->reg[REG_ADDR(i)]);
1073 dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
1077 saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
1079 saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
1081 saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
1083 for (i = 19; i <= 21; i++) {
1087 "%s_attach: init error %d at stage %d, leaving attach.\n",
1088 I2C_NAME(client), i, err[i]);
1097 "%s_attach: performing decoder reset sequence\n",
1100 err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1101 err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1102 err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1105 for (i = 22; i <= 24; i++) {
1109 "%s_attach: init error %d at stage %d, leaving attach.\n",
1110 I2C_NAME(client), i, err[i]);
1117 err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
1118 err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
1119 err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
1123 "%s_attach: chip version %x, decoder status 0x%02x\n",
1124 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1125 saa7114_read(client, 0x1f));
1128 "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
1129 I2C_NAME(client), saa7114_read(client, 0x88),
1130 saa7114_read(client, 0x8f));
1133 for (i = 0x94; i < 0x96; i++) {
1136 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1137 I2C_NAME(client), i, saa7114_read(client, i),
1138 decoder->reg[REG_ADDR(i)]);
1141 i = i2c_attach_client(client);
1148 //i = saa7114_write_block(client, init, sizeof(init));
1151 dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
1152 I2C_NAME(client), i);
1156 "%s_attach: chip version %x at address 0x%x\n",
1157 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1165 saa7114_attach_adapter (struct i2c_adapter *adapter)
1169 "saa7114.c: starting probe for adapter %s (0x%x)\n",
1170 I2C_NAME(adapter), adapter->id);
1171 return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
1175 saa7114_detach_client (struct i2c_client *client)
1177 struct saa7114 *decoder = i2c_get_clientdata(client);
1180 err = i2c_detach_client(client);
1191 /* ----------------------------------------------------------------------- */
1193 static struct i2c_driver i2c_driver_saa7114 = {
1198 .id = I2C_DRIVERID_SAA7114,
1200 .attach_adapter = saa7114_attach_adapter,
1201 .detach_client = saa7114_detach_client,
1202 .command = saa7114_command,
1208 return i2c_add_driver(&i2c_driver_saa7114);
1214 i2c_del_driver(&i2c_driver_saa7114);
1217 module_init(saa7114_init);
1218 module_exit(saa7114_exit);