1 // TODO verify coprocessor handling
3 * arch/xtensa/kernel/process.c
5 * Xtensa Processor version.
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 * Copyright (C) 2001 - 2005 Tensilica Inc.
13 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
14 * Chris Zankel <chris@zankel.net>
15 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
19 #include <linux/config.h>
20 #include <linux/errno.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
24 #include <linux/smp.h>
25 #include <linux/smp_lock.h>
26 #include <linux/stddef.h>
27 #include <linux/unistd.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/elf.h>
31 #include <linux/init.h>
32 #include <linux/prctl.h>
33 #include <linux/init_task.h>
34 #include <linux/module.h>
35 #include <linux/mqueue.h>
37 #include <asm/pgtable.h>
38 #include <asm/uaccess.h>
39 #include <asm/system.h>
41 #include <asm/processor.h>
42 #include <asm/platform.h>
45 #include <asm/atomic.h>
46 #include <asm/asm-offsets.h>
47 #include <asm/coprocessor.h>
49 extern void ret_from_fork(void);
51 static struct fs_struct init_fs = INIT_FS;
52 static struct files_struct init_files = INIT_FILES;
53 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
54 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
55 struct mm_struct init_mm = INIT_MM(init_mm);
56 EXPORT_SYMBOL(init_mm);
58 union thread_union init_thread_union
59 __attribute__((__section__(".data.init_task"))) =
60 { INIT_THREAD_INFO(init_task) };
62 struct task_struct init_task = INIT_TASK(init_task);
63 EXPORT_SYMBOL(init_task);
65 struct task_struct *current_set[NR_CPUS] = {&init_task, };
71 * Coprocessor ownership.
74 coprocessor_info_t coprocessor_info[] = {
75 { 0, XTENSA_CPE_CP0_OFFSET },
76 { 0, XTENSA_CPE_CP1_OFFSET },
77 { 0, XTENSA_CPE_CP2_OFFSET },
78 { 0, XTENSA_CPE_CP3_OFFSET },
79 { 0, XTENSA_CPE_CP4_OFFSET },
80 { 0, XTENSA_CPE_CP5_OFFSET },
81 { 0, XTENSA_CPE_CP6_OFFSET },
82 { 0, XTENSA_CPE_CP7_OFFSET },
88 * Powermanagement idle function, if any is provided by the platform.
95 /* endless idle loop with no priority at all */
97 while (!need_resched())
99 preempt_enable_no_resched();
106 * Free current thread data structures etc..
109 void exit_thread(void)
111 release_coprocessors(current); /* Empty macro if no CPs are defined */
114 void flush_thread(void)
116 release_coprocessors(current); /* Empty macro if no CPs are defined */
122 * The stack layout for the new thread looks like this:
124 * +------------------------+ <- sp in childregs (= tos)
126 * +------------------------+ <- thread.sp = sp in dummy-frame
127 * | dummy-frame | (saved in dummy-frame spill-area)
128 * +------------------------+
130 * We create a dummy frame to return to ret_from_fork:
131 * a0 points to ret_from_fork (simulating a call4)
132 * sp points to itself (thread.sp)
135 * Note: This is a pristine frame, so we don't need any spill region on top of
139 int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
140 unsigned long unused,
141 struct task_struct * p, struct pt_regs * regs)
143 struct pt_regs *childregs;
145 int user_mode = user_mode(regs);
147 /* Set up new TSS. */
148 tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
150 childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
152 childregs = (struct pt_regs*)tos - 1;
156 /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
157 *((int*)childregs - 3) = (unsigned long)childregs;
158 *((int*)childregs - 4) = 0;
160 childregs->areg[1] = tos;
161 childregs->areg[2] = 0;
162 p->set_child_tid = p->clear_child_tid = NULL;
163 p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
164 p->thread.sp = (unsigned long)childregs;
165 if (user_mode(regs)) {
167 int len = childregs->wmask & ~0xf;
168 childregs->areg[1] = usp;
169 memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
170 ®s->areg[XCHAL_NUM_AREGS - len/4], len);
172 if (clone_flags & CLONE_SETTLS)
173 childregs->areg[2] = childregs->areg[6];
176 /* In kernel space, we start a new thread with a new stack. */
177 childregs->wmask = 1;
184 * Create a kernel thread
187 int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
191 ("mov a5, %4\n\t" /* preserve fn in a5 */
192 "mov a6, %3\n\t" /* preserve and setup arg in a6 */
193 "movi a2, %1\n\t" /* load __NR_clone for syscall*/
194 "mov a3, sp\n\t" /* sp check and sys_clone */
195 "mov a4, %5\n\t" /* load flags for syscall */
197 "beq a3, sp, 1f\n\t" /* branch if parent */
198 "callx4 a5\n\t" /* call fn */
199 "movi a2, %2\n\t" /* load __NR_exit for syscall */
200 "mov a3, a6\n\t" /* load fn return value */
203 "mov %0, a2\n\t" /* parent returns zero */
205 :"i" (__NR_clone), "i" (__NR_exit),
207 "r" (flags | CLONE_VM)
208 : "a2", "a3", "a4", "a5", "a6" );
214 * These bracket the sleeping functions..
217 unsigned long get_wchan(struct task_struct *p)
219 unsigned long sp, pc;
220 unsigned long stack_page = (unsigned long) task_stack_page(p);
223 if (!p || p == current || p->state == TASK_RUNNING)
227 pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);
230 if (sp < stack_page + sizeof(struct task_struct) ||
231 sp >= (stack_page + THREAD_SIZE) ||
234 if (!in_sched_functions(pc))
237 /* Stack layout: sp-4: ra, sp-3: sp' */
239 pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp);
240 sp = *(unsigned long *)sp - 3;
241 } while (count++ < 16);
246 * do_copy_regs() gathers information from 'struct pt_regs' and
247 * 'current->thread.areg[]' to fill in the xtensa_gregset_t
250 * xtensa_gregset_t and 'struct pt_regs' are vastly different formats
251 * of processor registers. Besides different ordering,
252 * xtensa_gregset_t contains non-live register information that
253 * 'struct pt_regs' does not. Exception handling (primarily) uses
254 * 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t.
258 void do_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs,
259 struct task_struct *tsk)
263 elfregs->xchal_config_id0 = XCHAL_HW_CONFIGID0;
264 elfregs->xchal_config_id1 = XCHAL_HW_CONFIGID1;
266 __asm__ __volatile__ ("rsr %0, 176\n" : "=a" (i));
268 __asm__ __volatile__ ("rsr %0, 208\n" : "=a" (i));
271 /* Note: PS.EXCM is not set while user task is running; its
272 * being set in regs->ps is for exception handling convenience.
275 elfregs->pc = regs->pc;
276 elfregs->ps = (regs->ps & ~XCHAL_PS_EXCM_MASK);
277 elfregs->exccause = regs->exccause;
278 elfregs->excvaddr = regs->excvaddr;
279 elfregs->windowbase = regs->windowbase;
280 elfregs->windowstart = regs->windowstart;
281 elfregs->lbeg = regs->lbeg;
282 elfregs->lend = regs->lend;
283 elfregs->lcount = regs->lcount;
284 elfregs->sar = regs->sar;
285 elfregs->syscall = regs->syscall;
287 /* Copy register file.
288 * The layout looks like this:
290 * | a0 ... a15 | Z ... Z | arX ... arY |
291 * current window unused saved frames
294 memset (elfregs->ar, 0, sizeof(elfregs->ar));
296 wb_offset = regs->windowbase * 4;
297 n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16;
299 for (i = 0; i < n; i++)
300 elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i];
302 n = (regs->wmask >> 4) * 4;
304 for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--)
305 elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i];
308 void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
310 do_copy_regs ((xtensa_gregset_t *)elfregs, regs, current);
314 /* The inverse of do_copy_regs(). No error or sanity checking. */
316 void do_restore_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs,
317 struct task_struct *tsk)
321 /* Note: PS.EXCM is not set while user task is running; it
322 * needs to be set in regs->ps is for exception handling convenience.
325 regs->pc = elfregs->pc;
326 regs->ps = (elfregs->ps | XCHAL_PS_EXCM_MASK);
327 regs->exccause = elfregs->exccause;
328 regs->excvaddr = elfregs->excvaddr;
329 regs->windowbase = elfregs->windowbase;
330 regs->windowstart = elfregs->windowstart;
331 regs->lbeg = elfregs->lbeg;
332 regs->lend = elfregs->lend;
333 regs->lcount = elfregs->lcount;
334 regs->sar = elfregs->sar;
335 regs->syscall = elfregs->syscall;
337 /* Clear everything. */
339 memset (regs->areg, 0, sizeof(regs->areg));
341 /* Copy regs from live window frame. */
343 wb_offset = regs->windowbase * 4;
344 n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16;
346 for (i = 0; i < n; i++)
347 regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i];
349 n = (regs->wmask >> 4) * 4;
351 for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--)
352 regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i];
356 * do_save_fpregs() gathers information from 'struct pt_regs' and
357 * 'current->thread' to fill in the elf_fpregset_t structure.
359 * Core files and ptrace use elf_fpregset_t.
362 void do_save_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs,
363 struct task_struct *tsk)
367 extern unsigned char _xtensa_reginfo_tables[];
368 extern unsigned _xtensa_reginfo_table_size;
372 /* Before dumping coprocessor state from memory,
373 * ensure any live coprocessor contents for this
374 * task are first saved to memory:
376 local_irq_save(flags);
378 for (i = 0; i < XCHAL_CP_MAX; i++) {
379 if (tsk == coprocessor_info[i].owner) {
380 enable_coprocessor(i);
381 save_coprocessor_registers(
382 tsk->thread.cp_save+coprocessor_info[i].offset,i);
383 disable_coprocessor(i);
387 local_irq_restore(flags);
389 /* Now dump coprocessor & extra state: */
390 memcpy((unsigned char*)fpregs,
391 _xtensa_reginfo_tables, _xtensa_reginfo_table_size);
392 memcpy((unsigned char*)fpregs + _xtensa_reginfo_table_size,
393 tsk->thread.cp_save, XTENSA_CP_EXTRA_SIZE);
398 * The inverse of do_save_fpregs().
399 * Copies coprocessor and extra state from fpregs into regs and tsk->thread.
400 * Returns 0 on success, non-zero if layout doesn't match.
403 int do_restore_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs,
404 struct task_struct *tsk)
408 extern unsigned char _xtensa_reginfo_tables[];
409 extern unsigned _xtensa_reginfo_table_size;
413 /* Make sure save area layouts match.
414 * FIXME: in the future we could allow restoring from
415 * a different layout of the same registers, by comparing
416 * fpregs' table with _xtensa_reginfo_tables and matching
417 * entries and copying registers one at a time.
418 * Not too sure yet whether that's very useful.
421 if( memcmp((unsigned char*)fpregs,
422 _xtensa_reginfo_tables, _xtensa_reginfo_table_size) ) {
426 /* Before restoring coprocessor state from memory,
427 * ensure any live coprocessor contents for this
428 * task are first invalidated.
431 local_irq_save(flags);
433 for (i = 0; i < XCHAL_CP_MAX; i++) {
434 if (tsk == coprocessor_info[i].owner) {
435 enable_coprocessor(i);
436 save_coprocessor_registers(
437 tsk->thread.cp_save+coprocessor_info[i].offset,i);
438 coprocessor_info[i].owner = 0;
439 disable_coprocessor(i);
443 local_irq_restore(flags);
445 /* Now restore coprocessor & extra state: */
447 memcpy(tsk->thread.cp_save,
448 (unsigned char*)fpregs + _xtensa_reginfo_table_size,
449 XTENSA_CP_EXTRA_SIZE);
454 * Fill in the CP structure for a core dump for a particular task.
458 dump_task_fpu(struct pt_regs *regs, struct task_struct *task, elf_fpregset_t *r)
460 /* see asm/coprocessor.h for this magic number 16 */
461 #if XTENSA_CP_EXTRA_SIZE > 16
462 do_save_fpregs (r, regs, task);
464 /* For now, bit 16 means some extra state may be present: */
465 // FIXME!! need to track to return more accurate mask
466 return 0x10000 | XCHAL_CP_MASK;
468 return 0; /* no coprocessors active on this processor */
473 * Fill in the CP structure for a core dump.
474 * This includes any FPU coprocessor.
475 * Here, we dump all coprocessors, and other ("extra") custom state.
477 * This function is called by elf_core_dump() in fs/binfmt_elf.c
478 * (in which case 'regs' comes from calls to do_coredump, see signals.c).
480 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
482 return dump_task_fpu(regs, current, r);