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   1 /***********************************************************************
   2  * Copyright 2001 MontaVista Software Inc.
   3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
   4  *
   5  * drivers/sound/nec_vrc5477.c
   6  *     AC97 sound dirver for NEC Vrc5477 chip (an integrated,
   7  *     multi-function controller chip for MIPS CPUs)
   8  *
   9  * VRA support Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  ***********************************************************************
  16  */
  17
  18 /*
  19  * This code is derived from ite8172.c, which is written by Steve Longerbeam.
  20  *
  21  * Features:
  22  *   Currently we only support the following capabilities:
  23  *      . mono output to PCM L/R (line out).
  24  *      . stereo output to PCM L/R (line out).
  25  *      . mono input from PCM L (line in).
  26  *      . stereo output from PCM (line in).
  27  *      . sampling rate at 48k or variable sampling rate
  28  *      . support /dev/dsp, /dev/mixer devices, standard OSS devices.
  29  *      . only support 16-bit PCM format (hardware limit, no software
  30  *        translation)
  31  *      . support duplex, but no trigger or realtime.
  32  *
  33  *   Specifically the following are not supported:
  34  *      . app-set frag size.
  35  *      . mmap'ed buffer access
  36  */
  37
  38 /*
  39  * Original comments from ite8172.c file.
  40  */
  41
  42 /*
  43  *
  44  * Notes:
  45  *
  46  *  1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
  47  *     taken, slightly modified or not at all, from the ES1371 driver,
  48  *     so refer to the credits in es1371.c for those. The rest of the
  49  *     code (probe, open, read, write, the ISR, etc.) is new.
  50  *  2. The following support is untested:
  51  *      * Memory mapping the audio buffers, and the ioctl controls that go
  52  *        with it.
  53  *      * S/PDIF output.
  54  *  3. The following is not supported:
  55  *      * I2S input.
  56  *      * legacy audio mode.
  57  *  4. Support for volume button interrupts is implemented but doesn't
  58  *     work yet.
  59  *
  60  *  Revision history
  61  *    02.08.2001  0.1   Initial release
  62  */
  63
  64 #include <linux/module.h>
  65 #include <linux/string.h>
  66 #include <linux/kernel.h>
  67 #include <linux/ioport.h>
  68 #include <linux/sched.h>
  69 #include <linux/delay.h>
  70 #include <linux/sound.h>
  71 #include <linux/slab.h>
  72 #include <linux/soundcard.h>
  73 #include <linux/pci.h>
  74 #include <linux/init.h>
  75 #include <linux/poll.h>
  76 #include <linux/bitops.h>
  77 #include <linux/proc_fs.h>
  78 #include <linux/spinlock.h>
  79 #include <linux/smp_lock.h>
  80 #include <linux/ac97_codec.h>
  81 #include <asm/io.h>
  82 #include <asm/dma.h>
  83 #include <asm/uaccess.h>
  84
  85 /* -------------------debug macros -------------------------------------- */
  86 /* #undef VRC5477_AC97_DEBUG */
  87 #define VRC5477_AC97_DEBUG
  88
  89 #undef VRC5477_AC97_VERBOSE_DEBUG
  90 /* #define VRC5477_AC97_VERBOSE_DEBUG */
  91
  92 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  93 #define VRC5477_AC97_DEBUG
  94 #endif
  95
  96 #if defined(VRC5477_AC97_DEBUG)
  97 #define ASSERT(x)  if (!(x)) { \
  98         panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); }
  99 #else
 100 #define ASSERT(x)
 101 #endif /* VRC5477_AC97_DEBUG */
 102
 103 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
 104 static u16 inTicket;            /* check sync between intr & write */
 105 static u16 outTicket;
 106 #endif
 107
 108 /* --------------------------------------------------------------------- */
 109
 110 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 111
 112 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 113
 114 #define         VRC5477_INT_CLR         0x0
 115 #define         VRC5477_INT_STATUS      0x0
 116 #define         VRC5477_CODEC_WR        0x4
 117 #define         VRC5477_CODEC_RD        0x8
 118 #define         VRC5477_CTRL            0x18
 119 #define         VRC5477_ACLINK_CTRL     0x1c
 120 #define         VRC5477_INT_MASK        0x24
 121
 122 #define         VRC5477_DAC1_CTRL       0x30
 123 #define         VRC5477_DAC1L           0x34
 124 #define         VRC5477_DAC1_BADDR      0x38
 125 #define         VRC5477_DAC2_CTRL       0x3c
 126 #define         VRC5477_DAC2L           0x40
 127 #define         VRC5477_DAC2_BADDR      0x44
 128 #define         VRC5477_DAC3_CTRL       0x48
 129 #define         VRC5477_DAC3L           0x4c
 130 #define         VRC5477_DAC3_BADDR      0x50
 131
 132 #define         VRC5477_ADC1_CTRL       0x54
 133 #define         VRC5477_ADC1L           0x58
 134 #define         VRC5477_ADC1_BADDR      0x5c
 135 #define         VRC5477_ADC2_CTRL       0x60
 136 #define         VRC5477_ADC2L           0x64
 137 #define         VRC5477_ADC2_BADDR      0x68
 138 #define         VRC5477_ADC3_CTRL       0x6c
 139 #define         VRC5477_ADC3L           0x70
 140 #define         VRC5477_ADC3_BADDR      0x74
 141
 142 #define         VRC5477_CODEC_WR_RWC    (1 << 23)
 143
 144 #define         VRC5477_CODEC_RD_RRDYA  (1 << 31)
 145 #define         VRC5477_CODEC_RD_RRDYD  (1 << 30)
 146
 147 #define         VRC5477_ACLINK_CTRL_RST_ON      (1 << 15)
 148 #define         VRC5477_ACLINK_CTRL_RST_TIME    0x7f
 149 #define         VRC5477_ACLINK_CTRL_SYNC_ON     (1 << 30)
 150 #define         VRC5477_ACLINK_CTRL_CK_STOP_ON  (1 << 31)
 151
 152 #define         VRC5477_CTRL_DAC2ENB            (1 << 15)
 153 #define         VRC5477_CTRL_ADC2ENB            (1 << 14)
 154 #define         VRC5477_CTRL_DAC1ENB            (1 << 13)
 155 #define         VRC5477_CTRL_ADC1ENB            (1 << 12)
 156
 157 #define         VRC5477_INT_MASK_NMASK          (1 << 31)
 158 #define         VRC5477_INT_MASK_DAC1END        (1 << 5)
 159 #define         VRC5477_INT_MASK_DAC2END        (1 << 4)
 160 #define         VRC5477_INT_MASK_DAC3END        (1 << 3)
 161 #define         VRC5477_INT_MASK_ADC1END        (1 << 2)
 162 #define         VRC5477_INT_MASK_ADC2END        (1 << 1)
 163 #define         VRC5477_INT_MASK_ADC3END        (1 << 0)
 164
 165 #define         VRC5477_DMA_ACTIVATION          (1 << 31)
 166 #define         VRC5477_DMA_WIP                 (1 << 30)
 167
 168
 169 #define VRC5477_AC97_MODULE_NAME "NEC_Vrc5477_audio"
 170 #define PFX VRC5477_AC97_MODULE_NAME ": "
 171
 172 /* --------------------------------------------------------------------- */
 173
 174 struct vrc5477_ac97_state {
 175         /* list of vrc5477_ac97 devices */
 176         struct list_head devs;
 177
 178         /* the corresponding pci_dev structure */
 179         struct pci_dev *dev;
 180
 181         /* soundcore stuff */
 182         int dev_audio;
 183
 184         /* hardware resources */
 185         unsigned long io;
 186         unsigned int irq;
 187
 188 #ifdef VRC5477_AC97_DEBUG
 189         /* debug /proc entry */
 190         struct proc_dir_entry *ps;
 191         struct proc_dir_entry *ac97_ps;
 192 #endif /* VRC5477_AC97_DEBUG */
 193
 194         struct ac97_codec *codec;
 195
 196         unsigned dacChannels, adcChannels;
 197         unsigned short dacRate, adcRate;
 198         unsigned short extended_status;
 199
 200         spinlock_t lock;
 201         struct semaphore open_sem;
 202         mode_t open_mode;
 203         wait_queue_head_t open_wait;
 204
 205         struct dmabuf {
 206                 void *lbuf, *rbuf;
 207                 dma_addr_t lbufDma, rbufDma;
 208                 unsigned bufOrder;
 209                 unsigned numFrag;
 210                 unsigned fragShift;
 211                 unsigned fragSize;      /* redundant */
 212                 unsigned fragTotalSize; /* = numFrag * fragSize(real)  */
 213                 unsigned nextIn;
 214                 unsigned nextOut;
 215                 int count;
 216                 unsigned error; /* over/underrun */
 217                 wait_queue_head_t wait;
 218                 /* OSS stuff */
 219                 unsigned stopped:1;
 220                 unsigned ready:1;
 221         } dma_dac, dma_adc;
 222
 223         #define WORK_BUF_SIZE   2048
 224         struct {
 225                 u16 lchannel;
 226                 u16 rchannel;
 227         } workBuf[WORK_BUF_SIZE/4];
 228 };
 229
 230 /* --------------------------------------------------------------------- */
 231
 232 static LIST_HEAD(devs);
 233
 234 /* --------------------------------------------------------------------- */
 235
 236 static inline unsigned ld2(unsigned int x)
 237 {
 238     unsigned r = 0;
 239
 240     if (x >= 0x10000) {
 241         x >>= 16;
 242         r += 16;
 243     }
 244     if (x >= 0x100) {
 245         x >>= 8;
 246         r += 8;
 247     }
 248     if (x >= 0x10) {
 249         x >>= 4;
 250         r += 4;
 251     }
 252     if (x >= 4) {
 253         x >>= 2;
 254         r += 2;
 255     }
 256     if (x >= 2)
 257         r++;
 258     return r;
 259 }
 260
 261 /* --------------------------------------------------------------------- */
 262
 263 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 264 {
 265         struct vrc5477_ac97_state *s =
 266                 (struct vrc5477_ac97_state *)codec->private_data;
 267         unsigned long flags;
 268         u32 result;
 269
 270         spin_lock_irqsave(&s->lock, flags);
 271
 272         /* wait until we can access codec registers */
 273         while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
 274
 275         /* write the address and "read" command to codec */
 276         addr = addr & 0x7f;
 277         outl((addr << 16) | VRC5477_CODEC_WR_RWC, s->io + VRC5477_CODEC_WR);
 278
 279         /* get the return result */
 280         udelay(100); /* workaround hardware bug */
 281         while ( (result = inl(s->io + VRC5477_CODEC_RD)) &
 282                 (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) {
 283                 /* we get either addr or data, or both */
 284                 if (result & VRC5477_CODEC_RD_RRDYA) {
 285                         ASSERT(addr == ((result >> 16) & 0x7f) );
 286                 }
 287                 if (result & VRC5477_CODEC_RD_RRDYD) {
 288                         break;
 289                 }
 290         }
 291
 292         spin_unlock_irqrestore(&s->lock, flags);
 293
 294         return result & 0xffff;
 295 }
 296
 297
 298 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 299 {
 300         struct vrc5477_ac97_state *s =
 301                 (struct vrc5477_ac97_state *)codec->private_data;
 302         unsigned long flags;
 303
 304         spin_lock_irqsave(&s->lock, flags);
 305
 306         /* wait until we can access codec registers */
 307         while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
 308
 309         /* write the address and value to codec */
 310         outl((addr << 16) | data, s->io + VRC5477_CODEC_WR);
 311
 312         spin_unlock_irqrestore(&s->lock, flags);
 313 }
 314
 315
 316 static void waitcodec(struct ac97_codec *codec)
 317 {
 318         struct vrc5477_ac97_state *s =
 319                 (struct vrc5477_ac97_state *)codec->private_data;
 320
 321         /* wait until we can access codec registers */
 322         while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
 323 }
 324
 325 static int ac97_codec_not_present(struct ac97_codec *codec)
 326 {
 327         struct vrc5477_ac97_state *s =
 328                 (struct vrc5477_ac97_state *)codec->private_data;
 329         unsigned long flags;
 330         unsigned short count  = 0xffff;
 331
 332         spin_lock_irqsave(&s->lock, flags);
 333
 334         /* wait until we can access codec registers */
 335         do {
 336                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
 337                        break;
 338         } while (--count);
 339
 340         if (count == 0) {
 341                 spin_unlock_irqrestore(&s->lock, flags);
 342                 return -1;
 343         }
 344
 345         /* write 0 to reset */
 346         outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
 347
 348         /* test whether we get a response from ac97 chip */
 349         count  = 0xffff;
 350         do {
 351                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
 352                        break;
 353         } while (--count);
 354
 355         if (count == 0) {
 356                 spin_unlock_irqrestore(&s->lock, flags);
 357                 return -1;
 358         }
 359         spin_unlock_irqrestore(&s->lock, flags);
 360         return 0;
 361 }
 362
 363 /* --------------------------------------------------------------------- */
 364
 365 static void vrc5477_ac97_delay(int msec)
 366 {
 367         unsigned long tmo;
 368         signed long tmo2;
 369
 370         if (in_interrupt())
 371                 return;
 372
 373         tmo = jiffies + (msec*HZ)/1000;
 374         for (;;) {
 375                 tmo2 = tmo - jiffies;
 376                 if (tmo2 <= 0)
 377                         break;
 378                 schedule_timeout(tmo2);
 379         }
 380 }
 381
 382
 383 static void set_adc_rate(struct vrc5477_ac97_state *s, unsigned rate)
 384 {
 385         wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, rate);
 386         s->adcRate = rate;
 387 }
 388
 389
 390 static void set_dac_rate(struct vrc5477_ac97_state *s, unsigned rate)
 391 {
 392         if(s->extended_status & AC97_EXTSTAT_VRA) {
 393         wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, rate);
 394                 s->dacRate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 395         }
 396 }
 397
 398 static int ac97_codec_not_present(struct ac97_codec *codec)
 399 {
 400         struct vrc5477_ac97_state *s =
 401                 (struct vrc5477_ac97_state *)codec->private_data;
 402         unsigned long flags;
 403         unsigned short count  = 0xffff;
 404
 405         spin_lock_irqsave(&s->lock, flags);
 406
 407         /* wait until we can access codec registers */
 408         do {
 409                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
 410                        break;
 411         } while (--count);
 412
 413         if (count == 0) {
 414                 spin_unlock_irqrestore(&s->lock, flags);
 415                 return -1;
 416         }
 417
 418         /* write 0 to reset */
 419         outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
 420
 421         /* test whether we get a response from ac97 chip */
 422         count  = 0xffff;
 423         do {
 424                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
 425                        break;
 426         } while (--count);
 427
 428         if (count == 0) {
 429                 spin_unlock_irqrestore(&s->lock, flags);
 430                 return -1;
 431         }
 432         spin_unlock_irqrestore(&s->lock, flags);
 433         return 0;
 434 }
 435
 436 /* --------------------------------------------------------------------- */
 437
 438 static inline void
 439 stop_dac(struct vrc5477_ac97_state *s)
 440 {
 441         struct dmabuf* db = &s->dma_dac;
 442         unsigned long flags;
 443         u32 temp;
 444
 445         spin_lock_irqsave(&s->lock, flags);
 446
 447         if (db->stopped) {
 448                 spin_unlock_irqrestore(&s->lock, flags);
 449                 return;
 450         }
 451
 452         /* deactivate the dma */
 453         outl(0, s->io + VRC5477_DAC1_CTRL);
 454         outl(0, s->io + VRC5477_DAC2_CTRL);
 455
 456         /* wait for DAM completely stop */
 457         while (inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
 458         while (inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
 459
 460         /* disable dac slots in aclink */
 461         temp = inl(s->io + VRC5477_CTRL);
 462         temp &= ~ (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
 463         outl (temp, s->io + VRC5477_CTRL);
 464
 465         /* disable interrupts */
 466         temp = inl(s->io + VRC5477_INT_MASK);
 467         temp &= ~ (VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END);
 468         outl (temp, s->io + VRC5477_INT_MASK);
 469
 470         /* clear pending ones */
 471         outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
 472              s->io +  VRC5477_INT_CLR);
 473
 474         db->stopped = 1;
 475
 476         spin_unlock_irqrestore(&s->lock, flags);
 477 }
 478
 479 static void start_dac(struct vrc5477_ac97_state *s)
 480 {
 481         struct dmabuf* db = &s->dma_dac;
 482         unsigned long flags;
 483         u32 dmaLength;
 484         u32 temp;
 485
 486         spin_lock_irqsave(&s->lock, flags);
 487
 488         if (!db->stopped) {
 489                 spin_unlock_irqrestore(&s->lock, flags);
 490                 return;
 491         }
 492
 493         /* we should have some data to do the DMA trasnfer */
 494         ASSERT(db->count >= db->fragSize);
 495
 496         /* clear pending fales interrupts */
 497         outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
 498              s->io +  VRC5477_INT_CLR);
 499
 500         /* enable interrupts */
 501         temp = inl(s->io + VRC5477_INT_MASK);
 502         temp |= VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
 503         outl(temp, s->io +  VRC5477_INT_MASK);
 504
 505         /* setup dma base addr */
 506         outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC1_BADDR);
 507         if (s->dacChannels == 1) {
 508                 outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
 509         } else {
 510                 outl(db->rbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
 511         }
 512
 513         /* set dma length, in the unit of 0x10 bytes */
 514         dmaLength = db->fragSize >> 4;
 515         outl(dmaLength, s->io + VRC5477_DAC1L);
 516         outl(dmaLength, s->io + VRC5477_DAC2L);
 517
 518         /* activate dma */
 519         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC1_CTRL);
 520         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC2_CTRL);
 521
 522         /* enable dac slots - we should hear the music now! */
 523         temp = inl(s->io + VRC5477_CTRL);
 524         temp |= (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
 525         outl (temp, s->io + VRC5477_CTRL);
 526
 527         /* it is time to setup next dma transfer */
 528         ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
 529         ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
 530
 531         temp = db->nextOut + db->fragSize;
 532         if (temp >= db->fragTotalSize) {
 533                 ASSERT(temp == db->fragTotalSize);
 534                 temp = 0;
 535         }
 536
 537         outl(db->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
 538         if (s->dacChannels == 1) {
 539                 outl(db->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
 540         } else {
 541                 outl(db->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
 542         }
 543
 544         db->stopped = 0;
 545
 546 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
 547         outTicket = *(u16*)(db->lbuf+db->nextOut);
 548         if (db->count > db->fragSize) {
 549                 ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp));
 550         }
 551 #endif
 552
 553         spin_unlock_irqrestore(&s->lock, flags);
 554 }
 555
 556 static inline void stop_adc(struct vrc5477_ac97_state *s)
 557 {
 558         struct dmabuf* db = &s->dma_adc;
 559         unsigned long flags;
 560         u32 temp;
 561
 562         spin_lock_irqsave(&s->lock, flags);
 563
 564         if (db->stopped) {
 565                 spin_unlock_irqrestore(&s->lock, flags);
 566                 return;
 567         }
 568
 569         /* deactivate the dma */
 570         outl(0, s->io + VRC5477_ADC1_CTRL);
 571         outl(0, s->io + VRC5477_ADC2_CTRL);
 572
 573         /* disable adc slots in aclink */
 574         temp = inl(s->io + VRC5477_CTRL);
 575         temp &= ~ (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
 576         outl (temp, s->io + VRC5477_CTRL);
 577
 578         /* disable interrupts */
 579         temp = inl(s->io + VRC5477_INT_MASK);
 580         temp &= ~ (VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END);
 581         outl (temp, s->io + VRC5477_INT_MASK);
 582
 583         /* clear pending ones */
 584         outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
 585              s->io +  VRC5477_INT_CLR);
 586
 587         db->stopped = 1;
 588
 589         spin_unlock_irqrestore(&s->lock, flags);
 590 }
 591
 592 static void start_adc(struct vrc5477_ac97_state *s)
 593 {
 594         struct dmabuf* db = &s->dma_adc;
 595         unsigned long flags;
 596         u32 dmaLength;
 597         u32 temp;
 598
 599         spin_lock_irqsave(&s->lock, flags);
 600
 601         if (!db->stopped) {
 602                 spin_unlock_irqrestore(&s->lock, flags);
 603                 return;
 604         }
 605
 606         /* we should at least have some free space in the buffer */
 607         ASSERT(db->count < db->fragTotalSize - db->fragSize * 2);
 608
 609         /* clear pending ones */
 610         outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
 611              s->io +  VRC5477_INT_CLR);
 612
 613         /* enable interrupts */
 614         temp = inl(s->io + VRC5477_INT_MASK);
 615         temp |= VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
 616         outl(temp, s->io +  VRC5477_INT_MASK);
 617
 618         /* setup dma base addr */
 619         outl(db->lbufDma + db->nextIn, s->io + VRC5477_ADC1_BADDR);
 620         outl(db->rbufDma + db->nextIn, s->io + VRC5477_ADC2_BADDR);
 621
 622         /* setup dma length */
 623         dmaLength = db->fragSize >> 4;
 624         outl(dmaLength, s->io + VRC5477_ADC1L);
 625         outl(dmaLength, s->io + VRC5477_ADC2L);
 626
 627         /* activate dma */
 628         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC1_CTRL);
 629         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC2_CTRL);
 630
 631         /* enable adc slots */
 632         temp = inl(s->io + VRC5477_CTRL);
 633         temp |= (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
 634         outl (temp, s->io + VRC5477_CTRL);
 635
 636         /* it is time to setup next dma transfer */
 637         temp = db->nextIn + db->fragSize;
 638         if (temp >= db->fragTotalSize) {
 639                 ASSERT(temp == db->fragTotalSize);
 640                 temp = 0;
 641         }
 642         outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
 643         outl(db->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
 644
 645         db->stopped = 0;
 646
 647         spin_unlock_irqrestore(&s->lock, flags);
 648 }
 649
 650 /* --------------------------------------------------------------------- */
 651
 652 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
 653 #define DMABUF_MINORDER 1
 654
 655 static inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
 656                                   struct dmabuf *db)
 657 {
 658         if (db->lbuf) {
 659                 ASSERT(db->rbuf);
 660                 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
 661                                     db->lbuf, db->lbufDma);
 662                 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
 663                                     db->rbuf, db->rbufDma);
 664                 db->lbuf = db->rbuf = NULL;
 665         }
 666         db->nextIn = db->nextOut = 0;
 667         db->ready = 0;
 668 }
 669
 670 static int prog_dmabuf(struct vrc5477_ac97_state *s,
 671                        struct dmabuf *db,
 672                        unsigned rate)
 673 {
 674         int order;
 675         unsigned bufsize;
 676
 677         if (!db->lbuf) {
 678                 ASSERT(!db->rbuf);
 679
 680                 db->ready = 0;
 681                 for (order = DMABUF_DEFAULTORDER;
 682                      order >= DMABUF_MINORDER;
 683                      order--) {
 684                         db->lbuf = pci_alloc_consistent(s->dev,
 685                                                         PAGE_SIZE << order,
 686                                                         &db->lbufDma);
 687                         db->rbuf = pci_alloc_consistent(s->dev,
 688                                                         PAGE_SIZE << order,
 689                                                         &db->rbufDma);
 690                         if (db->lbuf && db->rbuf) break;
 691                         if (db->lbuf) {
 692                             ASSERT(!db->rbuf);
 693                             pci_free_consistent(s->dev,
 694                                                 PAGE_SIZE << order,
 695                                                 db->lbuf,
 696                                                 db->lbufDma);
 697                         }
 698                 }
 699                 if (!db->lbuf) {
 700                         ASSERT(!db->rbuf);
 701                         return -ENOMEM;
 702                 }
 703
 704                 db->bufOrder = order;
 705         }
 706
 707         db->count = 0;
 708         db->nextIn = db->nextOut = 0;
 709
 710         bufsize = PAGE_SIZE << db->bufOrder;
 711         db->fragShift = ld2(rate * 2 / 100);
 712         if (db->fragShift < 4) db->fragShift = 4;
 713
 714         db->numFrag = bufsize >> db->fragShift;
 715         while (db->numFrag < 4 && db->fragShift > 4) {
 716                 db->fragShift--;
 717                 db->numFrag = bufsize >> db->fragShift;
 718         }
 719         db->fragSize = 1 << db->fragShift;
 720         db->fragTotalSize = db->numFrag << db->fragShift;
 721         memset(db->lbuf, 0, db->fragTotalSize);
 722         memset(db->rbuf, 0, db->fragTotalSize);
 723
 724         db->ready = 1;
 725
 726         return 0;
 727 }
 728
 729 static inline int prog_dmabuf_adc(struct vrc5477_ac97_state *s)
 730 {
 731     stop_adc(s);
 732     return prog_dmabuf(s, &s->dma_adc, s->adcRate);
 733 }
 734
 735 static inline int prog_dmabuf_dac(struct vrc5477_ac97_state *s)
 736 {
 737     stop_dac(s);
 738     return prog_dmabuf(s, &s->dma_dac, s->dacRate);
 739 }
 740
 741
 742 /* --------------------------------------------------------------------- */
 743 /* hold spinlock for the following! */
 744
 745 static inline void vrc5477_ac97_adc_interrupt(struct vrc5477_ac97_state *s)
 746 {
 747         struct dmabuf* adc = &s->dma_adc;
 748         unsigned temp;
 749
 750         /* we need two frags avaiable because one is already being used
 751          * and the other will be used when next interrupt happens.
 752          */
 753         if (adc->count >= adc->fragTotalSize - adc->fragSize) {
 754                 stop_adc(s);
 755                 adc->error++;
 756                 printk(KERN_INFO PFX "adc overrun\n");
 757                 return;
 758         }
 759
 760         /* set the base addr for next DMA transfer */
 761         temp = adc->nextIn + 2*adc->fragSize;
 762         if (temp >= adc->fragTotalSize) {
 763                 ASSERT( (temp == adc->fragTotalSize) ||
 764                              (temp == adc->fragTotalSize + adc->fragSize) );
 765                 temp -= adc->fragTotalSize;
 766         }
 767         outl(adc->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
 768         outl(adc->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
 769
 770         /* adjust nextIn */
 771         adc->nextIn += adc->fragSize;
 772         if (adc->nextIn >= adc->fragTotalSize) {
 773                 ASSERT(adc->nextIn == adc->fragTotalSize);
 774                 adc->nextIn = 0;
 775         }
 776
 777         /* adjust count */
 778         adc->count += adc->fragSize;
 779
 780         /* wake up anybody listening */
 781         if (waitqueue_active(&adc->wait)) {
 782                 wake_up_interruptible(&adc->wait);
 783         }
 784 }
 785
 786 static inline void vrc5477_ac97_dac_interrupt(struct vrc5477_ac97_state *s)
 787 {
 788         struct dmabuf* dac = &s->dma_dac;
 789         unsigned temp;
 790
 791         /* next DMA transfer should already started */
 792         // ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
 793         // ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
 794
 795         /* let us set for next next DMA transfer */
 796         temp = dac->nextOut + dac->fragSize*2;
 797         if (temp >= dac->fragTotalSize) {
 798                 ASSERT( (temp == dac->fragTotalSize) ||
 799                              (temp == dac->fragTotalSize + dac->fragSize) );
 800                 temp -= dac->fragTotalSize;
 801         }
 802         outl(dac->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
 803         if (s->dacChannels == 1) {
 804                 outl(dac->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
 805         } else {
 806                 outl(dac->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
 807         }
 808
 809 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
 810         if (*(u16*)(dac->lbuf +  dac->nextOut) != outTicket) {
 811                 printk("assert fail: - %d vs %d\n",
 812                         *(u16*)(dac->lbuf +  dac->nextOut),
 813                         outTicket);
 814                 ASSERT(1 == 0);
 815         }
 816 #endif
 817
 818         /* adjust nextOut pointer */
 819         dac->nextOut += dac->fragSize;
 820         if (dac->nextOut >= dac->fragTotalSize) {
 821                 ASSERT(dac->nextOut == dac->fragTotalSize);
 822                 dac->nextOut = 0;
 823         }
 824
 825         /* adjust count */
 826         dac->count -= dac->fragSize;
 827         if (dac->count <=0 ) {
 828                 /* buffer under run */
 829                 dac->count = 0;
 830                 dac->nextIn = dac->nextOut;
 831                 stop_dac(s);
 832         }
 833
 834 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
 835         if (dac->count) {
 836                 outTicket ++;
 837                 ASSERT(*(u16*)(dac->lbuf +  dac->nextOut) == outTicket);
 838         }
 839 #endif
 840
 841         /* we cannot have both under run and someone is waiting on us */
 842         ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) );
 843
 844         /* wake up anybody listening */
 845         if (waitqueue_active(&dac->wait))
 846                 wake_up_interruptible(&dac->wait);
 847 }
 848
 849 static irqreturn_t vrc5477_ac97_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 850 {
 851         struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)dev_id;
 852         u32 irqStatus;
 853         u32 adcInterrupts, dacInterrupts;
 854
 855         spin_lock(&s->lock);
 856
 857         /* get irqStatus and clear the detected ones */
 858         irqStatus = inl(s->io + VRC5477_INT_STATUS);
 859         outl(irqStatus, s->io + VRC5477_INT_CLR);
 860
 861         /* let us see what we get */
 862         dacInterrupts = VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
 863         adcInterrupts = VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
 864         if (irqStatus & dacInterrupts) {
 865                 /* we should get both interrupts, but just in case ...  */
 866                 if (irqStatus & VRC5477_INT_MASK_DAC1END) {
 867                         vrc5477_ac97_dac_interrupt(s);
 868                 }
 869                 if ( (irqStatus & dacInterrupts) != dacInterrupts ) {
 870                         printk(KERN_WARNING "vrc5477_ac97 : dac interrupts not in sync!!!\n");
 871                         stop_dac(s);
 872                         start_dac(s);
 873                 }
 874         } else if (irqStatus & adcInterrupts) {
 875                 /* we should get both interrupts, but just in case ...  */
 876                 if(irqStatus & VRC5477_INT_MASK_ADC1END) {
 877                         vrc5477_ac97_adc_interrupt(s);
 878                 }
 879                 if ( (irqStatus & adcInterrupts) != adcInterrupts ) {
 880                         printk(KERN_WARNING "vrc5477_ac97 : adc interrupts not in sync!!!\n");
 881                         stop_adc(s);
 882                         start_adc(s);
 883                 }
 884         }
 885
 886         spin_unlock(&s->lock);
 887         return IRQ_HANDLED;
 888 }
 889
 890 /* --------------------------------------------------------------------- */
 891
 892 static int vrc5477_ac97_open_mixdev(struct inode *inode, struct file *file)
 893 {
 894         int minor = iminor(inode);
 895         struct list_head *list;
 896         struct vrc5477_ac97_state *s;
 897
 898         for (list = devs.next; ; list = list->next) {
 899                 if (list == &devs)
 900                         return -ENODEV;
 901                 s = list_entry(list, struct vrc5477_ac97_state, devs);
 902                 if (s->codec->dev_mixer == minor)
 903                         break;
 904         }
 905         file->private_data = s;
 906         return nonseekable_open(inode, file);
 907 }
 908
 909 static int vrc5477_ac97_release_mixdev(struct inode *inode, struct file *file)
 910 {
 911         return 0;
 912 }
 913
 914
 915 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
 916                         unsigned long arg)
 917 {
 918         return codec->mixer_ioctl(codec, cmd, arg);
 919 }
 920
 921 static int vrc5477_ac97_ioctl_mixdev(struct inode *inode, struct file *file,
 922                                      unsigned int cmd, unsigned long arg)
 923 {
 924     struct vrc5477_ac97_state *s =
 925             (struct vrc5477_ac97_state *)file->private_data;
 926     struct ac97_codec *codec = s->codec;
 927
 928     return mixdev_ioctl(codec, cmd, arg);
 929 }
 930
 931 static /*const*/ struct file_operations vrc5477_ac97_mixer_fops = {
 932         .owner          = THIS_MODULE,
 933         .llseek         = no_llseek,
 934         .ioctl          = vrc5477_ac97_ioctl_mixdev,
 935         .open           = vrc5477_ac97_open_mixdev,
 936         .release        = vrc5477_ac97_release_mixdev,
 937 };
 938
 939 /* --------------------------------------------------------------------- */
 940
 941 static int drain_dac(struct vrc5477_ac97_state *s, int nonblock)
 942 {
 943         unsigned long flags;
 944         int count, tmo;
 945
 946         if (!s->dma_dac.ready)
 947                 return 0;
 948
 949         for (;;) {
 950                 spin_lock_irqsave(&s->lock, flags);
 951                 count = s->dma_dac.count;
 952                 spin_unlock_irqrestore(&s->lock, flags);
 953                 if (count <= 0)
 954                         break;
 955                 if (signal_pending(current))
 956                         break;
 957                 if (nonblock)
 958                         return -EBUSY;
 959                 tmo = 1000 * count / s->dacRate / 2;
 960                 vrc5477_ac97_delay(tmo);
 961         }
 962         if (signal_pending(current))
 963                 return -ERESTARTSYS;
 964         return 0;
 965 }
 966
 967 /* --------------------------------------------------------------------- */
 968
 969 static inline int
 970 copy_two_channel_adc_to_user(struct vrc5477_ac97_state *s,
 971                              char *buffer,
 972                              int copyCount)
 973 {
 974         struct dmabuf *db = &s->dma_adc;
 975         int bufStart = db->nextOut;
 976         for (; copyCount > 0; ) {
 977                 int i;
 978                 int count = copyCount;
 979                 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
 980                 for (i=0; i< count/2; i++) {
 981                         s->workBuf[i].lchannel =
 982                                 *(u16*)(db->lbuf + bufStart + i*2);
 983                         s->workBuf[i].rchannel =
 984                                 *(u16*)(db->rbuf + bufStart + i*2);
 985                 }
 986                 if (copy_to_user(buffer, s->workBuf, count*2)) {
 987                         return -1;
 988                 }
 989
 990                 copyCount -= count;
 991                 bufStart += count;
 992                 ASSERT(bufStart <= db->fragTotalSize);
 993                 buffer += count *2;
 994         }
 995         return 0;
 996 }
 997
 998 /* return the total bytes that is copied */
 999 static inline int
1000 copy_adc_to_user(struct vrc5477_ac97_state *s,
1001                  char * buffer,
1002                  size_t count,
1003                  int avail)
1004 {
1005         struct dmabuf *db = &s->dma_adc;
1006         int copyCount=0;
1007         int copyFragCount=0;
1008         int totalCopyCount = 0;
1009         int totalCopyFragCount = 0;
1010         unsigned long flags;
1011
1012         /* adjust count to signel channel byte count */
1013         count >>= s->adcChannels - 1;
1014
1015         /* we may have to "copy" twice as ring buffer wraps around */
1016         for (; (avail > 0) && (count > 0); ) {
1017                 /* determine max possible copy count for single channel */
1018                 copyCount = count;
1019                 if (copyCount > avail) {
1020                         copyCount = avail;
1021                 }
1022                 if (copyCount + db->nextOut > db->fragTotalSize) {
1023                         copyCount = db->fragTotalSize - db->nextOut;
1024                         ASSERT((copyCount % db->fragSize) == 0);
1025                 }
1026
1027                 copyFragCount = (copyCount-1) >> db->fragShift;
1028                 copyFragCount = (copyFragCount+1) << db->fragShift;
1029                 ASSERT(copyFragCount >= copyCount);
1030
1031                 /* we copy differently based on adc channels */
1032                 if (s->adcChannels == 1) {
1033                         if (copy_to_user(buffer,
1034                                          db->lbuf + db->nextOut,
1035                                          copyCount))
1036                                 return -1;
1037                 } else {
1038                         /* *sigh* we have to mix two streams into one  */
1039                         if (copy_two_channel_adc_to_user(s, buffer, copyCount))
1040                                 return -1;
1041                 }
1042
1043                 count -= copyCount;
1044                 totalCopyCount += copyCount;
1045                 avail -= copyFragCount;
1046                 totalCopyFragCount += copyFragCount;
1047
1048                 buffer += copyCount << (s->adcChannels-1);
1049
1050                 db->nextOut += copyFragCount;
1051                 if (db->nextOut >= db->fragTotalSize) {
1052                         ASSERT(db->nextOut == db->fragTotalSize);
1053                         db->nextOut = 0;
1054                 }
1055
1056                 ASSERT((copyFragCount % db->fragSize) == 0);
1057                 ASSERT( (count == 0) || (copyCount == copyFragCount));
1058         }
1059
1060         spin_lock_irqsave(&s->lock, flags);
1061         db->count -= totalCopyFragCount;
1062         spin_unlock_irqrestore(&s->lock, flags);
1063
1064         return totalCopyCount << (s->adcChannels-1);
1065 }
1066
1067 static ssize_t
1068 vrc5477_ac97_read(struct file *file,
1069                   char *buffer,
1070                   size_t count,
1071                   loff_t *ppos)
1072 {
1073         struct vrc5477_ac97_state *s =
1074                 (struct vrc5477_ac97_state *)file->private_data;
1075         struct dmabuf *db = &s->dma_adc;
1076         ssize_t ret = 0;
1077         unsigned long flags;
1078         int copyCount;
1079         size_t avail;
1080
1081         if (!access_ok(VERIFY_WRITE, buffer, count))
1082                 return -EFAULT;
1083
1084         ASSERT(db->ready);
1085
1086         while (count > 0) {
1087                 // wait for samples in capture buffer
1088                 do {
1089                         spin_lock_irqsave(&s->lock, flags);
1090                         if (db->stopped)
1091                                 start_adc(s);
1092                         avail = db->count;
1093                         spin_unlock_irqrestore(&s->lock, flags);
1094                         if (avail <= 0) {
1095                                 if (file->f_flags & O_NONBLOCK) {
1096                                         if (!ret)
1097                                                 ret = -EAGAIN;
1098                                         return ret;
1099                                 }
1100                                 interruptible_sleep_on(&db->wait);
1101                                 if (signal_pending(current)) {
1102                                         if (!ret)
1103                                                 ret = -ERESTARTSYS;
1104                                         return ret;
1105                                 }
1106                         }
1107                 } while (avail <= 0);
1108
1109                 ASSERT( (avail % db->fragSize) == 0);
1110                 copyCount = copy_adc_to_user(s, buffer, count, avail);
1111                 if (copyCount <=0 ) {
1112                         if (!ret) ret = -EFAULT;
1113                         return ret;
1114                 }
1115
1116                 count -= copyCount;
1117                 buffer += copyCount;
1118                 ret += copyCount;
1119         } // while (count > 0)
1120
1121         return ret;
1122 }
1123
1124 static inline int
1125 copy_two_channel_dac_from_user(struct vrc5477_ac97_state *s,
1126                                const char *buffer,
1127                                int copyCount)
1128 {
1129         struct dmabuf *db = &s->dma_dac;
1130         int bufStart = db->nextIn;
1131
1132         ASSERT(db->ready);
1133
1134         for (; copyCount > 0; ) {
1135                 int i;
1136                 int count = copyCount;
1137                 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
1138                 if (copy_from_user(s->workBuf, buffer, count*2)) {
1139                         return -1;
1140                 }
1141                 for (i=0; i< count/2; i++) {
1142                         *(u16*)(db->lbuf + bufStart + i*2) =
1143                                 s->workBuf[i].lchannel;
1144                         *(u16*)(db->rbuf + bufStart + i*2) =
1145                                 s->workBuf[i].rchannel;
1146                 }
1147
1148                 copyCount -= count;
1149                 bufStart += count;
1150                 ASSERT(bufStart <= db->fragTotalSize);
1151                 buffer += count *2;
1152         }
1153         return 0;
1154
1155 }
1156
1157 /* return the total bytes that is copied */
1158 static inline int
1159 copy_dac_from_user(struct vrc5477_ac97_state *s,
1160                    const char *buffer,
1161                    size_t count,
1162                    int avail)
1163 {
1164         struct dmabuf *db = &s->dma_dac;
1165         int copyCount=0;
1166         int copyFragCount=0;
1167         int totalCopyCount = 0;
1168         int totalCopyFragCount = 0;
1169         unsigned long flags;
1170 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1171         int i;
1172 #endif
1173
1174         /* adjust count to signel channel byte count */
1175         count >>= s->dacChannels - 1;
1176
1177         /* we may have to "copy" twice as ring buffer wraps around */
1178         for (; (avail > 0) && (count > 0); ) {
1179                 /* determine max possible copy count for single channel */
1180                 copyCount = count;
1181                 if (copyCount > avail) {
1182                         copyCount = avail;
1183                 }
1184                 if (copyCount + db->nextIn > db->fragTotalSize) {
1185                         copyCount = db->fragTotalSize - db->nextIn;
1186                         ASSERT(copyCount > 0);
1187                 }
1188
1189                 copyFragCount = copyCount;
1190                 ASSERT(copyFragCount >= copyCount);
1191
1192                 /* we copy differently based on the number channels */
1193                 if (s->dacChannels == 1) {
1194                         if (copy_from_user(db->lbuf + db->nextIn,
1195                                            buffer,
1196                                            copyCount))
1197                                 return -1;
1198                         /* fill gaps with 0 */
1199                         memset(db->lbuf + db->nextIn + copyCount,
1200                                0,
1201                                copyFragCount - copyCount);
1202                 } else {
1203                         /* we have demux the stream into two separate ones */
1204                         if (copy_two_channel_dac_from_user(s, buffer, copyCount))
1205                                 return -1;
1206                         /* fill gaps with 0 */
1207                         memset(db->lbuf + db->nextIn + copyCount,
1208                                0,
1209                                copyFragCount - copyCount);
1210                         memset(db->rbuf + db->nextIn + copyCount,
1211                                0,
1212                                copyFragCount - copyCount);
1213                 }
1214
1215 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1216                 for (i=0; i< copyFragCount; i+= db->fragSize) {
1217                         *(u16*)(db->lbuf + db->nextIn + i) = inTicket ++;
1218                 }
1219 #endif
1220
1221                 count -= copyCount;
1222                 totalCopyCount += copyCount;
1223                 avail -= copyFragCount;
1224                 totalCopyFragCount += copyFragCount;
1225
1226                 buffer += copyCount << (s->dacChannels - 1);
1227
1228                 db->nextIn += copyFragCount;
1229                 if (db->nextIn >= db->fragTotalSize) {
1230                         ASSERT(db->nextIn == db->fragTotalSize);
1231                         db->nextIn = 0;
1232                 }
1233
1234                 ASSERT( (count == 0) || (copyCount == copyFragCount));
1235         }
1236
1237         spin_lock_irqsave(&s->lock, flags);
1238         db->count += totalCopyFragCount;
1239         if (db->stopped) {
1240                 start_dac(s);
1241         }
1242
1243         /* nextIn should not be equal to nextOut unless we are full */
1244         ASSERT( ( (db->count == db->fragTotalSize) &&
1245                        (db->nextIn == db->nextOut) ) ||
1246                      ( (db->count < db->fragTotalSize) &&
1247                        (db->nextIn != db->nextOut) ) );
1248
1249         spin_unlock_irqrestore(&s->lock, flags);
1250
1251         return totalCopyCount << (s->dacChannels-1);
1252
1253 }
1254
1255 static ssize_t vrc5477_ac97_write(struct file *file, const char *buffer,
1256                                   size_t count, loff_t *ppos)
1257 {
1258         struct vrc5477_ac97_state *s =
1259                 (struct vrc5477_ac97_state *)file->private_data;
1260         struct dmabuf *db = &s->dma_dac;
1261         ssize_t ret;
1262         unsigned long flags;
1263         int copyCount, avail;
1264
1265         if (!access_ok(VERIFY_READ, buffer, count))
1266                 return -EFAULT;
1267         ret = 0;
1268
1269         while (count > 0) {
1270                 // wait for space in playback buffer
1271                 do {
1272                         spin_lock_irqsave(&s->lock, flags);
1273                         avail = db->fragTotalSize - db->count;
1274                         spin_unlock_irqrestore(&s->lock, flags);
1275                         if (avail <= 0) {
1276                                 if (file->f_flags & O_NONBLOCK) {
1277                                         if (!ret)
1278                                                 ret = -EAGAIN;
1279                                         return ret;
1280                                 }
1281                                 interruptible_sleep_on(&db->wait);
1282                                 if (signal_pending(current)) {
1283                                         if (!ret)
1284                                                 ret = -ERESTARTSYS;
1285                                         return ret;
1286                                 }
1287                         }
1288                 } while (avail <= 0);
1289
1290                 copyCount = copy_dac_from_user(s, buffer, count, avail);
1291                 if (copyCount < 0) {
1292                         if (!ret) ret = -EFAULT;
1293                         return ret;
1294                 }
1295
1296                 count -= copyCount;
1297                 buffer += copyCount;
1298                 ret += copyCount;
1299         } // while (count > 0)
1300
1301         return ret;
1302 }
1303
1304 /* No kernel lock - we have our own spinlock */
1305 static unsigned int vrc5477_ac97_poll(struct file *file,
1306                                       struct poll_table_struct *wait)
1307 {
1308         struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1309         unsigned long flags;
1310         unsigned int mask = 0;
1311
1312         if (file->f_mode & FMODE_WRITE)
1313                 poll_wait(file, &s->dma_dac.wait, wait);
1314         if (file->f_mode & FMODE_READ)
1315                 poll_wait(file, &s->dma_adc.wait, wait);
1316         spin_lock_irqsave(&s->lock, flags);
1317         if (file->f_mode & FMODE_READ) {
1318                 if (s->dma_adc.count >= (signed)s->dma_adc.fragSize)
1319                         mask |= POLLIN | POLLRDNORM;
1320         }
1321         if (file->f_mode & FMODE_WRITE) {
1322                 if ((signed)s->dma_dac.fragTotalSize >=
1323                     s->dma_dac.count + (signed)s->dma_dac.fragSize)
1324                         mask |= POLLOUT | POLLWRNORM;
1325         }
1326         spin_unlock_irqrestore(&s->lock, flags);
1327         return mask;
1328 }
1329
1330 #ifdef VRC5477_AC97_DEBUG
1331 static struct ioctl_str_t {
1332     unsigned int cmd;
1333     const char* str;
1334 } ioctl_str[] = {
1335     {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1336     {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1337     {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1338     {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1339     {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1340     {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1341     {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1342     {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1343     {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1344     {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1345     {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1346     {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1347     {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1348     {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1349     {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1350     {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1351     {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1352     {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1353     {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1354     {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1355     {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1356     {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1357     {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1358     {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1359     {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1360     {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1361     {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1362     {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1363     {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1364     {OSS_GETVERSION, "OSS_GETVERSION"},
1365     {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1366     {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1367     {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1368     {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1369 };
1370 #endif
1371
1372 static int vrc5477_ac97_ioctl(struct inode *inode, struct file *file,
1373                         unsigned int cmd, unsigned long arg)
1374 {
1375         struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1376         unsigned long flags;
1377         audio_buf_info abinfo;
1378         int count;
1379         int val, ret;
1380
1381 #ifdef VRC5477_AC97_DEBUG
1382         for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) {
1383                 if (ioctl_str[count].cmd == cmd)
1384                         break;
1385         }
1386         if (count < sizeof(ioctl_str)/sizeof(ioctl_str[0]))
1387                 printk(KERN_INFO PFX "ioctl %s\n", ioctl_str[count].str);
1388         else
1389                 printk(KERN_INFO PFX "ioctl unknown, 0x%x\n", cmd);
1390 #endif
1391
1392         switch (cmd) {
1393         case OSS_GETVERSION:
1394                 return put_user(SOUND_VERSION, (int *)arg);
1395
1396         case SNDCTL_DSP_SYNC:
1397                 if (file->f_mode & FMODE_WRITE)
1398                         return drain_dac(s, file->f_flags & O_NONBLOCK);
1399                 return 0;
1400
1401         case SNDCTL_DSP_SETDUPLEX:
1402                 return 0;
1403
1404         case SNDCTL_DSP_GETCAPS:
1405                 return put_user(DSP_CAP_DUPLEX, (int *)arg);
1406
1407         case SNDCTL_DSP_RESET:
1408                 if (file->f_mode & FMODE_WRITE) {
1409                         stop_dac(s);
1410                         synchronize_irq(s->irq);
1411                         s->dma_dac.count = 0;
1412                         s->dma_dac.nextIn = s->dma_dac.nextOut = 0;
1413                 }
1414                 if (file->f_mode & FMODE_READ) {
1415                         stop_adc(s);
1416                         synchronize_irq(s->irq);
1417                         s->dma_adc.count = 0;
1418                         s->dma_adc.nextIn = s->dma_adc.nextOut = 0;
1419                 }
1420                 return 0;
1421
1422         case SNDCTL_DSP_SPEED:
1423                 if (get_user(val, (int *)arg))
1424                         return -EFAULT;
1425                 if (val >= 0) {
1426                         if (file->f_mode & FMODE_READ) {
1427                                 stop_adc(s);
1428                                 set_adc_rate(s, val);
1429                                 if ((ret = prog_dmabuf_adc(s)))
1430                                         return ret;
1431                         }
1432                         if (file->f_mode & FMODE_WRITE) {
1433                                 stop_dac(s);
1434                                 set_dac_rate(s, val);
1435                                 if ((ret = prog_dmabuf_dac(s)))
1436                                         return ret;
1437                         }
1438                 }
1439                 return put_user((file->f_mode & FMODE_READ) ?
1440                                 s->adcRate : s->dacRate, (int *)arg);
1441
1442         case SNDCTL_DSP_STEREO:
1443                 if (get_user(val, (int *)arg))
1444                         return -EFAULT;
1445                 if (file->f_mode & FMODE_READ) {
1446                         stop_adc(s);
1447                         if (val)
1448                                 s->adcChannels = 2;
1449                         else
1450                                 s->adcChannels = 1;
1451                         if ((ret = prog_dmabuf_adc(s)))
1452                                 return ret;
1453                 }
1454                 if (file->f_mode & FMODE_WRITE) {
1455                         stop_dac(s);
1456                         if (val)
1457                                 s->dacChannels = 2;
1458                         else
1459                                 s->dacChannels = 1;
1460                         if ((ret = prog_dmabuf_dac(s)))
1461                                 return ret;
1462                 }
1463                 return 0;
1464
1465         case SNDCTL_DSP_CHANNELS:
1466                 if (get_user(val, (int *)arg))
1467                         return -EFAULT;
1468                 if (val != 0) {
1469                         if ( (val != 1) && (val != 2)) val = 2;
1470
1471                         if (file->f_mode & FMODE_READ) {
1472                                 stop_adc(s);
1473                                 s->dacChannels = val;
1474                                 if ((ret = prog_dmabuf_adc(s)))
1475                                         return ret;
1476                         }
1477                         if (file->f_mode & FMODE_WRITE) {
1478                                 stop_dac(s);
1479                                 s->dacChannels = val;
1480                                 if ((ret = prog_dmabuf_dac(s)))
1481                                         return ret;
1482                         }
1483                 }
1484                 return put_user(val, (int *)arg);
1485
1486         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1487                 return put_user(AFMT_S16_LE, (int *)arg);
1488
1489         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1490                 if (get_user(val, (int *)arg))
1491                         return -EFAULT;
1492                 if (val != AFMT_QUERY) {
1493                         if (val != AFMT_S16_LE) return -EINVAL;
1494                         if (file->f_mode & FMODE_READ) {
1495                                 stop_adc(s);
1496                                 if ((ret = prog_dmabuf_adc(s)))
1497                                         return ret;
1498                         }
1499                         if (file->f_mode & FMODE_WRITE) {
1500                                 stop_dac(s);
1501                                 if ((ret = prog_dmabuf_dac(s)))
1502                                         return ret;
1503                         }
1504                 } else {
1505                         val = AFMT_S16_LE;
1506                 }
1507                 return put_user(val, (int *)arg);
1508
1509         case SNDCTL_DSP_POST:
1510                 return 0;
1511
1512         case SNDCTL_DSP_GETTRIGGER:
1513         case SNDCTL_DSP_SETTRIGGER:
1514                 /* NO trigger */
1515                 return -EINVAL;
1516
1517         case SNDCTL_DSP_GETOSPACE:
1518                 if (!(file->f_mode & FMODE_WRITE))
1519                         return -EINVAL;
1520                 abinfo.fragsize = s->dma_dac.fragSize << (s->dacChannels-1);
1521                 spin_lock_irqsave(&s->lock, flags);
1522                 count = s->dma_dac.count;
1523                 spin_unlock_irqrestore(&s->lock, flags);
1524                 abinfo.bytes = (s->dma_dac.fragTotalSize - count) <<
1525                         (s->dacChannels-1);
1526                 abinfo.fragstotal = s->dma_dac.numFrag;
1527                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragShift >>
1528                         (s->dacChannels-1);
1529                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1530
1531         case SNDCTL_DSP_GETISPACE:
1532                 if (!(file->f_mode & FMODE_READ))
1533                         return -EINVAL;
1534                 abinfo.fragsize = s->dma_adc.fragSize << (s->adcChannels-1);
1535                 spin_lock_irqsave(&s->lock, flags);
1536                 count = s->dma_adc.count;
1537                 spin_unlock_irqrestore(&s->lock, flags);
1538                 if (count < 0)
1539                         count = 0;
1540                 abinfo.bytes = count << (s->adcChannels-1);
1541                 abinfo.fragstotal = s->dma_adc.numFrag;
1542                 abinfo.fragments = (abinfo.bytes >> s->dma_adc.fragShift) >>
1543                         (s->adcChannels-1);
1544                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1545
1546         case SNDCTL_DSP_NONBLOCK:
1547                 file->f_flags |= O_NONBLOCK;
1548                 return 0;
1549
1550         case SNDCTL_DSP_GETODELAY:
1551                 if (!(file->f_mode & FMODE_WRITE))
1552                         return -EINVAL;
1553                 spin_lock_irqsave(&s->lock, flags);
1554                 count = s->dma_dac.count;
1555                 spin_unlock_irqrestore(&s->lock, flags);
1556                 return put_user(count, (int *)arg);
1557
1558         case SNDCTL_DSP_GETIPTR:
1559         case SNDCTL_DSP_GETOPTR:
1560                 /* we cannot get DMA ptr */
1561                 return -EINVAL;
1562
1563         case SNDCTL_DSP_GETBLKSIZE:
1564                 if (file->f_mode & FMODE_WRITE)
1565                         return put_user(s->dma_dac.fragSize << (s->dacChannels-1), (int *)arg);
1566                 else
1567                         return put_user(s->dma_adc.fragSize << (s->adcChannels-1), (int *)arg);
1568
1569         case SNDCTL_DSP_SETFRAGMENT:
1570                 /* we ignore fragment size request */
1571                 return 0;
1572
1573         case SNDCTL_DSP_SUBDIVIDE:
1574                 /* what is this for? [jsun] */
1575                 return 0;
1576
1577         case SOUND_PCM_READ_RATE:
1578                 return put_user((file->f_mode & FMODE_READ) ?
1579                                 s->adcRate : s->dacRate, (int *)arg);
1580
1581         case SOUND_PCM_READ_CHANNELS:
1582                 if (file->f_mode & FMODE_READ)
1583                         return put_user(s->adcChannels, (int *)arg);
1584                 else
1585                         return put_user(s->dacChannels ? 2 : 1, (int *)arg);
1586
1587         case SOUND_PCM_READ_BITS:
1588                 return put_user(16, (int *)arg);
1589
1590         case SOUND_PCM_WRITE_FILTER:
1591         case SNDCTL_DSP_SETSYNCRO:
1592         case SOUND_PCM_READ_FILTER:
1593                 return -EINVAL;
1594         }
1595
1596         return mixdev_ioctl(s->codec, cmd, arg);
1597 }
1598
1599
1600 static int vrc5477_ac97_open(struct inode *inode, struct file *file)
1601 {
1602         int minor = iminor(inode);
1603         DECLARE_WAITQUEUE(wait, current);
1604         unsigned long flags;
1605         struct list_head *list;
1606         struct vrc5477_ac97_state *s;
1607         int ret=0;
1608
1609         nonseekable_open(inode, file);
1610         for (list = devs.next; ; list = list->next) {
1611                 if (list == &devs)
1612                         return -ENODEV;
1613                 s = list_entry(list, struct vrc5477_ac97_state, devs);
1614                 if (!((s->dev_audio ^ minor) & ~0xf))
1615                         break;
1616         }
1617         file->private_data = s;
1618
1619         /* wait for device to become free */
1620         down(&s->open_sem);
1621         while (s->open_mode & file->f_mode) {
1622
1623                 if (file->f_flags & O_NONBLOCK) {
1624                         up(&s->open_sem);
1625                         return -EBUSY;
1626                 }
1627                 add_wait_queue(&s->open_wait, &wait);
1628                 __set_current_state(TASK_INTERRUPTIBLE);
1629                 up(&s->open_sem);
1630                 schedule();
1631                 remove_wait_queue(&s->open_wait, &wait);
1632                 set_current_state(TASK_RUNNING);
1633                 if (signal_pending(current))
1634                         return -ERESTARTSYS;
1635                 down(&s->open_sem);
1636         }
1637
1638         spin_lock_irqsave(&s->lock, flags);
1639
1640         if (file->f_mode & FMODE_READ) {
1641                 /* set default settings */
1642                 set_adc_rate(s, 48000);
1643                 s->adcChannels = 2;
1644
1645                 ret = prog_dmabuf_adc(s);
1646                 if (ret) goto bailout;
1647         }
1648         if (file->f_mode & FMODE_WRITE) {
1649                 /* set default settings */
1650                 set_dac_rate(s, 48000);
1651                 s->dacChannels = 2;
1652
1653                 ret = prog_dmabuf_dac(s);
1654                 if (ret) goto bailout;
1655         }
1656
1657         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1658
1659  bailout:
1660         spin_unlock_irqrestore(&s->lock, flags);
1661
1662         up(&s->open_sem);
1663         return ret;
1664 }
1665
1666 static int vrc5477_ac97_release(struct inode *inode, struct file *file)
1667 {
1668         struct vrc5477_ac97_state *s =
1669                 (struct vrc5477_ac97_state *)file->private_data;
1670
1671         lock_kernel();
1672         if (file->f_mode & FMODE_WRITE)
1673                 drain_dac(s, file->f_flags & O_NONBLOCK);
1674         down(&s->open_sem);
1675         if (file->f_mode & FMODE_WRITE) {
1676                 stop_dac(s);
1677                 dealloc_dmabuf(s, &s->dma_dac);
1678         }
1679         if (file->f_mode & FMODE_READ) {
1680                 stop_adc(s);
1681                 dealloc_dmabuf(s, &s->dma_adc);
1682         }
1683         s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1684         up(&s->open_sem);
1685         wake_up(&s->open_wait);
1686         unlock_kernel();
1687         return 0;
1688 }
1689
1690 static /*const*/ struct file_operations vrc5477_ac97_audio_fops = {
1691         .owner          = THIS_MODULE,
1692         .llseek         = no_llseek,
1693         .read           = vrc5477_ac97_read,
1694         .write          = vrc5477_ac97_write,
1695         .poll           = vrc5477_ac97_poll,
1696         .ioctl          = vrc5477_ac97_ioctl,
1697         // .mmap        = vrc5477_ac97_mmap,
1698         .open           = vrc5477_ac97_open,
1699         .release        = vrc5477_ac97_release,
1700 };
1701
1702
1703 /* --------------------------------------------------------------------- */
1704
1705
1706 /* --------------------------------------------------------------------- */
1707
1708 /*
1709  * for debugging purposes, we'll create a proc device that dumps the
1710  * CODEC chipstate
1711  */
1712
1713 #ifdef VRC5477_AC97_DEBUG
1714
1715 struct {
1716        const char *regname;
1717        unsigned regaddr;
1718 } vrc5477_ac97_regs[] = {
1719         {"VRC5477_INT_STATUS", VRC5477_INT_STATUS},
1720         {"VRC5477_CODEC_WR", VRC5477_CODEC_WR},
1721         {"VRC5477_CODEC_RD", VRC5477_CODEC_RD},
1722         {"VRC5477_CTRL", VRC5477_CTRL},
1723         {"VRC5477_ACLINK_CTRL", VRC5477_ACLINK_CTRL},
1724         {"VRC5477_INT_MASK", VRC5477_INT_MASK},
1725         {"VRC5477_DAC1_CTRL", VRC5477_DAC1_CTRL},
1726         {"VRC5477_DAC1L", VRC5477_DAC1L},
1727         {"VRC5477_DAC1_BADDR", VRC5477_DAC1_BADDR},
1728         {"VRC5477_DAC2_CTRL", VRC5477_DAC2_CTRL},
1729         {"VRC5477_DAC2L", VRC5477_DAC2L},
1730         {"VRC5477_DAC2_BADDR", VRC5477_DAC2_BADDR},
1731         {"VRC5477_DAC3_CTRL", VRC5477_DAC3_CTRL},
1732         {"VRC5477_DAC3L", VRC5477_DAC3L},
1733         {"VRC5477_DAC3_BADDR", VRC5477_DAC3_BADDR},
1734         {"VRC5477_ADC1_CTRL", VRC5477_ADC1_CTRL},
1735         {"VRC5477_ADC1L", VRC5477_ADC1L},
1736         {"VRC5477_ADC1_BADDR", VRC5477_ADC1_BADDR},
1737         {"VRC5477_ADC2_CTRL", VRC5477_ADC2_CTRL},
1738         {"VRC5477_ADC2L", VRC5477_ADC2L},
1739         {"VRC5477_ADC2_BADDR", VRC5477_ADC2_BADDR},
1740         {"VRC5477_ADC3_CTRL", VRC5477_ADC3_CTRL},
1741         {"VRC5477_ADC3L", VRC5477_ADC3L},
1742         {"VRC5477_ADC3_BADDR", VRC5477_ADC3_BADDR},
1743         {NULL, 0x0}
1744 };
1745
1746 static int proc_vrc5477_ac97_dump (char *buf, char **start, off_t fpos,
1747                                    int length, int *eof, void *data)
1748 {
1749         struct vrc5477_ac97_state *s;
1750         int cnt, len = 0;
1751
1752         if (list_empty(&devs))
1753                 return 0;
1754         s = list_entry(devs.next, struct vrc5477_ac97_state, devs);
1755
1756         /* print out header */
1757         len += sprintf(buf + len, "\n\t\tVrc5477 Audio Debug\n\n");
1758
1759         // print out digital controller state
1760         len += sprintf (buf + len, "NEC Vrc5477 Audio Controller registers\n");
1761         len += sprintf (buf + len, "---------------------------------\n");
1762         for (cnt=0; vrc5477_ac97_regs[cnt].regname != NULL; cnt++) {
1763                 len+= sprintf (buf + len, "%-20s = %08x\n",
1764                                vrc5477_ac97_regs[cnt].regname,
1765                                inl(s->io + vrc5477_ac97_regs[cnt].regaddr));
1766         }
1767
1768         /* print out driver state */
1769         len += sprintf (buf + len, "NEC Vrc5477 Audio driver states\n");
1770         len += sprintf (buf + len, "---------------------------------\n");
1771         len += sprintf (buf + len, "dacChannels  = %d\n", s->dacChannels);
1772         len += sprintf (buf + len, "adcChannels  = %d\n", s->adcChannels);
1773         len += sprintf (buf + len, "dacRate  = %d\n", s->dacRate);
1774         len += sprintf (buf + len, "adcRate  = %d\n", s->adcRate);
1775
1776         len += sprintf (buf + len, "dma_dac is %s ready\n",
1777                         s->dma_dac.ready? "" : "not");
1778         if (s->dma_dac.ready) {
1779                 len += sprintf (buf + len, "dma_dac is %s stopped.\n",
1780                                 s->dma_dac.stopped? "" : "not");
1781                 len += sprintf (buf + len, "dma_dac.fragSize = %x\n",
1782                                 s->dma_dac.fragSize);
1783                 len += sprintf (buf + len, "dma_dac.fragShift = %x\n",
1784                                 s->dma_dac.fragShift);
1785                 len += sprintf (buf + len, "dma_dac.numFrag = %x\n",
1786                                 s->dma_dac.numFrag);
1787                 len += sprintf (buf + len, "dma_dac.fragTotalSize = %x\n",
1788                                 s->dma_dac.fragTotalSize);
1789                 len += sprintf (buf + len, "dma_dac.nextIn = %x\n",
1790                                 s->dma_dac.nextIn);
1791                 len += sprintf (buf + len, "dma_dac.nextOut = %x\n",
1792                                 s->dma_dac.nextOut);
1793                 len += sprintf (buf + len, "dma_dac.count = %x\n",
1794                                 s->dma_dac.count);
1795         }
1796
1797         len += sprintf (buf + len, "dma_adc is %s ready\n",
1798                         s->dma_adc.ready? "" : "not");
1799         if (s->dma_adc.ready) {
1800                 len += sprintf (buf + len, "dma_adc is %s stopped.\n",
1801                                 s->dma_adc.stopped? "" : "not");
1802                 len += sprintf (buf + len, "dma_adc.fragSize = %x\n",
1803                                 s->dma_adc.fragSize);
1804                 len += sprintf (buf + len, "dma_adc.fragShift = %x\n",
1805                                 s->dma_adc.fragShift);
1806                 len += sprintf (buf + len, "dma_adc.numFrag = %x\n",
1807                                 s->dma_adc.numFrag);
1808                 len += sprintf (buf + len, "dma_adc.fragTotalSize = %x\n",
1809                                 s->dma_adc.fragTotalSize);
1810                 len += sprintf (buf + len, "dma_adc.nextIn = %x\n",
1811                                 s->dma_adc.nextIn);
1812                 len += sprintf (buf + len, "dma_adc.nextOut = %x\n",
1813                                 s->dma_adc.nextOut);
1814                 len += sprintf (buf + len, "dma_adc.count = %x\n",
1815                                 s->dma_adc.count);
1816         }
1817
1818         /* print out CODEC state */
1819         len += sprintf (buf + len, "\nAC97 CODEC registers\n");
1820         len += sprintf (buf + len, "----------------------\n");
1821         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
1822                 len+= sprintf (buf + len, "reg %02x = %04x\n",
1823                                cnt, rdcodec(s->codec, cnt));
1824
1825         if (fpos >=len){
1826                 *start = buf;
1827                 *eof =1;
1828                 return 0;
1829         }
1830         *start = buf + fpos;
1831         if ((len -= fpos) > length)
1832                 return length;
1833         *eof =1;
1834         return len;
1835
1836 }
1837 #endif /* VRC5477_AC97_DEBUG */
1838
1839 /* --------------------------------------------------------------------- */
1840
1841 /* maximum number of devices; only used for command line params */
1842 #define NR_DEVICE 5
1843
1844 static unsigned int devindex;
1845
1846 MODULE_AUTHOR("Monta Vista Software, jsun@mvista.com or jsun@junsun.net");
1847 MODULE_DESCRIPTION("NEC Vrc5477 audio (AC97) Driver");
1848 MODULE_LICENSE("GPL");
1849
1850 static int __devinit vrc5477_ac97_probe(struct pci_dev *pcidev,
1851                                         const struct pci_device_id *pciid)
1852 {
1853         struct vrc5477_ac97_state *s;
1854 #ifdef VRC5477_AC97_DEBUG
1855         char proc_str[80];
1856 #endif
1857
1858         if (pcidev->irq == 0)
1859                 return -1;
1860
1861         if (!(s = kmalloc(sizeof(struct vrc5477_ac97_state), GFP_KERNEL))) {
1862                 printk(KERN_ERR PFX "alloc of device struct failed\n");
1863                 return -1;
1864         }
1865         memset(s, 0, sizeof(struct vrc5477_ac97_state));
1866
1867         init_waitqueue_head(&s->dma_adc.wait);
1868         init_waitqueue_head(&s->dma_dac.wait);
1869         init_waitqueue_head(&s->open_wait);
1870         init_MUTEX(&s->open_sem);
1871         spin_lock_init(&s->lock);
1872
1873         s->dev = pcidev;
1874         s->io = pci_resource_start(pcidev, 0);
1875         s->irq = pcidev->irq;
1876
1877         s->codec = ac97_alloc_codec();
1878
1879         s->codec->private_data = s;
1880         s->codec->id = 0;
1881         s->codec->codec_read = rdcodec;
1882         s->codec->codec_write = wrcodec;
1883         s->codec->codec_wait = waitcodec;
1884
1885         /* setting some other default values such as
1886          * adcChannels, adcRate is done in open() so that
1887          * no persistent state across file opens.
1888          */
1889
1890         /* test if get response from ac97, if not return */
1891         if (ac97_codec_not_present(s->codec)) {
1892                 printk(KERN_ERR PFX "no ac97 codec\n");
1893                 goto err_region;
1894
1895         }
1896
1897         /* test if get response from ac97, if not return */
1898         if (ac97_codec_not_present(&(s->codec))) {
1899                 printk(KERN_ERR PFX "no ac97 codec\n");
1900                 goto err_region;
1901
1902         }
1903
1904         if (!request_region(s->io, pci_resource_len(pcidev,0),
1905                             VRC5477_AC97_MODULE_NAME)) {
1906                 printk(KERN_ERR PFX "io ports %#lx->%#lx in use\n",
1907                        s->io, s->io + pci_resource_len(pcidev,0)-1);
1908                 goto err_region;
1909         }
1910         if (request_irq(s->irq, vrc5477_ac97_interrupt, SA_INTERRUPT,
1911                         VRC5477_AC97_MODULE_NAME, s)) {
1912                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
1913                 goto err_irq;
1914         }
1915
1916         printk(KERN_INFO PFX "IO at %#lx, IRQ %d\n", s->io, s->irq);
1917
1918         /* register devices */
1919         if ((s->dev_audio = register_sound_dsp(&vrc5477_ac97_audio_fops, -1)) < 0)
1920                 goto err_dev1;
1921         if ((s->codec->dev_mixer =
1922              register_sound_mixer(&vrc5477_ac97_mixer_fops, -1)) < 0)
1923                 goto err_dev2;
1924
1925 #ifdef VRC5477_AC97_DEBUG
1926         /* initialize the debug proc device */
1927         s->ps = create_proc_read_entry(VRC5477_AC97_MODULE_NAME, 0, NULL,
1928                                        proc_vrc5477_ac97_dump, NULL);
1929 #endif /* VRC5477_AC97_DEBUG */
1930
1931         /* enable pci io and bus mastering */
1932         if (pci_enable_device(pcidev))
1933                 goto err_dev3;
1934         pci_set_master(pcidev);
1935
1936         /* cold reset the AC97 */
1937         outl(VRC5477_ACLINK_CTRL_RST_ON | VRC5477_ACLINK_CTRL_RST_TIME,
1938              s->io + VRC5477_ACLINK_CTRL);
1939         while (inl(s->io + VRC5477_ACLINK_CTRL) & VRC5477_ACLINK_CTRL_RST_ON);
1940
1941         /* codec init */
1942         if (!ac97_probe_codec(s->codec))
1943                 goto err_dev3;
1944
1945 #ifdef VRC5477_AC97_DEBUG
1946         sprintf(proc_str, "driver/%s/%d/ac97",
1947                 VRC5477_AC97_MODULE_NAME, s->codec->id);
1948         s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
1949                                              ac97_read_proc, s->codec);
1950         /* TODO : why this proc file does not show up? */
1951 #endif
1952
1953         /* Try to enable variable rate audio mode. */
1954         wrcodec(s->codec, AC97_EXTENDED_STATUS,
1955                 rdcodec(s->codec, AC97_EXTENDED_STATUS) | AC97_EXTSTAT_VRA);
1956         /* Did we enable it? */
1957         if(rdcodec(s->codec, AC97_EXTENDED_STATUS) & AC97_EXTSTAT_VRA)
1958                 s->extended_status |= AC97_EXTSTAT_VRA;
1959         else {
1960                 s->dacRate = 48000;
1961                 printk(KERN_INFO PFX "VRA mode not enabled; rate fixed at %d.",
1962                         s->dacRate);
1963         }
1964
1965         /* let us get the default volumne louder */
1966         wrcodec(s->codec, 0x2, 0x1010); /* master volume, middle */
1967         wrcodec(s->codec, 0xc, 0x10);           /* phone volume, middle */
1968         // wrcodec(s->codec, 0xe, 0x10);                /* misc volume, middle */
1969         wrcodec(s->codec, 0x10, 0x8000);        /* line-in 2 line-out disable */
1970         wrcodec(s->codec, 0x18, 0x0707);        /* PCM out (line out) middle */
1971
1972
1973         /* by default we select line in the input */
1974         wrcodec(s->codec, 0x1a, 0x0404);
1975         wrcodec(s->codec, 0x1c, 0x0f0f);
1976         wrcodec(s->codec, 0x1e, 0x07);
1977
1978         /* enable the master interrupt but disable all others */
1979         outl(VRC5477_INT_MASK_NMASK, s->io + VRC5477_INT_MASK);
1980
1981         /* store it in the driver field */
1982         pci_set_drvdata(pcidev, s);
1983         pcidev->dma_mask = 0xffffffff;
1984         /* put it into driver list */
1985         list_add_tail(&s->devs, &devs);
1986         /* increment devindex */
1987         if (devindex < NR_DEVICE-1)
1988                 devindex++;
1989         return 0;
1990
1991  err_dev3:
1992         unregister_sound_mixer(s->codec->dev_mixer);
1993  err_dev2:
1994         unregister_sound_dsp(s->dev_audio);
1995  err_dev1:
1996         printk(KERN_ERR PFX "cannot register misc device\n");
1997         free_irq(s->irq, s);
1998  err_irq:
1999         release_region(s->io, pci_resource_len(pcidev,0));
2000  err_region:
2001         ac97_release_codec(codec);
2002         kfree(s);
2003         return -1;
2004 }
2005
2006 static void __devexit vrc5477_ac97_remove(struct pci_dev *dev)
2007 {
2008         struct vrc5477_ac97_state *s = pci_get_drvdata(dev);
2009
2010         if (!s)
2011                 return;
2012         list_del(&s->devs);
2013
2014 #ifdef VRC5477_AC97_DEBUG
2015         if (s->ps)
2016                 remove_proc_entry(VRC5477_AC97_MODULE_NAME, NULL);
2017 #endif /* VRC5477_AC97_DEBUG */
2018
2019         synchronize_irq();
2020         free_irq(s->irq, s);
2021         release_region(s->io, pci_resource_len(dev,0));
2022         unregister_sound_dsp(s->dev_audio);
2023         unregister_sound_mixer(s->codec->dev_mixer);
2024         ac97_release_codec(s->codec);
2025         kfree(s);
2026         pci_set_drvdata(dev, NULL);
2027 }
2028
2029
2030 static struct pci_device_id id_table[] = {
2031     { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC5477_AC97,
2032       PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2033     { 0, }
2034 };
2035
2036 MODULE_DEVICE_TABLE(pci, id_table);
2037
2038 static struct pci_driver vrc5477_ac97_driver = {
2039         .name           = VRC5477_AC97_MODULE_NAME,
2040         .id_table       = id_table,
2041         .probe          = vrc5477_ac97_probe,
2042         .remove         = __devexit_p(vrc5477_ac97_remove)
2043 };
2044
2045 static int __init init_vrc5477_ac97(void)
2046 {
2047         printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n");
2048         return pci_register_driver(&vrc5477_ac97_driver);
2049 }
2050
2051 static void __exit cleanup_vrc5477_ac97(void)
2052 {
2053         printk(KERN_INFO PFX "unloading\n");
2054         pci_unregister_driver(&vrc5477_ac97_driver);
2055 }
2056
2057 module_init(init_vrc5477_ac97);
2058 module_exit(cleanup_vrc5477_ac97);
2059