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   1 /*
   2  * SH7720 Setup
   3  *
   4  *  Copyright (C) 2007  Markus Brunner, Mark Jonas
   5  *  Copyright (C) 2009  Paul Mundt
   6  *
   7  *  Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
   8  *
   9  *  Copyright (C) 2006  Paul Mundt
  10  *  Copyright (C) 2006  Jamie Lenehan
  11  *
  12  * This file is subject to the terms and conditions of the GNU General Public
  13  * License.  See the file "COPYING" in the main directory of this archive
  14  * for more details.
  15  */
  16 #include <linux/platform_device.h>
  17 #include <linux/init.h>
  18 #include <linux/serial.h>
  19 #include <linux/io.h>
  20 #include <linux/serial_sci.h>
  21 #include <asm/rtc.h>
  22
  23 static struct resource rtc_resources[] = {
  24         [0] = {
  25                 .start  = 0xa413fec0,
  26                 .end    = 0xa413fec0 + 0x28 - 1,
  27                 .flags  = IORESOURCE_IO,
  28         },
  29         [1] = {
  30                 /* Shared Period/Carry/Alarm IRQ */
  31                 .start  = 20,
  32                 .flags  = IORESOURCE_IRQ,
  33         },
  34 };
  35
  36 static struct sh_rtc_platform_info rtc_info = {
  37         .capabilities   = RTC_CAP_4_DIGIT_YEAR,
  38 };
  39
  40 static struct platform_device rtc_device = {
  41         .name           = "sh-rtc",
  42         .id             = -1,
  43         .num_resources  = ARRAY_SIZE(rtc_resources),
  44         .resource       = rtc_resources,
  45         .dev            = {
  46                 .platform_data = &rtc_info,
  47         },
  48 };
  49
  50 static struct plat_sci_port sci_platform_data[] = {
  51         {
  52                 .mapbase        = 0xa4430000,
  53                 .flags          = UPF_BOOT_AUTOCONF,
  54                 .type           = PORT_SCIF,
  55                 .irqs           = { 80, 80, 80, 80 },
  56         }, {
  57                 .mapbase        = 0xa4438000,
  58                 .flags          = UPF_BOOT_AUTOCONF,
  59                 .type           = PORT_SCIF,
  60                 .irqs           = { 81, 81, 81, 81 },
  61         }, {
  62
  63                 .flags = 0,
  64         }
  65 };
  66
  67 static struct platform_device sci_device = {
  68         .name           = "sh-sci",
  69         .id             = -1,
  70         .dev            = {
  71                 .platform_data  = sci_platform_data,
  72         },
  73 };
  74
  75 static struct resource usb_ohci_resources[] = {
  76         [0] = {
  77                 .start  = 0xA4428000,
  78                 .end    = 0xA44280FF,
  79                 .flags  = IORESOURCE_MEM,
  80         },
  81         [1] = {
  82                 .start  = 67,
  83                 .end    = 67,
  84                 .flags  = IORESOURCE_IRQ,
  85         },
  86 };
  87
  88 static u64 usb_ohci_dma_mask = 0xffffffffUL;
  89 static struct platform_device usb_ohci_device = {
  90         .name           = "sh_ohci",
  91         .id             = -1,
  92         .dev = {
  93                 .dma_mask               = &usb_ohci_dma_mask,
  94                 .coherent_dma_mask      = 0xffffffff,
  95         },
  96         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
  97         .resource       = usb_ohci_resources,
  98 };
  99
 100 static struct resource usbf_resources[] = {
 101         [0] = {
 102                 .name   = "sh_udc",
 103                 .start  = 0xA4420000,
 104                 .end    = 0xA44200FF,
 105                 .flags  = IORESOURCE_MEM,
 106         },
 107         [1] = {
 108                 .name   = "sh_udc",
 109                 .start  = 65,
 110                 .end    = 65,
 111                 .flags  = IORESOURCE_IRQ,
 112         },
 113 };
 114
 115 static struct platform_device usbf_device = {
 116         .name           = "sh_udc",
 117         .id             = -1,
 118         .dev = {
 119                 .dma_mask               = NULL,
 120                 .coherent_dma_mask      = 0xffffffff,
 121         },
 122         .num_resources  = ARRAY_SIZE(usbf_resources),
 123         .resource       = usbf_resources,
 124 };
 125
 126 static struct platform_device *sh7720_devices[] __initdata = {
 127         &rtc_device,
 128         &sci_device,
 129         &usb_ohci_device,
 130         &usbf_device,
 131 };
 132
 133 static int __init sh7720_devices_setup(void)
 134 {
 135         return platform_add_devices(sh7720_devices,
 136                                     ARRAY_SIZE(sh7720_devices));
 137 }
 138 __initcall(sh7720_devices_setup);
 139
 140 enum {
 141         UNUSED = 0,
 142
 143         /* interrupt sources */
 144         TMU0, TMU1, TMU2, RTC,
 145         WDT, REF_RCMI, SIM,
 146         IRQ0, IRQ1, IRQ2, IRQ3,
 147         USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
 148         DMAC1, LCDC, SSL,
 149         ADC, DMAC2, USBFI, CMT,
 150         SCIF0, SCIF1,
 151         PINT07, PINT815, TPU, IIC,
 152         SIOF0, SIOF1, MMC, PCC,
 153         USBHI, AFEIF,
 154         H_UDI,
 155 };
 156
 157 static struct intc_vect vectors[] __initdata = {
 158         /* IRQ0->5 are handled in setup-sh3.c */
 159         INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
 160         INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC, 0x480),
 161         INTC_VECT(RTC, 0x4a0),        INTC_VECT(RTC, 0x4c0),
 162         INTC_VECT(SIM, 0x4e0),        INTC_VECT(SIM, 0x500),
 163         INTC_VECT(SIM, 0x520),        INTC_VECT(SIM, 0x540),
 164         INTC_VECT(WDT, 0x560),        INTC_VECT(REF_RCMI, 0x580),
 165         /* H_UDI cannot be masked */  INTC_VECT(TMU_SUNI, 0x6c0),
 166         INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1, 0x800),
 167         INTC_VECT(DMAC1, 0x820),      INTC_VECT(DMAC1, 0x840),
 168         INTC_VECT(DMAC1, 0x860),      INTC_VECT(LCDC, 0x900),
 169 #if defined(CONFIG_CPU_SUBTYPE_SH7720)
 170         INTC_VECT(SSL, 0x980),
 171 #endif
 172         INTC_VECT(USBFI, 0xa20),      INTC_VECT(USBFI, 0xa40),
 173         INTC_VECT(USBHI, 0xa60),
 174         INTC_VECT(DMAC2, 0xb80),      INTC_VECT(DMAC2, 0xba0),
 175         INTC_VECT(ADC, 0xbe0),        INTC_VECT(SCIF0, 0xc00),
 176         INTC_VECT(SCIF1, 0xc20),      INTC_VECT(PINT07, 0xc80),
 177         INTC_VECT(PINT815, 0xca0),    INTC_VECT(SIOF0, 0xd00),
 178         INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU, 0xd80),
 179         INTC_VECT(TPU, 0xda0),        INTC_VECT(TPU, 0xdc0),
 180         INTC_VECT(TPU, 0xde0),        INTC_VECT(IIC, 0xe00),
 181         INTC_VECT(MMC, 0xe80),        INTC_VECT(MMC, 0xea0),
 182         INTC_VECT(MMC, 0xec0),        INTC_VECT(MMC, 0xee0),
 183         INTC_VECT(CMT, 0xf00),        INTC_VECT(PCC, 0xf60),
 184         INTC_VECT(AFEIF, 0xfe0),
 185 };
 186
 187 static struct intc_prio_reg prio_registers[] __initdata = {
 188         { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
 189         { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
 190         { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
 191         { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
 192         { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
 193         { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
 194         { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
 195         { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
 196         { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
 197         { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
 198 };
 199
 200 static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
 201                 NULL, prio_registers, NULL);
 202
 203 void __init plat_irq_setup(void)
 204 {
 205         register_intc_controller(&intc_desc);
 206         plat_irq_setup_sh3();
 207 }