2 * MPC8560 ADS Device Tree Source
4 * Copyright 2006, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
16 compatible = "MPC8560ADS", "MPC85xxADS";
37 d-cache-line-size = <32>; // 32 bytes
38 i-cache-line-size = <32>; // 32 bytes
39 d-cache-size = <0x8000>; // L1, 32K
40 i-cache-size = <0x8000>; // L1, 32K
41 timebase-frequency = <82500000>;
42 bus-frequency = <330000000>;
43 clock-frequency = <825000000>;
48 device_type = "memory";
49 reg = <0x0 0x10000000>;
56 compatible = "simple-bus";
57 ranges = <0x0 0xe0000000 0x100000>;
58 bus-frequency = <330000000>;
61 compatible = "fsl,ecm-law";
67 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
68 reg = <0x1000 0x1000>;
70 interrupt-parent = <&mpic>;
73 memory-controller@2000 {
74 compatible = "fsl,8540-memory-controller";
75 reg = <0x2000 0x1000>;
76 interrupt-parent = <&mpic>;
80 L2: l2-cache-controller@20000 {
81 compatible = "fsl,8540-l2-cache-controller";
82 reg = <0x20000 0x1000>;
83 cache-line-size = <32>; // 32 bytes
84 cache-size = <0x40000>; // L2, 256K
85 interrupt-parent = <&mpic>;
92 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
94 ranges = <0x0 0x21100 0x200>;
97 compatible = "fsl,mpc8560-dma-channel",
98 "fsl,eloplus-dma-channel";
101 interrupt-parent = <&mpic>;
105 compatible = "fsl,mpc8560-dma-channel",
106 "fsl,eloplus-dma-channel";
109 interrupt-parent = <&mpic>;
113 compatible = "fsl,mpc8560-dma-channel",
114 "fsl,eloplus-dma-channel";
117 interrupt-parent = <&mpic>;
121 compatible = "fsl,mpc8560-dma-channel",
122 "fsl,eloplus-dma-channel";
125 interrupt-parent = <&mpic>;
130 enet0: ethernet@24000 {
131 #address-cells = <1>;
134 device_type = "network";
136 compatible = "gianfar";
137 reg = <0x24000 0x1000>;
138 ranges = <0x0 0x24000 0x1000>;
139 local-mac-address = [ 00 00 00 00 00 00 ];
140 interrupts = <29 2 30 2 34 2>;
141 interrupt-parent = <&mpic>;
142 tbi-handle = <&tbi0>;
143 phy-handle = <&phy0>;
146 #address-cells = <1>;
148 compatible = "fsl,gianfar-mdio";
151 phy0: ethernet-phy@0 {
152 interrupt-parent = <&mpic>;
155 device_type = "ethernet-phy";
157 phy1: ethernet-phy@1 {
158 interrupt-parent = <&mpic>;
161 device_type = "ethernet-phy";
163 phy2: ethernet-phy@2 {
164 interrupt-parent = <&mpic>;
167 device_type = "ethernet-phy";
169 phy3: ethernet-phy@3 {
170 interrupt-parent = <&mpic>;
173 device_type = "ethernet-phy";
177 device_type = "tbi-phy";
182 enet1: ethernet@25000 {
183 #address-cells = <1>;
186 device_type = "network";
188 compatible = "gianfar";
189 reg = <0x25000 0x1000>;
190 ranges = <0x0 0x25000 0x1000>;
191 local-mac-address = [ 00 00 00 00 00 00 ];
192 interrupts = <35 2 36 2 40 2>;
193 interrupt-parent = <&mpic>;
194 tbi-handle = <&tbi1>;
195 phy-handle = <&phy1>;
198 #address-cells = <1>;
200 compatible = "fsl,gianfar-tbi";
205 device_type = "tbi-phy";
211 interrupt-controller;
212 #address-cells = <0>;
213 #interrupt-cells = <2>;
214 reg = <0x40000 0x40000>;
215 compatible = "chrp,open-pic";
216 device_type = "open-pic";
220 #address-cells = <1>;
222 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
223 reg = <0x919c0 0x30>;
227 #address-cells = <1>;
229 ranges = <0x0 0x80000 0x10000>;
232 compatible = "fsl,cpm-muram-data";
233 reg = <0x0 0x4000 0x9000 0x2000>;
238 compatible = "fsl,mpc8560-brg",
241 reg = <0x919f0 0x10 0x915f0 0x10>;
242 clock-frequency = <165000000>;
246 interrupt-controller;
247 #address-cells = <0>;
248 #interrupt-cells = <2>;
250 interrupt-parent = <&mpic>;
251 reg = <0x90c00 0x80>;
252 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
255 serial0: serial@91a00 {
256 device_type = "serial";
257 compatible = "fsl,mpc8560-scc-uart",
259 reg = <0x91a00 0x20 0x88000 0x100>;
261 fsl,cpm-command = <0x800000>;
262 current-speed = <115200>;
264 interrupt-parent = <&cpmpic>;
267 serial1: serial@91a20 {
268 device_type = "serial";
269 compatible = "fsl,mpc8560-scc-uart",
271 reg = <0x91a20 0x20 0x88100 0x100>;
273 fsl,cpm-command = <0x4a00000>;
274 current-speed = <115200>;
276 interrupt-parent = <&cpmpic>;
279 enet2: ethernet@91320 {
280 device_type = "network";
281 compatible = "fsl,mpc8560-fcc-enet",
283 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
284 local-mac-address = [ 00 00 00 00 00 00 ];
285 fsl,cpm-command = <0x16200300>;
287 interrupt-parent = <&cpmpic>;
288 phy-handle = <&phy2>;
291 enet3: ethernet@91340 {
292 device_type = "network";
293 compatible = "fsl,mpc8560-fcc-enet",
295 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
296 local-mac-address = [ 00 00 00 00 00 00 ];
297 fsl,cpm-command = <0x1a400300>;
299 interrupt-parent = <&cpmpic>;
300 phy-handle = <&phy3>;
306 #interrupt-cells = <1>;
308 #address-cells = <3>;
309 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
311 reg = <0xe0008000 0x1000>;
312 clock-frequency = <66666666>;
313 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
317 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
318 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
319 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
320 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
323 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
324 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
325 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
326 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
329 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
330 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
331 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
332 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
335 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
336 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
337 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
338 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
341 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
342 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
343 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
344 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
347 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
348 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
349 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
350 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
353 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
354 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
355 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
356 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
359 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
360 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
361 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
362 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
365 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
366 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
367 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
368 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
371 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
372 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
373 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
374 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
377 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
378 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
379 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
380 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
383 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
384 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
385 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
386 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
388 interrupt-parent = <&mpic>;
391 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
392 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;