2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/sysdev.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/clocksource.h>
38 #include <linux/clockchips.h>
39 #include <asm/uaccess.h>
40 #include <asm/delay.h>
41 #include <asm/s390_ext.h>
42 #include <asm/div64.h>
45 #include <asm/irq_regs.h>
46 #include <asm/timer.h>
50 /* change this if you have some constant time drift */
51 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
52 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55 * Create a small time difference between the timer interrupts
56 * on the different cpus to avoid lock contention.
58 #define CPU_DEVIATION (smp_processor_id() << 12)
60 #define TICK_SIZE tick
62 u64 sched_clock_base_cc = -1; /* Force to data section. */
64 static DEFINE_PER_CPU(struct clock_event_device, comparators);
67 * Scheduler clock - returns current time in nanosec units.
69 unsigned long long notrace sched_clock(void)
71 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
75 * Monotonic_clock - returns # of nanoseconds passed since time_init()
77 unsigned long long monotonic_clock(void)
81 EXPORT_SYMBOL(monotonic_clock);
83 void tod_to_timeval(__u64 todval, struct timespec *xtime)
85 unsigned long long sec;
90 todval -= (sec * 1000000) << 12;
91 xtime->tv_nsec = ((todval * 1000) >> 12);
94 void clock_comparator_work(void)
96 struct clock_event_device *cd;
98 S390_lowcore.clock_comparator = -1ULL;
99 set_clock_comparator(S390_lowcore.clock_comparator);
100 cd = &__get_cpu_var(comparators);
101 cd->event_handler(cd);
105 * Fixup the clock comparator.
107 static void fixup_clock_comparator(unsigned long long delta)
109 /* If nobody is waiting there's nothing to fix. */
110 if (S390_lowcore.clock_comparator == -1ULL)
112 S390_lowcore.clock_comparator += delta;
113 set_clock_comparator(S390_lowcore.clock_comparator);
116 static int s390_next_event(unsigned long delta,
117 struct clock_event_device *evt)
119 S390_lowcore.clock_comparator = get_clock() + delta;
120 set_clock_comparator(S390_lowcore.clock_comparator);
124 static void s390_set_mode(enum clock_event_mode mode,
125 struct clock_event_device *evt)
130 * Set up lowcore and control register of the current cpu to
131 * enable TOD clock and clock comparator interrupts.
133 void init_cpu_timer(void)
135 struct clock_event_device *cd;
138 S390_lowcore.clock_comparator = -1ULL;
139 set_clock_comparator(S390_lowcore.clock_comparator);
141 cpu = smp_processor_id();
142 cd = &per_cpu(comparators, cpu);
143 cd->name = "comparator";
144 cd->features = CLOCK_EVT_FEAT_ONESHOT;
147 cd->min_delta_ns = 1;
148 cd->max_delta_ns = LONG_MAX;
150 cd->cpumask = cpumask_of(cpu);
151 cd->set_next_event = s390_next_event;
152 cd->set_mode = s390_set_mode;
154 clockevents_register_device(cd);
156 /* Enable clock comparator timer interrupt. */
159 /* Always allow the timing alert external interrupt. */
163 static void clock_comparator_interrupt(__u16 code)
165 if (S390_lowcore.clock_comparator == -1ULL)
166 set_clock_comparator(S390_lowcore.clock_comparator);
169 static void etr_timing_alert(struct etr_irq_parm *);
170 static void stp_timing_alert(struct stp_irq_parm *);
172 static void timing_alert_interrupt(__u16 code)
174 if (S390_lowcore.ext_params & 0x00c40000)
175 etr_timing_alert((struct etr_irq_parm *)
176 &S390_lowcore.ext_params);
177 if (S390_lowcore.ext_params & 0x00038000)
178 stp_timing_alert((struct stp_irq_parm *)
179 &S390_lowcore.ext_params);
182 static void etr_reset(void);
183 static void stp_reset(void);
185 unsigned long read_persistent_clock(void)
189 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
193 static cycle_t read_tod_clock(struct clocksource *cs)
198 static struct clocksource clocksource_tod = {
201 .read = read_tod_clock,
205 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
209 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
211 if (clock != &clocksource_tod)
214 /* Make userspace gettimeofday spin until we're done. */
215 ++vdso_data->tb_update_count;
217 vdso_data->xtime_tod_stamp = clock->cycle_last;
218 vdso_data->xtime_clock_sec = xtime.tv_sec;
219 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
220 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
221 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
223 ++vdso_data->tb_update_count;
226 extern struct timezone sys_tz;
228 void update_vsyscall_tz(void)
230 /* Make userspace gettimeofday spin until we're done. */
231 ++vdso_data->tb_update_count;
233 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
234 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
236 ++vdso_data->tb_update_count;
240 * Initialize the TOD clock and the CPU timer of
243 void __init time_init(void)
249 /* Reset time synchronization interfaces. */
253 /* request the clock comparator external interrupt */
254 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
255 panic("Couldn't request external interrupt 0x1004");
257 /* request the timing alert external interrupt */
258 if (register_external_interrupt(0x1406, timing_alert_interrupt))
259 panic("Couldn't request external interrupt 0x1406");
261 if (clocksource_register(&clocksource_tod) != 0)
262 panic("Could not register TOD clock source");
265 * The TOD clock is an accurate clock. The xtime should be
266 * initialized in a way that the difference between TOD and
267 * xtime is reasonably small. Too bad that timekeeping_init
268 * sets xtime.tv_nsec to zero. In addition the clock source
269 * change from the jiffies clock source to the TOD clock
270 * source add another error of up to 1/HZ second. The same
271 * function sets wall_to_monotonic to a value that is too
272 * small for /proc/uptime to be accurate.
273 * Reset xtime and wall_to_monotonic to sane values.
275 write_seqlock_irqsave(&xtime_lock, flags);
277 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
278 clocksource_tod.cycle_last = now;
279 clocksource_tod.raw_time = xtime;
280 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
281 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
282 write_sequnlock_irqrestore(&xtime_lock, flags);
284 /* Enable TOD clock interrupts on the boot cpu. */
287 /* Enable cpu timer interrupts on the boot cpu. */
292 * The time is "clock". old is what we think the time is.
293 * Adjust the value by a multiple of jiffies and add the delta to ntp.
294 * "delay" is an approximation how long the synchronization took. If
295 * the time correction is positive, then "delay" is subtracted from
296 * the time difference and only the remaining part is passed to ntp.
298 static unsigned long long adjust_time(unsigned long long old,
299 unsigned long long clock,
300 unsigned long long delay)
302 unsigned long long delta, ticks;
306 /* It is later than we thought. */
307 delta = ticks = clock - old;
308 delta = ticks = (delta < delay) ? 0 : delta - delay;
309 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
310 adjust.offset = ticks * (1000000 / HZ);
312 /* It is earlier than we thought. */
313 delta = ticks = old - clock;
314 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
316 adjust.offset = -ticks * (1000000 / HZ);
318 sched_clock_base_cc += delta;
319 if (adjust.offset != 0) {
320 pr_notice("The ETR interface has adjusted the clock "
321 "by %li microseconds\n", adjust.offset);
322 adjust.modes = ADJ_OFFSET_SINGLESHOT;
323 do_adjtimex(&adjust);
328 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
329 static DEFINE_MUTEX(clock_sync_mutex);
330 static unsigned long clock_sync_flags;
332 #define CLOCK_SYNC_HAS_ETR 0
333 #define CLOCK_SYNC_HAS_STP 1
334 #define CLOCK_SYNC_ETR 2
335 #define CLOCK_SYNC_STP 3
338 * The synchronous get_clock function. It will write the current clock
339 * value to the clock pointer and return 0 if the clock is in sync with
340 * the external time source. If the clock mode is local it will return
341 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
344 int get_sync_clock(unsigned long long *clock)
347 unsigned int sw0, sw1;
349 sw_ptr = &get_cpu_var(clock_sync_word);
350 sw0 = atomic_read(sw_ptr);
351 *clock = get_clock();
352 sw1 = atomic_read(sw_ptr);
353 put_cpu_var(clock_sync_sync);
354 if (sw0 == sw1 && (sw0 & 0x80000000U))
355 /* Success: time is in sync. */
357 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
358 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
360 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
361 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
365 EXPORT_SYMBOL(get_sync_clock);
368 * Make get_sync_clock return -EAGAIN.
370 static void disable_sync_clock(void *dummy)
372 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
374 * Clear the in-sync bit 2^31. All get_sync_clock calls will
375 * fail until the sync bit is turned back on. In addition
376 * increase the "sequence" counter to avoid the race of an
377 * etr event and the complete recovery against get_sync_clock.
379 atomic_clear_mask(0x80000000, sw_ptr);
384 * Make get_sync_clock return 0 again.
385 * Needs to be called from a context disabled for preemption.
387 static void enable_sync_clock(void)
389 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
390 atomic_set_mask(0x80000000, sw_ptr);
394 * Function to check if the clock is in sync.
396 static inline int check_sync_clock(void)
401 sw_ptr = &get_cpu_var(clock_sync_word);
402 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
403 put_cpu_var(clock_sync_sync);
407 /* Single threaded workqueue used for etr and stp sync events */
408 static struct workqueue_struct *time_sync_wq;
410 static void __init time_init_wq(void)
414 time_sync_wq = create_singlethread_workqueue("timesync");
415 stop_machine_create();
419 * External Time Reference (ETR) code.
421 static int etr_port0_online;
422 static int etr_port1_online;
423 static int etr_steai_available;
425 static int __init early_parse_etr(char *p)
427 if (strncmp(p, "off", 3) == 0)
428 etr_port0_online = etr_port1_online = 0;
429 else if (strncmp(p, "port0", 5) == 0)
430 etr_port0_online = 1;
431 else if (strncmp(p, "port1", 5) == 0)
432 etr_port1_online = 1;
433 else if (strncmp(p, "on", 2) == 0)
434 etr_port0_online = etr_port1_online = 1;
437 early_param("etr", early_parse_etr);
440 ETR_EVENT_PORT0_CHANGE,
441 ETR_EVENT_PORT1_CHANGE,
442 ETR_EVENT_PORT_ALERT,
443 ETR_EVENT_SYNC_CHECK,
444 ETR_EVENT_SWITCH_LOCAL,
449 * Valid bit combinations of the eacr register are (x = don't care):
450 * e0 e1 dp p0 p1 ea es sl
451 * 0 0 x 0 0 0 0 0 initial, disabled state
452 * 0 0 x 0 1 1 0 0 port 1 online
453 * 0 0 x 1 0 1 0 0 port 0 online
454 * 0 0 x 1 1 1 0 0 both ports online
455 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
456 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
457 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
458 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
459 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
460 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
461 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
462 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
463 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
464 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
465 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
466 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
467 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
468 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
469 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
470 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
472 static struct etr_eacr etr_eacr;
473 static u64 etr_tolec; /* time of last eacr update */
474 static struct etr_aib etr_port0;
475 static int etr_port0_uptodate;
476 static struct etr_aib etr_port1;
477 static int etr_port1_uptodate;
478 static unsigned long etr_events;
479 static struct timer_list etr_timer;
481 static void etr_timeout(unsigned long dummy);
482 static void etr_work_fn(struct work_struct *work);
483 static DEFINE_MUTEX(etr_work_mutex);
484 static DECLARE_WORK(etr_work, etr_work_fn);
487 * Reset ETR attachment.
489 static void etr_reset(void)
491 etr_eacr = (struct etr_eacr) {
492 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
493 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
495 if (etr_setr(&etr_eacr) == 0) {
496 etr_tolec = get_clock();
497 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
498 if (etr_port0_online && etr_port1_online)
499 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
500 } else if (etr_port0_online || etr_port1_online) {
501 pr_warning("The real or virtual hardware system does "
502 "not provide an ETR interface\n");
503 etr_port0_online = etr_port1_online = 0;
507 static int __init etr_init(void)
511 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
514 /* Check if this machine has the steai instruction. */
515 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
516 etr_steai_available = 1;
517 setup_timer(&etr_timer, etr_timeout, 0UL);
518 if (etr_port0_online) {
519 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
520 queue_work(time_sync_wq, &etr_work);
522 if (etr_port1_online) {
523 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
524 queue_work(time_sync_wq, &etr_work);
529 arch_initcall(etr_init);
532 * Two sorts of ETR machine checks. The architecture reads:
533 * "When a machine-check niterruption occurs and if a switch-to-local or
534 * ETR-sync-check interrupt request is pending but disabled, this pending
535 * disabled interruption request is indicated and is cleared".
536 * Which means that we can get etr_switch_to_local events from the machine
537 * check handler although the interruption condition is disabled. Lovely..
541 * Switch to local machine check. This is called when the last usable
542 * ETR port goes inactive. After switch to local the clock is not in sync.
544 void etr_switch_to_local(void)
548 disable_sync_clock(NULL);
549 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
550 queue_work(time_sync_wq, &etr_work);
554 * ETR sync check machine check. This is called when the ETR OTE and the
555 * local clock OTE are farther apart than the ETR sync check tolerance.
556 * After a ETR sync check the clock is not in sync. The machine check
557 * is broadcasted to all cpus at the same time.
559 void etr_sync_check(void)
563 disable_sync_clock(NULL);
564 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
565 queue_work(time_sync_wq, &etr_work);
569 * ETR timing alert. There are two causes:
570 * 1) port state change, check the usability of the port
571 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
572 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
573 * or ETR-data word 4 (edf4) has changed.
575 static void etr_timing_alert(struct etr_irq_parm *intparm)
578 /* ETR port 0 state change. */
579 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
581 /* ETR port 1 state change. */
582 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
585 * ETR port alert on either port 0, 1 or both.
586 * Both ports are not up-to-date now.
588 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
589 queue_work(time_sync_wq, &etr_work);
592 static void etr_timeout(unsigned long dummy)
594 set_bit(ETR_EVENT_UPDATE, &etr_events);
595 queue_work(time_sync_wq, &etr_work);
599 * Check if the etr mode is pss.
601 static inline int etr_mode_is_pps(struct etr_eacr eacr)
603 return eacr.es && !eacr.sl;
607 * Check if the etr mode is etr.
609 static inline int etr_mode_is_etr(struct etr_eacr eacr)
611 return eacr.es && eacr.sl;
615 * Check if the port can be used for TOD synchronization.
616 * For PPS mode the port has to receive OTEs. For ETR mode
617 * the port has to receive OTEs, the ETR stepping bit has to
618 * be zero and the validity bits for data frame 1, 2, and 3
621 static int etr_port_valid(struct etr_aib *aib, int port)
625 /* Check that this port is receiving OTEs. */
629 psc = port ? aib->esw.psc1 : aib->esw.psc0;
630 if (psc == etr_lpsc_pps_mode)
632 if (psc == etr_lpsc_operational_step)
633 return !aib->esw.y && aib->slsw.v1 &&
634 aib->slsw.v2 && aib->slsw.v3;
639 * Check if two ports are on the same network.
641 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
643 // FIXME: any other fields we have to compare?
644 return aib1->edf1.net_id == aib2->edf1.net_id;
648 * Wrapper for etr_stei that converts physical port states
649 * to logical port states to be consistent with the output
650 * of stetr (see etr_psc vs. etr_lpsc).
652 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
654 BUG_ON(etr_steai(aib, func) != 0);
655 /* Convert port state to logical port state. */
656 if (aib->esw.psc0 == 1)
658 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
660 if (aib->esw.psc1 == 1)
662 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
667 * Check if the aib a2 is still connected to the same attachment as
668 * aib a1, the etv values differ by one and a2 is valid.
670 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
672 int state_a1, state_a2;
674 /* Paranoia check: e0/e1 should better be the same. */
675 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
676 a1->esw.eacr.e1 != a2->esw.eacr.e1)
679 /* Still connected to the same etr ? */
680 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
681 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
682 if (state_a1 == etr_lpsc_operational_step) {
683 if (state_a2 != etr_lpsc_operational_step ||
684 a1->edf1.net_id != a2->edf1.net_id ||
685 a1->edf1.etr_id != a2->edf1.etr_id ||
686 a1->edf1.etr_pn != a2->edf1.etr_pn)
688 } else if (state_a2 != etr_lpsc_pps_mode)
691 /* The ETV value of a2 needs to be ETV of a1 + 1. */
692 if (a1->edf2.etv + 1 != a2->edf2.etv)
695 if (!etr_port_valid(a2, p))
701 struct clock_sync_data {
704 unsigned long long fixup_cc;
706 struct etr_aib *etr_aib;
709 static void clock_sync_cpu(struct clock_sync_data *sync)
711 atomic_dec(&sync->cpus);
714 * This looks like a busy wait loop but it isn't. etr_sync_cpus
715 * is called on all other cpus while the TOD clocks is stopped.
716 * __udelay will stop the cpu on an enabled wait psw until the
717 * TOD is running again.
719 while (sync->in_sync == 0) {
722 * A different cpu changes *in_sync. Therefore use
723 * barrier() to force memory access.
727 if (sync->in_sync != 1)
728 /* Didn't work. Clear per-cpu in sync bit again. */
729 disable_sync_clock(NULL);
731 * This round of TOD syncing is done. Set the clock comparator
732 * to the next tick and let the processor continue.
734 fixup_clock_comparator(sync->fixup_cc);
738 * Sync the TOD clock using the port refered to by aibp. This port
739 * has to be enabled and the other port has to be disabled. The
740 * last eacr update has to be more than 1.6 seconds in the past.
742 static int etr_sync_clock(void *data)
745 unsigned long long clock, old_clock, delay, delta;
746 struct clock_sync_data *etr_sync;
747 struct etr_aib *sync_port, *aib;
753 if (xchg(&first, 1) == 1) {
755 clock_sync_cpu(etr_sync);
759 /* Wait until all other cpus entered the sync function. */
760 while (atomic_read(&etr_sync->cpus) != 0)
763 port = etr_sync->etr_port;
764 aib = etr_sync->etr_aib;
765 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
768 /* Set clock to next OTE. */
769 __ctl_set_bit(14, 21);
770 __ctl_set_bit(0, 29);
771 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
772 old_clock = get_clock();
773 if (set_clock(clock) == 0) {
774 __udelay(1); /* Wait for the clock to start. */
775 __ctl_clear_bit(0, 29);
776 __ctl_clear_bit(14, 21);
778 /* Adjust Linux timing variables. */
779 delay = (unsigned long long)
780 (aib->edf2.etv - sync_port->edf2.etv) << 32;
781 delta = adjust_time(old_clock, clock, delay);
782 etr_sync->fixup_cc = delta;
783 fixup_clock_comparator(delta);
784 /* Verify that the clock is properly set. */
785 if (!etr_aib_follows(sync_port, aib, port)) {
787 disable_sync_clock(NULL);
788 etr_sync->in_sync = -EAGAIN;
791 etr_sync->in_sync = 1;
795 /* Could not set the clock ?!? */
796 __ctl_clear_bit(0, 29);
797 __ctl_clear_bit(14, 21);
798 disable_sync_clock(NULL);
799 etr_sync->in_sync = -EAGAIN;
806 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
808 struct clock_sync_data etr_sync;
809 struct etr_aib *sync_port;
813 /* Check if the current aib is adjacent to the sync port aib. */
814 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
815 follows = etr_aib_follows(sync_port, aib, port);
816 memcpy(sync_port, aib, sizeof(*aib));
819 memset(&etr_sync, 0, sizeof(etr_sync));
820 etr_sync.etr_aib = aib;
821 etr_sync.etr_port = port;
823 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
824 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
830 * Handle the immediate effects of the different events.
831 * The port change event is used for online/offline changes.
833 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
835 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
837 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
838 eacr.es = eacr.sl = 0;
839 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
840 etr_port0_uptodate = etr_port1_uptodate = 0;
842 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
845 * Port change of an enabled port. We have to
846 * assume that this can have caused an stepping
849 etr_tolec = get_clock();
850 eacr.p0 = etr_port0_online;
853 etr_port0_uptodate = 0;
855 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
858 * Port change of an enabled port. We have to
859 * assume that this can have caused an stepping
862 etr_tolec = get_clock();
863 eacr.p1 = etr_port1_online;
866 etr_port1_uptodate = 0;
868 clear_bit(ETR_EVENT_UPDATE, &etr_events);
873 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
874 * one of the ports needs an update.
876 static void etr_set_tolec_timeout(unsigned long long now)
878 unsigned long micros;
880 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
881 (!etr_eacr.p1 || etr_port1_uptodate))
883 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
884 micros = (micros > 1600000) ? 0 : 1600000 - micros;
885 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
889 * Set up a time that expires after 1/2 second.
891 static void etr_set_sync_timeout(void)
893 mod_timer(&etr_timer, jiffies + HZ/2);
897 * Update the aib information for one or both ports.
899 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
900 struct etr_eacr eacr)
902 /* With both ports disabled the aib information is useless. */
903 if (!eacr.e0 && !eacr.e1)
906 /* Update port0 or port1 with aib stored in etr_work_fn. */
907 if (aib->esw.q == 0) {
908 /* Information for port 0 stored. */
909 if (eacr.p0 && !etr_port0_uptodate) {
911 if (etr_port0_online)
912 etr_port0_uptodate = 1;
915 /* Information for port 1 stored. */
916 if (eacr.p1 && !etr_port1_uptodate) {
918 if (etr_port0_online)
919 etr_port1_uptodate = 1;
924 * Do not try to get the alternate port aib if the clock
925 * is not in sync yet.
927 if (!check_sync_clock())
931 * If steai is available we can get the information about
932 * the other port immediately. If only stetr is available the
933 * data-port bit toggle has to be used.
935 if (etr_steai_available) {
936 if (eacr.p0 && !etr_port0_uptodate) {
937 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
938 etr_port0_uptodate = 1;
940 if (eacr.p1 && !etr_port1_uptodate) {
941 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
942 etr_port1_uptodate = 1;
946 * One port was updated above, if the other
947 * port is not uptodate toggle dp bit.
949 if ((eacr.p0 && !etr_port0_uptodate) ||
950 (eacr.p1 && !etr_port1_uptodate))
959 * Write new etr control register if it differs from the current one.
960 * Return 1 if etr_tolec has been updated as well.
962 static void etr_update_eacr(struct etr_eacr eacr)
966 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
967 /* No change, return. */
970 * The disable of an active port of the change of the data port
971 * bit can/will cause a change in the data port.
973 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
974 (etr_eacr.dp ^ eacr.dp) != 0;
978 etr_tolec = get_clock();
982 * ETR work. In this function you'll find the main logic. In
983 * particular this is the only function that calls etr_update_eacr(),
984 * it "controls" the etr control register.
986 static void etr_work_fn(struct work_struct *work)
988 unsigned long long now;
989 struct etr_eacr eacr;
993 /* prevent multiple execution. */
994 mutex_lock(&etr_work_mutex);
996 /* Create working copy of etr_eacr. */
999 /* Check for the different events and their immediate effects. */
1000 eacr = etr_handle_events(eacr);
1002 /* Check if ETR is supposed to be active. */
1003 eacr.ea = eacr.p0 || eacr.p1;
1005 /* Both ports offline. Reset everything. */
1006 eacr.dp = eacr.es = eacr.sl = 0;
1007 on_each_cpu(disable_sync_clock, NULL, 1);
1008 del_timer_sync(&etr_timer);
1009 etr_update_eacr(eacr);
1013 /* Store aib to get the current ETR status word. */
1014 BUG_ON(etr_stetr(&aib) != 0);
1015 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1019 * Update the port information if the last stepping port change
1020 * or data port change is older than 1.6 seconds.
1022 if (now >= etr_tolec + (1600000 << 12))
1023 eacr = etr_handle_update(&aib, eacr);
1026 * Select ports to enable. The prefered synchronization mode is PPS.
1027 * If a port can be enabled depends on a number of things:
1028 * 1) The port needs to be online and uptodate. A port is not
1029 * disabled just because it is not uptodate, but it is only
1030 * enabled if it is uptodate.
1031 * 2) The port needs to have the same mode (pps / etr).
1032 * 3) The port needs to be usable -> etr_port_valid() == 1
1033 * 4) To enable the second port the clock needs to be in sync.
1034 * 5) If both ports are useable and are ETR ports, the network id
1035 * has to be the same.
1036 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1038 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1041 if (!etr_mode_is_pps(etr_eacr))
1043 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1045 // FIXME: uptodate checks ?
1046 else if (etr_port0_uptodate && etr_port1_uptodate)
1048 sync_port = (etr_port0_uptodate &&
1049 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1050 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1054 if (!etr_mode_is_pps(etr_eacr))
1056 sync_port = (etr_port1_uptodate &&
1057 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1058 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1061 if (!etr_mode_is_etr(etr_eacr))
1063 if (!eacr.es || !eacr.p1 ||
1064 aib.esw.psc1 != etr_lpsc_operational_alt)
1066 else if (etr_port0_uptodate && etr_port1_uptodate &&
1067 etr_compare_network(&etr_port0, &etr_port1))
1069 sync_port = (etr_port0_uptodate &&
1070 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1071 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1075 if (!etr_mode_is_etr(etr_eacr))
1077 sync_port = (etr_port1_uptodate &&
1078 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1080 /* Both ports not usable. */
1081 eacr.es = eacr.sl = 0;
1086 * If the clock is in sync just update the eacr and return.
1087 * If there is no valid sync port wait for a port update.
1089 if (check_sync_clock() || sync_port < 0) {
1090 etr_update_eacr(eacr);
1091 etr_set_tolec_timeout(now);
1096 * Prepare control register for clock syncing
1097 * (reset data port bit, set sync check control.
1103 * Update eacr and try to synchronize the clock. If the update
1104 * of eacr caused a stepping port switch (or if we have to
1105 * assume that a stepping port switch has occured) or the
1106 * clock syncing failed, reset the sync check control bit
1107 * and set up a timer to try again after 0.5 seconds
1109 etr_update_eacr(eacr);
1110 if (now < etr_tolec + (1600000 << 12) ||
1111 etr_sync_clock_stop(&aib, sync_port) != 0) {
1112 /* Sync failed. Try again in 1/2 second. */
1114 etr_update_eacr(eacr);
1115 etr_set_sync_timeout();
1117 etr_set_tolec_timeout(now);
1119 mutex_unlock(&etr_work_mutex);
1123 * Sysfs interface functions
1125 static struct sysdev_class etr_sysclass = {
1129 static struct sys_device etr_port0_dev = {
1131 .cls = &etr_sysclass,
1134 static struct sys_device etr_port1_dev = {
1136 .cls = &etr_sysclass,
1140 * ETR class attributes
1142 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1144 return sprintf(buf, "%i\n", etr_port0.esw.p);
1147 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1149 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1153 if (etr_mode_is_pps(etr_eacr))
1155 else if (etr_mode_is_etr(etr_eacr))
1159 return sprintf(buf, "%s\n", mode_str);
1162 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1165 * ETR port attributes
1167 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1169 if (dev == &etr_port0_dev)
1170 return etr_port0_online ? &etr_port0 : NULL;
1172 return etr_port1_online ? &etr_port1 : NULL;
1175 static ssize_t etr_online_show(struct sys_device *dev,
1176 struct sysdev_attribute *attr,
1179 unsigned int online;
1181 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1182 return sprintf(buf, "%i\n", online);
1185 static ssize_t etr_online_store(struct sys_device *dev,
1186 struct sysdev_attribute *attr,
1187 const char *buf, size_t count)
1191 value = simple_strtoul(buf, NULL, 0);
1192 if (value != 0 && value != 1)
1194 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1196 mutex_lock(&clock_sync_mutex);
1197 if (dev == &etr_port0_dev) {
1198 if (etr_port0_online == value)
1199 goto out; /* Nothing to do. */
1200 etr_port0_online = value;
1201 if (etr_port0_online && etr_port1_online)
1202 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1204 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1205 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1206 queue_work(time_sync_wq, &etr_work);
1208 if (etr_port1_online == value)
1209 goto out; /* Nothing to do. */
1210 etr_port1_online = value;
1211 if (etr_port0_online && etr_port1_online)
1212 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1214 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1215 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1216 queue_work(time_sync_wq, &etr_work);
1219 mutex_unlock(&clock_sync_mutex);
1223 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1225 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1226 struct sysdev_attribute *attr,
1229 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1230 etr_eacr.e0 : etr_eacr.e1);
1233 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1235 static ssize_t etr_mode_code_show(struct sys_device *dev,
1236 struct sysdev_attribute *attr, char *buf)
1238 if (!etr_port0_online && !etr_port1_online)
1239 /* Status word is not uptodate if both ports are offline. */
1241 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1242 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1245 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1247 static ssize_t etr_untuned_show(struct sys_device *dev,
1248 struct sysdev_attribute *attr, char *buf)
1250 struct etr_aib *aib = etr_aib_from_dev(dev);
1252 if (!aib || !aib->slsw.v1)
1254 return sprintf(buf, "%i\n", aib->edf1.u);
1257 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1259 static ssize_t etr_network_id_show(struct sys_device *dev,
1260 struct sysdev_attribute *attr, char *buf)
1262 struct etr_aib *aib = etr_aib_from_dev(dev);
1264 if (!aib || !aib->slsw.v1)
1266 return sprintf(buf, "%i\n", aib->edf1.net_id);
1269 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1271 static ssize_t etr_id_show(struct sys_device *dev,
1272 struct sysdev_attribute *attr, char *buf)
1274 struct etr_aib *aib = etr_aib_from_dev(dev);
1276 if (!aib || !aib->slsw.v1)
1278 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1281 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1283 static ssize_t etr_port_number_show(struct sys_device *dev,
1284 struct sysdev_attribute *attr, char *buf)
1286 struct etr_aib *aib = etr_aib_from_dev(dev);
1288 if (!aib || !aib->slsw.v1)
1290 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1293 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1295 static ssize_t etr_coupled_show(struct sys_device *dev,
1296 struct sysdev_attribute *attr, char *buf)
1298 struct etr_aib *aib = etr_aib_from_dev(dev);
1300 if (!aib || !aib->slsw.v3)
1302 return sprintf(buf, "%i\n", aib->edf3.c);
1305 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1307 static ssize_t etr_local_time_show(struct sys_device *dev,
1308 struct sysdev_attribute *attr, char *buf)
1310 struct etr_aib *aib = etr_aib_from_dev(dev);
1312 if (!aib || !aib->slsw.v3)
1314 return sprintf(buf, "%i\n", aib->edf3.blto);
1317 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1319 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1320 struct sysdev_attribute *attr, char *buf)
1322 struct etr_aib *aib = etr_aib_from_dev(dev);
1324 if (!aib || !aib->slsw.v3)
1326 return sprintf(buf, "%i\n", aib->edf3.buo);
1329 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1331 static struct sysdev_attribute *etr_port_attributes[] = {
1333 &attr_stepping_control,
1345 static int __init etr_register_port(struct sys_device *dev)
1347 struct sysdev_attribute **attr;
1350 rc = sysdev_register(dev);
1353 for (attr = etr_port_attributes; *attr; attr++) {
1354 rc = sysdev_create_file(dev, *attr);
1360 for (; attr >= etr_port_attributes; attr--)
1361 sysdev_remove_file(dev, *attr);
1362 sysdev_unregister(dev);
1367 static void __init etr_unregister_port(struct sys_device *dev)
1369 struct sysdev_attribute **attr;
1371 for (attr = etr_port_attributes; *attr; attr++)
1372 sysdev_remove_file(dev, *attr);
1373 sysdev_unregister(dev);
1376 static int __init etr_init_sysfs(void)
1380 rc = sysdev_class_register(&etr_sysclass);
1383 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1385 goto out_unreg_class;
1386 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1388 goto out_remove_stepping_port;
1389 rc = etr_register_port(&etr_port0_dev);
1391 goto out_remove_stepping_mode;
1392 rc = etr_register_port(&etr_port1_dev);
1394 goto out_remove_port0;
1398 etr_unregister_port(&etr_port0_dev);
1399 out_remove_stepping_mode:
1400 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1401 out_remove_stepping_port:
1402 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1404 sysdev_class_unregister(&etr_sysclass);
1409 device_initcall(etr_init_sysfs);
1412 * Server Time Protocol (STP) code.
1414 static int stp_online;
1415 static struct stp_sstpi stp_info;
1416 static void *stp_page;
1418 static void stp_work_fn(struct work_struct *work);
1419 static DEFINE_MUTEX(stp_work_mutex);
1420 static DECLARE_WORK(stp_work, stp_work_fn);
1421 static struct timer_list stp_timer;
1423 static int __init early_parse_stp(char *p)
1425 if (strncmp(p, "off", 3) == 0)
1427 else if (strncmp(p, "on", 2) == 0)
1431 early_param("stp", early_parse_stp);
1434 * Reset STP attachment.
1436 static void __init stp_reset(void)
1440 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1441 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1443 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1444 else if (stp_online) {
1445 pr_warning("The real or virtual hardware system does "
1446 "not provide an STP interface\n");
1447 free_page((unsigned long) stp_page);
1453 static void stp_timeout(unsigned long dummy)
1455 queue_work(time_sync_wq, &stp_work);
1458 static int __init stp_init(void)
1460 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1462 setup_timer(&stp_timer, stp_timeout, 0UL);
1466 queue_work(time_sync_wq, &stp_work);
1470 arch_initcall(stp_init);
1473 * STP timing alert. There are three causes:
1474 * 1) timing status change
1475 * 2) link availability change
1476 * 3) time control parameter change
1477 * In all three cases we are only interested in the clock source state.
1478 * If a STP clock source is now available use it.
1480 static void stp_timing_alert(struct stp_irq_parm *intparm)
1482 if (intparm->tsc || intparm->lac || intparm->tcpc)
1483 queue_work(time_sync_wq, &stp_work);
1487 * STP sync check machine check. This is called when the timing state
1488 * changes from the synchronized state to the unsynchronized state.
1489 * After a STP sync check the clock is not in sync. The machine check
1490 * is broadcasted to all cpus at the same time.
1492 void stp_sync_check(void)
1494 disable_sync_clock(NULL);
1495 queue_work(time_sync_wq, &stp_work);
1499 * STP island condition machine check. This is called when an attached
1500 * server attempts to communicate over an STP link and the servers
1501 * have matching CTN ids and have a valid stratum-1 configuration
1502 * but the configurations do not match.
1504 void stp_island_check(void)
1506 disable_sync_clock(NULL);
1507 queue_work(time_sync_wq, &stp_work);
1511 static int stp_sync_clock(void *data)
1514 unsigned long long old_clock, delta;
1515 struct clock_sync_data *stp_sync;
1520 if (xchg(&first, 1) == 1) {
1522 clock_sync_cpu(stp_sync);
1526 /* Wait until all other cpus entered the sync function. */
1527 while (atomic_read(&stp_sync->cpus) != 0)
1530 enable_sync_clock();
1533 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1534 stp_info.todoff[2] || stp_info.todoff[3] ||
1535 stp_info.tmd != 2) {
1536 old_clock = get_clock();
1537 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1539 delta = adjust_time(old_clock, get_clock(), 0);
1540 fixup_clock_comparator(delta);
1541 rc = chsc_sstpi(stp_page, &stp_info,
1542 sizeof(struct stp_sstpi));
1543 if (rc == 0 && stp_info.tmd != 2)
1548 disable_sync_clock(NULL);
1549 stp_sync->in_sync = -EAGAIN;
1551 stp_sync->in_sync = 1;
1557 * STP work. Check for the STP state and take over the clock
1558 * synchronization if the STP clock source is usable.
1560 static void stp_work_fn(struct work_struct *work)
1562 struct clock_sync_data stp_sync;
1565 /* prevent multiple execution. */
1566 mutex_lock(&stp_work_mutex);
1569 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1570 del_timer_sync(&stp_timer);
1574 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1578 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1579 if (rc || stp_info.c == 0)
1582 /* Skip synchronization if the clock is already in sync. */
1583 if (check_sync_clock())
1586 memset(&stp_sync, 0, sizeof(stp_sync));
1588 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1589 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1592 if (!check_sync_clock())
1594 * There is a usable clock but the synchonization failed.
1595 * Retry after a second.
1597 mod_timer(&stp_timer, jiffies + HZ);
1600 mutex_unlock(&stp_work_mutex);
1604 * STP class sysfs interface functions
1606 static struct sysdev_class stp_sysclass = {
1610 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1614 return sprintf(buf, "%016llx\n",
1615 *(unsigned long long *) stp_info.ctnid);
1618 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1620 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1624 return sprintf(buf, "%i\n", stp_info.ctn);
1627 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1629 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1631 if (!stp_online || !(stp_info.vbits & 0x2000))
1633 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1636 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1638 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1640 if (!stp_online || !(stp_info.vbits & 0x8000))
1642 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1645 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1647 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1651 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1654 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1656 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1658 if (!stp_online || !(stp_info.vbits & 0x0800))
1660 return sprintf(buf, "%i\n", (int) stp_info.tto);
1663 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1665 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1667 if (!stp_online || !(stp_info.vbits & 0x4000))
1669 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1672 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1673 stp_time_zone_offset_show, NULL);
1675 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1679 return sprintf(buf, "%i\n", stp_info.tmd);
1682 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1684 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1688 return sprintf(buf, "%i\n", stp_info.tst);
1691 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1693 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1695 return sprintf(buf, "%i\n", stp_online);
1698 static ssize_t stp_online_store(struct sysdev_class *class,
1699 const char *buf, size_t count)
1703 value = simple_strtoul(buf, NULL, 0);
1704 if (value != 0 && value != 1)
1706 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1708 mutex_lock(&clock_sync_mutex);
1711 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1713 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1714 queue_work(time_sync_wq, &stp_work);
1715 mutex_unlock(&clock_sync_mutex);
1720 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1721 * stp/online but attr_online already exists in this file ..
1723 static struct sysdev_class_attribute attr_stp_online = {
1724 .attr = { .name = "online", .mode = 0600 },
1725 .show = stp_online_show,
1726 .store = stp_online_store,
1729 static struct sysdev_class_attribute *stp_attributes[] = {
1737 &attr_time_zone_offset,
1743 static int __init stp_init_sysfs(void)
1745 struct sysdev_class_attribute **attr;
1748 rc = sysdev_class_register(&stp_sysclass);
1751 for (attr = stp_attributes; *attr; attr++) {
1752 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1758 for (; attr >= stp_attributes; attr--)
1759 sysdev_class_remove_file(&stp_sysclass, *attr);
1760 sysdev_class_unregister(&stp_sysclass);
1765 device_initcall(stp_init_sysfs);