2 * Copyright (C) 2000 RidgeRun, Inc.
3 * Author: RidgeRun, Inc.
4 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8 * Copyright (C) 2000, 01, 05 Ralf Baechle (ralf@linux-mips.org)
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/kernel_stat.h>
34 #include <linux/module.h>
35 #include <linux/signal.h>
36 #include <linux/sched.h>
37 #include <linux/types.h>
38 #include <linux/interrupt.h>
39 #include <linux/ioport.h>
40 #include <linux/timex.h>
41 #include <linux/slab.h>
42 #include <linux/random.h>
43 #include <linux/bitops.h>
44 #include <asm/bootinfo.h>
47 #include <asm/irq_cpu.h>
48 #include <asm/mipsregs.h>
49 #include <asm/system.h>
51 asmlinkage void plat_irq_dispatch(void)
53 unsigned int pending = read_c0_cause() & read_c0_status();
55 if (pending & STATUSF_IP2)
57 else if (pending & STATUSF_IP3)
59 else if (pending & STATUSF_IP4)
61 else if (pending & STATUSF_IP5)
63 else if (pending & STATUSF_IP6)
65 else if (pending & STATUSF_IP7)
69 * Now look at the extended interrupts
71 pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
73 if (pending & STATUSF_IP8)
75 else if (pending & STATUSF_IP9)
77 else if (pending & STATUSF_IP10)
79 else if (pending & STATUSF_IP11)
86 extern void gt64240_irq_init(void);
88 void __init arch_init_irq(void)
91 * Clear all of the interrupts while we change the able around a bit.
92 * int-handler is not on bootstrap
94 clear_c0_status(ST0_IM);