1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name[] = "ixgbe";
47 static const char ixgbe_driver_string[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "1.3.30-k2"
51 const char ixgbe_driver_version[] = DRV_VERSION;
52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
55 [board_82598] = &ixgbe_82598_info,
58 /* ixgbe_pci_tbl - PCI Device ID Table
60 * Wildcard entries (PCI_ANY_ID) should come last
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static struct pci_device_id ixgbe_pci_tbl[] = {
67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
77 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
86 /* required last entry */
89 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
91 #ifdef CONFIG_IXGBE_DCA
92 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
94 static struct notifier_block dca_notifier = {
95 .notifier_call = ixgbe_notify_dca,
101 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
102 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
103 MODULE_LICENSE("GPL");
104 MODULE_VERSION(DRV_VERSION);
106 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
108 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
112 /* Let firmware take over control of h/w */
113 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
114 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
115 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
118 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
122 /* Let firmware know the driver has taken over */
123 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
124 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
125 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
128 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
133 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
134 index = (int_alloc_entry >> 2) & 0x1F;
135 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
136 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
137 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
138 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
141 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
142 struct ixgbe_tx_buffer
145 if (tx_buffer_info->dma) {
146 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
147 tx_buffer_info->length, PCI_DMA_TODEVICE);
148 tx_buffer_info->dma = 0;
150 if (tx_buffer_info->skb) {
151 dev_kfree_skb_any(tx_buffer_info->skb);
152 tx_buffer_info->skb = NULL;
154 /* tx_buffer_info must be completely set up in the transmit path */
157 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
158 struct ixgbe_ring *tx_ring,
161 struct ixgbe_hw *hw = &adapter->hw;
164 /* Detect a transmit hang in hardware, this serializes the
165 * check with the clearing of time_stamp and movement of eop */
166 head = IXGBE_READ_REG(hw, tx_ring->head);
167 tail = IXGBE_READ_REG(hw, tx_ring->tail);
168 adapter->detect_tx_hung = false;
169 if ((head != tail) &&
170 tx_ring->tx_buffer_info[eop].time_stamp &&
171 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
172 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
173 /* detected Tx unit hang */
174 union ixgbe_adv_tx_desc *tx_desc;
175 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
176 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
178 " TDH, TDT <%x>, <%x>\n"
179 " next_to_use <%x>\n"
180 " next_to_clean <%x>\n"
181 "tx_buffer_info[next_to_clean]\n"
182 " time_stamp <%lx>\n"
184 tx_ring->queue_index,
186 tx_ring->next_to_use, eop,
187 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
194 #define IXGBE_MAX_TXD_PWR 14
195 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
197 /* Tx Descriptors needed, worst case */
198 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
199 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
200 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
201 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
203 #define GET_TX_HEAD_FROM_RING(ring) (\
205 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
206 static void ixgbe_tx_timeout(struct net_device *netdev);
209 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
210 * @adapter: board private structure
211 * @tx_ring: tx ring to clean
213 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
214 struct ixgbe_ring *tx_ring)
216 union ixgbe_adv_tx_desc *tx_desc;
217 struct ixgbe_tx_buffer *tx_buffer_info;
218 struct net_device *netdev = adapter->netdev;
222 unsigned int count = 0;
223 unsigned int total_bytes = 0, total_packets = 0;
226 head = GET_TX_HEAD_FROM_RING(tx_ring);
227 head = le32_to_cpu(head);
228 i = tx_ring->next_to_clean;
231 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
232 tx_buffer_info = &tx_ring->tx_buffer_info[i];
233 skb = tx_buffer_info->skb;
236 unsigned int segs, bytecount;
238 /* gso_segs is currently only valid for tcp */
239 segs = skb_shinfo(skb)->gso_segs ?: 1;
240 /* multiply data chunks by size of headers */
241 bytecount = ((segs - 1) * skb_headlen(skb)) +
243 total_packets += segs;
244 total_bytes += bytecount;
247 ixgbe_unmap_and_free_tx_resource(adapter,
251 if (i == tx_ring->count)
255 if (count == tx_ring->count)
260 head = GET_TX_HEAD_FROM_RING(tx_ring);
261 head = le32_to_cpu(head);
267 tx_ring->next_to_clean = i;
269 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
270 if (unlikely(count && netif_carrier_ok(netdev) &&
271 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
272 /* Make sure that anybody stopping the queue after this
273 * sees the new next_to_clean.
276 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
277 !test_bit(__IXGBE_DOWN, &adapter->state)) {
278 netif_wake_subqueue(netdev, tx_ring->queue_index);
279 ++adapter->restart_queue;
283 if (adapter->detect_tx_hung) {
284 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
285 /* schedule immediate reset if we believe we hung */
287 "tx hang %d detected, resetting adapter\n",
288 adapter->tx_timeout_count + 1);
289 ixgbe_tx_timeout(adapter->netdev);
293 /* re-arm the interrupt */
294 if ((total_packets >= tx_ring->work_limit) ||
295 (count == tx_ring->count))
296 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
298 tx_ring->total_bytes += total_bytes;
299 tx_ring->total_packets += total_packets;
300 tx_ring->stats.bytes += total_bytes;
301 tx_ring->stats.packets += total_packets;
302 adapter->net_stats.tx_bytes += total_bytes;
303 adapter->net_stats.tx_packets += total_packets;
304 return (total_packets ? true : false);
307 #ifdef CONFIG_IXGBE_DCA
308 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
309 struct ixgbe_ring *rx_ring)
313 int q = rx_ring - adapter->rx_ring;
315 if (rx_ring->cpu != cpu) {
316 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
317 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
318 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
319 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
320 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
321 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
327 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
328 struct ixgbe_ring *tx_ring)
332 int q = tx_ring - adapter->tx_ring;
334 if (tx_ring->cpu != cpu) {
335 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
336 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
337 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
338 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
339 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
345 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
349 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
352 for (i = 0; i < adapter->num_tx_queues; i++) {
353 adapter->tx_ring[i].cpu = -1;
354 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
356 for (i = 0; i < adapter->num_rx_queues; i++) {
357 adapter->rx_ring[i].cpu = -1;
358 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
362 static int __ixgbe_notify_dca(struct device *dev, void *data)
364 struct net_device *netdev = dev_get_drvdata(dev);
365 struct ixgbe_adapter *adapter = netdev_priv(netdev);
366 unsigned long event = *(unsigned long *)data;
369 case DCA_PROVIDER_ADD:
370 /* if we're already enabled, don't do it again */
371 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
373 /* Always use CB2 mode, difference is masked
374 * in the CB driver. */
375 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
376 if (dca_add_requester(dev) == 0) {
377 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
378 ixgbe_setup_dca(adapter);
381 /* Fall Through since DCA is disabled. */
382 case DCA_PROVIDER_REMOVE:
383 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
384 dca_remove_requester(dev);
385 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
386 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
394 #endif /* CONFIG_IXGBE_DCA */
396 * ixgbe_receive_skb - Send a completed packet up the stack
397 * @adapter: board private structure
398 * @skb: packet to send up
399 * @status: hardware indication of status of receive
400 * @rx_ring: rx descriptor ring (for a specific queue) to setup
401 * @rx_desc: rx descriptor
403 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
404 struct sk_buff *skb, u8 status,
405 struct ixgbe_ring *ring,
406 union ixgbe_adv_rx_desc *rx_desc)
408 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
409 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
411 if (adapter->netdev->features & NETIF_F_LRO &&
412 skb->ip_summed == CHECKSUM_UNNECESSARY) {
413 if (adapter->vlgrp && is_vlan && (tag != 0))
414 lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
418 lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
419 ring->lro_used = true;
421 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
422 if (adapter->vlgrp && is_vlan && (tag != 0))
423 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
425 netif_receive_skb(skb);
427 if (adapter->vlgrp && is_vlan && (tag != 0))
428 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
436 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
437 * @adapter: address of board private structure
438 * @status_err: hardware indication of status of receive
439 * @skb: skb currently being received and modified
441 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
442 u32 status_err, struct sk_buff *skb)
444 skb->ip_summed = CHECKSUM_NONE;
446 /* Rx csum disabled */
447 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
450 /* if IP and error */
451 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
452 (status_err & IXGBE_RXDADV_ERR_IPE)) {
453 adapter->hw_csum_rx_error++;
457 if (!(status_err & IXGBE_RXD_STAT_L4CS))
460 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
461 adapter->hw_csum_rx_error++;
465 /* It must be a TCP or UDP packet with a valid checksum */
466 skb->ip_summed = CHECKSUM_UNNECESSARY;
467 adapter->hw_csum_rx_good++;
471 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
472 * @adapter: address of board private structure
474 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
475 struct ixgbe_ring *rx_ring,
478 struct pci_dev *pdev = adapter->pdev;
479 union ixgbe_adv_rx_desc *rx_desc;
480 struct ixgbe_rx_buffer *bi;
483 i = rx_ring->next_to_use;
484 bi = &rx_ring->rx_buffer_info[i];
486 while (cleaned_count--) {
487 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
490 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
492 bi->page = alloc_page(GFP_ATOMIC);
494 adapter->alloc_rx_page_failed++;
499 /* use a half page if we're re-using */
500 bi->page_offset ^= (PAGE_SIZE / 2);
503 bi->page_dma = pci_map_page(pdev, bi->page,
511 skb = netdev_alloc_skb(adapter->netdev,
512 (rx_ring->rx_buf_len +
516 adapter->alloc_rx_buff_failed++;
521 * Make buffer alignment 2 beyond a 16 byte boundary
522 * this will result in a 16 byte aligned IP header after
523 * the 14 byte MAC header is removed
525 skb_reserve(skb, NET_IP_ALIGN);
528 bi->dma = pci_map_single(pdev, skb->data,
532 /* Refresh the desc even if buffer_addrs didn't change because
533 * each write-back erases this info. */
534 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
535 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
536 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
538 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
542 if (i == rx_ring->count)
544 bi = &rx_ring->rx_buffer_info[i];
548 if (rx_ring->next_to_use != i) {
549 rx_ring->next_to_use = i;
551 i = (rx_ring->count - 1);
554 * Force memory writes to complete before letting h/w
555 * know there are new descriptors to fetch. (Only
556 * applicable for weak-ordered memory model archs,
560 writel(i, adapter->hw.hw_addr + rx_ring->tail);
564 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
566 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
569 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
571 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
574 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
575 struct ixgbe_ring *rx_ring,
576 int *work_done, int work_to_do)
578 struct pci_dev *pdev = adapter->pdev;
579 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
580 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
585 bool cleaned = false;
586 int cleaned_count = 0;
587 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
589 i = rx_ring->next_to_clean;
590 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
591 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
592 rx_buffer_info = &rx_ring->rx_buffer_info[i];
594 while (staterr & IXGBE_RXD_STAT_DD) {
596 if (*work_done >= work_to_do)
600 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
601 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
602 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
603 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
604 if (hdr_info & IXGBE_RXDADV_SPH)
605 adapter->rx_hdr_split++;
606 if (len > IXGBE_RX_HDR_SIZE)
607 len = IXGBE_RX_HDR_SIZE;
608 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
610 len = le16_to_cpu(rx_desc->wb.upper.length);
614 skb = rx_buffer_info->skb;
615 prefetch(skb->data - NET_IP_ALIGN);
616 rx_buffer_info->skb = NULL;
618 if (len && !skb_shinfo(skb)->nr_frags) {
619 pci_unmap_single(pdev, rx_buffer_info->dma,
626 pci_unmap_page(pdev, rx_buffer_info->page_dma,
627 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
628 rx_buffer_info->page_dma = 0;
629 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
630 rx_buffer_info->page,
631 rx_buffer_info->page_offset,
634 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
635 (page_count(rx_buffer_info->page) != 1))
636 rx_buffer_info->page = NULL;
638 get_page(rx_buffer_info->page);
640 skb->len += upper_len;
641 skb->data_len += upper_len;
642 skb->truesize += upper_len;
646 if (i == rx_ring->count)
648 next_buffer = &rx_ring->rx_buffer_info[i];
650 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
654 if (staterr & IXGBE_RXD_STAT_EOP) {
655 rx_ring->stats.packets++;
656 rx_ring->stats.bytes += skb->len;
658 rx_buffer_info->skb = next_buffer->skb;
659 rx_buffer_info->dma = next_buffer->dma;
660 next_buffer->skb = skb;
661 next_buffer->dma = 0;
662 adapter->non_eop_descs++;
666 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
667 dev_kfree_skb_irq(skb);
671 ixgbe_rx_checksum(adapter, staterr, skb);
673 /* probably a little skewed due to removing CRC */
674 total_rx_bytes += skb->len;
677 skb->protocol = eth_type_trans(skb, adapter->netdev);
678 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
681 rx_desc->wb.upper.status_error = 0;
683 /* return some buffers to hardware, one at a time is too slow */
684 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
685 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
689 /* use prefetched values */
691 rx_buffer_info = next_buffer;
693 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
696 if (rx_ring->lro_used) {
697 lro_flush_all(&rx_ring->lro_mgr);
698 rx_ring->lro_used = false;
701 rx_ring->next_to_clean = i;
702 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
705 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
707 rx_ring->total_packets += total_rx_packets;
708 rx_ring->total_bytes += total_rx_bytes;
709 adapter->net_stats.rx_bytes += total_rx_bytes;
710 adapter->net_stats.rx_packets += total_rx_packets;
715 static int ixgbe_clean_rxonly(struct napi_struct *, int);
717 * ixgbe_configure_msix - Configure MSI-X hardware
718 * @adapter: board private structure
720 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
723 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
725 struct ixgbe_q_vector *q_vector;
726 int i, j, q_vectors, v_idx, r_idx;
729 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
731 /* Populate the IVAR table and set the ITR values to the
732 * corresponding register.
734 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
735 q_vector = &adapter->q_vector[v_idx];
736 /* XXX for_each_bit(...) */
737 r_idx = find_first_bit(q_vector->rxr_idx,
738 adapter->num_rx_queues);
740 for (i = 0; i < q_vector->rxr_count; i++) {
741 j = adapter->rx_ring[r_idx].reg_idx;
742 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
743 r_idx = find_next_bit(q_vector->rxr_idx,
744 adapter->num_rx_queues,
747 r_idx = find_first_bit(q_vector->txr_idx,
748 adapter->num_tx_queues);
750 for (i = 0; i < q_vector->txr_count; i++) {
751 j = adapter->tx_ring[r_idx].reg_idx;
752 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
753 r_idx = find_next_bit(q_vector->txr_idx,
754 adapter->num_tx_queues,
758 /* if this is a tx only vector halve the interrupt rate */
759 if (q_vector->txr_count && !q_vector->rxr_count)
760 q_vector->eitr = (adapter->eitr_param >> 1);
763 q_vector->eitr = adapter->eitr_param;
765 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
766 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
769 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
770 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
772 /* set up to autoclear timer, and the vectors */
773 mask = IXGBE_EIMS_ENABLE_MASK;
774 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
775 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
782 latency_invalid = 255
786 * ixgbe_update_itr - update the dynamic ITR value based on statistics
787 * @adapter: pointer to adapter
788 * @eitr: eitr setting (ints per sec) to give last timeslice
789 * @itr_setting: current throttle rate in ints/second
790 * @packets: the number of packets during this measurement interval
791 * @bytes: the number of bytes during this measurement interval
793 * Stores a new ITR value based on packets and byte
794 * counts during the last interrupt. The advantage of per interrupt
795 * computation is faster updates and more accurate ITR for the current
796 * traffic pattern. Constants in this function were computed
797 * based on theoretical maximum wire speed and thresholds were set based
798 * on testing data as well as attempting to minimize response time
799 * while increasing bulk throughput.
800 * this functionality is controlled by the InterruptThrottleRate module
801 * parameter (see ixgbe_param.c)
803 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
804 u32 eitr, u8 itr_setting,
805 int packets, int bytes)
807 unsigned int retval = itr_setting;
812 goto update_itr_done;
815 /* simple throttlerate management
816 * 0-20MB/s lowest (100000 ints/s)
817 * 20-100MB/s low (20000 ints/s)
818 * 100-1249MB/s bulk (8000 ints/s)
820 /* what was last interrupt timeslice? */
821 timepassed_us = 1000000/eitr;
822 bytes_perint = bytes / timepassed_us; /* bytes/usec */
824 switch (itr_setting) {
826 if (bytes_perint > adapter->eitr_low)
827 retval = low_latency;
830 if (bytes_perint > adapter->eitr_high)
831 retval = bulk_latency;
832 else if (bytes_perint <= adapter->eitr_low)
833 retval = lowest_latency;
836 if (bytes_perint <= adapter->eitr_high)
837 retval = low_latency;
845 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
847 struct ixgbe_adapter *adapter = q_vector->adapter;
848 struct ixgbe_hw *hw = &adapter->hw;
850 u8 current_itr, ret_itr;
851 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
852 sizeof(struct ixgbe_q_vector);
853 struct ixgbe_ring *rx_ring, *tx_ring;
855 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
856 for (i = 0; i < q_vector->txr_count; i++) {
857 tx_ring = &(adapter->tx_ring[r_idx]);
858 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
860 tx_ring->total_packets,
861 tx_ring->total_bytes);
862 /* if the result for this queue would decrease interrupt
863 * rate for this vector then use that result */
864 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
865 q_vector->tx_itr - 1 : ret_itr);
866 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
870 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
871 for (i = 0; i < q_vector->rxr_count; i++) {
872 rx_ring = &(adapter->rx_ring[r_idx]);
873 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
875 rx_ring->total_packets,
876 rx_ring->total_bytes);
877 /* if the result for this queue would decrease interrupt
878 * rate for this vector then use that result */
879 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
880 q_vector->rx_itr - 1 : ret_itr);
881 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
885 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
887 switch (current_itr) {
888 /* counts and packets in update_itr are dependent on these numbers */
893 new_itr = 20000; /* aka hwitr = ~200 */
901 if (new_itr != q_vector->eitr) {
903 /* do an exponential smoothing */
904 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
905 q_vector->eitr = new_itr;
906 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
907 /* must write high and low 16 bits to reset counter */
908 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
910 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
916 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
918 struct ixgbe_hw *hw = &adapter->hw;
920 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
921 (eicr & IXGBE_EICR_GPI_SDP1)) {
922 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
923 /* write to clear the interrupt */
924 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
928 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
930 struct ixgbe_hw *hw = &adapter->hw;
933 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
934 adapter->link_check_timeout = jiffies;
935 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
936 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
937 schedule_work(&adapter->watchdog_task);
941 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
943 struct net_device *netdev = data;
944 struct ixgbe_adapter *adapter = netdev_priv(netdev);
945 struct ixgbe_hw *hw = &adapter->hw;
946 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
948 if (eicr & IXGBE_EICR_LSC)
949 ixgbe_check_lsc(adapter);
951 ixgbe_check_fan_failure(adapter, eicr);
953 if (!test_bit(__IXGBE_DOWN, &adapter->state))
954 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
959 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
961 struct ixgbe_q_vector *q_vector = data;
962 struct ixgbe_adapter *adapter = q_vector->adapter;
963 struct ixgbe_ring *tx_ring;
966 if (!q_vector->txr_count)
969 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
970 for (i = 0; i < q_vector->txr_count; i++) {
971 tx_ring = &(adapter->tx_ring[r_idx]);
972 #ifdef CONFIG_IXGBE_DCA
973 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
974 ixgbe_update_tx_dca(adapter, tx_ring);
976 tx_ring->total_bytes = 0;
977 tx_ring->total_packets = 0;
978 ixgbe_clean_tx_irq(adapter, tx_ring);
979 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
987 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
989 * @data: pointer to our q_vector struct for this interrupt vector
991 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
993 struct ixgbe_q_vector *q_vector = data;
994 struct ixgbe_adapter *adapter = q_vector->adapter;
995 struct ixgbe_ring *rx_ring;
999 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1000 for (i = 0; i < q_vector->rxr_count; i++) {
1001 rx_ring = &(adapter->rx_ring[r_idx]);
1002 rx_ring->total_bytes = 0;
1003 rx_ring->total_packets = 0;
1004 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1008 if (!q_vector->rxr_count)
1011 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1012 rx_ring = &(adapter->rx_ring[r_idx]);
1013 /* disable interrupts on this vector only */
1014 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1015 netif_rx_schedule(&q_vector->napi);
1020 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1022 ixgbe_msix_clean_rx(irq, data);
1023 ixgbe_msix_clean_tx(irq, data);
1029 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1030 * @napi: napi struct with our devices info in it
1031 * @budget: amount of work driver is allowed to do this pass, in packets
1033 * This function is optimized for cleaning one queue only on a single
1036 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1038 struct ixgbe_q_vector *q_vector =
1039 container_of(napi, struct ixgbe_q_vector, napi);
1040 struct ixgbe_adapter *adapter = q_vector->adapter;
1041 struct ixgbe_ring *rx_ring = NULL;
1045 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1046 rx_ring = &(adapter->rx_ring[r_idx]);
1047 #ifdef CONFIG_IXGBE_DCA
1048 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1049 ixgbe_update_rx_dca(adapter, rx_ring);
1052 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1054 /* If all Rx work done, exit the polling mode */
1055 if (work_done < budget) {
1056 netif_rx_complete(napi);
1057 if (adapter->itr_setting & 3)
1058 ixgbe_set_itr_msix(q_vector);
1059 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1060 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1067 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1068 * @napi: napi struct with our devices info in it
1069 * @budget: amount of work driver is allowed to do this pass, in packets
1071 * This function will clean more than one rx queue associated with a
1074 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1076 struct ixgbe_q_vector *q_vector =
1077 container_of(napi, struct ixgbe_q_vector, napi);
1078 struct ixgbe_adapter *adapter = q_vector->adapter;
1079 struct ixgbe_ring *rx_ring = NULL;
1080 int work_done = 0, i;
1082 u16 enable_mask = 0;
1084 /* attempt to distribute budget to each queue fairly, but don't allow
1085 * the budget to go below 1 because we'll exit polling */
1086 budget /= (q_vector->rxr_count ?: 1);
1087 budget = max(budget, 1);
1088 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1089 for (i = 0; i < q_vector->rxr_count; i++) {
1090 rx_ring = &(adapter->rx_ring[r_idx]);
1091 #ifdef CONFIG_IXGBE_DCA
1092 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1093 ixgbe_update_rx_dca(adapter, rx_ring);
1095 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1096 enable_mask |= rx_ring->v_idx;
1097 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1101 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1102 rx_ring = &(adapter->rx_ring[r_idx]);
1103 /* If all Rx work done, exit the polling mode */
1104 if (work_done < budget) {
1105 netif_rx_complete(napi);
1106 if (adapter->itr_setting & 3)
1107 ixgbe_set_itr_msix(q_vector);
1108 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1109 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1115 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1118 a->q_vector[v_idx].adapter = a;
1119 set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1120 a->q_vector[v_idx].rxr_count++;
1121 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1124 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1127 a->q_vector[v_idx].adapter = a;
1128 set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1129 a->q_vector[v_idx].txr_count++;
1130 a->tx_ring[r_idx].v_idx = 1 << v_idx;
1134 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1135 * @adapter: board private structure to initialize
1136 * @vectors: allotted vector count for descriptor rings
1138 * This function maps descriptor rings to the queue-specific vectors
1139 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1140 * one vector per ring/queue, but on a constrained vector budget, we
1141 * group the rings as "efficiently" as possible. You would add new
1142 * mapping configurations in here.
1144 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1148 int rxr_idx = 0, txr_idx = 0;
1149 int rxr_remaining = adapter->num_rx_queues;
1150 int txr_remaining = adapter->num_tx_queues;
1155 /* No mapping required if MSI-X is disabled. */
1156 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1160 * The ideal configuration...
1161 * We have enough vectors to map one per queue.
1163 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1164 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1165 map_vector_to_rxq(adapter, v_start, rxr_idx);
1167 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1168 map_vector_to_txq(adapter, v_start, txr_idx);
1174 * If we don't have enough vectors for a 1-to-1
1175 * mapping, we'll have to group them so there are
1176 * multiple queues per vector.
1178 /* Re-adjusting *qpv takes care of the remainder. */
1179 for (i = v_start; i < vectors; i++) {
1180 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1181 for (j = 0; j < rqpv; j++) {
1182 map_vector_to_rxq(adapter, i, rxr_idx);
1187 for (i = v_start; i < vectors; i++) {
1188 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1189 for (j = 0; j < tqpv; j++) {
1190 map_vector_to_txq(adapter, i, txr_idx);
1201 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1202 * @adapter: board private structure
1204 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1205 * interrupts from the kernel.
1207 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1209 struct net_device *netdev = adapter->netdev;
1210 irqreturn_t (*handler)(int, void *);
1211 int i, vector, q_vectors, err;
1214 /* Decrement for Other and TCP Timer vectors */
1215 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1217 /* Map the Tx/Rx rings to the vectors we were allotted. */
1218 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1222 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1223 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1224 &ixgbe_msix_clean_many)
1225 for (vector = 0; vector < q_vectors; vector++) {
1226 handler = SET_HANDLER(&adapter->q_vector[vector]);
1228 if(handler == &ixgbe_msix_clean_rx) {
1229 sprintf(adapter->name[vector], "%s-%s-%d",
1230 netdev->name, "rx", ri++);
1232 else if(handler == &ixgbe_msix_clean_tx) {
1233 sprintf(adapter->name[vector], "%s-%s-%d",
1234 netdev->name, "tx", ti++);
1237 sprintf(adapter->name[vector], "%s-%s-%d",
1238 netdev->name, "TxRx", vector);
1240 err = request_irq(adapter->msix_entries[vector].vector,
1241 handler, 0, adapter->name[vector],
1242 &(adapter->q_vector[vector]));
1245 "request_irq failed for MSIX interrupt "
1246 "Error: %d\n", err);
1247 goto free_queue_irqs;
1251 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1252 err = request_irq(adapter->msix_entries[vector].vector,
1253 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1256 "request_irq for msix_lsc failed: %d\n", err);
1257 goto free_queue_irqs;
1263 for (i = vector - 1; i >= 0; i--)
1264 free_irq(adapter->msix_entries[--vector].vector,
1265 &(adapter->q_vector[i]));
1266 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1267 pci_disable_msix(adapter->pdev);
1268 kfree(adapter->msix_entries);
1269 adapter->msix_entries = NULL;
1274 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1276 struct ixgbe_hw *hw = &adapter->hw;
1277 struct ixgbe_q_vector *q_vector = adapter->q_vector;
1279 u32 new_itr = q_vector->eitr;
1280 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1281 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1283 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1285 tx_ring->total_packets,
1286 tx_ring->total_bytes);
1287 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1289 rx_ring->total_packets,
1290 rx_ring->total_bytes);
1292 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1294 switch (current_itr) {
1295 /* counts and packets in update_itr are dependent on these numbers */
1296 case lowest_latency:
1300 new_itr = 20000; /* aka hwitr = ~200 */
1309 if (new_itr != q_vector->eitr) {
1311 /* do an exponential smoothing */
1312 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1313 q_vector->eitr = new_itr;
1314 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1315 /* must write high and low 16 bits to reset counter */
1316 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1323 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1324 * @adapter: board private structure
1326 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1328 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1329 IXGBE_WRITE_FLUSH(&adapter->hw);
1330 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1332 for (i = 0; i < adapter->num_msix_vectors; i++)
1333 synchronize_irq(adapter->msix_entries[i].vector);
1335 synchronize_irq(adapter->pdev->irq);
1340 * ixgbe_irq_enable - Enable default interrupt generation settings
1341 * @adapter: board private structure
1343 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1346 mask = IXGBE_EIMS_ENABLE_MASK;
1347 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1348 mask |= IXGBE_EIMS_GPI_SDP1;
1349 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1350 IXGBE_WRITE_FLUSH(&adapter->hw);
1354 * ixgbe_intr - legacy mode Interrupt Handler
1355 * @irq: interrupt number
1356 * @data: pointer to a network interface device structure
1358 static irqreturn_t ixgbe_intr(int irq, void *data)
1360 struct net_device *netdev = data;
1361 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1362 struct ixgbe_hw *hw = &adapter->hw;
1365 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1366 * therefore no explict interrupt disable is necessary */
1367 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1369 /* shared interrupt alert!
1370 * make sure interrupts are enabled because the read will
1371 * have disabled interrupts due to EIAM */
1372 ixgbe_irq_enable(adapter);
1373 return IRQ_NONE; /* Not our interrupt */
1376 if (eicr & IXGBE_EICR_LSC)
1377 ixgbe_check_lsc(adapter);
1379 ixgbe_check_fan_failure(adapter, eicr);
1381 if (netif_rx_schedule_prep(&adapter->q_vector[0].napi)) {
1382 adapter->tx_ring[0].total_packets = 0;
1383 adapter->tx_ring[0].total_bytes = 0;
1384 adapter->rx_ring[0].total_packets = 0;
1385 adapter->rx_ring[0].total_bytes = 0;
1386 /* would disable interrupts here but EIAM disabled it */
1387 __netif_rx_schedule(&adapter->q_vector[0].napi);
1393 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1395 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1397 for (i = 0; i < q_vectors; i++) {
1398 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1399 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1400 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1401 q_vector->rxr_count = 0;
1402 q_vector->txr_count = 0;
1407 * ixgbe_request_irq - initialize interrupts
1408 * @adapter: board private structure
1410 * Attempts to configure interrupts using the best available
1411 * capabilities of the hardware and kernel.
1413 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1415 struct net_device *netdev = adapter->netdev;
1418 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1419 err = ixgbe_request_msix_irqs(adapter);
1420 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1421 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1422 netdev->name, netdev);
1424 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1425 netdev->name, netdev);
1429 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1434 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1436 struct net_device *netdev = adapter->netdev;
1438 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1441 q_vectors = adapter->num_msix_vectors;
1444 free_irq(adapter->msix_entries[i].vector, netdev);
1447 for (; i >= 0; i--) {
1448 free_irq(adapter->msix_entries[i].vector,
1449 &(adapter->q_vector[i]));
1452 ixgbe_reset_q_vectors(adapter);
1454 free_irq(adapter->pdev->irq, netdev);
1459 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1462 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1464 struct ixgbe_hw *hw = &adapter->hw;
1466 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1467 EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1469 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1470 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1472 map_vector_to_rxq(adapter, 0, 0);
1473 map_vector_to_txq(adapter, 0, 0);
1475 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1479 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1480 * @adapter: board private structure
1482 * Configure the Tx unit of the MAC after a reset.
1484 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1487 struct ixgbe_hw *hw = &adapter->hw;
1488 u32 i, j, tdlen, txctrl;
1490 /* Setup the HW Tx Head and Tail descriptor pointers */
1491 for (i = 0; i < adapter->num_tx_queues; i++) {
1492 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1495 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1496 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1497 (tdba & DMA_32BIT_MASK));
1498 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1500 (ring->count * sizeof(union ixgbe_adv_tx_desc));
1501 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1502 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1503 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1504 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1505 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1506 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1507 adapter->tx_ring[i].head = IXGBE_TDH(j);
1508 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1509 /* Disable Tx Head Writeback RO bit, since this hoses
1510 * bookkeeping if things aren't delivered in order.
1512 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1513 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1514 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1518 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1520 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1522 struct ixgbe_ring *rx_ring;
1527 /* program one srrctl register per VMDq index */
1528 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1530 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1531 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1532 shift = find_first_bit(&mask, len);
1533 queue0 = index & mask;
1534 index = (index & mask) >> shift;
1535 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1537 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1538 queue0 = index & mask;
1539 index = index & mask;
1542 rx_ring = &adapter->rx_ring[queue0];
1544 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1546 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1547 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1549 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1550 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1551 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1552 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1553 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1554 IXGBE_SRRCTL_BSIZEHDR_MASK);
1556 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1558 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1559 srrctl |= IXGBE_RXBUFFER_2048 >>
1560 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1562 srrctl |= rx_ring->rx_buf_len >>
1563 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1565 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1569 * ixgbe_get_skb_hdr - helper function for LRO header processing
1570 * @skb: pointer to sk_buff to be added to LRO packet
1571 * @iphdr: pointer to ip header structure
1572 * @tcph: pointer to tcp header structure
1573 * @hdr_flags: pointer to header flags
1574 * @priv: private data
1576 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1577 u64 *hdr_flags, void *priv)
1579 union ixgbe_adv_rx_desc *rx_desc = priv;
1581 /* Verify that this is a valid IPv4 TCP packet */
1582 if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1583 (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1586 /* Set network headers */
1587 skb_reset_network_header(skb);
1588 skb_set_transport_header(skb, ip_hdrlen(skb));
1589 *iphdr = ip_hdr(skb);
1590 *tcph = tcp_hdr(skb);
1591 *hdr_flags = LRO_IPV4 | LRO_TCP;
1595 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1596 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1599 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1600 * @adapter: board private structure
1602 * Configure the Rx unit of the MAC after a reset.
1604 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1607 struct ixgbe_hw *hw = &adapter->hw;
1608 struct net_device *netdev = adapter->netdev;
1609 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1611 u32 rdlen, rxctrl, rxcsum;
1612 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1613 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1614 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1621 /* Decide whether to use packet split mode or not */
1622 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1624 /* Set the RX buffer length according to the mode */
1625 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1626 rx_buf_len = IXGBE_RX_HDR_SIZE;
1628 if (netdev->mtu <= ETH_DATA_LEN)
1629 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1631 rx_buf_len = ALIGN(max_frame, 1024);
1634 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1635 fctrl |= IXGBE_FCTRL_BAM;
1636 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1637 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1639 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1640 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1641 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1643 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1644 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1646 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1648 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1649 /* disable receives while setting up the descriptors */
1650 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1651 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1653 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1654 * the Base and Length of the Rx Descriptor Ring */
1655 for (i = 0; i < adapter->num_rx_queues; i++) {
1656 rdba = adapter->rx_ring[i].dma;
1657 j = adapter->rx_ring[i].reg_idx;
1658 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1659 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1660 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1661 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1662 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1663 adapter->rx_ring[i].head = IXGBE_RDH(j);
1664 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1665 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1666 /* Intitial LRO Settings */
1667 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1668 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1669 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1670 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1671 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1672 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1673 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1674 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1675 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1677 ixgbe_configure_srrctl(adapter, j);
1681 * For VMDq support of different descriptor types or
1682 * buffer sizes through the use of multiple SRRCTL
1683 * registers, RDRXCTL.MVMEN must be set to 1
1685 * also, the manual doesn't mention it clearly but DCA hints
1686 * will only use queue 0's tags unless this bit is set. Side
1687 * effects of setting this bit are only that SRRCTL must be
1688 * fully programmed [0..15]
1690 if (adapter->flags &
1691 (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1692 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1693 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1694 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1697 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1698 /* Fill out redirection table */
1699 for (i = 0, j = 0; i < 128; i++, j++) {
1700 if (j == adapter->ring_feature[RING_F_RSS].indices)
1702 /* reta = 4-byte sliding window of
1703 * 0x00..(indices-1)(indices-1)00..etc. */
1704 reta = (reta << 8) | (j * 0x11);
1706 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1709 /* Fill out hash function seeds */
1710 for (i = 0; i < 10; i++)
1711 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1713 mrqc = IXGBE_MRQC_RSSEN
1714 /* Perform hash on these packet types */
1715 | IXGBE_MRQC_RSS_FIELD_IPV4
1716 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1717 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1718 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1719 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1720 | IXGBE_MRQC_RSS_FIELD_IPV6
1721 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1722 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1723 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1724 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1727 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1729 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1730 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1731 /* Disable indicating checksum in descriptor, enables
1733 rxcsum |= IXGBE_RXCSUM_PCSD;
1735 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1736 /* Enable IPv4 payload checksum for UDP fragments
1737 * if PCSD is not set */
1738 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1741 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1744 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1745 struct vlan_group *grp)
1747 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1750 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1751 ixgbe_irq_disable(adapter);
1752 adapter->vlgrp = grp;
1755 * For a DCB driver, always enable VLAN tag stripping so we can
1756 * still receive traffic from a DCB-enabled host even if we're
1759 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1760 ctrl |= IXGBE_VLNCTRL_VME;
1761 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1762 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1765 /* enable VLAN tag insert/strip */
1766 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1767 ctrl |= IXGBE_VLNCTRL_VME;
1768 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1769 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1772 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1773 ixgbe_irq_enable(adapter);
1776 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1778 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1779 struct ixgbe_hw *hw = &adapter->hw;
1781 /* add VID to filter table */
1782 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1785 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1787 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1788 struct ixgbe_hw *hw = &adapter->hw;
1790 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1791 ixgbe_irq_disable(adapter);
1793 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1795 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1796 ixgbe_irq_enable(adapter);
1798 /* remove VID from filter table */
1799 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1802 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1804 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1806 if (adapter->vlgrp) {
1808 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1809 if (!vlan_group_get_device(adapter->vlgrp, vid))
1811 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1816 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1818 struct dev_mc_list *mc_ptr;
1819 u8 *addr = *mc_addr_ptr;
1822 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1824 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1826 *mc_addr_ptr = NULL;
1832 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1833 * @netdev: network interface device structure
1835 * The set_rx_method entry point is called whenever the unicast/multicast
1836 * address list or the network interface flags are updated. This routine is
1837 * responsible for configuring the hardware for proper unicast, multicast and
1840 static void ixgbe_set_rx_mode(struct net_device *netdev)
1842 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1843 struct ixgbe_hw *hw = &adapter->hw;
1845 u8 *addr_list = NULL;
1848 /* Check for Promiscuous and All Multicast modes */
1850 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1851 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1853 if (netdev->flags & IFF_PROMISC) {
1854 hw->addr_ctrl.user_set_promisc = 1;
1855 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1856 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1858 if (netdev->flags & IFF_ALLMULTI) {
1859 fctrl |= IXGBE_FCTRL_MPE;
1860 fctrl &= ~IXGBE_FCTRL_UPE;
1862 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1864 vlnctrl |= IXGBE_VLNCTRL_VFE;
1865 hw->addr_ctrl.user_set_promisc = 0;
1868 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1869 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1871 /* reprogram secondary unicast list */
1872 addr_count = netdev->uc_count;
1874 addr_list = netdev->uc_list->dmi_addr;
1875 hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1876 ixgbe_addr_list_itr);
1878 /* reprogram multicast list */
1879 addr_count = netdev->mc_count;
1881 addr_list = netdev->mc_list->dmi_addr;
1882 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1883 ixgbe_addr_list_itr);
1886 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1889 struct ixgbe_q_vector *q_vector;
1890 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1892 /* legacy and MSI only use one vector */
1893 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1896 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1897 struct napi_struct *napi;
1898 q_vector = &adapter->q_vector[q_idx];
1899 if (!q_vector->rxr_count)
1901 napi = &q_vector->napi;
1902 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1903 (q_vector->rxr_count > 1))
1904 napi->poll = &ixgbe_clean_rxonly_many;
1910 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1913 struct ixgbe_q_vector *q_vector;
1914 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1916 /* legacy and MSI only use one vector */
1917 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1920 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1921 q_vector = &adapter->q_vector[q_idx];
1922 if (!q_vector->rxr_count)
1924 napi_disable(&q_vector->napi);
1928 #ifdef CONFIG_IXGBE_DCB
1930 * ixgbe_configure_dcb - Configure DCB hardware
1931 * @adapter: ixgbe adapter struct
1933 * This is called by the driver on open to configure the DCB hardware.
1934 * This is also called by the gennetlink interface when reconfiguring
1937 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1939 struct ixgbe_hw *hw = &adapter->hw;
1940 u32 txdctl, vlnctrl;
1943 ixgbe_dcb_check_config(&adapter->dcb_cfg);
1944 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1945 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1947 /* reconfigure the hardware */
1948 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1950 for (i = 0; i < adapter->num_tx_queues; i++) {
1951 j = adapter->tx_ring[i].reg_idx;
1952 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1953 /* PThresh workaround for Tx hang with DFP enabled. */
1955 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1957 /* Enable VLAN tag insert/strip */
1958 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1959 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1960 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1961 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1962 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1966 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1968 struct net_device *netdev = adapter->netdev;
1971 ixgbe_set_rx_mode(netdev);
1973 ixgbe_restore_vlan(adapter);
1974 #ifdef CONFIG_IXGBE_DCB
1975 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1976 netif_set_gso_max_size(netdev, 32768);
1977 ixgbe_configure_dcb(adapter);
1979 netif_set_gso_max_size(netdev, 65536);
1982 netif_set_gso_max_size(netdev, 65536);
1985 ixgbe_configure_tx(adapter);
1986 ixgbe_configure_rx(adapter);
1987 for (i = 0; i < adapter->num_rx_queues; i++)
1988 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1989 (adapter->rx_ring[i].count - 1));
1992 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1994 struct net_device *netdev = adapter->netdev;
1995 struct ixgbe_hw *hw = &adapter->hw;
1997 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1998 u32 txdctl, rxdctl, mhadd;
2001 ixgbe_get_hw_control(adapter);
2003 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2004 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2005 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2006 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2007 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2012 /* XXX: to interrupt immediately for EICS writes, enable this */
2013 /* gpie |= IXGBE_GPIE_EIMEN; */
2014 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2017 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2018 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2019 * specifically only auto mask tx and rx interrupts */
2020 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2023 /* Enable fan failure interrupt if media type is copper */
2024 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2025 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2026 gpie |= IXGBE_SDP1_GPIEN;
2027 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2030 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2031 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2032 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2033 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2035 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2038 for (i = 0; i < adapter->num_tx_queues; i++) {
2039 j = adapter->tx_ring[i].reg_idx;
2040 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2041 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2042 txdctl |= (8 << 16);
2043 txdctl |= IXGBE_TXDCTL_ENABLE;
2044 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2047 for (i = 0; i < adapter->num_rx_queues; i++) {
2048 j = adapter->rx_ring[i].reg_idx;
2049 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2050 /* enable PTHRESH=32 descriptors (half the internal cache)
2051 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2052 * this also removes a pesky rx_no_buffer_count increment */
2054 rxdctl |= IXGBE_RXDCTL_ENABLE;
2055 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2057 /* enable all receives */
2058 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2059 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2060 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2062 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2063 ixgbe_configure_msix(adapter);
2065 ixgbe_configure_msi_and_legacy(adapter);
2067 clear_bit(__IXGBE_DOWN, &adapter->state);
2068 ixgbe_napi_enable_all(adapter);
2070 /* clear any pending interrupts, may auto mask */
2071 IXGBE_READ_REG(hw, IXGBE_EICR);
2073 ixgbe_irq_enable(adapter);
2075 /* bring the link up in the watchdog, this could race with our first
2076 * link up interrupt but shouldn't be a problem */
2077 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2078 adapter->link_check_timeout = jiffies;
2079 mod_timer(&adapter->watchdog_timer, jiffies);
2083 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2085 WARN_ON(in_interrupt());
2086 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2088 ixgbe_down(adapter);
2090 clear_bit(__IXGBE_RESETTING, &adapter->state);
2093 int ixgbe_up(struct ixgbe_adapter *adapter)
2095 /* hardware has been reset, we need to reload some things */
2096 ixgbe_configure(adapter);
2098 return ixgbe_up_complete(adapter);
2101 void ixgbe_reset(struct ixgbe_adapter *adapter)
2103 struct ixgbe_hw *hw = &adapter->hw;
2104 if (hw->mac.ops.init_hw(hw))
2105 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2107 /* reprogram the RAR[0] in case user changed it. */
2108 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2113 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2114 * @adapter: board private structure
2115 * @rx_ring: ring to free buffers from
2117 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2118 struct ixgbe_ring *rx_ring)
2120 struct pci_dev *pdev = adapter->pdev;
2124 /* Free all the Rx ring sk_buffs */
2126 for (i = 0; i < rx_ring->count; i++) {
2127 struct ixgbe_rx_buffer *rx_buffer_info;
2129 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2130 if (rx_buffer_info->dma) {
2131 pci_unmap_single(pdev, rx_buffer_info->dma,
2132 rx_ring->rx_buf_len,
2133 PCI_DMA_FROMDEVICE);
2134 rx_buffer_info->dma = 0;
2136 if (rx_buffer_info->skb) {
2137 dev_kfree_skb(rx_buffer_info->skb);
2138 rx_buffer_info->skb = NULL;
2140 if (!rx_buffer_info->page)
2142 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2143 PCI_DMA_FROMDEVICE);
2144 rx_buffer_info->page_dma = 0;
2145 put_page(rx_buffer_info->page);
2146 rx_buffer_info->page = NULL;
2147 rx_buffer_info->page_offset = 0;
2150 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2151 memset(rx_ring->rx_buffer_info, 0, size);
2153 /* Zero out the descriptor ring */
2154 memset(rx_ring->desc, 0, rx_ring->size);
2156 rx_ring->next_to_clean = 0;
2157 rx_ring->next_to_use = 0;
2159 writel(0, adapter->hw.hw_addr + rx_ring->head);
2160 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2164 * ixgbe_clean_tx_ring - Free Tx Buffers
2165 * @adapter: board private structure
2166 * @tx_ring: ring to be cleaned
2168 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2169 struct ixgbe_ring *tx_ring)
2171 struct ixgbe_tx_buffer *tx_buffer_info;
2175 /* Free all the Tx ring sk_buffs */
2177 for (i = 0; i < tx_ring->count; i++) {
2178 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2179 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2182 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2183 memset(tx_ring->tx_buffer_info, 0, size);
2185 /* Zero out the descriptor ring */
2186 memset(tx_ring->desc, 0, tx_ring->size);
2188 tx_ring->next_to_use = 0;
2189 tx_ring->next_to_clean = 0;
2191 writel(0, adapter->hw.hw_addr + tx_ring->head);
2192 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2196 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2197 * @adapter: board private structure
2199 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2203 for (i = 0; i < adapter->num_rx_queues; i++)
2204 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2208 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2209 * @adapter: board private structure
2211 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2215 for (i = 0; i < adapter->num_tx_queues; i++)
2216 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2219 void ixgbe_down(struct ixgbe_adapter *adapter)
2221 struct net_device *netdev = adapter->netdev;
2222 struct ixgbe_hw *hw = &adapter->hw;
2227 /* signal that we are down to the interrupt handler */
2228 set_bit(__IXGBE_DOWN, &adapter->state);
2230 /* disable receives */
2231 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2232 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2234 netif_tx_disable(netdev);
2236 IXGBE_WRITE_FLUSH(hw);
2239 netif_tx_stop_all_queues(netdev);
2241 ixgbe_irq_disable(adapter);
2243 ixgbe_napi_disable_all(adapter);
2245 del_timer_sync(&adapter->watchdog_timer);
2246 cancel_work_sync(&adapter->watchdog_task);
2248 /* disable transmits in the hardware now that interrupts are off */
2249 for (i = 0; i < adapter->num_tx_queues; i++) {
2250 j = adapter->tx_ring[i].reg_idx;
2251 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2252 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2253 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2256 netif_carrier_off(netdev);
2258 #ifdef CONFIG_IXGBE_DCA
2259 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2260 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2261 dca_remove_requester(&adapter->pdev->dev);
2265 if (!pci_channel_offline(adapter->pdev))
2266 ixgbe_reset(adapter);
2267 ixgbe_clean_all_tx_rings(adapter);
2268 ixgbe_clean_all_rx_rings(adapter);
2270 #ifdef CONFIG_IXGBE_DCA
2271 /* since we reset the hardware DCA settings were cleared */
2272 if (dca_add_requester(&adapter->pdev->dev) == 0) {
2273 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2274 /* always use CB2 mode, difference is masked
2275 * in the CB driver */
2276 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2277 ixgbe_setup_dca(adapter);
2283 * ixgbe_poll - NAPI Rx polling callback
2284 * @napi: structure for representing this polling device
2285 * @budget: how many packets driver is allowed to clean
2287 * This function is used for legacy and MSI, NAPI mode
2289 static int ixgbe_poll(struct napi_struct *napi, int budget)
2291 struct ixgbe_q_vector *q_vector = container_of(napi,
2292 struct ixgbe_q_vector, napi);
2293 struct ixgbe_adapter *adapter = q_vector->adapter;
2294 int tx_cleaned, work_done = 0;
2296 #ifdef CONFIG_IXGBE_DCA
2297 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2298 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2299 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2303 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2304 ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2309 /* If budget not fully consumed, exit the polling mode */
2310 if (work_done < budget) {
2311 netif_rx_complete(napi);
2312 if (adapter->itr_setting & 3)
2313 ixgbe_set_itr(adapter);
2314 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2315 ixgbe_irq_enable(adapter);
2321 * ixgbe_tx_timeout - Respond to a Tx Hang
2322 * @netdev: network interface device structure
2324 static void ixgbe_tx_timeout(struct net_device *netdev)
2326 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2328 /* Do the reset outside of interrupt context */
2329 schedule_work(&adapter->reset_task);
2332 static void ixgbe_reset_task(struct work_struct *work)
2334 struct ixgbe_adapter *adapter;
2335 adapter = container_of(work, struct ixgbe_adapter, reset_task);
2337 /* If we're already down or resetting, just bail */
2338 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2339 test_bit(__IXGBE_RESETTING, &adapter->state))
2342 adapter->tx_timeout_count++;
2344 ixgbe_reinit_locked(adapter);
2347 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2349 int nrq = 1, ntq = 1;
2350 int feature_mask = 0, rss_i, rss_m;
2353 /* Number of supported queues */
2354 switch (adapter->hw.mac.type) {
2355 case ixgbe_mac_82598EB:
2356 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2358 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2360 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2361 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2363 switch (adapter->flags & feature_mask) {
2364 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2366 rss_i = min(8, rss_i);
2368 nrq = dcb_i * rss_i;
2369 ntq = min(MAX_TX_QUEUES, dcb_i * rss_i);
2371 case (IXGBE_FLAG_DCB_ENABLED):
2376 case (IXGBE_FLAG_RSS_ENABLED):
2392 /* Sanity check, we should never have zero queues */
2396 adapter->ring_feature[RING_F_DCB].indices = dcb_i;
2397 adapter->ring_feature[RING_F_DCB].mask = dcb_m;
2398 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2399 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2407 adapter->num_rx_queues = nrq;
2408 adapter->num_tx_queues = ntq;
2411 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2414 int err, vector_threshold;
2416 /* We'll want at least 3 (vector_threshold):
2419 * 3) Other (Link Status Change, etc.)
2420 * 4) TCP Timer (optional)
2422 vector_threshold = MIN_MSIX_COUNT;
2424 /* The more we get, the more we will assign to Tx/Rx Cleanup
2425 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2426 * Right now, we simply care about how many we'll get; we'll
2427 * set them up later while requesting irq's.
2429 while (vectors >= vector_threshold) {
2430 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2432 if (!err) /* Success in acquiring all requested vectors. */
2435 vectors = 0; /* Nasty failure, quit now */
2436 else /* err == number of vectors we should try again with */
2440 if (vectors < vector_threshold) {
2441 /* Can't allocate enough MSI-X interrupts? Oh well.
2442 * This just means we'll go with either a single MSI
2443 * vector or fall back to legacy interrupts.
2445 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2446 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2447 kfree(adapter->msix_entries);
2448 adapter->msix_entries = NULL;
2449 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2450 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2451 ixgbe_set_num_queues(adapter);
2453 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2454 adapter->num_msix_vectors = vectors;
2459 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2460 * @adapter: board private structure to initialize
2462 * Once we know the feature-set enabled for the device, we'll cache
2463 * the register offset the descriptor ring is assigned to.
2465 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2467 int feature_mask = 0, rss_i;
2468 int i, txr_idx, rxr_idx;
2471 /* Number of supported queues */
2472 switch (adapter->hw.mac.type) {
2473 case ixgbe_mac_82598EB:
2474 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2475 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2478 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2479 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2480 switch (adapter->flags & feature_mask) {
2481 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2482 for (i = 0; i < dcb_i; i++) {
2485 for (j = 0; j < adapter->num_rx_queues; j++) {
2486 adapter->rx_ring[rxr_idx].reg_idx =
2491 for (j = 0; j < adapter->num_tx_queues; j++) {
2492 adapter->tx_ring[txr_idx].reg_idx =
2498 case (IXGBE_FLAG_DCB_ENABLED):
2499 /* the number of queues is assumed to be symmetric */
2500 for (i = 0; i < dcb_i; i++) {
2501 adapter->rx_ring[i].reg_idx = i << 3;
2502 adapter->tx_ring[i].reg_idx = i << 2;
2505 case (IXGBE_FLAG_RSS_ENABLED):
2506 for (i = 0; i < adapter->num_rx_queues; i++)
2507 adapter->rx_ring[i].reg_idx = i;
2508 for (i = 0; i < adapter->num_tx_queues; i++)
2509 adapter->tx_ring[i].reg_idx = i;
2522 * ixgbe_alloc_queues - Allocate memory for all rings
2523 * @adapter: board private structure to initialize
2525 * We allocate one ring per queue at run-time since we don't know the
2526 * number of queues at compile-time.
2528 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2532 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2533 sizeof(struct ixgbe_ring), GFP_KERNEL);
2534 if (!adapter->tx_ring)
2535 goto err_tx_ring_allocation;
2537 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2538 sizeof(struct ixgbe_ring), GFP_KERNEL);
2539 if (!adapter->rx_ring)
2540 goto err_rx_ring_allocation;
2542 for (i = 0; i < adapter->num_tx_queues; i++) {
2543 adapter->tx_ring[i].count = adapter->tx_ring_count;
2544 adapter->tx_ring[i].queue_index = i;
2547 for (i = 0; i < adapter->num_rx_queues; i++) {
2548 adapter->rx_ring[i].count = adapter->rx_ring_count;
2549 adapter->rx_ring[i].queue_index = i;
2552 ixgbe_cache_ring_register(adapter);
2556 err_rx_ring_allocation:
2557 kfree(adapter->tx_ring);
2558 err_tx_ring_allocation:
2563 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2564 * @adapter: board private structure to initialize
2566 * Attempt to configure the interrupts using the best available
2567 * capabilities of the hardware and the kernel.
2569 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2572 int vector, v_budget;
2575 * It's easy to be greedy for MSI-X vectors, but it really
2576 * doesn't do us much good if we have a lot more vectors
2577 * than CPU's. So let's be conservative and only ask for
2578 * (roughly) twice the number of vectors as there are CPU's.
2580 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2581 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2584 * At the same time, hardware can only support a maximum of
2585 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2586 * we can easily reach upwards of 64 Rx descriptor queues and
2587 * 32 Tx queues. Thus, we cap it off in those rare cases where
2588 * the cpu count also exceeds our vector limit.
2590 v_budget = min(v_budget, MAX_MSIX_COUNT);
2592 /* A failure in MSI-X entry allocation isn't fatal, but it does
2593 * mean we disable MSI-X capabilities of the adapter. */
2594 adapter->msix_entries = kcalloc(v_budget,
2595 sizeof(struct msix_entry), GFP_KERNEL);
2596 if (!adapter->msix_entries) {
2597 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2598 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2599 ixgbe_set_num_queues(adapter);
2600 kfree(adapter->tx_ring);
2601 kfree(adapter->rx_ring);
2602 err = ixgbe_alloc_queues(adapter);
2604 DPRINTK(PROBE, ERR, "Unable to allocate memory "
2612 for (vector = 0; vector < v_budget; vector++)
2613 adapter->msix_entries[vector].entry = vector;
2615 ixgbe_acquire_msix_vectors(adapter, v_budget);
2617 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2621 err = pci_enable_msi(adapter->pdev);
2623 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2625 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2626 "falling back to legacy. Error: %d\n", err);
2632 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2633 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2638 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2640 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2641 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2642 pci_disable_msix(adapter->pdev);
2643 kfree(adapter->msix_entries);
2644 adapter->msix_entries = NULL;
2645 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2646 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2647 pci_disable_msi(adapter->pdev);
2653 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2654 * @adapter: board private structure to initialize
2656 * We determine which interrupt scheme to use based on...
2657 * - Kernel support (MSI, MSI-X)
2658 * - which can be user-defined (via MODULE_PARAM)
2659 * - Hardware queue count (num_*_queues)
2660 * - defined by miscellaneous hardware support/features (RSS, etc.)
2662 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2666 /* Number of supported queues */
2667 ixgbe_set_num_queues(adapter);
2669 err = ixgbe_alloc_queues(adapter);
2671 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2672 goto err_alloc_queues;
2675 err = ixgbe_set_interrupt_capability(adapter);
2677 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2678 goto err_set_interrupt;
2681 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2682 "Tx Queue count = %u\n",
2683 (adapter->num_rx_queues > 1) ? "Enabled" :
2684 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2686 set_bit(__IXGBE_DOWN, &adapter->state);
2691 kfree(adapter->tx_ring);
2692 kfree(adapter->rx_ring);
2698 * ixgbe_sfp_timer - worker thread to find a missing module
2699 * @data: pointer to our adapter struct
2701 static void ixgbe_sfp_timer(unsigned long data)
2703 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2705 /* Do the sfp_timer outside of interrupt context due to the
2706 * delays that sfp+ detection requires
2708 schedule_work(&adapter->sfp_task);
2712 * ixgbe_sfp_task - worker thread to find a missing module
2713 * @work: pointer to work_struct containing our data
2715 static void ixgbe_sfp_task(struct work_struct *work)
2717 struct ixgbe_adapter *adapter = container_of(work,
2718 struct ixgbe_adapter,
2720 struct ixgbe_hw *hw = &adapter->hw;
2722 if ((hw->phy.type == ixgbe_phy_nl) &&
2723 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2724 s32 ret = hw->phy.ops.identify_sfp(hw);
2727 ret = hw->phy.ops.reset(hw);
2728 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2729 DPRINTK(PROBE, ERR, "failed to initialize because an "
2730 "unsupported SFP+ module type was detected.\n"
2731 "Reload the driver after installing a "
2732 "supported module.\n");
2733 unregister_netdev(adapter->netdev);
2735 DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2738 /* don't need this routine any more */
2739 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2743 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2744 mod_timer(&adapter->sfp_timer,
2745 round_jiffies(jiffies + (2 * HZ)));
2749 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2750 * @adapter: board private structure to initialize
2752 * ixgbe_sw_init initializes the Adapter private data structure.
2753 * Fields are initialized based on PCI device information and
2754 * OS network device settings (MTU size).
2756 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2758 struct ixgbe_hw *hw = &adapter->hw;
2759 struct pci_dev *pdev = adapter->pdev;
2761 #ifdef CONFIG_IXGBE_DCB
2763 struct tc_configuration *tc;
2766 /* PCI config space info */
2768 hw->vendor_id = pdev->vendor;
2769 hw->device_id = pdev->device;
2770 hw->revision_id = pdev->revision;
2771 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2772 hw->subsystem_device_id = pdev->subsystem_device;
2774 /* Set capability flags */
2775 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2776 adapter->ring_feature[RING_F_RSS].indices = rss;
2777 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2778 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2780 #ifdef CONFIG_IXGBE_DCB
2781 /* Configure DCB traffic classes */
2782 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2783 tc = &adapter->dcb_cfg.tc_config[j];
2784 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2785 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2786 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2787 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2788 tc->dcb_pfc = pfc_disabled;
2790 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2791 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2792 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2793 adapter->dcb_cfg.round_robin_enable = false;
2794 adapter->dcb_set_bitmap = 0x00;
2795 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2796 adapter->ring_feature[RING_F_DCB].indices);
2799 if (hw->mac.ops.get_media_type &&
2800 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2801 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2803 /* default flow control settings */
2804 hw->fc.original_type = ixgbe_fc_none;
2805 hw->fc.type = ixgbe_fc_none;
2806 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2807 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2808 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2809 hw->fc.send_xon = true;
2811 /* select 10G link by default */
2812 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2814 /* enable itr by default in dynamic mode */
2815 adapter->itr_setting = 1;
2816 adapter->eitr_param = 20000;
2818 /* set defaults for eitr in MegaBytes */
2819 adapter->eitr_low = 10;
2820 adapter->eitr_high = 20;
2822 /* set default ring sizes */
2823 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2824 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2826 /* initialize eeprom parameters */
2827 if (ixgbe_init_eeprom_params_generic(hw)) {
2828 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2832 /* enable rx csum by default */
2833 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2835 set_bit(__IXGBE_DOWN, &adapter->state);
2841 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2842 * @adapter: board private structure
2843 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2845 * Return 0 on success, negative on failure
2847 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2848 struct ixgbe_ring *tx_ring)
2850 struct pci_dev *pdev = adapter->pdev;
2853 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2854 tx_ring->tx_buffer_info = vmalloc(size);
2855 if (!tx_ring->tx_buffer_info)
2857 memset(tx_ring->tx_buffer_info, 0, size);
2859 /* round up to nearest 4K */
2860 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2862 tx_ring->size = ALIGN(tx_ring->size, 4096);
2864 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2869 tx_ring->next_to_use = 0;
2870 tx_ring->next_to_clean = 0;
2871 tx_ring->work_limit = tx_ring->count;
2875 vfree(tx_ring->tx_buffer_info);
2876 tx_ring->tx_buffer_info = NULL;
2877 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2878 "descriptor ring\n");
2883 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2884 * @adapter: board private structure
2886 * If this function returns with an error, then it's possible one or
2887 * more of the rings is populated (while the rest are not). It is the
2888 * callers duty to clean those orphaned rings.
2890 * Return 0 on success, negative on failure
2892 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2896 for (i = 0; i < adapter->num_tx_queues; i++) {
2897 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2900 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2908 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2909 * @adapter: board private structure
2910 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2912 * Returns 0 on success, negative on failure
2914 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2915 struct ixgbe_ring *rx_ring)
2917 struct pci_dev *pdev = adapter->pdev;
2920 size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2921 rx_ring->lro_mgr.lro_arr = vmalloc(size);
2922 if (!rx_ring->lro_mgr.lro_arr)
2924 memset(rx_ring->lro_mgr.lro_arr, 0, size);
2926 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2927 rx_ring->rx_buffer_info = vmalloc(size);
2928 if (!rx_ring->rx_buffer_info) {
2930 "vmalloc allocation failed for the rx desc ring\n");
2933 memset(rx_ring->rx_buffer_info, 0, size);
2935 /* Round up to nearest 4K */
2936 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2937 rx_ring->size = ALIGN(rx_ring->size, 4096);
2939 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2941 if (!rx_ring->desc) {
2943 "Memory allocation failed for the rx desc ring\n");
2944 vfree(rx_ring->rx_buffer_info);
2948 rx_ring->next_to_clean = 0;
2949 rx_ring->next_to_use = 0;
2954 vfree(rx_ring->lro_mgr.lro_arr);
2955 rx_ring->lro_mgr.lro_arr = NULL;
2960 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2961 * @adapter: board private structure
2963 * If this function returns with an error, then it's possible one or
2964 * more of the rings is populated (while the rest are not). It is the
2965 * callers duty to clean those orphaned rings.
2967 * Return 0 on success, negative on failure
2970 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2974 for (i = 0; i < adapter->num_rx_queues; i++) {
2975 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2978 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2986 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2987 * @adapter: board private structure
2988 * @tx_ring: Tx descriptor ring for a specific queue
2990 * Free all transmit software resources
2992 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2993 struct ixgbe_ring *tx_ring)
2995 struct pci_dev *pdev = adapter->pdev;
2997 ixgbe_clean_tx_ring(adapter, tx_ring);
2999 vfree(tx_ring->tx_buffer_info);
3000 tx_ring->tx_buffer_info = NULL;
3002 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3004 tx_ring->desc = NULL;
3008 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3009 * @adapter: board private structure
3011 * Free all transmit software resources
3013 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3017 for (i = 0; i < adapter->num_tx_queues; i++)
3018 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3022 * ixgbe_free_rx_resources - Free Rx Resources
3023 * @adapter: board private structure
3024 * @rx_ring: ring to clean the resources from
3026 * Free all receive software resources
3028 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3029 struct ixgbe_ring *rx_ring)
3031 struct pci_dev *pdev = adapter->pdev;
3033 vfree(rx_ring->lro_mgr.lro_arr);
3034 rx_ring->lro_mgr.lro_arr = NULL;
3036 ixgbe_clean_rx_ring(adapter, rx_ring);
3038 vfree(rx_ring->rx_buffer_info);
3039 rx_ring->rx_buffer_info = NULL;
3041 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3043 rx_ring->desc = NULL;
3047 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3048 * @adapter: board private structure
3050 * Free all receive software resources
3052 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3056 for (i = 0; i < adapter->num_rx_queues; i++)
3057 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3061 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3062 * @netdev: network interface device structure
3063 * @new_mtu: new value for maximum frame size
3065 * Returns 0 on success, negative on failure
3067 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3069 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3070 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3072 /* MTU < 68 is an error and causes problems on some kernels */
3073 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3076 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3077 netdev->mtu, new_mtu);
3078 /* must set new MTU before calling down or up */
3079 netdev->mtu = new_mtu;
3081 if (netif_running(netdev))
3082 ixgbe_reinit_locked(adapter);
3088 * ixgbe_open - Called when a network interface is made active
3089 * @netdev: network interface device structure
3091 * Returns 0 on success, negative value on failure
3093 * The open entry point is called when a network interface is made
3094 * active by the system (IFF_UP). At this point all resources needed
3095 * for transmit and receive operations are allocated, the interrupt
3096 * handler is registered with the OS, the watchdog timer is started,
3097 * and the stack is notified that the interface is ready.
3099 static int ixgbe_open(struct net_device *netdev)
3101 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3104 /* disallow open during test */
3105 if (test_bit(__IXGBE_TESTING, &adapter->state))
3108 /* allocate transmit descriptors */
3109 err = ixgbe_setup_all_tx_resources(adapter);
3113 /* allocate receive descriptors */
3114 err = ixgbe_setup_all_rx_resources(adapter);
3118 ixgbe_configure(adapter);
3120 err = ixgbe_request_irq(adapter);
3124 err = ixgbe_up_complete(adapter);
3128 netif_tx_start_all_queues(netdev);
3133 ixgbe_release_hw_control(adapter);
3134 ixgbe_free_irq(adapter);
3136 ixgbe_free_all_rx_resources(adapter);
3138 ixgbe_free_all_tx_resources(adapter);
3140 ixgbe_reset(adapter);
3146 * ixgbe_close - Disables a network interface
3147 * @netdev: network interface device structure
3149 * Returns 0, this is not allowed to fail
3151 * The close entry point is called when an interface is de-activated
3152 * by the OS. The hardware is still under the drivers control, but
3153 * needs to be disabled. A global MAC reset is issued to stop the
3154 * hardware, and all transmit and receive resources are freed.
3156 static int ixgbe_close(struct net_device *netdev)
3158 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3160 ixgbe_down(adapter);
3161 ixgbe_free_irq(adapter);
3163 ixgbe_free_all_tx_resources(adapter);
3164 ixgbe_free_all_rx_resources(adapter);
3166 ixgbe_release_hw_control(adapter);
3172 * ixgbe_napi_add_all - prep napi structs for use
3173 * @adapter: private struct
3174 * helper function to napi_add each possible q_vector->napi
3176 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3178 int q_idx, q_vectors;
3179 int (*poll)(struct napi_struct *, int);
3181 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3182 poll = &ixgbe_clean_rxonly;
3183 /* Only enable as many vectors as we have rx queues. */
3184 q_vectors = adapter->num_rx_queues;
3187 /* only one q_vector for legacy modes */
3191 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3192 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3193 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3197 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3200 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3202 /* legacy and MSI only use one vector */
3203 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3206 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3207 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3208 if (!q_vector->rxr_count)
3210 netif_napi_del(&q_vector->napi);
3215 static int ixgbe_resume(struct pci_dev *pdev)
3217 struct net_device *netdev = pci_get_drvdata(pdev);
3218 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3221 pci_set_power_state(pdev, PCI_D0);
3222 pci_restore_state(pdev);
3223 err = pci_enable_device(pdev);
3225 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3229 pci_set_master(pdev);
3231 pci_enable_wake(pdev, PCI_D3hot, 0);
3232 pci_enable_wake(pdev, PCI_D3cold, 0);
3234 err = ixgbe_init_interrupt_scheme(adapter);
3236 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3241 ixgbe_napi_add_all(adapter);
3242 ixgbe_reset(adapter);
3244 if (netif_running(netdev)) {
3245 err = ixgbe_open(adapter->netdev);
3250 netif_device_attach(netdev);
3255 #endif /* CONFIG_PM */
3256 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3258 struct net_device *netdev = pci_get_drvdata(pdev);
3259 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3264 netif_device_detach(netdev);
3266 if (netif_running(netdev)) {
3267 ixgbe_down(adapter);
3268 ixgbe_free_irq(adapter);
3269 ixgbe_free_all_tx_resources(adapter);
3270 ixgbe_free_all_rx_resources(adapter);
3272 ixgbe_reset_interrupt_capability(adapter);
3273 ixgbe_napi_del_all(adapter);
3274 kfree(adapter->tx_ring);
3275 kfree(adapter->rx_ring);
3278 retval = pci_save_state(pdev);
3283 pci_enable_wake(pdev, PCI_D3hot, 0);
3284 pci_enable_wake(pdev, PCI_D3cold, 0);
3286 ixgbe_release_hw_control(adapter);
3288 pci_disable_device(pdev);
3290 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3295 static void ixgbe_shutdown(struct pci_dev *pdev)
3297 ixgbe_suspend(pdev, PMSG_SUSPEND);
3301 * ixgbe_update_stats - Update the board statistics counters.
3302 * @adapter: board private structure
3304 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3306 struct ixgbe_hw *hw = &adapter->hw;
3308 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3310 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3311 for (i = 0; i < 8; i++) {
3312 /* for packet buffers not used, the register should read 0 */
3313 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3315 adapter->stats.mpc[i] += mpc;
3316 total_mpc += adapter->stats.mpc[i];
3317 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3318 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3319 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3320 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3321 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3322 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3324 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3326 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3328 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3331 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3332 /* work around hardware counting issue */
3333 adapter->stats.gprc -= missed_rx;
3335 /* 82598 hardware only has a 32 bit counter in the high register */
3336 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3337 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3338 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3339 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3340 adapter->stats.bprc += bprc;
3341 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3342 adapter->stats.mprc -= bprc;
3343 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3344 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3345 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3346 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3347 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3348 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3349 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3350 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3351 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3352 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3353 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3354 adapter->stats.lxontxc += lxon;
3355 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3356 adapter->stats.lxofftxc += lxoff;
3357 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3358 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3359 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3361 * 82598 errata - tx of flow control packets is included in tx counters
3363 xon_off_tot = lxon + lxoff;
3364 adapter->stats.gptc -= xon_off_tot;
3365 adapter->stats.mptc -= xon_off_tot;
3366 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3367 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3368 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3369 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3370 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3371 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3372 adapter->stats.ptc64 -= xon_off_tot;
3373 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3374 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3375 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3376 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3377 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3378 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3380 /* Fill out the OS statistics structure */
3381 adapter->net_stats.multicast = adapter->stats.mprc;
3384 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3385 adapter->stats.rlec;
3386 adapter->net_stats.rx_dropped = 0;
3387 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3388 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3389 adapter->net_stats.rx_missed_errors = total_mpc;
3393 * ixgbe_watchdog - Timer Call-back
3394 * @data: pointer to adapter cast into an unsigned long
3396 static void ixgbe_watchdog(unsigned long data)
3398 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3399 struct ixgbe_hw *hw = &adapter->hw;
3401 /* Do the watchdog outside of interrupt context due to the lovely
3402 * delays that some of the newer hardware requires */
3403 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3404 /* Cause software interrupt to ensure rx rings are cleaned */
3405 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3407 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3408 IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3410 /* For legacy and MSI interrupts don't set any bits that
3411 * are enabled for EIAM, because this operation would
3412 * set *both* EIMS and EICS for any bit in EIAM */
3413 IXGBE_WRITE_REG(hw, IXGBE_EICS,
3414 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3416 /* Reset the timer */
3417 mod_timer(&adapter->watchdog_timer,
3418 round_jiffies(jiffies + 2 * HZ));
3421 schedule_work(&adapter->watchdog_task);
3425 * ixgbe_watchdog_task - worker thread to bring link up
3426 * @work: pointer to work_struct containing our data
3428 static void ixgbe_watchdog_task(struct work_struct *work)
3430 struct ixgbe_adapter *adapter = container_of(work,
3431 struct ixgbe_adapter,
3433 struct net_device *netdev = adapter->netdev;
3434 struct ixgbe_hw *hw = &adapter->hw;
3435 u32 link_speed = adapter->link_speed;
3436 bool link_up = adapter->link_up;
3438 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3440 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3441 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3443 time_after(jiffies, (adapter->link_check_timeout +
3444 IXGBE_TRY_LINK_TIMEOUT))) {
3445 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3446 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3448 adapter->link_up = link_up;
3449 adapter->link_speed = link_speed;
3453 if (!netif_carrier_ok(netdev)) {
3454 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3455 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3456 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3457 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3458 printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3459 "Flow Control: %s\n",
3461 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3463 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3464 "1 Gbps" : "unknown speed")),
3465 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3467 (FLOW_TX ? "TX" : "None"))));
3469 netif_carrier_on(netdev);
3470 netif_tx_wake_all_queues(netdev);
3472 /* Force detection of hung controller */
3473 adapter->detect_tx_hung = true;
3476 adapter->link_up = false;
3477 adapter->link_speed = 0;
3478 if (netif_carrier_ok(netdev)) {
3479 printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3481 netif_carrier_off(netdev);
3482 netif_tx_stop_all_queues(netdev);
3486 ixgbe_update_stats(adapter);
3487 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3490 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3491 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3492 u32 tx_flags, u8 *hdr_len)
3494 struct ixgbe_adv_tx_context_desc *context_desc;
3497 struct ixgbe_tx_buffer *tx_buffer_info;
3498 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3499 u32 mss_l4len_idx, l4len;
3501 if (skb_is_gso(skb)) {
3502 if (skb_header_cloned(skb)) {
3503 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3507 l4len = tcp_hdrlen(skb);
3510 if (skb->protocol == htons(ETH_P_IP)) {
3511 struct iphdr *iph = ip_hdr(skb);
3514 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3518 adapter->hw_tso_ctxt++;
3519 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3520 ipv6_hdr(skb)->payload_len = 0;
3521 tcp_hdr(skb)->check =
3522 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3523 &ipv6_hdr(skb)->daddr,
3525 adapter->hw_tso6_ctxt++;
3528 i = tx_ring->next_to_use;
3530 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3531 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3533 /* VLAN MACLEN IPLEN */
3534 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3536 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3537 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3538 IXGBE_ADVTXD_MACLEN_SHIFT);
3539 *hdr_len += skb_network_offset(skb);
3541 (skb_transport_header(skb) - skb_network_header(skb));
3543 (skb_transport_header(skb) - skb_network_header(skb));
3544 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3545 context_desc->seqnum_seed = 0;
3547 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3548 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3549 IXGBE_ADVTXD_DTYP_CTXT);
3551 if (skb->protocol == htons(ETH_P_IP))
3552 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3553 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3554 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3558 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3559 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3560 /* use index 1 for TSO */
3561 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3562 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3564 tx_buffer_info->time_stamp = jiffies;
3565 tx_buffer_info->next_to_watch = i;
3568 if (i == tx_ring->count)
3570 tx_ring->next_to_use = i;
3577 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3578 struct ixgbe_ring *tx_ring,
3579 struct sk_buff *skb, u32 tx_flags)
3581 struct ixgbe_adv_tx_context_desc *context_desc;
3583 struct ixgbe_tx_buffer *tx_buffer_info;
3584 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3586 if (skb->ip_summed == CHECKSUM_PARTIAL ||
3587 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3588 i = tx_ring->next_to_use;
3589 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3590 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3592 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3594 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3595 vlan_macip_lens |= (skb_network_offset(skb) <<
3596 IXGBE_ADVTXD_MACLEN_SHIFT);
3597 if (skb->ip_summed == CHECKSUM_PARTIAL)
3598 vlan_macip_lens |= (skb_transport_header(skb) -
3599 skb_network_header(skb));
3601 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3602 context_desc->seqnum_seed = 0;
3604 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3605 IXGBE_ADVTXD_DTYP_CTXT);
3607 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3608 switch (skb->protocol) {
3609 case __constant_htons(ETH_P_IP):
3610 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3611 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3613 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3615 case __constant_htons(ETH_P_IPV6):
3616 /* XXX what about other V6 headers?? */
3617 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3619 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3622 if (unlikely(net_ratelimit())) {
3623 DPRINTK(PROBE, WARNING,
3624 "partial checksum but proto=%x!\n",
3631 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3632 /* use index zero for tx checksum offload */
3633 context_desc->mss_l4len_idx = 0;
3635 tx_buffer_info->time_stamp = jiffies;
3636 tx_buffer_info->next_to_watch = i;
3638 adapter->hw_csum_tx_good++;
3640 if (i == tx_ring->count)
3642 tx_ring->next_to_use = i;
3650 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3651 struct ixgbe_ring *tx_ring,
3652 struct sk_buff *skb, unsigned int first)
3654 struct ixgbe_tx_buffer *tx_buffer_info;
3655 unsigned int len = skb->len;
3656 unsigned int offset = 0, size, count = 0, i;
3657 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3660 len -= skb->data_len;
3662 i = tx_ring->next_to_use;
3665 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3666 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3668 tx_buffer_info->length = size;
3669 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3671 size, PCI_DMA_TODEVICE);
3672 tx_buffer_info->time_stamp = jiffies;
3673 tx_buffer_info->next_to_watch = i;
3679 if (i == tx_ring->count)
3683 for (f = 0; f < nr_frags; f++) {
3684 struct skb_frag_struct *frag;
3686 frag = &skb_shinfo(skb)->frags[f];
3688 offset = frag->page_offset;
3691 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3692 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3694 tx_buffer_info->length = size;
3695 tx_buffer_info->dma = pci_map_page(adapter->pdev,
3700 tx_buffer_info->time_stamp = jiffies;
3701 tx_buffer_info->next_to_watch = i;
3707 if (i == tx_ring->count)
3712 i = tx_ring->count - 1;
3715 tx_ring->tx_buffer_info[i].skb = skb;
3716 tx_ring->tx_buffer_info[first].next_to_watch = i;
3721 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3722 struct ixgbe_ring *tx_ring,
3723 int tx_flags, int count, u32 paylen, u8 hdr_len)
3725 union ixgbe_adv_tx_desc *tx_desc = NULL;
3726 struct ixgbe_tx_buffer *tx_buffer_info;
3727 u32 olinfo_status = 0, cmd_type_len = 0;
3729 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3731 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3733 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3735 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3736 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3738 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3739 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3741 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3742 IXGBE_ADVTXD_POPTS_SHIFT;
3744 /* use index 1 context for tso */
3745 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3746 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3747 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3748 IXGBE_ADVTXD_POPTS_SHIFT;
3750 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3751 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3752 IXGBE_ADVTXD_POPTS_SHIFT;
3754 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3756 i = tx_ring->next_to_use;
3758 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3759 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3760 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3761 tx_desc->read.cmd_type_len =
3762 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3763 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3765 if (i == tx_ring->count)
3769 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3772 * Force memory writes to complete before letting h/w
3773 * know there are new descriptors to fetch. (Only
3774 * applicable for weak-ordered memory model archs,
3779 tx_ring->next_to_use = i;
3780 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3783 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3784 struct ixgbe_ring *tx_ring, int size)
3786 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3788 netif_stop_subqueue(netdev, tx_ring->queue_index);
3789 /* Herbert's original patch had:
3790 * smp_mb__after_netif_stop_queue();
3791 * but since that doesn't exist yet, just open code it. */
3794 /* We need to check again in a case another CPU has just
3795 * made room available. */
3796 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3799 /* A reprieve! - use start_queue because it doesn't call schedule */
3800 netif_start_subqueue(netdev, tx_ring->queue_index);
3801 ++adapter->restart_queue;
3805 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3806 struct ixgbe_ring *tx_ring, int size)
3808 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3810 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3813 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3815 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3816 struct ixgbe_ring *tx_ring;
3818 unsigned int tx_flags = 0;
3824 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3825 tx_ring = &adapter->tx_ring[r_idx];
3827 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3828 tx_flags |= vlan_tx_tag_get(skb);
3829 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3830 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3831 tx_flags |= (skb->queue_mapping << 13);
3833 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3834 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3835 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3836 tx_flags |= (skb->queue_mapping << 13);
3837 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3838 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3840 /* three things can cause us to need a context descriptor */
3841 if (skb_is_gso(skb) ||
3842 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3843 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3846 count += TXD_USE_COUNT(skb_headlen(skb));
3847 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3848 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3850 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3852 return NETDEV_TX_BUSY;
3855 if (skb->protocol == htons(ETH_P_IP))
3856 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3857 first = tx_ring->next_to_use;
3858 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3860 dev_kfree_skb_any(skb);
3861 return NETDEV_TX_OK;
3865 tx_flags |= IXGBE_TX_FLAGS_TSO;
3866 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3867 (skb->ip_summed == CHECKSUM_PARTIAL))
3868 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3870 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3871 ixgbe_tx_map(adapter, tx_ring, skb, first),
3874 netdev->trans_start = jiffies;
3876 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3878 return NETDEV_TX_OK;
3882 * ixgbe_get_stats - Get System Network Statistics
3883 * @netdev: network interface device structure
3885 * Returns the address of the device statistics structure.
3886 * The statistics are actually updated from the timer callback.
3888 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3890 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3892 /* only return the current stats */
3893 return &adapter->net_stats;
3897 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3898 * @netdev: network interface device structure
3899 * @p: pointer to an address structure
3901 * Returns 0 on success, negative on failure
3903 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3905 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3906 struct ixgbe_hw *hw = &adapter->hw;
3907 struct sockaddr *addr = p;
3909 if (!is_valid_ether_addr(addr->sa_data))
3910 return -EADDRNOTAVAIL;
3912 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3913 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3915 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3920 #ifdef CONFIG_NET_POLL_CONTROLLER
3922 * Polling 'interrupt' - used by things like netconsole to send skbs
3923 * without having to re-enable interrupts. It's not called while
3924 * the interrupt routine is executing.
3926 static void ixgbe_netpoll(struct net_device *netdev)
3928 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3930 disable_irq(adapter->pdev->irq);
3931 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3932 ixgbe_intr(adapter->pdev->irq, netdev);
3933 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3934 enable_irq(adapter->pdev->irq);
3939 * ixgbe_link_config - set up initial link with default speed and duplex
3940 * @hw: pointer to private hardware struct
3942 * Returns 0 on success, negative on failure
3944 static int ixgbe_link_config(struct ixgbe_hw *hw)
3946 u32 autoneg = IXGBE_LINK_SPEED_10GB_FULL;
3948 /* must always autoneg for both 1G and 10G link */
3949 hw->mac.autoneg = true;
3951 if ((hw->mac.type == ixgbe_mac_82598EB) &&
3952 (hw->phy.media_type == ixgbe_media_type_copper))
3953 autoneg = IXGBE_LINK_SPEED_82598_AUTONEG;
3955 return hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3958 static const struct net_device_ops ixgbe_netdev_ops = {
3959 .ndo_open = ixgbe_open,
3960 .ndo_stop = ixgbe_close,
3961 .ndo_start_xmit = ixgbe_xmit_frame,
3962 .ndo_get_stats = ixgbe_get_stats,
3963 .ndo_set_multicast_list = ixgbe_set_rx_mode,
3964 .ndo_validate_addr = eth_validate_addr,
3965 .ndo_set_mac_address = ixgbe_set_mac,
3966 .ndo_change_mtu = ixgbe_change_mtu,
3967 .ndo_tx_timeout = ixgbe_tx_timeout,
3968 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
3969 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
3970 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
3971 #ifdef CONFIG_NET_POLL_CONTROLLER
3972 .ndo_poll_controller = ixgbe_netpoll,
3977 * ixgbe_probe - Device Initialization Routine
3978 * @pdev: PCI device information struct
3979 * @ent: entry in ixgbe_pci_tbl
3981 * Returns 0 on success, negative on failure
3983 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3984 * The OS initialization, configuring of the adapter private structure,
3985 * and a hardware reset occur.
3987 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3988 const struct pci_device_id *ent)
3990 struct net_device *netdev;
3991 struct ixgbe_adapter *adapter = NULL;
3992 struct ixgbe_hw *hw;
3993 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3994 static int cards_found;
3995 int i, err, pci_using_dac;
3996 u16 link_status, link_speed, link_width;
3999 err = pci_enable_device(pdev);
4003 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
4004 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
4007 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4009 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4011 dev_err(&pdev->dev, "No usable DMA "
4012 "configuration, aborting\n");
4019 err = pci_request_regions(pdev, ixgbe_driver_name);
4021 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4025 err = pci_enable_pcie_error_reporting(pdev);
4027 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4029 /* non-fatal, continue */
4032 pci_set_master(pdev);
4033 pci_save_state(pdev);
4035 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4038 goto err_alloc_etherdev;
4041 SET_NETDEV_DEV(netdev, &pdev->dev);
4043 pci_set_drvdata(pdev, netdev);
4044 adapter = netdev_priv(netdev);
4046 adapter->netdev = netdev;
4047 adapter->pdev = pdev;
4050 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4052 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4053 pci_resource_len(pdev, 0));
4059 for (i = 1; i <= 5; i++) {
4060 if (pci_resource_len(pdev, i) == 0)
4064 netdev->netdev_ops = &ixgbe_netdev_ops;
4065 ixgbe_set_ethtool_ops(netdev);
4066 netdev->watchdog_timeo = 5 * HZ;
4067 strcpy(netdev->name, pci_name(pdev));
4069 adapter->bd_number = cards_found;
4072 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4073 hw->mac.type = ii->mac;
4076 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4077 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4078 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4079 if (!(eec & (1 << 8)))
4080 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4083 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4084 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4086 /* set up this timer and work struct before calling get_invariants
4087 * which might start the timer
4089 init_timer(&adapter->sfp_timer);
4090 adapter->sfp_timer.function = &ixgbe_sfp_timer;
4091 adapter->sfp_timer.data = (unsigned long) adapter;
4093 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4095 err = ii->get_invariants(hw);
4096 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4097 /* start a kernel thread to watch for a module to arrive */
4098 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4099 mod_timer(&adapter->sfp_timer,
4100 round_jiffies(jiffies + (2 * HZ)));
4102 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4103 DPRINTK(PROBE, ERR, "failed to load because an "
4104 "unsupported SFP+ module type was detected.\n");
4110 /* setup the private structure */
4111 err = ixgbe_sw_init(adapter);
4115 /* reset_hw fills in the perm_addr as well */
4116 err = hw->mac.ops.reset_hw(hw);
4118 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4122 netdev->features = NETIF_F_SG |
4124 NETIF_F_HW_VLAN_TX |
4125 NETIF_F_HW_VLAN_RX |
4126 NETIF_F_HW_VLAN_FILTER;
4128 netdev->features |= NETIF_F_IPV6_CSUM;
4129 netdev->features |= NETIF_F_TSO;
4130 netdev->features |= NETIF_F_TSO6;
4131 netdev->features |= NETIF_F_LRO;
4133 netdev->vlan_features |= NETIF_F_TSO;
4134 netdev->vlan_features |= NETIF_F_TSO6;
4135 netdev->vlan_features |= NETIF_F_IP_CSUM;
4136 netdev->vlan_features |= NETIF_F_SG;
4138 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4139 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4141 #ifdef CONFIG_IXGBE_DCB
4142 netdev->dcbnl_ops = &dcbnl_ops;
4146 netdev->features |= NETIF_F_HIGHDMA;
4148 /* make sure the EEPROM is good */
4149 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4150 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4155 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4156 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4158 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4159 dev_err(&pdev->dev, "invalid MAC address\n");
4164 init_timer(&adapter->watchdog_timer);
4165 adapter->watchdog_timer.function = &ixgbe_watchdog;
4166 adapter->watchdog_timer.data = (unsigned long)adapter;
4168 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4169 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4171 err = ixgbe_init_interrupt_scheme(adapter);
4175 /* print bus type/speed/width info */
4176 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4177 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4178 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4179 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4180 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4181 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4183 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4184 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4185 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4186 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4189 ixgbe_read_pba_num_generic(hw, &part_num);
4190 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4191 hw->mac.type, hw->phy.type,
4192 (part_num >> 8), (part_num & 0xff));
4194 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4195 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4196 "this card is not sufficient for optimal "
4198 dev_warn(&pdev->dev, "For optimal performance a x8 "
4199 "PCI-Express slot is required.\n");
4202 /* reset the hardware with the new settings */
4203 hw->mac.ops.start_hw(hw);
4205 /* link_config depends on start_hw being called at least once */
4206 err = ixgbe_link_config(hw);
4208 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
4212 netif_carrier_off(netdev);
4213 netif_tx_stop_all_queues(netdev);
4215 ixgbe_napi_add_all(adapter);
4217 strcpy(netdev->name, "eth%d");
4218 err = register_netdev(netdev);
4222 #ifdef CONFIG_IXGBE_DCA
4223 if (dca_add_requester(&pdev->dev) == 0) {
4224 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4225 /* always use CB2 mode, difference is masked
4226 * in the CB driver */
4227 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4228 ixgbe_setup_dca(adapter);
4232 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4237 ixgbe_release_hw_control(adapter);
4240 ixgbe_reset_interrupt_capability(adapter);
4242 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4243 del_timer_sync(&adapter->sfp_timer);
4244 cancel_work_sync(&adapter->sfp_task);
4245 iounmap(hw->hw_addr);
4247 free_netdev(netdev);
4249 pci_release_regions(pdev);
4252 pci_disable_device(pdev);
4257 * ixgbe_remove - Device Removal Routine
4258 * @pdev: PCI device information struct
4260 * ixgbe_remove is called by the PCI subsystem to alert the driver
4261 * that it should release a PCI device. The could be caused by a
4262 * Hot-Plug event, or because the driver is going to be removed from
4265 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4267 struct net_device *netdev = pci_get_drvdata(pdev);
4268 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4271 set_bit(__IXGBE_DOWN, &adapter->state);
4272 /* clear the module not found bit to make sure the worker won't
4275 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4276 del_timer_sync(&adapter->watchdog_timer);
4278 del_timer_sync(&adapter->sfp_timer);
4279 cancel_work_sync(&adapter->watchdog_task);
4280 cancel_work_sync(&adapter->sfp_task);
4281 flush_scheduled_work();
4283 #ifdef CONFIG_IXGBE_DCA
4284 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4285 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4286 dca_remove_requester(&pdev->dev);
4287 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4291 if (netdev->reg_state == NETREG_REGISTERED)
4292 unregister_netdev(netdev);
4294 ixgbe_reset_interrupt_capability(adapter);
4296 ixgbe_release_hw_control(adapter);
4298 iounmap(adapter->hw.hw_addr);
4299 pci_release_regions(pdev);
4301 DPRINTK(PROBE, INFO, "complete\n");
4302 ixgbe_napi_del_all(adapter);
4303 kfree(adapter->tx_ring);
4304 kfree(adapter->rx_ring);
4306 free_netdev(netdev);
4308 err = pci_disable_pcie_error_reporting(pdev);
4311 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4313 pci_disable_device(pdev);
4317 * ixgbe_io_error_detected - called when PCI error is detected
4318 * @pdev: Pointer to PCI device
4319 * @state: The current pci connection state
4321 * This function is called after a PCI bus error affecting
4322 * this device has been detected.
4324 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4325 pci_channel_state_t state)
4327 struct net_device *netdev = pci_get_drvdata(pdev);
4328 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4330 netif_device_detach(netdev);
4332 if (netif_running(netdev))
4333 ixgbe_down(adapter);
4334 pci_disable_device(pdev);
4336 /* Request a slot reset. */
4337 return PCI_ERS_RESULT_NEED_RESET;
4341 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4342 * @pdev: Pointer to PCI device
4344 * Restart the card from scratch, as if from a cold-boot.
4346 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4348 struct net_device *netdev = pci_get_drvdata(pdev);
4349 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4350 pci_ers_result_t result;
4353 if (pci_enable_device(pdev)) {
4355 "Cannot re-enable PCI device after reset.\n");
4356 result = PCI_ERS_RESULT_DISCONNECT;
4358 pci_set_master(pdev);
4359 pci_restore_state(pdev);
4361 pci_enable_wake(pdev, PCI_D3hot, 0);
4362 pci_enable_wake(pdev, PCI_D3cold, 0);
4364 ixgbe_reset(adapter);
4366 result = PCI_ERS_RESULT_RECOVERED;
4369 err = pci_cleanup_aer_uncorrect_error_status(pdev);
4372 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4373 /* non-fatal, continue */
4380 * ixgbe_io_resume - called when traffic can start flowing again.
4381 * @pdev: Pointer to PCI device
4383 * This callback is called when the error recovery driver tells us that
4384 * its OK to resume normal operation.
4386 static void ixgbe_io_resume(struct pci_dev *pdev)
4388 struct net_device *netdev = pci_get_drvdata(pdev);
4389 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4391 if (netif_running(netdev)) {
4392 if (ixgbe_up(adapter)) {
4393 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4398 netif_device_attach(netdev);
4401 static struct pci_error_handlers ixgbe_err_handler = {
4402 .error_detected = ixgbe_io_error_detected,
4403 .slot_reset = ixgbe_io_slot_reset,
4404 .resume = ixgbe_io_resume,
4407 static struct pci_driver ixgbe_driver = {
4408 .name = ixgbe_driver_name,
4409 .id_table = ixgbe_pci_tbl,
4410 .probe = ixgbe_probe,
4411 .remove = __devexit_p(ixgbe_remove),
4413 .suspend = ixgbe_suspend,
4414 .resume = ixgbe_resume,
4416 .shutdown = ixgbe_shutdown,
4417 .err_handler = &ixgbe_err_handler
4421 * ixgbe_init_module - Driver Registration Routine
4423 * ixgbe_init_module is the first routine called when the driver is
4424 * loaded. All it does is register with the PCI subsystem.
4426 static int __init ixgbe_init_module(void)
4429 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4430 ixgbe_driver_string, ixgbe_driver_version);
4432 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4434 #ifdef CONFIG_IXGBE_DCA
4435 dca_register_notify(&dca_notifier);
4438 ret = pci_register_driver(&ixgbe_driver);
4442 module_init(ixgbe_init_module);
4445 * ixgbe_exit_module - Driver Exit Cleanup Routine
4447 * ixgbe_exit_module is called just before the driver is removed
4450 static void __exit ixgbe_exit_module(void)
4452 #ifdef CONFIG_IXGBE_DCA
4453 dca_unregister_notify(&dca_notifier);
4455 pci_unregister_driver(&ixgbe_driver);
4458 #ifdef CONFIG_IXGBE_DCA
4459 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4464 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4465 __ixgbe_notify_dca);
4467 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4469 #endif /* CONFIG_IXGBE_DCA */
4471 module_exit(ixgbe_exit_module);