git.oblomov.eu Git - linux-2.6/blob - drivers/usb/host/uhci-q.c

   1 /*
   2  * Universal Host Controller Interface driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Linus Torvalds
   7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   8  * (C) Copyright 1999 Randy Dunlap
   9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16  * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
  17  */
  18
  19 static void uhci_free_pending_tds(struct uhci_hcd *uhci);
  20
  21 /*
  22  * Technically, updating td->status here is a race, but it's not really a
  23  * problem. The worst that can happen is that we set the IOC bit again
  24  * generating a spurious interrupt. We could fix this by creating another
  25  * QH and leaving the IOC bit always set, but then we would have to play
  26  * games with the FSBR code to make sure we get the correct order in all
  27  * the cases. I don't think it's worth the effort
  28  */
  29 static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
  30 {
  31         if (uhci->is_stopped)
  32                 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  33         uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
  34 }
  35
  36 static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
  37 {
  38         uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
  39 }
  40
  41 static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
  42 {
  43         dma_addr_t dma_handle;
  44         struct uhci_td *td;
  45
  46         td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
  47         if (!td)
  48                 return NULL;
  49
  50         td->dma_handle = dma_handle;
  51         td->frame = -1;
  52
  53         INIT_LIST_HEAD(&td->list);
  54         INIT_LIST_HEAD(&td->remove_list);
  55         INIT_LIST_HEAD(&td->fl_list);
  56
  57         return td;
  58 }
  59
  60 static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
  61 {
  62         if (!list_empty(&td->list))
  63                 dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
  64         if (!list_empty(&td->remove_list))
  65                 dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td);
  66         if (!list_empty(&td->fl_list))
  67                 dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
  68
  69         dma_pool_free(uhci->td_pool, td, td->dma_handle);
  70 }
  71
  72 static inline void uhci_fill_td(struct uhci_td *td, u32 status,
  73                 u32 token, u32 buffer)
  74 {
  75         td->status = cpu_to_le32(status);
  76         td->token = cpu_to_le32(token);
  77         td->buffer = cpu_to_le32(buffer);
  78 }
  79
  80 /*
  81  * We insert Isochronous URBs directly into the frame list at the beginning
  82  */
  83 static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
  84                 struct uhci_td *td, unsigned framenum)
  85 {
  86         framenum &= (UHCI_NUMFRAMES - 1);
  87
  88         td->frame = framenum;
  89
  90         /* Is there a TD already mapped there? */
  91         if (uhci->frame_cpu[framenum]) {
  92                 struct uhci_td *ftd, *ltd;
  93
  94                 ftd = uhci->frame_cpu[framenum];
  95                 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  96
  97                 list_add_tail(&td->fl_list, &ftd->fl_list);
  98
  99                 td->link = ltd->link;
 100                 wmb();
 101                 ltd->link = cpu_to_le32(td->dma_handle);
 102         } else {
 103                 td->link = uhci->frame[framenum];
 104                 wmb();
 105                 uhci->frame[framenum] = cpu_to_le32(td->dma_handle);
 106                 uhci->frame_cpu[framenum] = td;
 107         }
 108 }
 109
 110 static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
 111                 struct uhci_td *td)
 112 {
 113         /* If it's not inserted, don't remove it */
 114         if (td->frame == -1) {
 115                 WARN_ON(!list_empty(&td->fl_list));
 116                 return;
 117         }
 118
 119         if (uhci->frame_cpu[td->frame] == td) {
 120                 if (list_empty(&td->fl_list)) {
 121                         uhci->frame[td->frame] = td->link;
 122                         uhci->frame_cpu[td->frame] = NULL;
 123                 } else {
 124                         struct uhci_td *ntd;
 125
 126                         ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
 127                         uhci->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
 128                         uhci->frame_cpu[td->frame] = ntd;
 129                 }
 130         } else {
 131                 struct uhci_td *ptd;
 132
 133                 ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
 134                 ptd->link = td->link;
 135         }
 136
 137         list_del_init(&td->fl_list);
 138         td->frame = -1;
 139 }
 140
 141 /*
 142  * Remove all the TDs for an Isochronous URB from the frame list
 143  */
 144 static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
 145 {
 146         struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
 147         struct uhci_td *td;
 148
 149         list_for_each_entry(td, &urbp->td_list, list)
 150                 uhci_remove_td_from_frame_list(uhci, td);
 151         wmb();
 152 }
 153
 154 static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
 155                 struct usb_device *udev, struct usb_host_endpoint *hep)
 156 {
 157         dma_addr_t dma_handle;
 158         struct uhci_qh *qh;
 159
 160         qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
 161         if (!qh)
 162                 return NULL;
 163
 164         memset(qh, 0, sizeof(*qh));
 165         qh->dma_handle = dma_handle;
 166
 167         qh->element = UHCI_PTR_TERM;
 168         qh->link = UHCI_PTR_TERM;
 169
 170         INIT_LIST_HEAD(&qh->queue);
 171         INIT_LIST_HEAD(&qh->node);
 172
 173         if (udev) {             /* Normal QH */
 174                 qh->dummy_td = uhci_alloc_td(uhci);
 175                 if (!qh->dummy_td) {
 176                         dma_pool_free(uhci->qh_pool, qh, dma_handle);
 177                         return NULL;
 178                 }
 179                 qh->state = QH_STATE_IDLE;
 180                 qh->hep = hep;
 181                 qh->udev = udev;
 182                 hep->hcpriv = qh;
 183                 qh->type = hep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
 184
 185         } else {                /* Skeleton QH */
 186                 qh->state = QH_STATE_ACTIVE;
 187                 qh->type = -1;
 188         }
 189         return qh;
 190 }
 191
 192 static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
 193 {
 194         WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
 195         if (!list_empty(&qh->queue))
 196                 dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
 197
 198         list_del(&qh->node);
 199         if (qh->udev) {
 200                 qh->hep->hcpriv = NULL;
 201                 uhci_free_td(uhci, qh->dummy_td);
 202         }
 203         dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
 204 }
 205
 206 /*
 207  * When a queue is stopped and a dequeued URB is given back, adjust
 208  * the previous TD link (if the URB isn't first on the queue) or
 209  * save its toggle value (if it is first and is currently executing).
 210  */
 211 static void uhci_cleanup_queue(struct uhci_qh *qh,
 212                 struct urb *urb)
 213 {
 214         struct urb_priv *urbp = urb->hcpriv;
 215         struct uhci_td *td;
 216
 217         /* Isochronous pipes don't use toggles and their TD link pointers
 218          * get adjusted during uhci_urb_dequeue(). */
 219         if (qh->type == USB_ENDPOINT_XFER_ISOC)
 220                 return;
 221
 222         /* If the URB isn't first on its queue, adjust the link pointer
 223          * of the last TD in the previous URB.  The toggle doesn't need
 224          * to be saved since this URB can't be executing yet. */
 225         if (qh->queue.next != &urbp->node) {
 226                 struct urb_priv *purbp;
 227                 struct uhci_td *ptd;
 228
 229                 purbp = list_entry(urbp->node.prev, struct urb_priv, node);
 230                 WARN_ON(list_empty(&purbp->td_list));
 231                 ptd = list_entry(purbp->td_list.prev, struct uhci_td,
 232                                 list);
 233                 td = list_entry(urbp->td_list.prev, struct uhci_td,
 234                                 list);
 235                 ptd->link = td->link;
 236                 return;
 237         }
 238
 239         /* If the QH element pointer is UHCI_PTR_TERM then then currently
 240          * executing URB has already been unlinked, so this one isn't it. */
 241         if (qh_element(qh) == UHCI_PTR_TERM)
 242                 return;
 243         qh->element = UHCI_PTR_TERM;
 244
 245         /* Control pipes have to worry about toggles */
 246         if (qh->type == USB_ENDPOINT_XFER_CONTROL)
 247                 return;
 248
 249         /* Save the next toggle value */
 250         WARN_ON(list_empty(&urbp->td_list));
 251         td = list_entry(urbp->td_list.next, struct uhci_td, list);
 252         qh->needs_fixup = 1;
 253         qh->initial_toggle = uhci_toggle(td_token(td));
 254 }
 255
 256 /*
 257  * Fix up the data toggles for URBs in a queue, when one of them
 258  * terminates early (short transfer, error, or dequeued).
 259  */
 260 static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
 261 {
 262         struct urb_priv *urbp = NULL;
 263         struct uhci_td *td;
 264         unsigned int toggle = qh->initial_toggle;
 265         unsigned int pipe;
 266
 267         /* Fixups for a short transfer start with the second URB in the
 268          * queue (the short URB is the first). */
 269         if (skip_first)
 270                 urbp = list_entry(qh->queue.next, struct urb_priv, node);
 271
 272         /* When starting with the first URB, if the QH element pointer is
 273          * still valid then we know the URB's toggles are okay. */
 274         else if (qh_element(qh) != UHCI_PTR_TERM)
 275                 toggle = 2;
 276
 277         /* Fix up the toggle for the URBs in the queue.  Normally this
 278          * loop won't run more than once: When an error or short transfer
 279          * occurs, the queue usually gets emptied. */
 280         urbp = list_prepare_entry(urbp, &qh->queue, node);
 281         list_for_each_entry_continue(urbp, &qh->queue, node) {
 282
 283                 /* If the first TD has the right toggle value, we don't
 284                  * need to change any toggles in this URB */
 285                 td = list_entry(urbp->td_list.next, struct uhci_td, list);
 286                 if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
 287                         td = list_entry(urbp->td_list.next, struct uhci_td,
 288                                         list);
 289                         toggle = uhci_toggle(td_token(td)) ^ 1;
 290
 291                 /* Otherwise all the toggles in the URB have to be switched */
 292                 } else {
 293                         list_for_each_entry(td, &urbp->td_list, list) {
 294                                 td->token ^= __constant_cpu_to_le32(
 295                                                         TD_TOKEN_TOGGLE);
 296                                 toggle ^= 1;
 297                         }
 298                 }
 299         }
 300
 301         wmb();
 302         pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
 303         usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
 304                         usb_pipeout(pipe), toggle);
 305         qh->needs_fixup = 0;
 306 }
 307
 308 /*
 309  * Put a QH on the schedule in both hardware and software
 310  */
 311 static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
 312 {
 313         struct uhci_qh *pqh;
 314
 315         WARN_ON(list_empty(&qh->queue));
 316
 317         /* Set the element pointer if it isn't set already.
 318          * This isn't needed for Isochronous queues, but it doesn't hurt. */
 319         if (qh_element(qh) == UHCI_PTR_TERM) {
 320                 struct urb_priv *urbp = list_entry(qh->queue.next,
 321                                 struct urb_priv, node);
 322                 struct uhci_td *td = list_entry(urbp->td_list.next,
 323                                 struct uhci_td, list);
 324
 325                 qh->element = cpu_to_le32(td->dma_handle);
 326         }
 327
 328         if (qh->state == QH_STATE_ACTIVE)
 329                 return;
 330         qh->state = QH_STATE_ACTIVE;
 331
 332         /* Move the QH from its old list to the end of the appropriate
 333          * skeleton's list */
 334         if (qh == uhci->next_qh)
 335                 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
 336                                 node);
 337         list_move_tail(&qh->node, &qh->skel->node);
 338
 339         /* Link it into the schedule */
 340         pqh = list_entry(qh->node.prev, struct uhci_qh, node);
 341         qh->link = pqh->link;
 342         wmb();
 343         pqh->link = UHCI_PTR_QH | cpu_to_le32(qh->dma_handle);
 344 }
 345
 346 /*
 347  * Take a QH off the hardware schedule
 348  */
 349 static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
 350 {
 351         struct uhci_qh *pqh;
 352
 353         if (qh->state == QH_STATE_UNLINKING)
 354                 return;
 355         WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
 356         qh->state = QH_STATE_UNLINKING;
 357
 358         /* Unlink the QH from the schedule and record when we did it */
 359         pqh = list_entry(qh->node.prev, struct uhci_qh, node);
 360         pqh->link = qh->link;
 361         mb();
 362
 363         uhci_get_current_frame_number(uhci);
 364         qh->unlink_frame = uhci->frame_number;
 365
 366         /* Force an interrupt so we know when the QH is fully unlinked */
 367         if (list_empty(&uhci->skel_unlink_qh->node))
 368                 uhci_set_next_interrupt(uhci);
 369
 370         /* Move the QH from its old list to the end of the unlinking list */
 371         if (qh == uhci->next_qh)
 372                 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
 373                                 node);
 374         list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
 375 }
 376
 377 /*
 378  * When we and the controller are through with a QH, it becomes IDLE.
 379  * This happens when a QH has been off the schedule (on the unlinking
 380  * list) for more than one frame, or when an error occurs while adding
 381  * the first URB onto a new QH.
 382  */
 383 static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
 384 {
 385         WARN_ON(qh->state == QH_STATE_ACTIVE);
 386
 387         if (qh == uhci->next_qh)
 388                 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
 389                                 node);
 390         list_move(&qh->node, &uhci->idle_qh_list);
 391         qh->state = QH_STATE_IDLE;
 392
 393         /* Now that the QH is idle, its post_td isn't being used */
 394         if (qh->post_td) {
 395                 uhci_free_td(uhci, qh->post_td);
 396                 qh->post_td = NULL;
 397         }
 398
 399         /* If anyone is waiting for a QH to become idle, wake them up */
 400         if (uhci->num_waiting)
 401                 wake_up_all(&uhci->waitqh);
 402 }
 403
 404 static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
 405                 struct urb *urb)
 406 {
 407         struct urb_priv *urbp;
 408
 409         urbp = kmem_cache_alloc(uhci_up_cachep, SLAB_ATOMIC);
 410         if (!urbp)
 411                 return NULL;
 412
 413         memset((void *)urbp, 0, sizeof(*urbp));
 414
 415         urbp->urb = urb;
 416         urb->hcpriv = urbp;
 417
 418         INIT_LIST_HEAD(&urbp->node);
 419         INIT_LIST_HEAD(&urbp->td_list);
 420
 421         return urbp;
 422 }
 423
 424 static void uhci_add_td_to_urb(struct urb *urb, struct uhci_td *td)
 425 {
 426         struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
 427
 428         list_add_tail(&td->list, &urbp->td_list);
 429 }
 430
 431 static void uhci_remove_td_from_urb(struct uhci_td *td)
 432 {
 433         if (list_empty(&td->list))
 434                 return;
 435
 436         list_del_init(&td->list);
 437 }
 438
 439 static void uhci_free_urb_priv(struct uhci_hcd *uhci,
 440                 struct urb_priv *urbp)
 441 {
 442         struct uhci_td *td, *tmp;
 443
 444         if (!list_empty(&urbp->node))
 445                 dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n",
 446                                 urbp->urb);
 447
 448         uhci_get_current_frame_number(uhci);
 449         if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) {
 450                 uhci_free_pending_tds(uhci);
 451                 uhci->td_remove_age = uhci->frame_number;
 452         }
 453
 454         /* Check to see if the remove list is empty. Set the IOC bit */
 455         /* to force an interrupt so we can remove the TDs. */
 456         if (list_empty(&uhci->td_remove_list))
 457                 uhci_set_next_interrupt(uhci);
 458
 459         list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
 460                 uhci_remove_td_from_urb(td);
 461                 list_add(&td->remove_list, &uhci->td_remove_list);
 462         }
 463
 464         urbp->urb->hcpriv = NULL;
 465         kmem_cache_free(uhci_up_cachep, urbp);
 466 }
 467
 468 static void uhci_inc_fsbr(struct uhci_hcd *uhci, struct urb *urb)
 469 {
 470         struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
 471
 472         if ((!(urb->transfer_flags & URB_NO_FSBR)) && !urbp->fsbr) {
 473                 urbp->fsbr = 1;
 474                 if (!uhci->fsbr++ && !uhci->fsbrtimeout)
 475                         uhci->skel_term_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
 476         }
 477 }
 478
 479 static void uhci_dec_fsbr(struct uhci_hcd *uhci, struct urb *urb)
 480 {
 481         struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
 482
 483         if ((!(urb->transfer_flags & URB_NO_FSBR)) && urbp->fsbr) {
 484                 urbp->fsbr = 0;
 485                 if (!--uhci->fsbr)
 486                         uhci->fsbrtimeout = jiffies + FSBR_DELAY;
 487         }
 488 }
 489
 490 /*
 491  * Map status to standard result codes
 492  *
 493  * <status> is (td_status(td) & 0xF60000), a.k.a.
 494  * uhci_status_bits(td_status(td)).
 495  * Note: <status> does not include the TD_CTRL_NAK bit.
 496  * <dir_out> is True for output TDs and False for input TDs.
 497  */
 498 static int uhci_map_status(int status, int dir_out)
 499 {
 500         if (!status)
 501                 return 0;
 502         if (status & TD_CTRL_BITSTUFF)                  /* Bitstuff error */
 503                 return -EPROTO;
 504         if (status & TD_CTRL_CRCTIMEO) {                /* CRC/Timeout */
 505                 if (dir_out)
 506                         return -EPROTO;
 507                 else
 508                         return -EILSEQ;
 509         }
 510         if (status & TD_CTRL_BABBLE)                    /* Babble */
 511                 return -EOVERFLOW;
 512         if (status & TD_CTRL_DBUFERR)                   /* Buffer error */
 513                 return -ENOSR;
 514         if (status & TD_CTRL_STALLED)                   /* Stalled */
 515                 return -EPIPE;
 516         WARN_ON(status & TD_CTRL_ACTIVE);               /* Active */
 517         return 0;
 518 }
 519
 520 /*
 521  * Control transfers
 522  */
 523 static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
 524                 struct uhci_qh *qh)
 525 {
 526         struct uhci_td *td;
 527         unsigned long destination, status;
 528         int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
 529         int len = urb->transfer_buffer_length;
 530         dma_addr_t data = urb->transfer_dma;
 531         __le32 *plink;
 532
 533         /* The "pipe" thing contains the destination in bits 8--18 */
 534         destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
 535
 536         /* 3 errors, dummy TD remains inactive */
 537         status = uhci_maxerr(3);
 538         if (urb->dev->speed == USB_SPEED_LOW)
 539                 status |= TD_CTRL_LS;
 540
 541         /*
 542          * Build the TD for the control request setup packet
 543          */
 544         td = qh->dummy_td;
 545         uhci_add_td_to_urb(urb, td);
 546         uhci_fill_td(td, status, destination | uhci_explen(8),
 547                         urb->setup_dma);
 548         plink = &td->link;
 549         status |= TD_CTRL_ACTIVE;
 550
 551         /*
 552          * If direction is "send", change the packet ID from SETUP (0x2D)
 553          * to OUT (0xE1).  Else change it from SETUP to IN (0x69) and
 554          * set Short Packet Detect (SPD) for all data packets.
 555          */
 556         if (usb_pipeout(urb->pipe))
 557                 destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
 558         else {
 559                 destination ^= (USB_PID_SETUP ^ USB_PID_IN);
 560                 status |= TD_CTRL_SPD;
 561         }
 562
 563         /*
 564          * Build the DATA TDs
 565          */
 566         while (len > 0) {
 567                 int pktsze = min(len, maxsze);
 568
 569                 td = uhci_alloc_td(uhci);
 570                 if (!td)
 571                         goto nomem;
 572                 *plink = cpu_to_le32(td->dma_handle);
 573
 574                 /* Alternate Data0/1 (start with Data1) */
 575                 destination ^= TD_TOKEN_TOGGLE;
 576
 577                 uhci_add_td_to_urb(urb, td);
 578                 uhci_fill_td(td, status, destination | uhci_explen(pktsze),
 579                                 data);
 580                 plink = &td->link;
 581
 582                 data += pktsze;
 583                 len -= pktsze;
 584         }
 585
 586         /*
 587          * Build the final TD for control status
 588          */
 589         td = uhci_alloc_td(uhci);
 590         if (!td)
 591                 goto nomem;
 592         *plink = cpu_to_le32(td->dma_handle);
 593
 594         /*
 595          * It's IN if the pipe is an output pipe or we're not expecting
 596          * data back.
 597          */
 598         destination &= ~TD_TOKEN_PID_MASK;
 599         if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
 600                 destination |= USB_PID_IN;
 601         else
 602                 destination |= USB_PID_OUT;
 603
 604         destination |= TD_TOKEN_TOGGLE;         /* End in Data1 */
 605
 606         status &= ~TD_CTRL_SPD;
 607
 608         uhci_add_td_to_urb(urb, td);
 609         uhci_fill_td(td, status | TD_CTRL_IOC,
 610                         destination | uhci_explen(0), 0);
 611         plink = &td->link;
 612
 613         /*
 614          * Build the new dummy TD and activate the old one
 615          */
 616         td = uhci_alloc_td(uhci);
 617         if (!td)
 618                 goto nomem;
 619         *plink = cpu_to_le32(td->dma_handle);
 620
 621         uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
 622         wmb();
 623         qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
 624         qh->dummy_td = td;
 625
 626         /* Low-speed transfers get a different queue, and won't hog the bus.
 627          * Also, some devices enumerate better without FSBR; the easiest way
 628          * to do that is to put URBs on the low-speed queue while the device
 629          * isn't in the CONFIGURED state. */
 630         if (urb->dev->speed == USB_SPEED_LOW ||
 631                         urb->dev->state != USB_STATE_CONFIGURED)
 632                 qh->skel = uhci->skel_ls_control_qh;
 633         else {
 634                 qh->skel = uhci->skel_fs_control_qh;
 635                 uhci_inc_fsbr(uhci, urb);
 636         }
 637
 638         urb->actual_length = -8;        /* Account for the SETUP packet */
 639         return 0;
 640
 641 nomem:
 642         /* Remove the dummy TD from the td_list so it doesn't get freed */
 643         uhci_remove_td_from_urb(qh->dummy_td);
 644         return -ENOMEM;
 645 }
 646
 647 /*
 648  * Common submit for bulk and interrupt
 649  */
 650 static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
 651                 struct uhci_qh *qh)
 652 {
 653         struct uhci_td *td;
 654         unsigned long destination, status;
 655         int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
 656         int len = urb->transfer_buffer_length;
 657         dma_addr_t data = urb->transfer_dma;
 658         __le32 *plink;
 659         unsigned int toggle;
 660
 661         if (len < 0)
 662                 return -EINVAL;
 663
 664         /* The "pipe" thing contains the destination in bits 8--18 */
 665         destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
 666         toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
 667                          usb_pipeout(urb->pipe));
 668
 669         /* 3 errors, dummy TD remains inactive */
 670         status = uhci_maxerr(3);
 671         if (urb->dev->speed == USB_SPEED_LOW)
 672                 status |= TD_CTRL_LS;
 673         if (usb_pipein(urb->pipe))
 674                 status |= TD_CTRL_SPD;
 675
 676         /*
 677          * Build the DATA TDs
 678          */
 679         plink = NULL;
 680         td = qh->dummy_td;
 681         do {    /* Allow zero length packets */
 682                 int pktsze = maxsze;
 683
 684                 if (len <= pktsze) {            /* The last packet */
 685                         pktsze = len;
 686                         if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
 687                                 status &= ~TD_CTRL_SPD;
 688                 }
 689
 690                 if (plink) {
 691                         td = uhci_alloc_td(uhci);
 692                         if (!td)
 693                                 goto nomem;
 694                         *plink = cpu_to_le32(td->dma_handle);
 695                 }
 696                 uhci_add_td_to_urb(urb, td);
 697                 uhci_fill_td(td, status,
 698                                 destination | uhci_explen(pktsze) |
 699                                         (toggle << TD_TOKEN_TOGGLE_SHIFT),
 700                                 data);
 701                 plink = &td->link;
 702                 status |= TD_CTRL_ACTIVE;
 703
 704                 data += pktsze;
 705                 len -= maxsze;
 706                 toggle ^= 1;
 707         } while (len > 0);
 708
 709         /*
 710          * URB_ZERO_PACKET means adding a 0-length packet, if direction
 711          * is OUT and the transfer_length was an exact multiple of maxsze,
 712          * hence (len = transfer_length - N * maxsze) == 0
 713          * however, if transfer_length == 0, the zero packet was already
 714          * prepared above.
 715          */
 716         if ((urb->transfer_flags & URB_ZERO_PACKET) &&
 717                         usb_pipeout(urb->pipe) && len == 0 &&
 718                         urb->transfer_buffer_length > 0) {
 719                 td = uhci_alloc_td(uhci);
 720                 if (!td)
 721                         goto nomem;
 722                 *plink = cpu_to_le32(td->dma_handle);
 723
 724                 uhci_add_td_to_urb(urb, td);
 725                 uhci_fill_td(td, status,
 726                                 destination | uhci_explen(0) |
 727                                         (toggle << TD_TOKEN_TOGGLE_SHIFT),
 728                                 data);
 729                 plink = &td->link;
 730
 731                 toggle ^= 1;
 732         }
 733
 734         /* Set the interrupt-on-completion flag on the last packet.
 735          * A more-or-less typical 4 KB URB (= size of one memory page)
 736          * will require about 3 ms to transfer; that's a little on the
 737          * fast side but not enough to justify delaying an interrupt
 738          * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
 739          * flag setting. */
 740         td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
 741
 742         /*
 743          * Build the new dummy TD and activate the old one
 744          */
 745         td = uhci_alloc_td(uhci);
 746         if (!td)
 747                 goto nomem;
 748         *plink = cpu_to_le32(td->dma_handle);
 749
 750         uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
 751         wmb();
 752         qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
 753         qh->dummy_td = td;
 754
 755         usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
 756                         usb_pipeout(urb->pipe), toggle);
 757         return 0;
 758
 759 nomem:
 760         /* Remove the dummy TD from the td_list so it doesn't get freed */
 761         uhci_remove_td_from_urb(qh->dummy_td);
 762         return -ENOMEM;
 763 }
 764
 765 static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
 766                 struct uhci_qh *qh)
 767 {
 768         int ret;
 769
 770         /* Can't have low-speed bulk transfers */
 771         if (urb->dev->speed == USB_SPEED_LOW)
 772                 return -EINVAL;
 773
 774         qh->skel = uhci->skel_bulk_qh;
 775         ret = uhci_submit_common(uhci, urb, qh);
 776         if (ret == 0)
 777                 uhci_inc_fsbr(uhci, urb);
 778         return ret;
 779 }
 780
 781 static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
 782                 struct uhci_qh *qh)
 783 {
 784         /* USB 1.1 interrupt transfers only involve one packet per interval.
 785          * Drivers can submit URBs of any length, but longer ones will need
 786          * multiple intervals to complete.
 787          */
 788         qh->skel = uhci->skelqh[__interval_to_skel(urb->interval)];
 789         return uhci_submit_common(uhci, urb, qh);
 790 }
 791
 792 /*
 793  * Fix up the data structures following a short transfer
 794  */
 795 static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
 796                 struct uhci_qh *qh, struct urb_priv *urbp)
 797 {
 798         struct uhci_td *td;
 799         struct list_head *tmp;
 800         int ret;
 801
 802         td = list_entry(urbp->td_list.prev, struct uhci_td, list);
 803         if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
 804
 805                 /* When a control transfer is short, we have to restart
 806                  * the queue at the status stage transaction, which is
 807                  * the last TD. */
 808                 WARN_ON(list_empty(&urbp->td_list));
 809                 qh->element = cpu_to_le32(td->dma_handle);
 810                 tmp = td->list.prev;
 811                 ret = -EINPROGRESS;
 812
 813         } else {
 814
 815                 /* When a bulk/interrupt transfer is short, we have to
 816                  * fix up the toggles of the following URBs on the queue
 817                  * before restarting the queue at the next URB. */
 818                 qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
 819                 uhci_fixup_toggles(qh, 1);
 820
 821                 if (list_empty(&urbp->td_list))
 822                         td = qh->post_td;
 823                 qh->element = td->link;
 824                 tmp = urbp->td_list.prev;
 825                 ret = 0;
 826         }
 827
 828         /* Remove all the TDs we skipped over, from tmp back to the start */
 829         while (tmp != &urbp->td_list) {
 830                 td = list_entry(tmp, struct uhci_td, list);
 831                 tmp = tmp->prev;
 832
 833                 uhci_remove_td_from_urb(td);
 834                 list_add(&td->remove_list, &uhci->td_remove_list);
 835         }
 836         return ret;
 837 }
 838
 839 /*
 840  * Common result for control, bulk, and interrupt
 841  */
 842 static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
 843 {
 844         struct urb_priv *urbp = urb->hcpriv;
 845         struct uhci_qh *qh = urbp->qh;
 846         struct uhci_td *td, *tmp;
 847         unsigned status;
 848         int ret = 0;
 849
 850         list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
 851                 unsigned int ctrlstat;
 852                 int len;
 853
 854                 ctrlstat = td_status(td);
 855                 status = uhci_status_bits(ctrlstat);
 856                 if (status & TD_CTRL_ACTIVE)
 857                         return -EINPROGRESS;
 858
 859                 len = uhci_actual_length(ctrlstat);
 860                 urb->actual_length += len;
 861
 862                 if (status) {
 863                         ret = uhci_map_status(status,
 864                                         uhci_packetout(td_token(td)));
 865                         if ((debug == 1 && ret != -EPIPE) || debug > 1) {
 866                                 /* Some debugging code */
 867                                 dev_dbg(uhci_dev(uhci),
 868                                                 "%s: failed with status %x\n",
 869                                                 __FUNCTION__, status);
 870
 871                                 if (debug > 1 && errbuf) {
 872                                         /* Print the chain for debugging */
 873                                         uhci_show_qh(urbp->qh, errbuf,
 874                                                         ERRBUF_LEN, 0);
 875                                         lprintk(errbuf);
 876                                 }
 877                         }
 878
 879                 } else if (len < uhci_expected_length(td_token(td))) {
 880
 881                         /* We received a short packet */
 882                         if (urb->transfer_flags & URB_SHORT_NOT_OK)
 883                                 ret = -EREMOTEIO;
 884                         else if (ctrlstat & TD_CTRL_SPD)
 885                                 ret = 1;
 886                 }
 887
 888                 uhci_remove_td_from_urb(td);
 889                 if (qh->post_td)
 890                         list_add(&qh->post_td->remove_list,
 891                                         &uhci->td_remove_list);
 892                 qh->post_td = td;
 893
 894                 if (ret != 0)
 895                         goto err;
 896         }
 897         return ret;
 898
 899 err:
 900         if (ret < 0) {
 901                 /* In case a control transfer gets an error
 902                  * during the setup stage */
 903                 urb->actual_length = max(urb->actual_length, 0);
 904
 905                 /* Note that the queue has stopped and save
 906                  * the next toggle value */
 907                 qh->element = UHCI_PTR_TERM;
 908                 qh->is_stopped = 1;
 909                 qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
 910                 qh->initial_toggle = uhci_toggle(td_token(td)) ^
 911                                 (ret == -EREMOTEIO);
 912
 913         } else          /* Short packet received */
 914                 ret = uhci_fixup_short_transfer(uhci, qh, urbp);
 915         return ret;
 916 }
 917
 918 /*
 919  * Isochronous transfers
 920  */
 921 static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
 922                 struct uhci_qh *qh)
 923 {
 924         struct uhci_td *td = NULL;      /* Since urb->number_of_packets > 0 */
 925         int i, frame;
 926         unsigned long destination, status;
 927         struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
 928
 929         if (urb->number_of_packets > 900)       /* 900? Why? */
 930                 return -EFBIG;
 931
 932         status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
 933         destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
 934
 935         /* Figure out the starting frame number */
 936         if (urb->transfer_flags & URB_ISO_ASAP) {
 937                 if (list_empty(&qh->queue)) {
 938                         uhci_get_current_frame_number(uhci);
 939                         urb->start_frame = (uhci->frame_number + 10);
 940
 941                 } else {                /* Go right after the last one */
 942                         struct urb *last_urb;
 943
 944                         last_urb = list_entry(qh->queue.prev,
 945                                         struct urb_priv, node)->urb;
 946                         urb->start_frame = (last_urb->start_frame +
 947                                         last_urb->number_of_packets *
 948                                         last_urb->interval);
 949                 }
 950         } else {
 951                 /* FIXME: Sanity check */
 952         }
 953         urb->start_frame &= (UHCI_NUMFRAMES - 1);
 954
 955         for (i = 0; i < urb->number_of_packets; i++) {
 956                 td = uhci_alloc_td(uhci);
 957                 if (!td)
 958                         return -ENOMEM;
 959
 960                 uhci_add_td_to_urb(urb, td);
 961                 uhci_fill_td(td, status, destination |
 962                                 uhci_explen(urb->iso_frame_desc[i].length),
 963                                 urb->transfer_dma +
 964                                         urb->iso_frame_desc[i].offset);
 965         }
 966
 967         /* Set the interrupt-on-completion flag on the last packet. */
 968         td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
 969
 970         qh->skel = uhci->skel_iso_qh;
 971
 972         /* Add the TDs to the frame list */
 973         frame = urb->start_frame;
 974         list_for_each_entry(td, &urbp->td_list, list) {
 975                 uhci_insert_td_in_frame_list(uhci, td, frame);
 976                 frame += urb->interval;
 977         }
 978
 979         return 0;
 980 }
 981
 982 static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
 983 {
 984         struct uhci_td *td;
 985         struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
 986         int status;
 987         int i, ret = 0;
 988
 989         urb->actual_length = urb->error_count = 0;
 990
 991         i = 0;
 992         list_for_each_entry(td, &urbp->td_list, list) {
 993                 int actlength;
 994                 unsigned int ctrlstat = td_status(td);
 995
 996                 if (ctrlstat & TD_CTRL_ACTIVE)
 997                         return -EINPROGRESS;
 998
 999                 actlength = uhci_actual_length(ctrlstat);
1000                 urb->iso_frame_desc[i].actual_length = actlength;
1001                 urb->actual_length += actlength;
1002
1003                 status = uhci_map_status(uhci_status_bits(ctrlstat),
1004                                 usb_pipeout(urb->pipe));
1005                 urb->iso_frame_desc[i].status = status;
1006                 if (status) {
1007                         urb->error_count++;
1008                         ret = status;
1009                 }
1010
1011                 i++;
1012         }
1013
1014         return ret;
1015 }
1016
1017 static int uhci_urb_enqueue(struct usb_hcd *hcd,
1018                 struct usb_host_endpoint *hep,
1019                 struct urb *urb, gfp_t mem_flags)
1020 {
1021         int ret;
1022         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1023         unsigned long flags;
1024         struct urb_priv *urbp;
1025         struct uhci_qh *qh;
1026         int bustime;
1027
1028         spin_lock_irqsave(&uhci->lock, flags);
1029
1030         ret = urb->status;
1031         if (ret != -EINPROGRESS)                /* URB already unlinked! */
1032                 goto done;
1033
1034         ret = -ENOMEM;
1035         urbp = uhci_alloc_urb_priv(uhci, urb);
1036         if (!urbp)
1037                 goto done;
1038
1039         if (hep->hcpriv)
1040                 qh = (struct uhci_qh *) hep->hcpriv;
1041         else {
1042                 qh = uhci_alloc_qh(uhci, urb->dev, hep);
1043                 if (!qh)
1044                         goto err_no_qh;
1045         }
1046         urbp->qh = qh;
1047
1048         switch (qh->type) {
1049         case USB_ENDPOINT_XFER_CONTROL:
1050                 ret = uhci_submit_control(uhci, urb, qh);
1051                 break;
1052         case USB_ENDPOINT_XFER_BULK:
1053                 ret = uhci_submit_bulk(uhci, urb, qh);
1054                 break;
1055         case USB_ENDPOINT_XFER_INT:
1056                 if (list_empty(&qh->queue)) {
1057                         bustime = usb_check_bandwidth(urb->dev, urb);
1058                         if (bustime < 0)
1059                                 ret = bustime;
1060                         else {
1061                                 ret = uhci_submit_interrupt(uhci, urb, qh);
1062                                 if (ret == 0)
1063                                         usb_claim_bandwidth(urb->dev, urb, bustime, 0);
1064                         }
1065                 } else {        /* inherit from parent */
1066                         struct urb_priv *eurbp;
1067
1068                         eurbp = list_entry(qh->queue.prev, struct urb_priv,
1069                                         node);
1070                         urb->bandwidth = eurbp->urb->bandwidth;
1071                         ret = uhci_submit_interrupt(uhci, urb, qh);
1072                 }
1073                 break;
1074         case USB_ENDPOINT_XFER_ISOC:
1075                 bustime = usb_check_bandwidth(urb->dev, urb);
1076                 if (bustime < 0) {
1077                         ret = bustime;
1078                         break;
1079                 }
1080
1081                 ret = uhci_submit_isochronous(uhci, urb, qh);
1082                 if (ret == 0)
1083                         usb_claim_bandwidth(urb->dev, urb, bustime, 1);
1084                 break;
1085         }
1086         if (ret != 0)
1087                 goto err_submit_failed;
1088
1089         /* Add this URB to the QH */
1090         urbp->qh = qh;
1091         list_add_tail(&urbp->node, &qh->queue);
1092
1093         /* If the new URB is the first and only one on this QH then either
1094          * the QH is new and idle or else it's unlinked and waiting to
1095          * become idle, so we can activate it right away.  But only if the
1096          * queue isn't stopped. */
1097         if (qh->queue.next == &urbp->node && !qh->is_stopped)
1098                 uhci_activate_qh(uhci, qh);
1099         goto done;
1100
1101 err_submit_failed:
1102         if (qh->state == QH_STATE_IDLE)
1103                 uhci_make_qh_idle(uhci, qh);    /* Reclaim unused QH */
1104
1105 err_no_qh:
1106         uhci_free_urb_priv(uhci, urbp);
1107
1108 done:
1109         spin_unlock_irqrestore(&uhci->lock, flags);
1110         return ret;
1111 }
1112
1113 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1114 {
1115         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1116         unsigned long flags;
1117         struct urb_priv *urbp;
1118
1119         spin_lock_irqsave(&uhci->lock, flags);
1120         urbp = urb->hcpriv;
1121         if (!urbp)                      /* URB was never linked! */
1122                 goto done;
1123
1124         /* Remove Isochronous TDs from the frame list ASAP */
1125         if (urbp->qh->type == USB_ENDPOINT_XFER_ISOC)
1126                 uhci_unlink_isochronous_tds(uhci, urb);
1127         uhci_unlink_qh(uhci, urbp->qh);
1128
1129 done:
1130         spin_unlock_irqrestore(&uhci->lock, flags);
1131         return 0;
1132 }
1133
1134 /*
1135  * Finish unlinking an URB and give it back
1136  */
1137 static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
1138                 struct urb *urb, struct pt_regs *regs)
1139 __releases(uhci->lock)
1140 __acquires(uhci->lock)
1141 {
1142         struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1143
1144         /* Isochronous TDs get unlinked directly from the frame list */
1145         if (qh->type == USB_ENDPOINT_XFER_ISOC)
1146                 uhci_unlink_isochronous_tds(uhci, urb);
1147
1148         /* Take the URB off the QH's queue.  If the queue is now empty,
1149          * this is a perfect time for a toggle fixup. */
1150         list_del_init(&urbp->node);
1151         if (list_empty(&qh->queue) && qh->needs_fixup) {
1152                 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1153                                 usb_pipeout(urb->pipe), qh->initial_toggle);
1154                 qh->needs_fixup = 0;
1155         }
1156
1157         uhci_dec_fsbr(uhci, urb);       /* Safe since it checks */
1158         uhci_free_urb_priv(uhci, urbp);
1159
1160         switch (qh->type) {
1161         case USB_ENDPOINT_XFER_ISOC:
1162                 /* Release bandwidth for Interrupt or Isoc. transfers */
1163                 if (urb->bandwidth)
1164                         usb_release_bandwidth(urb->dev, urb, 1);
1165                 break;
1166         case USB_ENDPOINT_XFER_INT:
1167                 /* Release bandwidth for Interrupt or Isoc. transfers */
1168                 /* Make sure we don't release if we have a queued URB */
1169                 if (list_empty(&qh->queue) && urb->bandwidth)
1170                         usb_release_bandwidth(urb->dev, urb, 0);
1171                 else
1172                         /* bandwidth was passed on to queued URB, */
1173                         /* so don't let usb_unlink_urb() release it */
1174                         urb->bandwidth = 0;
1175                 break;
1176         }
1177
1178         spin_unlock(&uhci->lock);
1179         usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, regs);
1180         spin_lock(&uhci->lock);
1181
1182         /* If the queue is now empty, we can unlink the QH and give up its
1183          * reserved bandwidth. */
1184         if (list_empty(&qh->queue)) {
1185                 uhci_unlink_qh(uhci, qh);
1186
1187                 /* Bandwidth stuff not yet implemented */
1188         }
1189 }
1190
1191 /*
1192  * Scan the URBs in a QH's queue
1193  */
1194 #define QH_FINISHED_UNLINKING(qh)                       \
1195                 (qh->state == QH_STATE_UNLINKING &&     \
1196                 uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
1197
1198 static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh,
1199                 struct pt_regs *regs)
1200 {
1201         struct urb_priv *urbp;
1202         struct urb *urb;
1203         int status;
1204
1205         while (!list_empty(&qh->queue)) {
1206                 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1207                 urb = urbp->urb;
1208
1209                 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1210                         status = uhci_result_isochronous(uhci, urb);
1211                 else
1212                         status = uhci_result_common(uhci, urb);
1213                 if (status == -EINPROGRESS)
1214                         break;
1215
1216                 spin_lock(&urb->lock);
1217                 if (urb->status == -EINPROGRESS)        /* Not dequeued */
1218                         urb->status = status;
1219                 else
1220                         status = ECONNRESET;            /* Not -ECONNRESET */
1221                 spin_unlock(&urb->lock);
1222
1223                 /* Dequeued but completed URBs can't be given back unless
1224                  * the QH is stopped or has finished unlinking. */
1225                 if (status == ECONNRESET) {
1226                         if (QH_FINISHED_UNLINKING(qh))
1227                                 qh->is_stopped = 1;
1228                         else if (!qh->is_stopped)
1229                                 return;
1230                 }
1231
1232                 uhci_giveback_urb(uhci, qh, urb, regs);
1233                 if (status < 0)
1234                         break;
1235         }
1236
1237         /* If the QH is neither stopped nor finished unlinking (normal case),
1238          * our work here is done. */
1239         if (QH_FINISHED_UNLINKING(qh))
1240                 qh->is_stopped = 1;
1241         else if (!qh->is_stopped)
1242                 return;
1243
1244         /* Otherwise give back each of the dequeued URBs */
1245 restart:
1246         list_for_each_entry(urbp, &qh->queue, node) {
1247                 urb = urbp->urb;
1248                 if (urb->status != -EINPROGRESS) {
1249                         uhci_cleanup_queue(qh, urb);
1250                         uhci_giveback_urb(uhci, qh, urb, regs);
1251                         goto restart;
1252                 }
1253         }
1254         qh->is_stopped = 0;
1255
1256         /* There are no more dequeued URBs.  If there are still URBs on the
1257          * queue, the QH can now be re-activated. */
1258         if (!list_empty(&qh->queue)) {
1259                 if (qh->needs_fixup)
1260                         uhci_fixup_toggles(qh, 0);
1261                 uhci_activate_qh(uhci, qh);
1262         }
1263
1264         /* The queue is empty.  The QH can become idle if it is fully
1265          * unlinked. */
1266         else if (QH_FINISHED_UNLINKING(qh))
1267                 uhci_make_qh_idle(uhci, qh);
1268 }
1269
1270 static void uhci_free_pending_tds(struct uhci_hcd *uhci)
1271 {
1272         struct uhci_td *td, *tmp;
1273
1274         list_for_each_entry_safe(td, tmp, &uhci->td_remove_list, remove_list) {
1275                 list_del_init(&td->remove_list);
1276
1277                 uhci_free_td(uhci, td);
1278         }
1279 }
1280
1281 /*
1282  * Process events in the schedule, but only in one thread at a time
1283  */
1284 static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
1285 {
1286         int i;
1287         struct uhci_qh *qh;
1288
1289         /* Don't allow re-entrant calls */
1290         if (uhci->scan_in_progress) {
1291                 uhci->need_rescan = 1;
1292                 return;
1293         }
1294         uhci->scan_in_progress = 1;
1295  rescan:
1296         uhci->need_rescan = 0;
1297
1298         uhci_clear_next_interrupt(uhci);
1299         uhci_get_current_frame_number(uhci);
1300
1301         if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age)
1302                 uhci_free_pending_tds(uhci);
1303
1304         /* Go through all the QH queues and process the URBs in each one */
1305         for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
1306                 uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
1307                                 struct uhci_qh, node);
1308                 while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
1309                         uhci->next_qh = list_entry(qh->node.next,
1310                                         struct uhci_qh, node);
1311                         uhci_scan_qh(uhci, qh, regs);
1312                 }
1313         }
1314
1315         if (uhci->need_rescan)
1316                 goto rescan;
1317         uhci->scan_in_progress = 0;
1318
1319         /* If the controller is stopped, we can finish these off right now */
1320         if (uhci->is_stopped)
1321                 uhci_free_pending_tds(uhci);
1322
1323         if (list_empty(&uhci->td_remove_list) &&
1324                         list_empty(&uhci->skel_unlink_qh->node))
1325                 uhci_clear_next_interrupt(uhci);
1326         else
1327                 uhci_set_next_interrupt(uhci);
1328 }
1329
1330 static void check_fsbr(struct uhci_hcd *uhci)
1331 {
1332         /* For now, don't scan URBs for FSBR timeouts.
1333          * Add it back in later... */
1334
1335         /* Really disable FSBR */
1336         if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
1337                 uhci->fsbrtimeout = 0;
1338                 uhci->skel_term_qh->link = UHCI_PTR_TERM;
1339         }
1340 }