2 * arch/ppc64/kernel/entry.S
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
7 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
8 * Adapted for Power Macintosh by Paul Mackerras.
9 * Low-level exception handlers and MMU support
10 * rewritten by Paul Mackerras.
11 * Copyright (C) 1996 Paul Mackerras.
12 * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
14 * This file contains the system call entry code, context switch
15 * code, and exception/interrupt return code for PowerPC.
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
23 #include <linux/config.h>
24 #include <linux/errno.h>
25 #include <asm/unistd.h>
26 #include <asm/processor.h>
29 #include <asm/thread_info.h>
30 #include <asm/ppc_asm.h>
31 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
34 #ifdef CONFIG_PPC_ISERIES
35 #define DO_SOFT_DISABLE
43 .tc .sys_call_table[TC],.sys_call_table
45 /* This value is used to mark exception frames on the stack. */
47 .tc ID_72656773_68657265[TC],0x7265677368657265
54 .globl system_call_common
58 addi r1,r1,-INT_FRAME_SIZE
92 addi r9,r1,STACK_FRAME_OVERHEAD
93 ld r11,exception_marker@toc(r2)
94 std r11,-16(r9) /* "regshere" marker */
95 #ifdef CONFIG_PPC_ISERIES
96 /* Hack for handling interrupts when soft-enabling on iSeries */
97 cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
98 andi. r10,r12,MSR_PR /* from kernel */
99 crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
100 beq hardware_interrupt_entry
101 lbz r10,PACAPROCENABLED(r13)
113 addi r9,r1,STACK_FRAME_OVERHEAD
115 clrrdi r11,r1,THREAD_SHIFT
118 stb r12,TI_SC_NOERR(r11)
119 andi. r11,r10,_TIF_SYSCALL_T_OR_A
121 syscall_dotrace_cont:
122 cmpldi 0,r0,NR_syscalls
125 system_call: /* label this so stack traces look sane */
127 * Need to vector to 32 Bit or default sys_call_table here,
128 * based on caller's run-mode / personality.
130 ld r11,.SYS_CALL_TABLE@toc(2)
131 andi. r10,r10,_TIF_32BIT
133 addi r11,r11,8 /* use 32-bit syscall entries */
142 ldx r10,r11,r0 /* Fetch system call handler [ptr] */
144 bctrl /* Call handler */
149 bl .do_show_syscall_exit
156 clrrdi r12,r1,THREAD_SHIFT
160 /* check for syscall tracing or audit */
162 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
163 bne- syscall_exit_trace
164 syscall_exit_trace_cont:
166 /* disable interrupts so current_thread_info()->flags can't change,
167 and so that we don't get interrupted after loading SRR0/1. */
176 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SIGPENDING|_TIF_NEED_RESCHED)
177 bne- syscall_exit_work
179 stdcx. r0,0,r1 /* to clear the reservation */
182 beq- 1f /* only restore r13 if */
183 ld r13,GPR13(r1) /* returning to usermode */
187 mtmsrd r11,1 /* clear MSR.RI */
194 b . /* prevent speculative execution */
199 clrrdi r12,r1,THREAD_SHIFT
203 lbz r11,TI_SC_NOERR(r12)
205 bne- syscall_error_cont
207 oris r5,r5,0x1000 /* Set SO bit in CR */
211 /* Traced system call support */
214 addi r3,r1,STACK_FRAME_OVERHEAD
215 bl .do_syscall_trace_enter
216 ld r0,GPR0(r1) /* Restore original registers */
223 addi r9,r1,STACK_FRAME_OVERHEAD
224 clrrdi r10,r1,THREAD_SHIFT
226 b syscall_dotrace_cont
231 addi r3,r1,STACK_FRAME_OVERHEAD
232 bl .do_syscall_trace_leave
236 clrrdi r12,r1,THREAD_SHIFT
237 b syscall_exit_trace_cont
239 /* Stuff to do on exit from a system call. */
243 b .ret_from_except_lite
245 /* Save non-volatile GPRs, if not already saved. */
256 * The sigsuspend and rt_sigsuspend system calls can call do_signal
257 * and thus put the process into the stopped state where we might
258 * want to examine its user state with ptrace. Therefore we need
259 * to save all the nonvolatile registers (r14 - r31) before calling
260 * the C code. Similarly, fork, vfork and clone need the full
261 * register state on the stack so that it can be copied to the child.
263 _GLOBAL(ppc32_sigsuspend)
265 bl .compat_sys_sigsuspend
268 _GLOBAL(ppc64_rt_sigsuspend)
270 bl .sys_rt_sigsuspend
273 _GLOBAL(ppc32_rt_sigsuspend)
275 bl .compat_sys_rt_sigsuspend
277 /* If it returned an error, we need to return via syscall_exit to set
278 the SO bit in cr0 and potentially stop for ptrace. */
280 /* If sigsuspend() returns zero, we are going into a signal handler. We
281 may need to call audit_syscall_exit() to mark the exit from sigsuspend() */
282 #ifdef CONFIG_AUDITSYSCALL
283 ld r3,PACACURRENT(r13)
284 ld r4,AUDITCONTEXT(r3)
286 beq .ret_from_except /* No audit_context: Leave immediately. */
287 li r4, 2 /* AUDITSC_FAILURE */
288 li r5,-4 /* It's always -EINTR */
289 bl .audit_syscall_exit
308 _GLOBAL(ppc32_swapcontext)
310 bl .compat_sys_swapcontext
313 _GLOBAL(ppc64_swapcontext)
318 _GLOBAL(ppc32_sigreturn)
319 bl .compat_sys_sigreturn
322 _GLOBAL(ppc32_rt_sigreturn)
323 bl .compat_sys_rt_sigreturn
326 _GLOBAL(ppc64_rt_sigreturn)
331 clrrdi r4,r1,THREAD_SHIFT
333 andi. r4,r4,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
335 addi r3,r1,STACK_FRAME_OVERHEAD
336 bl .do_syscall_trace_leave
337 81: b .ret_from_except
339 _GLOBAL(ret_from_fork)
346 * This routine switches between two different tasks. The process
347 * state of one is saved on its kernel stack. Then the state
348 * of the other is restored from its kernel stack. The memory
349 * management hardware is updated to the second process's state.
350 * Finally, we can return to the second process, via ret_from_except.
351 * On entry, r3 points to the THREAD for the current task, r4
352 * points to the THREAD for the new task.
354 * Note: there are two ways to get to the "going out" portion
355 * of this code; either by coming in via the entry (_switch)
356 * or via "fork" which must set up an environment equivalent
357 * to the "_switch" path. If you change this you'll have to change
358 * the fork code also.
360 * The code which creates the new task context is in 'copy_thread'
361 * in arch/ppc64/kernel/process.c
367 stdu r1,-SWITCH_FRAME_SIZE(r1)
368 /* r3-r13 are caller saved -- Cort */
371 mflr r20 /* Return to switch caller */
374 #ifdef CONFIG_ALTIVEC
376 oris r0,r0,MSR_VEC@h /* Disable altivec */
377 mfspr r24,SPRN_VRSAVE /* save vrsave register value */
378 std r24,THREAD_VRSAVE(r3)
379 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
380 #endif /* CONFIG_ALTIVEC */
389 std r1,KSP(r3) /* Set old stack pointer */
392 /* We need a sync somewhere here to make sure that if the
393 * previous task gets rescheduled on another CPU, it sees all
394 * stores it has performed on this one.
397 #endif /* CONFIG_SMP */
399 addi r6,r4,-THREAD /* Convert THREAD to 'current' */
400 std r6,PACACURRENT(r13) /* Set new 'current' */
402 ld r8,KSP(r4) /* new stack pointer */
404 clrrdi r6,r8,28 /* get its ESID */
405 clrrdi r9,r1,28 /* get current sp ESID */
406 clrldi. r0,r6,2 /* is new ESID c00000000? */
407 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
409 beq 2f /* if yes, don't slbie it */
411 /* Bolt in the new stack SLB entry */
412 ld r7,KSP_VSID(r4) /* Get new stack's VSID */
413 oris r0,r6,(SLB_ESID_V)@h
414 ori r0,r0,(SLB_NUM_BOLTED-1)@l
416 slbie r6 /* Workaround POWER5 < DD2.1 issue */
421 END_FTR_SECTION_IFSET(CPU_FTR_SLB)
422 clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
423 /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
424 because we don't need to leave the 288-byte ABI gap at the
425 top of the kernel stack. */
426 addi r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
428 mr r1,r8 /* start using new stack pointer */
429 std r7,PACAKSAVE(r13)
434 #ifdef CONFIG_ALTIVEC
436 ld r0,THREAD_VRSAVE(r4)
437 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
438 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
439 #endif /* CONFIG_ALTIVEC */
441 /* r3-r13 are destroyed -- Cort */
445 /* convert old thread to its task_struct for return value */
447 ld r7,_NIP(r1) /* Return to _switch caller in new task */
449 addi r1,r1,SWITCH_FRAME_SIZE
453 _GLOBAL(ret_from_except)
456 bne .ret_from_except_lite
459 _GLOBAL(ret_from_except_lite)
461 * Disable interrupts so that current_thread_info()->flags
462 * can't change between when we test it and when we return
463 * from the interrupt.
465 mfmsr r10 /* Get current interrupt state */
466 rldicl r9,r10,48,1 /* clear MSR_EE */
468 mtmsrd r9,1 /* Update machine state */
470 #ifdef CONFIG_PREEMPT
471 clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
472 li r0,_TIF_NEED_RESCHED /* bits to check */
475 /* Move MSR_PR bit in r3 to _TIF_SIGPENDING position in r0 */
476 rlwimi r0,r3,32+TIF_SIGPENDING-MSR_PR_LG,_TIF_SIGPENDING
477 and. r0,r4,r0 /* check NEED_RESCHED and maybe SIGPENDING */
480 #else /* !CONFIG_PREEMPT */
481 ld r3,_MSR(r1) /* Returning to user mode? */
483 beq restore /* if not, just restore regs and return */
485 /* Check current_thread_info()->flags */
486 clrrdi r9,r1,THREAD_SHIFT
488 andi. r0,r4,_TIF_USER_WORK_MASK
493 #ifdef CONFIG_PPC_ISERIES
497 /* Check for pending interrupts (iSeries) */
498 ld r3,PACALPPACA+LPPACAANYINT(r13)
500 beq+ 4f /* skip do_IRQ if no interrupts */
503 stb r3,PACAPROCENABLED(r13) /* ensure we are soft-disabled */
505 mtmsrd r10 /* hard-enable again */
506 addi r3,r1,STACK_FRAME_OVERHEAD
508 b .ret_from_except_lite /* loop back and handle more */
510 4: stb r5,PACAPROCENABLED(r13)
520 * r13 is our per cpu area, only restore it if we are returning to
535 stdcx. r0,0,r1 /* to clear the reservation */
557 b . /* prevent speculative execution */
559 /* Note: this must change if we start using the TIF_NOTIFY_RESUME bit */
561 #ifdef CONFIG_PREEMPT
562 andi. r0,r3,MSR_PR /* Returning to user mode? */
564 /* Check that preempt_count() == 0 and interrupts are enabled */
565 lwz r8,TI_PREEMPT(r9)
567 #ifdef CONFIG_PPC_ISERIES
573 crandc eq,cr1*4+eq,eq
575 /* here we are preempting the current task */
577 #ifdef CONFIG_PPC_ISERIES
579 stb r0,PACAPROCENABLED(r13)
582 mtmsrd r10,1 /* reenable interrupts */
585 clrrdi r9,r1,THREAD_SHIFT
586 rldicl r10,r10,48,1 /* disable interrupts again */
590 andi. r0,r4,_TIF_NEED_RESCHED
596 /* Enable interrupts */
600 andi. r0,r4,_TIF_NEED_RESCHED
603 b .ret_from_except_lite
607 addi r4,r1,STACK_FRAME_OVERHEAD
612 addi r3,r1,STACK_FRAME_OVERHEAD
613 bl .unrecoverable_exception
616 #ifdef CONFIG_PPC_RTAS
618 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
619 * called with the MMU off.
621 * In addition, we need to be in 32b mode, at least for now.
623 * Note: r3 is an input parameter to rtas, so don't trash it...
628 stdu r1,-RTAS_FRAME_SIZE(r1) /* Save SP and create stack space. */
630 /* Because RTAS is running in 32b mode, it clobbers the high order half
631 * of all registers that it saves. We therefore save those registers
632 * RTAS might touch to the stack. (r0, r3-r13 are caller saved)
634 SAVE_GPR(2, r1) /* Save the TOC */
635 SAVE_GPR(13, r1) /* Save paca */
636 SAVE_8GPRS(14, r1) /* Save the non-volatiles */
637 SAVE_10GPRS(22, r1) /* ditto */
654 /* There is no way it is acceptable to get here with interrupts enabled,
655 * check it with the asm equivalent of WARN_ON
660 .section __bug_table,"a"
661 .llong 1b,__LINE__ + 0x1000000, 1f, 2f
665 2: .asciz "enter_rtas"
668 /* Unfortunately, the stack pointer and the MSR are also clobbered,
669 * so they are saved in the PACA which allows us to restore
670 * our original state after RTAS returns.
673 std r6,PACASAVEDMSR(r13)
675 /* Setup our real return addr */
676 SET_REG_TO_LABEL(r4,.rtas_return_loc)
677 SET_REG_TO_CONST(r9,KERNELBASE)
682 ori r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI
686 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
687 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP
690 sync /* disable interrupts so SRR0/1 */
691 mtmsrd r0 /* don't get trashed */
693 SET_REG_TO_LABEL(r4,rtas)
694 ld r5,RTASENTRY(r4) /* get the rtas->entry value */
695 ld r4,RTASBASE(r4) /* get the rtas->base value */
700 b . /* prevent speculative execution */
702 _STATIC(rtas_return_loc)
703 /* relocation is off at this point */
704 mfspr r4,SPRN_SPRG3 /* Get PACA */
705 SET_REG_TO_CONST(r5, KERNELBASE)
706 sub r4,r4,r5 /* RELOC the PACA base pointer */
714 ld r1,PACAR1(r4) /* Restore our SP */
715 LOADADDR(r3,.rtas_restore_regs)
716 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
721 b . /* prevent speculative execution */
723 _STATIC(rtas_restore_regs)
724 /* relocation is on at this point */
725 REST_GPR(2, r1) /* Restore the TOC */
726 REST_GPR(13, r1) /* Restore paca */
727 REST_8GPRS(14, r1) /* Restore the non-volatiles */
728 REST_10GPRS(22, r1) /* ditto */
747 addi r1,r1,RTAS_FRAME_SIZE /* Unstack our frame */
748 ld r0,16(r1) /* get return address */
751 blr /* return to caller */
753 #endif /* CONFIG_PPC_RTAS */
755 #ifdef CONFIG_PPC_MULTIPLATFORM
760 stdu r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
762 /* Because PROM is running in 32b mode, it clobbers the high order half
763 * of all registers that it saves. We therefore save those registers
764 * PROM might touch to the stack. (r0, r3-r13 are caller saved)
787 /* Get the PROM entrypoint */
791 /* Switch MSR to 32 bits mode
795 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
798 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
803 /* Restore arguments & enter PROM here... */
807 /* Just make sure that r1 top 32 bits didn't get
812 /* Restore the MSR (back to 64 bits) */
817 /* Restore other registers */
837 addi r1,r1,PROM_FRAME_SIZE
842 #endif /* CONFIG_PPC_MULTIPLATFORM */