2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <asm/sn/addrs.h>
14 #include <asm/sn/arch.h>
15 #include <asm/sn/intr.h>
16 #include <asm/sn/pcibr_provider.h>
17 #include <asm/sn/pcibus_provider_defs.h>
18 #include <asm/sn/pcidev.h>
19 #include <asm/sn/shub_mmr.h>
20 #include <asm/sn/sn_sal.h>
22 static void force_interrupt(int irq);
23 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
24 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
26 int sn_force_interrupt_flag = 1;
27 extern int sn_ioif_inited;
28 static struct list_head **sn_irq_lh;
29 static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */
31 static inline u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 int req_irq, nasid_t req_nasid,
36 struct ia64_sal_retval ret_stuff;
40 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
41 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
42 (u64) local_widget, (u64) sn_irq_info, (u64) req_irq,
43 (u64) req_nasid, (u64) req_slice);
44 return ret_stuff.status;
47 static inline void sn_intr_free(nasid_t local_nasid, int local_widget,
48 struct sn_irq_info *sn_irq_info)
50 struct ia64_sal_retval ret_stuff;
54 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
55 (u64) SAL_INTR_FREE, (u64) local_nasid,
56 (u64) local_widget, (u64) sn_irq_info->irq_irq,
57 (u64) sn_irq_info->irq_cookie, 0, 0);
60 static unsigned int sn_startup_irq(unsigned int irq)
65 static void sn_shutdown_irq(unsigned int irq)
69 static void sn_disable_irq(unsigned int irq)
73 static void sn_enable_irq(unsigned int irq)
77 static void sn_ack_irq(unsigned int irq)
79 u64 event_occurred, mask = 0;
83 HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
84 mask = event_occurred & SH_ALL_INT_MASK;
85 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
87 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
92 static void sn_end_irq(unsigned int irq)
98 if (ivec == SGI_UART_VECTOR) {
99 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
100 /* If the UART bit is set here, we may have received an
101 * interrupt from the UART that the driver missed. To
102 * make sure, we IPI ourselves to force us to look again.
104 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
105 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
109 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
110 if (sn_force_interrupt_flag)
111 force_interrupt(irq);
114 static void sn_irq_info_free(struct rcu_head *head);
116 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
118 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
121 cpuid = first_cpu(mask);
122 cpuphys = cpu_physical_id(cpuid);
124 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
125 sn_irq_lh[irq], list) {
127 int local_widget, status;
129 struct sn_irq_info *new_irq_info;
130 struct sn_pcibus_provider *pci_provider;
132 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
133 if (new_irq_info == NULL)
135 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
137 bridge = (u64) new_irq_info->irq_bridge;
140 break; /* irq is not a device interrupt */
143 local_nasid = NASID_GET(bridge);
146 local_widget = TIO_SWIN_WIDGETNUM(bridge);
148 local_widget = SWIN_WIDGETNUM(bridge);
150 /* Free the old PROM new_irq_info structure */
151 sn_intr_free(local_nasid, local_widget, new_irq_info);
152 /* Update kernels new_irq_info with new target info */
153 unregister_intr_pda(new_irq_info);
155 /* allocate a new PROM new_irq_info struct */
156 status = sn_intr_alloc(local_nasid, local_widget,
157 __pa(new_irq_info), irq,
158 cpuid_to_nasid(cpuid),
159 cpuid_to_slice(cpuid));
161 /* SAL call failed */
167 new_irq_info->irq_cpuid = cpuid;
168 register_intr_pda(new_irq_info);
170 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
171 if (pci_provider && pci_provider->target_interrupt)
172 (pci_provider->target_interrupt)(new_irq_info);
174 spin_lock(&sn_irq_info_lock);
175 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
176 spin_unlock(&sn_irq_info_lock);
177 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
180 set_irq_affinity_info((irq & 0xff), cpuphys, 0);
185 struct hw_interrupt_type irq_type_sn = {
186 .typename = "SN hub",
187 .startup = sn_startup_irq,
188 .shutdown = sn_shutdown_irq,
189 .enable = sn_enable_irq,
190 .disable = sn_disable_irq,
193 .set_affinity = sn_set_affinity_irq
196 unsigned int sn_local_vector_to_irq(u8 vector)
198 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
201 void sn_irq_init(void)
204 irq_desc_t *base_desc = irq_desc;
206 for (i = 0; i < NR_IRQS; i++) {
207 if (base_desc[i].handler == &no_irq_type) {
208 base_desc[i].handler = &irq_type_sn;
213 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
215 int irq = sn_irq_info->irq_irq;
216 int cpu = sn_irq_info->irq_cpuid;
218 if (pdacpu(cpu)->sn_last_irq < irq) {
219 pdacpu(cpu)->sn_last_irq = irq;
222 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq) {
223 pdacpu(cpu)->sn_first_irq = irq;
227 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
229 int irq = sn_irq_info->irq_irq;
230 int cpu = sn_irq_info->irq_cpuid;
231 struct sn_irq_info *tmp_irq_info;
235 if (pdacpu(cpu)->sn_last_irq == irq) {
237 for (i = pdacpu(cpu)->sn_last_irq - 1;
238 i && !foundmatch; i--) {
239 list_for_each_entry_rcu(tmp_irq_info,
242 if (tmp_irq_info->irq_cpuid == cpu) {
248 pdacpu(cpu)->sn_last_irq = i;
251 if (pdacpu(cpu)->sn_first_irq == irq) {
253 for (i = pdacpu(cpu)->sn_first_irq + 1;
254 i < NR_IRQS && !foundmatch; i++) {
255 list_for_each_entry_rcu(tmp_irq_info,
258 if (tmp_irq_info->irq_cpuid == cpu) {
264 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
269 static void sn_irq_info_free(struct rcu_head *head)
271 struct sn_irq_info *sn_irq_info;
273 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
277 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
279 nasid_t nasid = sn_irq_info->irq_nasid;
280 int slice = sn_irq_info->irq_slice;
281 int cpu = nasid_slice_to_cpuid(nasid, slice);
283 pci_dev_get(pci_dev);
284 sn_irq_info->irq_cpuid = cpu;
285 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
287 /* link it into the sn_irq[irq] list */
288 spin_lock(&sn_irq_info_lock);
289 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
290 spin_unlock(&sn_irq_info_lock);
292 (void)register_intr_pda(sn_irq_info);
295 void sn_irq_unfixup(struct pci_dev *pci_dev)
297 struct sn_irq_info *sn_irq_info;
299 /* Only cleanup IRQ stuff if this device has a host bus context */
300 if (!SN_PCIDEV_BUSSOFT(pci_dev))
303 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
304 if (!sn_irq_info || !sn_irq_info->irq_irq) {
309 unregister_intr_pda(sn_irq_info);
310 spin_lock(&sn_irq_info_lock);
311 list_del_rcu(&sn_irq_info->list);
312 spin_unlock(&sn_irq_info_lock);
313 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
314 pci_dev_put(pci_dev);
318 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
320 struct sn_pcibus_provider *pci_provider;
322 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
323 if (pci_provider && pci_provider->force_interrupt)
324 (*pci_provider->force_interrupt)(sn_irq_info);
327 static void force_interrupt(int irq)
329 struct sn_irq_info *sn_irq_info;
335 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
336 sn_call_force_intr_provider(sn_irq_info);
342 * Check for lost interrupts. If the PIC int_status reg. says that
343 * an interrupt has been sent, but not handled, and the interrupt
344 * is not pending in either the cpu irr regs or in the soft irr regs,
345 * and the interrupt is not in service, then the interrupt may have
346 * been lost. Force an interrupt on that pin. It is possible that
347 * the interrupt is in flight, so we may generate a spurious interrupt,
348 * but we should never miss a real lost interrupt.
350 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
356 struct pcidev_info *pcidev_info;
357 struct pcibus_info *pcibus_info;
360 * Bridge types attached to TIO (anything but PIC) do not need this WAR
361 * since they do not target Shub II interrupt registers. If that
362 * ever changes, this check needs to accomodate.
364 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
367 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
372 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
374 regval = pcireg_intr_status_get(pcibus_info);
376 irr_reg_num = irq_to_vector(irq) / 64;
377 irr_bit = irq_to_vector(irq) % 64;
378 switch (irr_reg_num) {
380 irr_reg = ia64_getreg(_IA64_REG_CR_IRR0);
383 irr_reg = ia64_getreg(_IA64_REG_CR_IRR1);
386 irr_reg = ia64_getreg(_IA64_REG_CR_IRR2);
389 irr_reg = ia64_getreg(_IA64_REG_CR_IRR3);
392 if (!test_bit(irr_bit, &irr_reg)) {
393 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
395 if (sn_irq_info->irq_int_bit & regval &
396 sn_irq_info->irq_last_intr) {
397 regval &= ~(sn_irq_info->irq_int_bit & regval);
398 sn_call_force_intr_provider(sn_irq_info);
402 sn_irq_info->irq_last_intr = regval;
405 void sn_lb_int_war_check(void)
407 struct sn_irq_info *sn_irq_info;
410 if (!sn_ioif_inited || pda->sn_first_irq == 0)
414 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
415 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
416 sn_check_intr(i, sn_irq_info);
422 void sn_irq_lh_init(void)
426 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
428 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
430 for (i = 0; i < NR_IRQS; i++) {
431 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
433 panic("SN PCI INIT: Failed IRQ memory allocation\n");
435 INIT_LIST_HEAD(sn_irq_lh[i]);