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   1 /*
   2  * arch/ppc64/kernel/xics.c
   3  *
   4  * Copyright 2000 IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  */
  11 #include <linux/config.h>
  12 #include <linux/types.h>
  13 #include <linux/threads.h>
  14 #include <linux/kernel.h>
  15 #include <linux/irq.h>
  16 #include <linux/smp.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/signal.h>
  19 #include <linux/init.h>
  20 #include <linux/gfp.h>
  21 #include <linux/radix-tree.h>
  22 #include <linux/cpu.h>
  23 #include <asm/prom.h>
  24 #include <asm/io.h>
  25 #include <asm/pgtable.h>
  26 #include <asm/smp.h>
  27 #include <asm/rtas.h>
  28 #include <asm/xics.h>
  29 #include <asm/hvcall.h>
  30 #include <asm/machdep.h>
  31
  32 #include "i8259.h"
  33
  34 static unsigned int xics_startup(unsigned int irq);
  35 static void xics_enable_irq(unsigned int irq);
  36 static void xics_disable_irq(unsigned int irq);
  37 static void xics_mask_and_ack_irq(unsigned int irq);
  38 static void xics_end_irq(unsigned int irq);
  39 static void xics_set_affinity(unsigned int irq_nr, cpumask_t cpumask);
  40
  41 static struct hw_interrupt_type xics_pic = {
  42         .typename = " XICS     ",
  43         .startup = xics_startup,
  44         .enable = xics_enable_irq,
  45         .disable = xics_disable_irq,
  46         .ack = xics_mask_and_ack_irq,
  47         .end = xics_end_irq,
  48         .set_affinity = xics_set_affinity
  49 };
  50
  51 static struct hw_interrupt_type xics_8259_pic = {
  52         .typename = " XICS/8259",
  53         .ack = xics_mask_and_ack_irq,
  54 };
  55
  56 /* This is used to map real irq numbers to virtual */
  57 static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
  58
  59 #define XICS_IPI                2
  60 #define XICS_IRQ_SPURIOUS       0
  61
  62 /* Want a priority other than 0.  Various HW issues require this. */
  63 #define DEFAULT_PRIORITY        5
  64
  65 /*
  66  * Mark IPIs as higher priority so we can take them inside interrupts that
  67  * arent marked SA_INTERRUPT
  68  */
  69 #define IPI_PRIORITY            4
  70
  71 struct xics_ipl {
  72         union {
  73                 u32 word;
  74                 u8 bytes[4];
  75         } xirr_poll;
  76         union {
  77                 u32 word;
  78                 u8 bytes[4];
  79         } xirr;
  80         u32 dummy;
  81         union {
  82                 u32 word;
  83                 u8 bytes[4];
  84         } qirr;
  85 };
  86
  87 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
  88
  89 static int xics_irq_8259_cascade = 0;
  90 static int xics_irq_8259_cascade_real = 0;
  91 static unsigned int default_server = 0xFF;
  92 static unsigned int default_distrib_server = 0;
  93 static unsigned int interrupt_server_size = 8;
  94
  95 /*
  96  * XICS only has a single IPI, so encode the messages per CPU
  97  */
  98 struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
  99
 100 /* RTAS service tokens */
 101 static int ibm_get_xive;
 102 static int ibm_set_xive;
 103 static int ibm_int_on;
 104 static int ibm_int_off;
 105
 106 typedef struct {
 107         int (*xirr_info_get)(int cpu);
 108         void (*xirr_info_set)(int cpu, int val);
 109         void (*cppr_info)(int cpu, u8 val);
 110         void (*qirr_info)(int cpu, u8 val);
 111 } xics_ops;
 112
 113
 114 /* SMP */
 115
 116 static int pSeries_xirr_info_get(int n_cpu)
 117 {
 118         return in_be32(&xics_per_cpu[n_cpu]->xirr.word);
 119 }
 120
 121 static void pSeries_xirr_info_set(int n_cpu, int value)
 122 {
 123         out_be32(&xics_per_cpu[n_cpu]->xirr.word, value);
 124 }
 125
 126 static void pSeries_cppr_info(int n_cpu, u8 value)
 127 {
 128         out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value);
 129 }
 130
 131 static void pSeries_qirr_info(int n_cpu, u8 value)
 132 {
 133         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
 134 }
 135
 136 static xics_ops pSeries_ops = {
 137         pSeries_xirr_info_get,
 138         pSeries_xirr_info_set,
 139         pSeries_cppr_info,
 140         pSeries_qirr_info
 141 };
 142
 143 static xics_ops *ops = &pSeries_ops;
 144
 145
 146 /* LPAR */
 147
 148 static inline long plpar_eoi(unsigned long xirr)
 149 {
 150         return plpar_hcall_norets(H_EOI, xirr);
 151 }
 152
 153 static inline long plpar_cppr(unsigned long cppr)
 154 {
 155         return plpar_hcall_norets(H_CPPR, cppr);
 156 }
 157
 158 static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
 159 {
 160         return plpar_hcall_norets(H_IPI, servernum, mfrr);
 161 }
 162
 163 static inline long plpar_xirr(unsigned long *xirr_ret)
 164 {
 165         unsigned long dummy;
 166         return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy);
 167 }
 168
 169 static int pSeriesLP_xirr_info_get(int n_cpu)
 170 {
 171         unsigned long lpar_rc;
 172         unsigned long return_value;
 173
 174         lpar_rc = plpar_xirr(&return_value);
 175         if (lpar_rc != H_Success)
 176                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
 177         return (int)return_value;
 178 }
 179
 180 static void pSeriesLP_xirr_info_set(int n_cpu, int value)
 181 {
 182         unsigned long lpar_rc;
 183         unsigned long val64 = value & 0xffffffff;
 184
 185         lpar_rc = plpar_eoi(val64);
 186         if (lpar_rc != H_Success)
 187                 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
 188                       val64);
 189 }
 190
 191 void pSeriesLP_cppr_info(int n_cpu, u8 value)
 192 {
 193         unsigned long lpar_rc;
 194
 195         lpar_rc = plpar_cppr(value);
 196         if (lpar_rc != H_Success)
 197                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
 198 }
 199
 200 static void pSeriesLP_qirr_info(int n_cpu , u8 value)
 201 {
 202         unsigned long lpar_rc;
 203
 204         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
 205         if (lpar_rc != H_Success)
 206                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
 207 }
 208
 209 xics_ops pSeriesLP_ops = {
 210         pSeriesLP_xirr_info_get,
 211         pSeriesLP_xirr_info_set,
 212         pSeriesLP_cppr_info,
 213         pSeriesLP_qirr_info
 214 };
 215
 216 static unsigned int xics_startup(unsigned int virq)
 217 {
 218         unsigned int irq;
 219
 220         irq = irq_offset_down(virq);
 221         if (radix_tree_insert(&irq_map, virt_irq_to_real(irq),
 222                               &virt_irq_to_real_map[irq]) == -ENOMEM)
 223                 printk(KERN_CRIT "Out of memory creating real -> virtual"
 224                        " IRQ mapping for irq %u (real 0x%x)\n",
 225                        virq, virt_irq_to_real(irq));
 226         xics_enable_irq(virq);
 227         return 0;       /* return value is ignored */
 228 }
 229
 230 static unsigned int real_irq_to_virt(unsigned int real_irq)
 231 {
 232         unsigned int *ptr;
 233
 234         ptr = radix_tree_lookup(&irq_map, real_irq);
 235         if (ptr == NULL)
 236                 return NO_IRQ;
 237         return ptr - virt_irq_to_real_map;
 238 }
 239
 240 #ifdef CONFIG_SMP
 241 static int get_irq_server(unsigned int irq)
 242 {
 243         unsigned int server;
 244         /* For the moment only implement delivery to all cpus or one cpu */
 245         cpumask_t cpumask = irq_affinity[irq];
 246         cpumask_t tmp = CPU_MASK_NONE;
 247
 248         if (!distribute_irqs)
 249                 return default_server;
 250
 251         if (cpus_equal(cpumask, CPU_MASK_ALL)) {
 252                 server = default_distrib_server;
 253         } else {
 254                 cpus_and(tmp, cpu_online_map, cpumask);
 255
 256                 if (cpus_empty(tmp))
 257                         server = default_distrib_server;
 258                 else
 259                         server = get_hard_smp_processor_id(first_cpu(tmp));
 260         }
 261
 262         return server;
 263
 264 }
 265 #else
 266 static int get_irq_server(unsigned int irq)
 267 {
 268         return default_server;
 269 }
 270 #endif
 271
 272 static void xics_enable_irq(unsigned int virq)
 273 {
 274         unsigned int irq;
 275         int call_status;
 276         unsigned int server;
 277
 278         irq = virt_irq_to_real(irq_offset_down(virq));
 279         if (irq == XICS_IPI)
 280                 return;
 281
 282         server = get_irq_server(virq);
 283         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
 284                                 DEFAULT_PRIORITY);
 285         if (call_status != 0) {
 286                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive "
 287                        "returned %d\n", irq, call_status);
 288                 printk("set_xive %x, server %x\n", ibm_set_xive, server);
 289                 return;
 290         }
 291
 292         /* Now unmask the interrupt (often a no-op) */
 293         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
 294         if (call_status != 0) {
 295                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on "
 296                        "returned %d\n", irq, call_status);
 297                 return;
 298         }
 299 }
 300
 301 static void xics_disable_real_irq(unsigned int irq)
 302 {
 303         int call_status;
 304         unsigned int server;
 305
 306         if (irq == XICS_IPI)
 307                 return;
 308
 309         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
 310         if (call_status != 0) {
 311                 printk(KERN_ERR "xics_disable_real_irq: irq=%u: "
 312                        "ibm_int_off returned %d\n", irq, call_status);
 313                 return;
 314         }
 315
 316         server = get_irq_server(irq);
 317         /* Have to set XIVE to 0xff to be able to remove a slot */
 318         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 0xff);
 319         if (call_status != 0) {
 320                 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
 321                        " returned %d\n", irq, call_status);
 322                 return;
 323         }
 324 }
 325
 326 static void xics_disable_irq(unsigned int virq)
 327 {
 328         unsigned int irq;
 329
 330         irq = virt_irq_to_real(irq_offset_down(virq));
 331         xics_disable_real_irq(irq);
 332 }
 333
 334 static void xics_end_irq(unsigned int irq)
 335 {
 336         int cpu = smp_processor_id();
 337
 338         iosync();
 339         ops->xirr_info_set(cpu, ((0xff << 24) |
 340                                  (virt_irq_to_real(irq_offset_down(irq)))));
 341
 342 }
 343
 344 static void xics_mask_and_ack_irq(unsigned int irq)
 345 {
 346         int cpu = smp_processor_id();
 347
 348         if (irq < irq_offset_value()) {
 349                 i8259_pic.ack(irq);
 350                 iosync();
 351                 ops->xirr_info_set(cpu, ((0xff<<24) |
 352                                          xics_irq_8259_cascade_real));
 353                 iosync();
 354         }
 355 }
 356
 357 int xics_get_irq(struct pt_regs *regs)
 358 {
 359         unsigned int cpu = smp_processor_id();
 360         unsigned int vec;
 361         int irq;
 362
 363         vec = ops->xirr_info_get(cpu);
 364         /*  (vec >> 24) == old priority */
 365         vec &= 0x00ffffff;
 366
 367         /* for sanity, this had better be < NR_IRQS - 16 */
 368         if (vec == xics_irq_8259_cascade_real) {
 369                 irq = i8259_irq(cpu);
 370                 if (irq == -1) {
 371                         /* Spurious cascaded interrupt.  Still must ack xics */
 372                         xics_end_irq(irq_offset_up(xics_irq_8259_cascade));
 373
 374                         irq = -1;
 375                 }
 376         } else if (vec == XICS_IRQ_SPURIOUS) {
 377                 irq = -1;
 378         } else {
 379                 irq = real_irq_to_virt(vec);
 380                 if (irq == NO_IRQ)
 381                         irq = real_irq_to_virt_slowpath(vec);
 382                 if (irq == NO_IRQ) {
 383                         printk(KERN_ERR "Interrupt %u (real) is invalid,"
 384                                " disabling it.\n", vec);
 385                         xics_disable_real_irq(vec);
 386                 } else
 387                         irq = irq_offset_up(irq);
 388         }
 389         return irq;
 390 }
 391
 392 #ifdef CONFIG_SMP
 393
 394 irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
 395 {
 396         int cpu = smp_processor_id();
 397
 398         ops->qirr_info(cpu, 0xff);
 399
 400         WARN_ON(cpu_is_offline(cpu));
 401
 402         while (xics_ipi_message[cpu].value) {
 403                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 404                                        &xics_ipi_message[cpu].value)) {
 405                         mb();
 406                         smp_message_recv(PPC_MSG_CALL_FUNCTION, regs);
 407                 }
 408                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 409                                        &xics_ipi_message[cpu].value)) {
 410                         mb();
 411                         smp_message_recv(PPC_MSG_RESCHEDULE, regs);
 412                 }
 413 #if 0
 414                 if (test_and_clear_bit(PPC_MSG_MIGRATE_TASK,
 415                                        &xics_ipi_message[cpu].value)) {
 416                         mb();
 417                         smp_message_recv(PPC_MSG_MIGRATE_TASK, regs);
 418                 }
 419 #endif
 420 #ifdef CONFIG_DEBUGGER
 421                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 422                                        &xics_ipi_message[cpu].value)) {
 423                         mb();
 424                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK, regs);
 425                 }
 426 #endif
 427         }
 428         return IRQ_HANDLED;
 429 }
 430
 431 void xics_cause_IPI(int cpu)
 432 {
 433         ops->qirr_info(cpu, IPI_PRIORITY);
 434 }
 435 #endif /* CONFIG_SMP */
 436
 437 void xics_setup_cpu(void)
 438 {
 439         int cpu = smp_processor_id();
 440
 441         ops->cppr_info(cpu, 0xff);
 442         iosync();
 443
 444         /*
 445          * Put the calling processor into the GIQ.  This is really only
 446          * necessary from a secondary thread as the OF start-cpu interface
 447          * performs this function for us on primary threads.
 448          *
 449          * XXX: undo of teardown on kexec needs this too, as may hotplug
 450          */
 451         rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
 452                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
 453 }
 454
 455 void xics_init_IRQ(void)
 456 {
 457         int i;
 458         unsigned long intr_size = 0;
 459         struct device_node *np;
 460         uint *ireg, ilen, indx = 0;
 461         unsigned long intr_base = 0;
 462         struct xics_interrupt_node {
 463                 unsigned long addr;
 464                 unsigned long size;
 465         } intnodes[NR_CPUS];
 466
 467         ppc64_boot_msg(0x20, "XICS Init");
 468
 469         ibm_get_xive = rtas_token("ibm,get-xive");
 470         ibm_set_xive = rtas_token("ibm,set-xive");
 471         ibm_int_on  = rtas_token("ibm,int-on");
 472         ibm_int_off = rtas_token("ibm,int-off");
 473
 474         np = of_find_node_by_type(NULL, "PowerPC-External-Interrupt-Presentation");
 475         if (!np)
 476                 panic("xics_init_IRQ: can't find interrupt presentation");
 477
 478 nextnode:
 479         ireg = (uint *)get_property(np, "ibm,interrupt-server-ranges", NULL);
 480         if (ireg) {
 481                 /*
 482                  * set node starting index for this node
 483                  */
 484                 indx = *ireg;
 485         }
 486
 487         ireg = (uint *)get_property(np, "reg", &ilen);
 488         if (!ireg)
 489                 panic("xics_init_IRQ: can't find interrupt reg property");
 490
 491         while (ilen) {
 492                 intnodes[indx].addr = (unsigned long)*ireg++ << 32;
 493                 ilen -= sizeof(uint);
 494                 intnodes[indx].addr |= *ireg++;
 495                 ilen -= sizeof(uint);
 496                 intnodes[indx].size = (unsigned long)*ireg++ << 32;
 497                 ilen -= sizeof(uint);
 498                 intnodes[indx].size |= *ireg++;
 499                 ilen -= sizeof(uint);
 500                 indx++;
 501                 if (indx >= NR_CPUS) break;
 502         }
 503
 504         np = of_find_node_by_type(np, "PowerPC-External-Interrupt-Presentation");
 505         if ((indx < NR_CPUS) && np) goto nextnode;
 506
 507         /* Find the server numbers for the boot cpu. */
 508         for (np = of_find_node_by_type(NULL, "cpu");
 509              np;
 510              np = of_find_node_by_type(np, "cpu")) {
 511                 ireg = (uint *)get_property(np, "reg", &ilen);
 512                 if (ireg && ireg[0] == boot_cpuid_phys) {
 513                         ireg = (uint *)get_property(np, "ibm,ppc-interrupt-gserver#s",
 514                                                     &ilen);
 515                         i = ilen / sizeof(int);
 516                         if (ireg && i > 0) {
 517                                 default_server = ireg[0];
 518                                 default_distrib_server = ireg[i-1]; /* take last element */
 519                         }
 520                         ireg = (uint *)get_property(np,
 521                                         "ibm,interrupt-server#-size", NULL);
 522                         if (ireg)
 523                                 interrupt_server_size = *ireg;
 524                         break;
 525                 }
 526         }
 527         of_node_put(np);
 528
 529         intr_base = intnodes[0].addr;
 530         intr_size = intnodes[0].size;
 531
 532         np = of_find_node_by_type(NULL, "interrupt-controller");
 533         if (!np) {
 534                 printk(KERN_WARNING "xics: no ISA interrupt controller\n");
 535                 xics_irq_8259_cascade_real = -1;
 536                 xics_irq_8259_cascade = -1;
 537         } else {
 538                 ireg = (uint *) get_property(np, "interrupts", NULL);
 539                 if (!ireg)
 540                         panic("xics_init_IRQ: can't find ISA interrupts property");
 541
 542                 xics_irq_8259_cascade_real = *ireg;
 543                 xics_irq_8259_cascade
 544                         = virt_irq_create_mapping(xics_irq_8259_cascade_real);
 545                 of_node_put(np);
 546         }
 547
 548         if (systemcfg->platform == PLATFORM_PSERIES) {
 549 #ifdef CONFIG_SMP
 550                 for_each_cpu(i) {
 551                         int hard_id;
 552
 553                         /* FIXME: Do this dynamically! --RR */
 554                         if (!cpu_present(i))
 555                                 continue;
 556
 557                         hard_id = get_hard_smp_processor_id(i);
 558                         xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
 559                                                   intnodes[hard_id].size);
 560                 }
 561 #else
 562                 xics_per_cpu[0] = ioremap(intr_base, intr_size);
 563 #endif /* CONFIG_SMP */
 564         } else if (systemcfg->platform == PLATFORM_PSERIES_LPAR) {
 565                 ops = &pSeriesLP_ops;
 566         }
 567
 568         xics_8259_pic.enable = i8259_pic.enable;
 569         xics_8259_pic.disable = i8259_pic.disable;
 570         for (i = 0; i < 16; ++i)
 571                 get_irq_desc(i)->handler = &xics_8259_pic;
 572         for (; i < NR_IRQS; ++i)
 573                 get_irq_desc(i)->handler = &xics_pic;
 574
 575         xics_setup_cpu();
 576
 577         ppc64_boot_msg(0x21, "XICS Done");
 578 }
 579
 580 /*
 581  * We cant do this in init_IRQ because we need the memory subsystem up for
 582  * request_irq()
 583  */
 584 static int __init xics_setup_i8259(void)
 585 {
 586         if (ppc64_interrupt_controller == IC_PPC_XIC &&
 587             xics_irq_8259_cascade != -1) {
 588                 if (request_irq(irq_offset_up(xics_irq_8259_cascade),
 589                                 no_action, 0, "8259 cascade", NULL))
 590                         printk(KERN_ERR "xics_setup_i8259: couldn't get 8259 "
 591                                         "cascade\n");
 592                 i8259_init(0);
 593         }
 594         return 0;
 595 }
 596 arch_initcall(xics_setup_i8259);
 597
 598 #ifdef CONFIG_SMP
 599 void xics_request_IPIs(void)
 600 {
 601         virt_irq_to_real_map[XICS_IPI] = XICS_IPI;
 602
 603         /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */
 604         request_irq(irq_offset_up(XICS_IPI), xics_ipi_action, SA_INTERRUPT,
 605                     "IPI", NULL);
 606         get_irq_desc(irq_offset_up(XICS_IPI))->status |= IRQ_PER_CPU;
 607 }
 608 #endif
 609
 610 static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
 611 {
 612         unsigned int irq;
 613         int status;
 614         int xics_status[2];
 615         unsigned long newmask;
 616         cpumask_t tmp = CPU_MASK_NONE;
 617
 618         irq = virt_irq_to_real(irq_offset_down(virq));
 619         if (irq == XICS_IPI || irq == NO_IRQ)
 620                 return;
 621
 622         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 623
 624         if (status) {
 625                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
 626                        "returns %d\n", irq, status);
 627                 return;
 628         }
 629
 630         /* For the moment only implement delivery to all cpus or one cpu */
 631         if (cpus_equal(cpumask, CPU_MASK_ALL)) {
 632                 newmask = default_distrib_server;
 633         } else {
 634                 cpus_and(tmp, cpu_online_map, cpumask);
 635                 if (cpus_empty(tmp))
 636                         return;
 637                 newmask = get_hard_smp_processor_id(first_cpu(tmp));
 638         }
 639
 640         status = rtas_call(ibm_set_xive, 3, 1, NULL,
 641                                 irq, newmask, xics_status[1]);
 642
 643         if (status) {
 644                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
 645                        "returns %d\n", irq, status);
 646                 return;
 647         }
 648 }
 649
 650 void xics_teardown_cpu(int secondary)
 651 {
 652         int cpu = smp_processor_id();
 653
 654         ops->cppr_info(cpu, 0x00);
 655         iosync();
 656
 657         /*
 658          * Some machines need to have at least one cpu in the GIQ,
 659          * so leave the master cpu in the group.
 660          */
 661         if (secondary) {
 662                 /*
 663                  * we need to EOI the IPI if we got here from kexec down IPI
 664                  *
 665                  * probably need to check all the other interrupts too
 666                  * should we be flagging idle loop instead?
 667                  * or creating some task to be scheduled?
 668                  */
 669                 ops->xirr_info_set(cpu, XICS_IPI);
 670                 rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
 671                         (1UL << interrupt_server_size) - 1 -
 672                         default_distrib_server, 0);
 673         }
 674 }
 675
 676 #ifdef CONFIG_HOTPLUG_CPU
 677
 678 /* Interrupts are disabled. */
 679 void xics_migrate_irqs_away(void)
 680 {
 681         int status;
 682         unsigned int irq, virq, cpu = smp_processor_id();
 683
 684         /* Reject any interrupt that was queued to us... */
 685         ops->cppr_info(cpu, 0);
 686         iosync();
 687
 688         /* remove ourselves from the global interrupt queue */
 689         status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
 690                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
 691         WARN_ON(status < 0);
 692
 693         /* Allow IPIs again... */
 694         ops->cppr_info(cpu, DEFAULT_PRIORITY);
 695         iosync();
 696
 697         for_each_irq(virq) {
 698                 irq_desc_t *desc;
 699                 int xics_status[2];
 700                 unsigned long flags;
 701
 702                 /* We cant set affinity on ISA interrupts */
 703                 if (virq < irq_offset_value())
 704                         continue;
 705
 706                 desc = get_irq_desc(virq);
 707                 irq = virt_irq_to_real(irq_offset_down(virq));
 708
 709                 /* We need to get IPIs still. */
 710                 if (irq == XICS_IPI || irq == NO_IRQ)
 711                         continue;
 712
 713                 /* We only need to migrate enabled IRQS */
 714                 if (desc == NULL || desc->handler == NULL
 715                     || desc->action == NULL
 716                     || desc->handler->set_affinity == NULL)
 717                         continue;
 718
 719                 spin_lock_irqsave(&desc->lock, flags);
 720
 721                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 722                 if (status) {
 723                         printk(KERN_ERR "migrate_irqs_away: irq=%u "
 724                                         "ibm,get-xive returns %d\n",
 725                                         virq, status);
 726                         goto unlock;
 727                 }
 728
 729                 /*
 730                  * We only support delivery to all cpus or to one cpu.
 731                  * The irq has to be migrated only in the single cpu
 732                  * case.
 733                  */
 734                 if (xics_status[0] != get_hard_smp_processor_id(cpu))
 735                         goto unlock;
 736
 737                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
 738                        virq, cpu);
 739
 740                 /* Reset affinity to all cpus */
 741                 desc->handler->set_affinity(virq, CPU_MASK_ALL);
 742                 irq_affinity[virq] = CPU_MASK_ALL;
 743 unlock:
 744                 spin_unlock_irqrestore(&desc->lock, flags);
 745         }
 746 }
 747 #endif