git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-3945-core.h"
  43 #include "iwl-3945.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-3945-rs.h"
  46
  47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  48         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  49                                     IWL_RATE_##r##M_IEEE,   \
  50                                     IWL_RATE_##ip##M_INDEX, \
  51                                     IWL_RATE_##in##M_INDEX, \
  52                                     IWL_RATE_##rp##M_INDEX, \
  53                                     IWL_RATE_##rn##M_INDEX, \
  54                                     IWL_RATE_##pp##M_INDEX, \
  55                                     IWL_RATE_##np##M_INDEX, \
  56                                     IWL_RATE_##r##M_INDEX_TABLE, \
  57                                     IWL_RATE_##ip##M_INDEX_TABLE }
  58
  59 /*
  60  * Parameter order:
  61  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  62  *
  63  * If there isn't a valid next or previous rate then INV is used which
  64  * maps to IWL_RATE_INVALID
  65  *
  66  */
  67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  68         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  69         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  70         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  71         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  72         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  73         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  74         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  75         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  76         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  77         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  78         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  79         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80 };
  81
  82 /* 1 = enable the iwl3945_disable_events() function */
  83 #define IWL_EVT_DISABLE (0)
  84 #define IWL_EVT_DISABLE_SIZE (1532/32)
  85
  86 /**
  87  * iwl3945_disable_events - Disable selected events in uCode event log
  88  *
  89  * Disable an event by writing "1"s into "disable"
  90  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  91  *   Default values of 0 enable uCode events to be logged.
  92  * Use for only special debugging.  This function is just a placeholder as-is,
  93  *   you'll need to provide the special bits! ...
  94  *   ... and set IWL_EVT_DISABLE to 1. */
  95 void iwl3945_disable_events(struct iwl3945_priv *priv)
  96 {
  97         int ret;
  98         int i;
  99         u32 base;               /* SRAM address of event log header */
 100         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 101         u32 array_size;         /* # of u32 entries in array */
 102         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 103                 0x00000000,     /*   31 -    0  Event id numbers */
 104                 0x00000000,     /*   63 -   32 */
 105                 0x00000000,     /*   95 -   64 */
 106                 0x00000000,     /*  127 -   96 */
 107                 0x00000000,     /*  159 -  128 */
 108                 0x00000000,     /*  191 -  160 */
 109                 0x00000000,     /*  223 -  192 */
 110                 0x00000000,     /*  255 -  224 */
 111                 0x00000000,     /*  287 -  256 */
 112                 0x00000000,     /*  319 -  288 */
 113                 0x00000000,     /*  351 -  320 */
 114                 0x00000000,     /*  383 -  352 */
 115                 0x00000000,     /*  415 -  384 */
 116                 0x00000000,     /*  447 -  416 */
 117                 0x00000000,     /*  479 -  448 */
 118                 0x00000000,     /*  511 -  480 */
 119                 0x00000000,     /*  543 -  512 */
 120                 0x00000000,     /*  575 -  544 */
 121                 0x00000000,     /*  607 -  576 */
 122                 0x00000000,     /*  639 -  608 */
 123                 0x00000000,     /*  671 -  640 */
 124                 0x00000000,     /*  703 -  672 */
 125                 0x00000000,     /*  735 -  704 */
 126                 0x00000000,     /*  767 -  736 */
 127                 0x00000000,     /*  799 -  768 */
 128                 0x00000000,     /*  831 -  800 */
 129                 0x00000000,     /*  863 -  832 */
 130                 0x00000000,     /*  895 -  864 */
 131                 0x00000000,     /*  927 -  896 */
 132                 0x00000000,     /*  959 -  928 */
 133                 0x00000000,     /*  991 -  960 */
 134                 0x00000000,     /* 1023 -  992 */
 135                 0x00000000,     /* 1055 - 1024 */
 136                 0x00000000,     /* 1087 - 1056 */
 137                 0x00000000,     /* 1119 - 1088 */
 138                 0x00000000,     /* 1151 - 1120 */
 139                 0x00000000,     /* 1183 - 1152 */
 140                 0x00000000,     /* 1215 - 1184 */
 141                 0x00000000,     /* 1247 - 1216 */
 142                 0x00000000,     /* 1279 - 1248 */
 143                 0x00000000,     /* 1311 - 1280 */
 144                 0x00000000,     /* 1343 - 1312 */
 145                 0x00000000,     /* 1375 - 1344 */
 146                 0x00000000,     /* 1407 - 1376 */
 147                 0x00000000,     /* 1439 - 1408 */
 148                 0x00000000,     /* 1471 - 1440 */
 149                 0x00000000,     /* 1503 - 1472 */
 150         };
 151
 152         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 153         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 154                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 155                 return;
 156         }
 157
 158         ret = iwl3945_grab_nic_access(priv);
 159         if (ret) {
 160                 IWL_WARNING("Can not read from adapter at this time.\n");
 161                 return;
 162         }
 163
 164         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 165         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 166         iwl3945_release_nic_access(priv);
 167
 168         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 169                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 170                                disable_ptr);
 171                 ret = iwl3945_grab_nic_access(priv);
 172                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 173                         iwl3945_write_targ_mem(priv,
 174                                            disable_ptr + (i * sizeof(u32)),
 175                                            evt_disable[i]);
 176
 177                 iwl3945_release_nic_access(priv);
 178         } else {
 179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 182                                disable_ptr, array_size);
 183         }
 184
 185 }
 186
 187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 188 {
 189         int idx;
 190
 191         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 192                 if (iwl3945_rates[idx].plcp == plcp)
 193                         return idx;
 194         return -1;
 195 }
 196
 197 /**
 198  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 199  * @priv: eeprom and antenna fields are used to determine antenna flags
 200  *
 201  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 202  * priv->antenna specifies the antenna diversity mode:
 203  *
 204  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 205  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 206  * IWL_ANTENNA_AUX       - Force AUX antenna
 207  */
 208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 209 {
 210         switch (priv->antenna) {
 211         case IWL_ANTENNA_DIVERSITY:
 212                 return 0;
 213
 214         case IWL_ANTENNA_MAIN:
 215                 if (priv->eeprom.antenna_switch_type)
 216                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 217                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 218
 219         case IWL_ANTENNA_AUX:
 220                 if (priv->eeprom.antenna_switch_type)
 221                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 222                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 223         }
 224
 225         /* bad antenna selector value */
 226         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 227         return 0;               /* "diversity" is default if error */
 228 }
 229
 230 #ifdef CONFIG_IWL3945_DEBUG
 231 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 232
 233 static const char *iwl3945_get_tx_fail_reason(u32 status)
 234 {
 235         switch (status & TX_STATUS_MSK) {
 236         case TX_STATUS_SUCCESS:
 237                 return "SUCCESS";
 238                 TX_STATUS_ENTRY(SHORT_LIMIT);
 239                 TX_STATUS_ENTRY(LONG_LIMIT);
 240                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 241                 TX_STATUS_ENTRY(MGMNT_ABORT);
 242                 TX_STATUS_ENTRY(NEXT_FRAG);
 243                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 244                 TX_STATUS_ENTRY(DEST_PS);
 245                 TX_STATUS_ENTRY(ABORTED);
 246                 TX_STATUS_ENTRY(BT_RETRY);
 247                 TX_STATUS_ENTRY(STA_INVALID);
 248                 TX_STATUS_ENTRY(FRAG_DROPPED);
 249                 TX_STATUS_ENTRY(TID_DISABLE);
 250                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 251                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 252                 TX_STATUS_ENTRY(TX_LOCKED);
 253                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 254         }
 255
 256         return "UNKNOWN";
 257 }
 258 #else
 259 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 260 {
 261         return "";
 262 }
 263 #endif
 264
 265
 266 /**
 267  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 268  *
 269  * When FW advances 'R' index, all entries between old and new 'R' index
 270  * need to be reclaimed. As result, some free space forms. If there is
 271  * enough free space (> low mark), wake the stack that feeds us.
 272  */
 273 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 274                                      int txq_id, int index)
 275 {
 276         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 277         struct iwl3945_queue *q = &txq->q;
 278         struct iwl3945_tx_info *tx_info;
 279
 280         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 281
 282         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 283                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 284
 285                 tx_info = &txq->txb[txq->q.read_ptr];
 286                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0],
 287                                             &tx_info->status);
 288                 tx_info->skb[0] = NULL;
 289                 iwl3945_hw_txq_free_tfd(priv, txq);
 290         }
 291
 292         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 293                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 294                         priv->mac80211_registered)
 295                 ieee80211_wake_queue(priv->hw, txq_id);
 296 }
 297
 298 /**
 299  * iwl3945_rx_reply_tx - Handle Tx response
 300  */
 301 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 302                             struct iwl3945_rx_mem_buffer *rxb)
 303 {
 304         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 305         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 306         int txq_id = SEQ_TO_QUEUE(sequence);
 307         int index = SEQ_TO_INDEX(sequence);
 308         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 309         struct ieee80211_tx_status *tx_status;
 310         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 311         u32  status = le32_to_cpu(tx_resp->status);
 312         int rate_idx;
 313
 314         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 315                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 316                           "is out of range [0-%d] %d %d\n", txq_id,
 317                           index, txq->q.n_bd, txq->q.write_ptr,
 318                           txq->q.read_ptr);
 319                 return;
 320         }
 321
 322         tx_status = &(txq->txb[txq->q.read_ptr].status);
 323
 324         tx_status->retry_count = tx_resp->failure_frame;
 325         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 326         tx_status->flags = ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 327                                 IEEE80211_TX_STATUS_ACK : 0;
 328
 329         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 330                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 331                         tx_resp->rate, tx_resp->failure_frame);
 332
 333         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 334         tx_status->control.tx_rate = &priv->ieee_rates[rate_idx];
 335         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 336         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 337
 338         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 339                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 340 }
 341
 342
 343
 344 /*****************************************************************************
 345  *
 346  * Intel PRO/Wireless 3945ABG/BG Network Connection
 347  *
 348  *  RX handler implementations
 349  *
 350  *****************************************************************************/
 351
 352 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 353 {
 354         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 355         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 356                      (int)sizeof(struct iwl3945_notif_statistics),
 357                      le32_to_cpu(pkt->len));
 358
 359         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 360
 361         priv->last_statistics_time = jiffies;
 362 }
 363
 364 /******************************************************************************
 365  *
 366  * Misc. internal state and helper functions
 367  *
 368  ******************************************************************************/
 369 #ifdef CONFIG_IWL3945_DEBUG
 370
 371 /**
 372  * iwl3945_report_frame - dump frame to syslog during debug sessions
 373  *
 374  * You may hack this function to show different aspects of received frames,
 375  * including selective frame dumps.
 376  * group100 parameter selects whether to show 1 out of 100 good frames.
 377  */
 378 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 379                       struct iwl3945_rx_packet *pkt,
 380                       struct ieee80211_hdr *header, int group100)
 381 {
 382         u32 to_us;
 383         u32 print_summary = 0;
 384         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 385         u32 hundred = 0;
 386         u32 dataframe = 0;
 387         u16 fc;
 388         u16 seq_ctl;
 389         u16 channel;
 390         u16 phy_flags;
 391         u16 length;
 392         u16 status;
 393         u16 bcn_tmr;
 394         u32 tsf_low;
 395         u64 tsf;
 396         u8 rssi;
 397         u8 agc;
 398         u16 sig_avg;
 399         u16 noise_diff;
 400         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 401         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 402         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 403         u8 *data = IWL_RX_DATA(pkt);
 404
 405         /* MAC header */
 406         fc = le16_to_cpu(header->frame_control);
 407         seq_ctl = le16_to_cpu(header->seq_ctrl);
 408
 409         /* metadata */
 410         channel = le16_to_cpu(rx_hdr->channel);
 411         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 412         length = le16_to_cpu(rx_hdr->len);
 413
 414         /* end-of-frame status and timestamp */
 415         status = le32_to_cpu(rx_end->status);
 416         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 417         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 418         tsf = le64_to_cpu(rx_end->timestamp);
 419
 420         /* signal statistics */
 421         rssi = rx_stats->rssi;
 422         agc = rx_stats->agc;
 423         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 424         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 425
 426         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 427
 428         /* if data frame is to us and all is good,
 429          *   (optionally) print summary for only 1 out of every 100 */
 430         if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
 431             (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 432                 dataframe = 1;
 433                 if (!group100)
 434                         print_summary = 1;      /* print each frame */
 435                 else if (priv->framecnt_to_us < 100) {
 436                         priv->framecnt_to_us++;
 437                         print_summary = 0;
 438                 } else {
 439                         priv->framecnt_to_us = 0;
 440                         print_summary = 1;
 441                         hundred = 1;
 442                 }
 443         } else {
 444                 /* print summary for all other frames */
 445                 print_summary = 1;
 446         }
 447
 448         if (print_summary) {
 449                 char *title;
 450                 u32 rate;
 451
 452                 if (hundred)
 453                         title = "100Frames";
 454                 else if (fc & IEEE80211_FCTL_RETRY)
 455                         title = "Retry";
 456                 else if (ieee80211_is_assoc_response(fc))
 457                         title = "AscRsp";
 458                 else if (ieee80211_is_reassoc_response(fc))
 459                         title = "RasRsp";
 460                 else if (ieee80211_is_probe_response(fc)) {
 461                         title = "PrbRsp";
 462                         print_dump = 1; /* dump frame contents */
 463                 } else if (ieee80211_is_beacon(fc)) {
 464                         title = "Beacon";
 465                         print_dump = 1; /* dump frame contents */
 466                 } else if (ieee80211_is_atim(fc))
 467                         title = "ATIM";
 468                 else if (ieee80211_is_auth(fc))
 469                         title = "Auth";
 470                 else if (ieee80211_is_deauth(fc))
 471                         title = "DeAuth";
 472                 else if (ieee80211_is_disassoc(fc))
 473                         title = "DisAssoc";
 474                 else
 475                         title = "Frame";
 476
 477                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 478                 if (rate == -1)
 479                         rate = 0;
 480                 else
 481                         rate = iwl3945_rates[rate].ieee / 2;
 482
 483                 /* print frame summary.
 484                  * MAC addresses show just the last byte (for brevity),
 485                  *    but you can hack it to show more, if you'd like to. */
 486                 if (dataframe)
 487                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 488                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 489                                      title, fc, header->addr1[5],
 490                                      length, rssi, channel, rate);
 491                 else {
 492                         /* src/dst addresses assume managed mode */
 493                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 494                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 495                                      "phy=0x%02x, chnl=%d\n",
 496                                      title, fc, header->addr1[5],
 497                                      header->addr3[5], rssi,
 498                                      tsf_low - priv->scan_start_tsf,
 499                                      phy_flags, channel);
 500                 }
 501         }
 502         if (print_dump)
 503                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 504 }
 505 #else
 506 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 507                       struct iwl3945_rx_packet *pkt,
 508                       struct ieee80211_hdr *header, int group100)
 509 {
 510 }
 511 #endif
 512
 513
 514 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
 515                                  struct sk_buff *skb,
 516                                  struct iwl3945_rx_frame_hdr *rx_hdr,
 517                                  struct ieee80211_rx_status *stats)
 518 {
 519         /* First cache any information we need before we overwrite
 520          * the information provided in the skb from the hardware */
 521         s8 signal = stats->ssi;
 522         s8 noise = 0;
 523         int rate = stats->rate_idx;
 524         u64 tsf = stats->mactime;
 525         __le16 phy_flags_hw = rx_hdr->phy_flags;
 526
 527         struct iwl3945_rt_rx_hdr {
 528                 struct ieee80211_radiotap_header rt_hdr;
 529                 __le64 rt_tsf;          /* TSF */
 530                 u8 rt_flags;            /* radiotap packet flags */
 531                 u8 rt_rate;             /* rate in 500kb/s */
 532                 __le16 rt_channelMHz;   /* channel in MHz */
 533                 __le16 rt_chbitmask;    /* channel bitfield */
 534                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
 535                 s8 rt_dbmnoise;
 536                 u8 rt_antenna;          /* antenna number */
 537         } __attribute__ ((packed)) *iwl3945_rt;
 538
 539         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
 540                 if (net_ratelimit())
 541                         printk(KERN_ERR "not enough headroom [%d] for "
 542                                "radiotap head [%zd]\n",
 543                                skb_headroom(skb), sizeof(*iwl3945_rt));
 544                 return;
 545         }
 546
 547         /* put radiotap header in front of 802.11 header and data */
 548         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
 549
 550         /* initialise radiotap header */
 551         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
 552         iwl3945_rt->rt_hdr.it_pad = 0;
 553
 554         /* total header + data */
 555         put_unaligned(cpu_to_le16(sizeof(*iwl3945_rt)),
 556                       &iwl3945_rt->rt_hdr.it_len);
 557
 558         /* Indicate all the fields we add to the radiotap header */
 559         put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
 560                                   (1 << IEEE80211_RADIOTAP_FLAGS) |
 561                                   (1 << IEEE80211_RADIOTAP_RATE) |
 562                                   (1 << IEEE80211_RADIOTAP_CHANNEL) |
 563                                   (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
 564                                   (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
 565                                   (1 << IEEE80211_RADIOTAP_ANTENNA)),
 566                       &iwl3945_rt->rt_hdr.it_present);
 567
 568         /* Zero the flags, we'll add to them as we go */
 569         iwl3945_rt->rt_flags = 0;
 570
 571         put_unaligned(cpu_to_le64(tsf), &iwl3945_rt->rt_tsf);
 572
 573         iwl3945_rt->rt_dbmsignal = signal;
 574         iwl3945_rt->rt_dbmnoise = noise;
 575
 576         /* Convert the channel frequency and set the flags */
 577         put_unaligned(cpu_to_le16(stats->freq), &iwl3945_rt->rt_channelMHz);
 578         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
 579                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
 580                                           IEEE80211_CHAN_5GHZ),
 581                               &iwl3945_rt->rt_chbitmask);
 582         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
 583                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
 584                                           IEEE80211_CHAN_2GHZ),
 585                               &iwl3945_rt->rt_chbitmask);
 586         else    /* 802.11g */
 587                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
 588                                           IEEE80211_CHAN_2GHZ),
 589                               &iwl3945_rt->rt_chbitmask);
 590
 591         if (rate == -1)
 592                 iwl3945_rt->rt_rate = 0;
 593         else
 594                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
 595
 596         /* antenna number */
 597         iwl3945_rt->rt_antenna =
 598                 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 599
 600         /* set the preamble flag if we have it */
 601         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 602                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 603
 604         stats->flag |= RX_FLAG_RADIOTAP;
 605 }
 606
 607 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
 608                                    struct iwl3945_rx_mem_buffer *rxb,
 609                                    struct ieee80211_rx_status *stats)
 610 {
 611         struct ieee80211_hdr *hdr;
 612         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 613         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 614         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 615         short len = le16_to_cpu(rx_hdr->len);
 616
 617         /* We received data from the HW, so stop the watchdog */
 618         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 619                 IWL_DEBUG_DROP("Corruption detected!\n");
 620                 return;
 621         }
 622
 623         /* We only process data packets if the interface is open */
 624         if (unlikely(!priv->is_open)) {
 625                 IWL_DEBUG_DROP_LIMIT
 626                     ("Dropping packet while interface is not open.\n");
 627                 return;
 628         }
 629
 630         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 631         /* Set the size of the skb to the size of the frame */
 632         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 633
 634         hdr = (void *)rxb->skb->data;
 635
 636         if (iwl3945_param_hwcrypto)
 637                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 638                                        le32_to_cpu(rx_end->status), stats);
 639
 640         if (priv->add_radiotap)
 641                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
 642
 643         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 644         rxb->skb = NULL;
 645 }
 646
 647 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 648
 649 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 650                                 struct iwl3945_rx_mem_buffer *rxb)
 651 {
 652         struct ieee80211_hdr *header;
 653         struct ieee80211_rx_status rx_status;
 654         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 655         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 656         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 657         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 658         int snr;
 659         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 660         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 661         u8 network_packet;
 662
 663         rx_status.antenna = 0;
 664         rx_status.flag = 0;
 665         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 666         rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel));
 667         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 668                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 669
 670         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 671
 672         if (rx_status.band == IEEE80211_BAND_5GHZ)
 673                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 674
 675         if ((unlikely(rx_stats->phy_count > 20))) {
 676                 IWL_DEBUG_DROP
 677                     ("dsp size out of range [0,20]: "
 678                      "%d/n", rx_stats->phy_count);
 679                 return;
 680         }
 681
 682         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 683             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 684                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 685                 return;
 686         }
 687
 688         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 689                 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
 690                 return;
 691         }
 692
 693         /* Convert 3945's rssi indicator to dBm */
 694         rx_status.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 695
 696         /* Set default noise value to -127 */
 697         if (priv->last_rx_noise == 0)
 698                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 699
 700         /* 3945 provides noise info for OFDM frames only.
 701          * sig_avg and noise_diff are measured by the 3945's digital signal
 702          *   processor (DSP), and indicate linear levels of signal level and
 703          *   distortion/noise within the packet preamble after
 704          *   automatic gain control (AGC).  sig_avg should stay fairly
 705          *   constant if the radio's AGC is working well.
 706          * Since these values are linear (not dB or dBm), linear
 707          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 708          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 709          *   to obtain noise level in dBm.
 710          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 711         if (rx_stats_noise_diff) {
 712                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 713                 rx_status.noise = rx_status.ssi -
 714                                         iwl3945_calc_db_from_ratio(snr);
 715                 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi,
 716                                                          rx_status.noise);
 717
 718         /* If noise info not available, calculate signal quality indicator (%)
 719          *   using just the dBm signal level. */
 720         } else {
 721                 rx_status.noise = priv->last_rx_noise;
 722                 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi, 0);
 723         }
 724
 725
 726         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 727                         rx_status.ssi, rx_status.noise, rx_status.signal,
 728                         rx_stats_sig_avg, rx_stats_noise_diff);
 729
 730         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 731
 732         network_packet = iwl3945_is_network_packet(priv, header);
 733
 734         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 735                               network_packet ? '*' : ' ',
 736                               le16_to_cpu(rx_hdr->channel),
 737                               rx_status.ssi, rx_status.ssi,
 738                               rx_status.ssi, rx_status.rate_idx);
 739
 740 #ifdef CONFIG_IWL3945_DEBUG
 741         if (iwl3945_debug_level & (IWL_DL_RX))
 742                 /* Set "1" to report good data frames in groups of 100 */
 743                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 744 #endif
 745
 746         if (network_packet) {
 747                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 748                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 749                 priv->last_rx_rssi = rx_status.ssi;
 750                 priv->last_rx_noise = rx_status.noise;
 751         }
 752
 753         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 754         case IEEE80211_FTYPE_MGMT:
 755                 switch (le16_to_cpu(header->frame_control) &
 756                         IEEE80211_FCTL_STYPE) {
 757                 case IEEE80211_STYPE_PROBE_RESP:
 758                 case IEEE80211_STYPE_BEACON:{
 759                                 /* If this is a beacon or probe response for
 760                                  * our network then cache the beacon
 761                                  * timestamp */
 762                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 763                                       && !compare_ether_addr(header->addr2,
 764                                                              priv->bssid)) ||
 765                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 766                                       && !compare_ether_addr(header->addr3,
 767                                                              priv->bssid)))) {
 768                                         struct ieee80211_mgmt *mgmt =
 769                                             (struct ieee80211_mgmt *)header;
 770                                         __le32 *pos;
 771                                         pos =
 772                                             (__le32 *) & mgmt->u.beacon.
 773                                             timestamp;
 774                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 775                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 776                                         priv->beacon_int = le16_to_cpu(
 777                                             mgmt->u.beacon.beacon_int);
 778                                         if (priv->call_post_assoc_from_beacon &&
 779                                             (priv->iw_mode ==
 780                                                 IEEE80211_IF_TYPE_STA))
 781                                                 queue_work(priv->workqueue,
 782                                                     &priv->post_associate.work);
 783
 784                                         priv->call_post_assoc_from_beacon = 0;
 785                                 }
 786
 787                                 break;
 788                         }
 789
 790                 case IEEE80211_STYPE_ACTION:
 791                         /* TODO: Parse 802.11h frames for CSA... */
 792                         break;
 793
 794                         /*
 795                          * TODO: Use the new callback function from
 796                          * mac80211 instead of sniffing these packets.
 797                          */
 798                 case IEEE80211_STYPE_ASSOC_RESP:
 799                 case IEEE80211_STYPE_REASSOC_RESP:{
 800                                 struct ieee80211_mgmt *mgnt =
 801                                     (struct ieee80211_mgmt *)header;
 802
 803                                 /* We have just associated, give some
 804                                  * time for the 4-way handshake if
 805                                  * any. Don't start scan too early. */
 806                                 priv->next_scan_jiffies = jiffies +
 807                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 808
 809                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 810                                                   le16_to_cpu(mgnt->u.
 811                                                               assoc_resp.aid));
 812                                 priv->assoc_capability =
 813                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 814                                 if (priv->beacon_int)
 815                                         queue_work(priv->workqueue,
 816                                             &priv->post_associate.work);
 817                                 else
 818                                         priv->call_post_assoc_from_beacon = 1;
 819                                 break;
 820                         }
 821
 822                 case IEEE80211_STYPE_PROBE_REQ:{
 823                                 DECLARE_MAC_BUF(mac1);
 824                                 DECLARE_MAC_BUF(mac2);
 825                                 DECLARE_MAC_BUF(mac3);
 826                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 827                                         IWL_DEBUG_DROP
 828                                             ("Dropping (non network): %s"
 829                                              ", %s, %s\n",
 830                                              print_mac(mac1, header->addr1),
 831                                              print_mac(mac2, header->addr2),
 832                                              print_mac(mac3, header->addr3));
 833                                 return;
 834                         }
 835                 }
 836
 837                 iwl3945_handle_data_packet(priv, 0, rxb, &rx_status);
 838                 break;
 839
 840         case IEEE80211_FTYPE_CTL:
 841                 break;
 842
 843         case IEEE80211_FTYPE_DATA: {
 844                 DECLARE_MAC_BUF(mac1);
 845                 DECLARE_MAC_BUF(mac2);
 846                 DECLARE_MAC_BUF(mac3);
 847
 848                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
 849                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 850                                        print_mac(mac1, header->addr1),
 851                                        print_mac(mac2, header->addr2),
 852                                        print_mac(mac3, header->addr3));
 853                 else
 854                         iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
 855                 break;
 856         }
 857         }
 858 }
 859
 860 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 861                                  dma_addr_t addr, u16 len)
 862 {
 863         int count;
 864         u32 pad;
 865         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 866
 867         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 868         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 869
 870         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 871                 IWL_ERROR("Error can not send more than %d chunks\n",
 872                           NUM_TFD_CHUNKS);
 873                 return -EINVAL;
 874         }
 875
 876         tfd->pa[count].addr = cpu_to_le32(addr);
 877         tfd->pa[count].len = cpu_to_le32(len);
 878
 879         count++;
 880
 881         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 882                                          TFD_CTL_PAD_SET(pad));
 883
 884         return 0;
 885 }
 886
 887 /**
 888  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 889  *
 890  * Does NOT advance any indexes
 891  */
 892 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 893 {
 894         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 895         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 896         struct pci_dev *dev = priv->pci_dev;
 897         int i;
 898         int counter;
 899
 900         /* classify bd */
 901         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 902                 /* nothing to cleanup after for host commands */
 903                 return 0;
 904
 905         /* sanity check */
 906         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 907         if (counter > NUM_TFD_CHUNKS) {
 908                 IWL_ERROR("Too many chunks: %i\n", counter);
 909                 /* @todo issue fatal error, it is quite serious situation */
 910                 return 0;
 911         }
 912
 913         /* unmap chunks if any */
 914
 915         for (i = 1; i < counter; i++) {
 916                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 917                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 918                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 919                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 920                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 921                                 /* Can be called from interrupt context */
 922                                 dev_kfree_skb_any(skb);
 923                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 924                         }
 925                 }
 926         }
 927         return 0;
 928 }
 929
 930 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 931 {
 932         int i;
 933         int ret = IWL_INVALID_STATION;
 934         unsigned long flags;
 935         DECLARE_MAC_BUF(mac);
 936
 937         spin_lock_irqsave(&priv->sta_lock, flags);
 938         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 939                 if ((priv->stations[i].used) &&
 940                     (!compare_ether_addr
 941                      (priv->stations[i].sta.sta.addr, addr))) {
 942                         ret = i;
 943                         goto out;
 944                 }
 945
 946         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 947                        print_mac(mac, addr), priv->num_stations);
 948  out:
 949         spin_unlock_irqrestore(&priv->sta_lock, flags);
 950         return ret;
 951 }
 952
 953 /**
 954  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 955  *
 956 */
 957 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 958                               struct iwl3945_cmd *cmd,
 959                               struct ieee80211_tx_control *ctrl,
 960                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 961 {
 962         unsigned long flags;
 963         u16 rate_index = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
 964         u16 rate_mask;
 965         int rate;
 966         u8 rts_retry_limit;
 967         u8 data_retry_limit;
 968         __le32 tx_flags;
 969         u16 fc = le16_to_cpu(hdr->frame_control);
 970
 971         rate = iwl3945_rates[rate_index].plcp;
 972         tx_flags = cmd->cmd.tx.tx_flags;
 973
 974         /* We need to figure out how to get the sta->supp_rates while
 975          * in this running context; perhaps encoding into ctrl->tx_rate? */
 976         rate_mask = IWL_RATES_MASK;
 977
 978         spin_lock_irqsave(&priv->sta_lock, flags);
 979
 980         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 981
 982         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 983             (sta_id != priv->hw_setting.bcast_sta_id) &&
 984                 (sta_id != IWL_MULTICAST_ID))
 985                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 986
 987         spin_unlock_irqrestore(&priv->sta_lock, flags);
 988
 989         if (tx_id >= IWL_CMD_QUEUE_NUM)
 990                 rts_retry_limit = 3;
 991         else
 992                 rts_retry_limit = 7;
 993
 994         if (ieee80211_is_probe_response(fc)) {
 995                 data_retry_limit = 3;
 996                 if (data_retry_limit < rts_retry_limit)
 997                         rts_retry_limit = data_retry_limit;
 998         } else
 999                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1000
1001         if (priv->data_retry_limit != -1)
1002                 data_retry_limit = priv->data_retry_limit;
1003
1004         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1005                 switch (fc & IEEE80211_FCTL_STYPE) {
1006                 case IEEE80211_STYPE_AUTH:
1007                 case IEEE80211_STYPE_DEAUTH:
1008                 case IEEE80211_STYPE_ASSOC_REQ:
1009                 case IEEE80211_STYPE_REASSOC_REQ:
1010                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1011                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1012                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
1013                         }
1014                         break;
1015                 default:
1016                         break;
1017                 }
1018         }
1019
1020         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1021         cmd->cmd.tx.data_retry_limit = data_retry_limit;
1022         cmd->cmd.tx.rate = rate;
1023         cmd->cmd.tx.tx_flags = tx_flags;
1024
1025         /* OFDM */
1026         cmd->cmd.tx.supp_rates[0] =
1027            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1028
1029         /* CCK */
1030         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1031
1032         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1033                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1034                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1035                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1036 }
1037
1038 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1039 {
1040         unsigned long flags_spin;
1041         struct iwl3945_station_entry *station;
1042
1043         if (sta_id == IWL_INVALID_STATION)
1044                 return IWL_INVALID_STATION;
1045
1046         spin_lock_irqsave(&priv->sta_lock, flags_spin);
1047         station = &priv->stations[sta_id];
1048
1049         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1050         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1051         station->current_rate.rate_n_flags = tx_rate;
1052         station->sta.mode = STA_CONTROL_MODIFY_MSK;
1053
1054         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1055
1056         iwl3945_send_add_station(priv, &station->sta, flags);
1057         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1058                         sta_id, tx_rate);
1059         return sta_id;
1060 }
1061
1062 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1063 {
1064         int rc;
1065         unsigned long flags;
1066
1067         spin_lock_irqsave(&priv->lock, flags);
1068         rc = iwl3945_grab_nic_access(priv);
1069         if (rc) {
1070                 spin_unlock_irqrestore(&priv->lock, flags);
1071                 return rc;
1072         }
1073
1074         if (!pwr_max) {
1075                 u32 val;
1076
1077                 rc = pci_read_config_dword(priv->pci_dev,
1078                                 PCI_POWER_SOURCE, &val);
1079                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1080                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1081                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1082                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
1083                         iwl3945_release_nic_access(priv);
1084
1085                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
1086                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1087                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1088                 } else
1089                         iwl3945_release_nic_access(priv);
1090         } else {
1091                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1092                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1093                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
1094
1095                 iwl3945_release_nic_access(priv);
1096                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1097                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
1098         }
1099         spin_unlock_irqrestore(&priv->lock, flags);
1100
1101         return rc;
1102 }
1103
1104 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1105 {
1106         int rc;
1107         unsigned long flags;
1108
1109         spin_lock_irqsave(&priv->lock, flags);
1110         rc = iwl3945_grab_nic_access(priv);
1111         if (rc) {
1112                 spin_unlock_irqrestore(&priv->lock, flags);
1113                 return rc;
1114         }
1115
1116         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1117         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1118                              priv->hw_setting.shared_phys +
1119                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1120         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1121         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1122                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1123                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1124                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1125                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1126                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1127                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1128                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1129                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1130
1131         /* fake read to flush all prev I/O */
1132         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1133
1134         iwl3945_release_nic_access(priv);
1135         spin_unlock_irqrestore(&priv->lock, flags);
1136
1137         return 0;
1138 }
1139
1140 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1141 {
1142         int rc;
1143         unsigned long flags;
1144
1145         spin_lock_irqsave(&priv->lock, flags);
1146         rc = iwl3945_grab_nic_access(priv);
1147         if (rc) {
1148                 spin_unlock_irqrestore(&priv->lock, flags);
1149                 return rc;
1150         }
1151
1152         /* bypass mode */
1153         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1154
1155         /* RA 0 is active */
1156         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1157
1158         /* all 6 fifo are active */
1159         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1160
1161         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1162         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1163         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1164         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1165
1166         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1167                              priv->hw_setting.shared_phys);
1168
1169         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1170                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1171                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1172                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1173                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1174                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1175                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1176                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1177
1178         iwl3945_release_nic_access(priv);
1179         spin_unlock_irqrestore(&priv->lock, flags);
1180
1181         return 0;
1182 }
1183
1184 /**
1185  * iwl3945_txq_ctx_reset - Reset TX queue context
1186  *
1187  * Destroys all DMA structures and initialize them again
1188  */
1189 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1190 {
1191         int rc;
1192         int txq_id, slots_num;
1193
1194         iwl3945_hw_txq_ctx_free(priv);
1195
1196         /* Tx CMD queue */
1197         rc = iwl3945_tx_reset(priv);
1198         if (rc)
1199                 goto error;
1200
1201         /* Tx queue(s) */
1202         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1203                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1204                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1205                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1206                                 txq_id);
1207                 if (rc) {
1208                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1209                         goto error;
1210                 }
1211         }
1212
1213         return rc;
1214
1215  error:
1216         iwl3945_hw_txq_ctx_free(priv);
1217         return rc;
1218 }
1219
1220 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1221 {
1222         u8 rev_id;
1223         int rc;
1224         unsigned long flags;
1225         struct iwl3945_rx_queue *rxq = &priv->rxq;
1226
1227         iwl3945_power_init_handle(priv);
1228
1229         spin_lock_irqsave(&priv->lock, flags);
1230         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
1231         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1232                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1233
1234         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1235         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1236                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1237                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1238         if (rc < 0) {
1239                 spin_unlock_irqrestore(&priv->lock, flags);
1240                 IWL_DEBUG_INFO("Failed to init the card\n");
1241                 return rc;
1242         }
1243
1244         rc = iwl3945_grab_nic_access(priv);
1245         if (rc) {
1246                 spin_unlock_irqrestore(&priv->lock, flags);
1247                 return rc;
1248         }
1249         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1250                                  APMG_CLK_VAL_DMA_CLK_RQT |
1251                                  APMG_CLK_VAL_BSM_CLK_RQT);
1252         udelay(20);
1253         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1254                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1255         iwl3945_release_nic_access(priv);
1256         spin_unlock_irqrestore(&priv->lock, flags);
1257
1258         /* Determine HW type */
1259         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1260         if (rc)
1261                 return rc;
1262         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1263
1264         iwl3945_nic_set_pwr_src(priv, 1);
1265         spin_lock_irqsave(&priv->lock, flags);
1266
1267         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1268                 IWL_DEBUG_INFO("RTP type \n");
1269         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1270                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1271                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1272                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1273         } else {
1274                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1275                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1276                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1277         }
1278
1279         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1280                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1281                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1282                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1283         } else
1284                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1285
1286         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1287                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1288                                priv->eeprom.board_revision);
1289                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1290                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1291         } else {
1292                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1293                                priv->eeprom.board_revision);
1294                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1295                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1296         }
1297
1298         if (priv->eeprom.almgor_m_version <= 1) {
1299                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1300                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1301                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1302                                priv->eeprom.almgor_m_version);
1303         } else {
1304                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1305                                priv->eeprom.almgor_m_version);
1306                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1307                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1308         }
1309         spin_unlock_irqrestore(&priv->lock, flags);
1310
1311         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1312                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1313
1314         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1315                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1316
1317         /* Allocate the RX queue, or reset if it is already allocated */
1318         if (!rxq->bd) {
1319                 rc = iwl3945_rx_queue_alloc(priv);
1320                 if (rc) {
1321                         IWL_ERROR("Unable to initialize Rx queue\n");
1322                         return -ENOMEM;
1323                 }
1324         } else
1325                 iwl3945_rx_queue_reset(priv, rxq);
1326
1327         iwl3945_rx_replenish(priv);
1328
1329         iwl3945_rx_init(priv, rxq);
1330
1331         spin_lock_irqsave(&priv->lock, flags);
1332
1333         /* Look at using this instead:
1334         rxq->need_update = 1;
1335         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1336         */
1337
1338         rc = iwl3945_grab_nic_access(priv);
1339         if (rc) {
1340                 spin_unlock_irqrestore(&priv->lock, flags);
1341                 return rc;
1342         }
1343         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1344         iwl3945_release_nic_access(priv);
1345
1346         spin_unlock_irqrestore(&priv->lock, flags);
1347
1348         rc = iwl3945_txq_ctx_reset(priv);
1349         if (rc)
1350                 return rc;
1351
1352         set_bit(STATUS_INIT, &priv->status);
1353
1354         return 0;
1355 }
1356
1357 /**
1358  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1359  *
1360  * Destroy all TX DMA queues and structures
1361  */
1362 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1363 {
1364         int txq_id;
1365
1366         /* Tx queues */
1367         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1368                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1369 }
1370
1371 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1372 {
1373         int queue;
1374         unsigned long flags;
1375
1376         spin_lock_irqsave(&priv->lock, flags);
1377         if (iwl3945_grab_nic_access(priv)) {
1378                 spin_unlock_irqrestore(&priv->lock, flags);
1379                 iwl3945_hw_txq_ctx_free(priv);
1380                 return;
1381         }
1382
1383         /* stop SCD */
1384         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1385
1386         /* reset TFD queues */
1387         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1388                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1389                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1390                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1391                                 1000);
1392         }
1393
1394         iwl3945_release_nic_access(priv);
1395         spin_unlock_irqrestore(&priv->lock, flags);
1396
1397         iwl3945_hw_txq_ctx_free(priv);
1398 }
1399
1400 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1401 {
1402         int rc = 0;
1403         u32 reg_val;
1404         unsigned long flags;
1405
1406         spin_lock_irqsave(&priv->lock, flags);
1407
1408         /* set stop master bit */
1409         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1410
1411         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1412
1413         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1414             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1415                 IWL_DEBUG_INFO("Card in power save, master is already "
1416                                "stopped\n");
1417         else {
1418                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1419                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1420                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1421                 if (rc < 0) {
1422                         spin_unlock_irqrestore(&priv->lock, flags);
1423                         return rc;
1424                 }
1425         }
1426
1427         spin_unlock_irqrestore(&priv->lock, flags);
1428         IWL_DEBUG_INFO("stop master\n");
1429
1430         return rc;
1431 }
1432
1433 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1434 {
1435         int rc;
1436         unsigned long flags;
1437
1438         iwl3945_hw_nic_stop_master(priv);
1439
1440         spin_lock_irqsave(&priv->lock, flags);
1441
1442         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1443
1444         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1445                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1446                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1447
1448         rc = iwl3945_grab_nic_access(priv);
1449         if (!rc) {
1450                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1451                                          APMG_CLK_VAL_BSM_CLK_RQT);
1452
1453                 udelay(10);
1454
1455                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1456                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1457
1458                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1459                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1460                                         0xFFFFFFFF);
1461
1462                 /* enable DMA */
1463                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1464                                          APMG_CLK_VAL_DMA_CLK_RQT |
1465                                          APMG_CLK_VAL_BSM_CLK_RQT);
1466                 udelay(10);
1467
1468                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1469                                 APMG_PS_CTRL_VAL_RESET_REQ);
1470                 udelay(5);
1471                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1472                                 APMG_PS_CTRL_VAL_RESET_REQ);
1473                 iwl3945_release_nic_access(priv);
1474         }
1475
1476         /* Clear the 'host command active' bit... */
1477         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1478
1479         wake_up_interruptible(&priv->wait_command_queue);
1480         spin_unlock_irqrestore(&priv->lock, flags);
1481
1482         return rc;
1483 }
1484
1485 /**
1486  * iwl3945_hw_reg_adjust_power_by_temp
1487  * return index delta into power gain settings table
1488 */
1489 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1490 {
1491         return (new_reading - old_reading) * (-11) / 100;
1492 }
1493
1494 /**
1495  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1496  */
1497 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1498 {
1499         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1500 }
1501
1502 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1503 {
1504         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1505 }
1506
1507 /**
1508  * iwl3945_hw_reg_txpower_get_temperature
1509  * get the current temperature by reading from NIC
1510 */
1511 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1512 {
1513         int temperature;
1514
1515         temperature = iwl3945_hw_get_temperature(priv);
1516
1517         /* driver's okay range is -260 to +25.
1518          *   human readable okay range is 0 to +285 */
1519         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1520
1521         /* handle insane temp reading */
1522         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1523                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1524
1525                 /* if really really hot(?),
1526                  *   substitute the 3rd band/group's temp measured at factory */
1527                 if (priv->last_temperature > 100)
1528                         temperature = priv->eeprom.groups[2].temperature;
1529                 else /* else use most recent "sane" value from driver */
1530                         temperature = priv->last_temperature;
1531         }
1532
1533         return temperature;     /* raw, not "human readable" */
1534 }
1535
1536 /* Adjust Txpower only if temperature variance is greater than threshold.
1537  *
1538  * Both are lower than older versions' 9 degrees */
1539 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1540
1541 /**
1542  * is_temp_calib_needed - determines if new calibration is needed
1543  *
1544  * records new temperature in tx_mgr->temperature.
1545  * replaces tx_mgr->last_temperature *only* if calib needed
1546  *    (assumes caller will actually do the calibration!). */
1547 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1548 {
1549         int temp_diff;
1550
1551         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1552         temp_diff = priv->temperature - priv->last_temperature;
1553
1554         /* get absolute value */
1555         if (temp_diff < 0) {
1556                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1557                 temp_diff = -temp_diff;
1558         } else if (temp_diff == 0)
1559                 IWL_DEBUG_POWER("Same temp,\n");
1560         else
1561                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1562
1563         /* if we don't need calibration, *don't* update last_temperature */
1564         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1565                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1566                 return 0;
1567         }
1568
1569         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1570
1571         /* assume that caller will actually do calib ...
1572          *   update the "last temperature" value */
1573         priv->last_temperature = priv->temperature;
1574         return 1;
1575 }
1576
1577 #define IWL_MAX_GAIN_ENTRIES 78
1578 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1579 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1580
1581 /* radio and DSP power table, each step is 1/2 dB.
1582  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1583 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1584         {
1585          {251, 127},            /* 2.4 GHz, highest power */
1586          {251, 127},
1587          {251, 127},
1588          {251, 127},
1589          {251, 125},
1590          {251, 110},
1591          {251, 105},
1592          {251, 98},
1593          {187, 125},
1594          {187, 115},
1595          {187, 108},
1596          {187, 99},
1597          {243, 119},
1598          {243, 111},
1599          {243, 105},
1600          {243, 97},
1601          {243, 92},
1602          {211, 106},
1603          {211, 100},
1604          {179, 120},
1605          {179, 113},
1606          {179, 107},
1607          {147, 125},
1608          {147, 119},
1609          {147, 112},
1610          {147, 106},
1611          {147, 101},
1612          {147, 97},
1613          {147, 91},
1614          {115, 107},
1615          {235, 121},
1616          {235, 115},
1617          {235, 109},
1618          {203, 127},
1619          {203, 121},
1620          {203, 115},
1621          {203, 108},
1622          {203, 102},
1623          {203, 96},
1624          {203, 92},
1625          {171, 110},
1626          {171, 104},
1627          {171, 98},
1628          {139, 116},
1629          {227, 125},
1630          {227, 119},
1631          {227, 113},
1632          {227, 107},
1633          {227, 101},
1634          {227, 96},
1635          {195, 113},
1636          {195, 106},
1637          {195, 102},
1638          {195, 95},
1639          {163, 113},
1640          {163, 106},
1641          {163, 102},
1642          {163, 95},
1643          {131, 113},
1644          {131, 106},
1645          {131, 102},
1646          {131, 95},
1647          {99, 113},
1648          {99, 106},
1649          {99, 102},
1650          {99, 95},
1651          {67, 113},
1652          {67, 106},
1653          {67, 102},
1654          {67, 95},
1655          {35, 113},
1656          {35, 106},
1657          {35, 102},
1658          {35, 95},
1659          {3, 113},
1660          {3, 106},
1661          {3, 102},
1662          {3, 95} },             /* 2.4 GHz, lowest power */
1663         {
1664          {251, 127},            /* 5.x GHz, highest power */
1665          {251, 120},
1666          {251, 114},
1667          {219, 119},
1668          {219, 101},
1669          {187, 113},
1670          {187, 102},
1671          {155, 114},
1672          {155, 103},
1673          {123, 117},
1674          {123, 107},
1675          {123, 99},
1676          {123, 92},
1677          {91, 108},
1678          {59, 125},
1679          {59, 118},
1680          {59, 109},
1681          {59, 102},
1682          {59, 96},
1683          {59, 90},
1684          {27, 104},
1685          {27, 98},
1686          {27, 92},
1687          {115, 118},
1688          {115, 111},
1689          {115, 104},
1690          {83, 126},
1691          {83, 121},
1692          {83, 113},
1693          {83, 105},
1694          {83, 99},
1695          {51, 118},
1696          {51, 111},
1697          {51, 104},
1698          {51, 98},
1699          {19, 116},
1700          {19, 109},
1701          {19, 102},
1702          {19, 98},
1703          {19, 93},
1704          {171, 113},
1705          {171, 107},
1706          {171, 99},
1707          {139, 120},
1708          {139, 113},
1709          {139, 107},
1710          {139, 99},
1711          {107, 120},
1712          {107, 113},
1713          {107, 107},
1714          {107, 99},
1715          {75, 120},
1716          {75, 113},
1717          {75, 107},
1718          {75, 99},
1719          {43, 120},
1720          {43, 113},
1721          {43, 107},
1722          {43, 99},
1723          {11, 120},
1724          {11, 113},
1725          {11, 107},
1726          {11, 99},
1727          {131, 107},
1728          {131, 99},
1729          {99, 120},
1730          {99, 113},
1731          {99, 107},
1732          {99, 99},
1733          {67, 120},
1734          {67, 113},
1735          {67, 107},
1736          {67, 99},
1737          {35, 120},
1738          {35, 113},
1739          {35, 107},
1740          {35, 99},
1741          {3, 120} }             /* 5.x GHz, lowest power */
1742 };
1743
1744 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1745 {
1746         if (index < 0)
1747                 return 0;
1748         if (index >= IWL_MAX_GAIN_ENTRIES)
1749                 return IWL_MAX_GAIN_ENTRIES - 1;
1750         return (u8) index;
1751 }
1752
1753 /* Kick off thermal recalibration check every 60 seconds */
1754 #define REG_RECALIB_PERIOD (60)
1755
1756 /**
1757  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1758  *
1759  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1760  * or 6 Mbit (OFDM) rates.
1761  */
1762 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1763                                s32 rate_index, const s8 *clip_pwrs,
1764                                struct iwl3945_channel_info *ch_info,
1765                                int band_index)
1766 {
1767         struct iwl3945_scan_power_info *scan_power_info;
1768         s8 power;
1769         u8 power_index;
1770
1771         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1772
1773         /* use this channel group's 6Mbit clipping/saturation pwr,
1774          *   but cap at regulatory scan power restriction (set during init
1775          *   based on eeprom channel data) for this channel.  */
1776         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1777
1778         /* further limit to user's max power preference.
1779          * FIXME:  Other spectrum management power limitations do not
1780          *   seem to apply?? */
1781         power = min(power, priv->user_txpower_limit);
1782         scan_power_info->requested_power = power;
1783
1784         /* find difference between new scan *power* and current "normal"
1785          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1786          *   current "normal" temperature-compensated Tx power *index* for
1787          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1788          *   *index*. */
1789         power_index = ch_info->power_info[rate_index].power_table_index
1790             - (power - ch_info->power_info
1791                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1792
1793         /* store reference index that we use when adjusting *all* scan
1794          *   powers.  So we can accommodate user (all channel) or spectrum
1795          *   management (single channel) power changes "between" temperature
1796          *   feedback compensation procedures.
1797          * don't force fit this reference index into gain table; it may be a
1798          *   negative number.  This will help avoid errors when we're at
1799          *   the lower bounds (highest gains, for warmest temperatures)
1800          *   of the table. */
1801
1802         /* don't exceed table bounds for "real" setting */
1803         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1804
1805         scan_power_info->power_table_index = power_index;
1806         scan_power_info->tpc.tx_gain =
1807             power_gain_table[band_index][power_index].tx_gain;
1808         scan_power_info->tpc.dsp_atten =
1809             power_gain_table[band_index][power_index].dsp_atten;
1810 }
1811
1812 /**
1813  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1814  *
1815  * Configures power settings for all rates for the current channel,
1816  * using values from channel info struct, and send to NIC
1817  */
1818 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1819 {
1820         int rate_idx, i;
1821         const struct iwl3945_channel_info *ch_info = NULL;
1822         struct iwl3945_txpowertable_cmd txpower = {
1823                 .channel = priv->active_rxon.channel,
1824         };
1825
1826         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1827         ch_info = iwl3945_get_channel_info(priv,
1828                                        priv->band,
1829                                        le16_to_cpu(priv->active_rxon.channel));
1830         if (!ch_info) {
1831                 IWL_ERROR
1832                     ("Failed to get channel info for channel %d [%d]\n",
1833                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1834                 return -EINVAL;
1835         }
1836
1837         if (!is_channel_valid(ch_info)) {
1838                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1839                                 "non-Tx channel.\n");
1840                 return 0;
1841         }
1842
1843         /* fill cmd with power settings for all rates for current channel */
1844         /* Fill OFDM rate */
1845         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1846              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1847
1848                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1849                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1850
1851                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1852                                 le16_to_cpu(txpower.channel),
1853                                 txpower.band,
1854                                 txpower.power[i].tpc.tx_gain,
1855                                 txpower.power[i].tpc.dsp_atten,
1856                                 txpower.power[i].rate);
1857         }
1858         /* Fill CCK rates */
1859         for (rate_idx = IWL_FIRST_CCK_RATE;
1860              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1861                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1862                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1863
1864                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1865                                 le16_to_cpu(txpower.channel),
1866                                 txpower.band,
1867                                 txpower.power[i].tpc.tx_gain,
1868                                 txpower.power[i].tpc.dsp_atten,
1869                                 txpower.power[i].rate);
1870         }
1871
1872         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1873                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1874
1875 }
1876
1877 /**
1878  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1879  * @ch_info: Channel to update.  Uses power_info.requested_power.
1880  *
1881  * Replace requested_power and base_power_index ch_info fields for
1882  * one channel.
1883  *
1884  * Called if user or spectrum management changes power preferences.
1885  * Takes into account h/w and modulation limitations (clip power).
1886  *
1887  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1888  *
1889  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1890  *       properly fill out the scan powers, and actual h/w gain settings,
1891  *       and send changes to NIC
1892  */
1893 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1894                              struct iwl3945_channel_info *ch_info)
1895 {
1896         struct iwl3945_channel_power_info *power_info;
1897         int power_changed = 0;
1898         int i;
1899         const s8 *clip_pwrs;
1900         int power;
1901
1902         /* Get this chnlgrp's rate-to-max/clip-powers table */
1903         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1904
1905         /* Get this channel's rate-to-current-power settings table */
1906         power_info = ch_info->power_info;
1907
1908         /* update OFDM Txpower settings */
1909         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1910              i++, ++power_info) {
1911                 int delta_idx;
1912
1913                 /* limit new power to be no more than h/w capability */
1914                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1915                 if (power == power_info->requested_power)
1916                         continue;
1917
1918                 /* find difference between old and new requested powers,
1919                  *    update base (non-temp-compensated) power index */
1920                 delta_idx = (power - power_info->requested_power) * 2;
1921                 power_info->base_power_index -= delta_idx;
1922
1923                 /* save new requested power value */
1924                 power_info->requested_power = power;
1925
1926                 power_changed = 1;
1927         }
1928
1929         /* update CCK Txpower settings, based on OFDM 12M setting ...
1930          *    ... all CCK power settings for a given channel are the *same*. */
1931         if (power_changed) {
1932                 power =
1933                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1934                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1935
1936                 /* do all CCK rates' iwl3945_channel_power_info structures */
1937                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1938                         power_info->requested_power = power;
1939                         power_info->base_power_index =
1940                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1941                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1942                         ++power_info;
1943                 }
1944         }
1945
1946         return 0;
1947 }
1948
1949 /**
1950  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1951  *
1952  * NOTE: Returned power limit may be less (but not more) than requested,
1953  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1954  *       (no consideration for h/w clipping limitations).
1955  */
1956 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1957 {
1958         s8 max_power;
1959
1960 #if 0
1961         /* if we're using TGd limits, use lower of TGd or EEPROM */
1962         if (ch_info->tgd_data.max_power != 0)
1963                 max_power = min(ch_info->tgd_data.max_power,
1964                                 ch_info->eeprom.max_power_avg);
1965
1966         /* else just use EEPROM limits */
1967         else
1968 #endif
1969                 max_power = ch_info->eeprom.max_power_avg;
1970
1971         return min(max_power, ch_info->max_power_avg);
1972 }
1973
1974 /**
1975  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1976  *
1977  * Compensate txpower settings of *all* channels for temperature.
1978  * This only accounts for the difference between current temperature
1979  *   and the factory calibration temperatures, and bases the new settings
1980  *   on the channel's base_power_index.
1981  *
1982  * If RxOn is "associated", this sends the new Txpower to NIC!
1983  */
1984 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1985 {
1986         struct iwl3945_channel_info *ch_info = NULL;
1987         int delta_index;
1988         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1989         u8 a_band;
1990         u8 rate_index;
1991         u8 scan_tbl_index;
1992         u8 i;
1993         int ref_temp;
1994         int temperature = priv->temperature;
1995
1996         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1997         for (i = 0; i < priv->channel_count; i++) {
1998                 ch_info = &priv->channel_info[i];
1999                 a_band = is_channel_a_band(ch_info);
2000
2001                 /* Get this chnlgrp's factory calibration temperature */
2002                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2003                     temperature;
2004
2005                 /* get power index adjustment based on curr and factory
2006                  * temps */
2007                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2008                                                               ref_temp);
2009
2010                 /* set tx power value for all rates, OFDM and CCK */
2011                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2012                      rate_index++) {
2013                         int power_idx =
2014                             ch_info->power_info[rate_index].base_power_index;
2015
2016                         /* temperature compensate */
2017                         power_idx += delta_index;
2018
2019                         /* stay within table range */
2020                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2021                         ch_info->power_info[rate_index].
2022                             power_table_index = (u8) power_idx;
2023                         ch_info->power_info[rate_index].tpc =
2024                             power_gain_table[a_band][power_idx];
2025                 }
2026
2027                 /* Get this chnlgrp's rate-to-max/clip-powers table */
2028                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2029
2030                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2031                 for (scan_tbl_index = 0;
2032                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2033                         s32 actual_index = (scan_tbl_index == 0) ?
2034                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2035                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2036                                            actual_index, clip_pwrs,
2037                                            ch_info, a_band);
2038                 }
2039         }
2040
2041         /* send Txpower command for current channel to ucode */
2042         return iwl3945_hw_reg_send_txpower(priv);
2043 }
2044
2045 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2046 {
2047         struct iwl3945_channel_info *ch_info;
2048         s8 max_power;
2049         u8 a_band;
2050         u8 i;
2051
2052         if (priv->user_txpower_limit == power) {
2053                 IWL_DEBUG_POWER("Requested Tx power same as current "
2054                                 "limit: %ddBm.\n", power);
2055                 return 0;
2056         }
2057
2058         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2059         priv->user_txpower_limit = power;
2060
2061         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2062
2063         for (i = 0; i < priv->channel_count; i++) {
2064                 ch_info = &priv->channel_info[i];
2065                 a_band = is_channel_a_band(ch_info);
2066
2067                 /* find minimum power of all user and regulatory constraints
2068                  *    (does not consider h/w clipping limitations) */
2069                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2070                 max_power = min(power, max_power);
2071                 if (max_power != ch_info->curr_txpow) {
2072                         ch_info->curr_txpow = max_power;
2073
2074                         /* this considers the h/w clipping limitations */
2075                         iwl3945_hw_reg_set_new_power(priv, ch_info);
2076                 }
2077         }
2078
2079         /* update txpower settings for all channels,
2080          *   send to NIC if associated. */
2081         is_temp_calib_needed(priv);
2082         iwl3945_hw_reg_comp_txpower_temp(priv);
2083
2084         return 0;
2085 }
2086
2087 /* will add 3945 channel switch cmd handling later */
2088 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2089 {
2090         return 0;
2091 }
2092
2093 /**
2094  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
2095  *
2096  * -- reset periodic timer
2097  * -- see if temp has changed enough to warrant re-calibration ... if so:
2098  *     -- correct coeffs for temp (can reset temp timer)
2099  *     -- save this temp as "last",
2100  *     -- send new set of gain settings to NIC
2101  * NOTE:  This should continue working, even when we're not associated,
2102  *   so we can keep our internal table of scan powers current. */
2103 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2104 {
2105         /* This will kick in the "brute force"
2106          * iwl3945_hw_reg_comp_txpower_temp() below */
2107         if (!is_temp_calib_needed(priv))
2108                 goto reschedule;
2109
2110         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2111          * This is based *only* on current temperature,
2112          * ignoring any previous power measurements */
2113         iwl3945_hw_reg_comp_txpower_temp(priv);
2114
2115  reschedule:
2116         queue_delayed_work(priv->workqueue,
2117                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2118 }
2119
2120 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2121 {
2122         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2123                                              thermal_periodic.work);
2124
2125         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2126                 return;
2127
2128         mutex_lock(&priv->mutex);
2129         iwl3945_reg_txpower_periodic(priv);
2130         mutex_unlock(&priv->mutex);
2131 }
2132
2133 /**
2134  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2135  *                                 for the channel.
2136  *
2137  * This function is used when initializing channel-info structs.
2138  *
2139  * NOTE: These channel groups do *NOT* match the bands above!
2140  *       These channel groups are based on factory-tested channels;
2141  *       on A-band, EEPROM's "group frequency" entries represent the top
2142  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2143  */
2144 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2145                                        const struct iwl3945_channel_info *ch_info)
2146 {
2147         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2148         u8 group;
2149         u16 group_index = 0;    /* based on factory calib frequencies */
2150         u8 grp_channel;
2151
2152         /* Find the group index for the channel ... don't use index 1(?) */
2153         if (is_channel_a_band(ch_info)) {
2154                 for (group = 1; group < 5; group++) {
2155                         grp_channel = ch_grp[group].group_channel;
2156                         if (ch_info->channel <= grp_channel) {
2157                                 group_index = group;
2158                                 break;
2159                         }
2160                 }
2161                 /* group 4 has a few channels *above* its factory cal freq */
2162                 if (group == 5)
2163                         group_index = 4;
2164         } else
2165                 group_index = 0;        /* 2.4 GHz, group 0 */
2166
2167         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2168                         group_index);
2169         return group_index;
2170 }
2171
2172 /**
2173  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2174  *
2175  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2176  *   into radio/DSP gain settings table for requested power.
2177  */
2178 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2179                                        s8 requested_power,
2180                                        s32 setting_index, s32 *new_index)
2181 {
2182         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2183         s32 index0, index1;
2184         s32 power = 2 * requested_power;
2185         s32 i;
2186         const struct iwl3945_eeprom_txpower_sample *samples;
2187         s32 gains0, gains1;
2188         s32 res;
2189         s32 denominator;
2190
2191         chnl_grp = &priv->eeprom.groups[setting_index];
2192         samples = chnl_grp->samples;
2193         for (i = 0; i < 5; i++) {
2194                 if (power == samples[i].power) {
2195                         *new_index = samples[i].gain_index;
2196                         return 0;
2197                 }
2198         }
2199
2200         if (power > samples[1].power) {
2201                 index0 = 0;
2202                 index1 = 1;
2203         } else if (power > samples[2].power) {
2204                 index0 = 1;
2205                 index1 = 2;
2206         } else if (power > samples[3].power) {
2207                 index0 = 2;
2208                 index1 = 3;
2209         } else {
2210                 index0 = 3;
2211                 index1 = 4;
2212         }
2213
2214         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2215         if (denominator == 0)
2216                 return -EINVAL;
2217         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2218         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2219         res = gains0 + (gains1 - gains0) *
2220             ((s32) power - (s32) samples[index0].power) / denominator +
2221             (1 << 18);
2222         *new_index = res >> 19;
2223         return 0;
2224 }
2225
2226 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2227 {
2228         u32 i;
2229         s32 rate_index;
2230         const struct iwl3945_eeprom_txpower_group *group;
2231
2232         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2233
2234         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2235                 s8 *clip_pwrs;  /* table of power levels for each rate */
2236                 s8 satur_pwr;   /* saturation power for each chnl group */
2237                 group = &priv->eeprom.groups[i];
2238
2239                 /* sanity check on factory saturation power value */
2240                 if (group->saturation_power < 40) {
2241                         IWL_WARNING("Error: saturation power is %d, "
2242                                     "less than minimum expected 40\n",
2243                                     group->saturation_power);
2244                         return;
2245                 }
2246
2247                 /*
2248                  * Derive requested power levels for each rate, based on
2249                  *   hardware capabilities (saturation power for band).
2250                  * Basic value is 3dB down from saturation, with further
2251                  *   power reductions for highest 3 data rates.  These
2252                  *   backoffs provide headroom for high rate modulation
2253                  *   power peaks, without too much distortion (clipping).
2254                  */
2255                 /* we'll fill in this array with h/w max power levels */
2256                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2257
2258                 /* divide factory saturation power by 2 to find -3dB level */
2259                 satur_pwr = (s8) (group->saturation_power >> 1);
2260
2261                 /* fill in channel group's nominal powers for each rate */
2262                 for (rate_index = 0;
2263                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2264                         switch (rate_index) {
2265                         case IWL_RATE_36M_INDEX_TABLE:
2266                                 if (i == 0)     /* B/G */
2267                                         *clip_pwrs = satur_pwr;
2268                                 else    /* A */
2269                                         *clip_pwrs = satur_pwr - 5;
2270                                 break;
2271                         case IWL_RATE_48M_INDEX_TABLE:
2272                                 if (i == 0)
2273                                         *clip_pwrs = satur_pwr - 7;
2274                                 else
2275                                         *clip_pwrs = satur_pwr - 10;
2276                                 break;
2277                         case IWL_RATE_54M_INDEX_TABLE:
2278                                 if (i == 0)
2279                                         *clip_pwrs = satur_pwr - 9;
2280                                 else
2281                                         *clip_pwrs = satur_pwr - 12;
2282                                 break;
2283                         default:
2284                                 *clip_pwrs = satur_pwr;
2285                                 break;
2286                         }
2287                 }
2288         }
2289 }
2290
2291 /**
2292  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2293  *
2294  * Second pass (during init) to set up priv->channel_info
2295  *
2296  * Set up Tx-power settings in our channel info database for each VALID
2297  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2298  * and current temperature.
2299  *
2300  * Since this is based on current temperature (at init time), these values may
2301  * not be valid for very long, but it gives us a starting/default point,
2302  * and allows us to active (i.e. using Tx) scan.
2303  *
2304  * This does *not* write values to NIC, just sets up our internal table.
2305  */
2306 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2307 {
2308         struct iwl3945_channel_info *ch_info = NULL;
2309         struct iwl3945_channel_power_info *pwr_info;
2310         int delta_index;
2311         u8 rate_index;
2312         u8 scan_tbl_index;
2313         const s8 *clip_pwrs;    /* array of power levels for each rate */
2314         u8 gain, dsp_atten;
2315         s8 power;
2316         u8 pwr_index, base_pwr_index, a_band;
2317         u8 i;
2318         int temperature;
2319
2320         /* save temperature reference,
2321          *   so we can determine next time to calibrate */
2322         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2323         priv->last_temperature = temperature;
2324
2325         iwl3945_hw_reg_init_channel_groups(priv);
2326
2327         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2328         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2329              i++, ch_info++) {
2330                 a_band = is_channel_a_band(ch_info);
2331                 if (!is_channel_valid(ch_info))
2332                         continue;
2333
2334                 /* find this channel's channel group (*not* "band") index */
2335                 ch_info->group_index =
2336                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2337
2338                 /* Get this chnlgrp's rate->max/clip-powers table */
2339                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2340
2341                 /* calculate power index *adjustment* value according to
2342                  *  diff between current temperature and factory temperature */
2343                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2344                                 priv->eeprom.groups[ch_info->group_index].
2345                                 temperature);
2346
2347                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2348                                 ch_info->channel, delta_index, temperature +
2349                                 IWL_TEMP_CONVERT);
2350
2351                 /* set tx power value for all OFDM rates */
2352                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2353                      rate_index++) {
2354                         s32 power_idx;
2355                         int rc;
2356
2357                         /* use channel group's clip-power table,
2358                          *   but don't exceed channel's max power */
2359                         s8 pwr = min(ch_info->max_power_avg,
2360                                      clip_pwrs[rate_index]);
2361
2362                         pwr_info = &ch_info->power_info[rate_index];
2363
2364                         /* get base (i.e. at factory-measured temperature)
2365                          *    power table index for this rate's power */
2366                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2367                                                          ch_info->group_index,
2368                                                          &power_idx);
2369                         if (rc) {
2370                                 IWL_ERROR("Invalid power index\n");
2371                                 return rc;
2372                         }
2373                         pwr_info->base_power_index = (u8) power_idx;
2374
2375                         /* temperature compensate */
2376                         power_idx += delta_index;
2377
2378                         /* stay within range of gain table */
2379                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2380
2381                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2382                         pwr_info->requested_power = pwr;
2383                         pwr_info->power_table_index = (u8) power_idx;
2384                         pwr_info->tpc.tx_gain =
2385                             power_gain_table[a_band][power_idx].tx_gain;
2386                         pwr_info->tpc.dsp_atten =
2387                             power_gain_table[a_band][power_idx].dsp_atten;
2388                 }
2389
2390                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2391                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2392                 power = pwr_info->requested_power +
2393                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2394                 pwr_index = pwr_info->power_table_index +
2395                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2396                 base_pwr_index = pwr_info->base_power_index +
2397                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2398
2399                 /* stay within table range */
2400                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2401                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2402                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2403
2404                 /* fill each CCK rate's iwl3945_channel_power_info structure
2405                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2406                  * NOTE:  CCK rates start at end of OFDM rates! */
2407                 for (rate_index = 0;
2408                      rate_index < IWL_CCK_RATES; rate_index++) {
2409                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2410                         pwr_info->requested_power = power;
2411                         pwr_info->power_table_index = pwr_index;
2412                         pwr_info->base_power_index = base_pwr_index;
2413                         pwr_info->tpc.tx_gain = gain;
2414                         pwr_info->tpc.dsp_atten = dsp_atten;
2415                 }
2416
2417                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2418                 for (scan_tbl_index = 0;
2419                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2420                         s32 actual_index = (scan_tbl_index == 0) ?
2421                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2422                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2423                                 actual_index, clip_pwrs, ch_info, a_band);
2424                 }
2425         }
2426
2427         return 0;
2428 }
2429
2430 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2431 {
2432         int rc;
2433         unsigned long flags;
2434
2435         spin_lock_irqsave(&priv->lock, flags);
2436         rc = iwl3945_grab_nic_access(priv);
2437         if (rc) {
2438                 spin_unlock_irqrestore(&priv->lock, flags);
2439                 return rc;
2440         }
2441
2442         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2443         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2444         if (rc < 0)
2445                 IWL_ERROR("Can't stop Rx DMA.\n");
2446
2447         iwl3945_release_nic_access(priv);
2448         spin_unlock_irqrestore(&priv->lock, flags);
2449
2450         return 0;
2451 }
2452
2453 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2454 {
2455         int rc;
2456         unsigned long flags;
2457         int txq_id = txq->q.id;
2458
2459         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2460
2461         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2462
2463         spin_lock_irqsave(&priv->lock, flags);
2464         rc = iwl3945_grab_nic_access(priv);
2465         if (rc) {
2466                 spin_unlock_irqrestore(&priv->lock, flags);
2467                 return rc;
2468         }
2469         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2470         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2471
2472         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2473                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2474                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2475                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2476                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2477                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2478         iwl3945_release_nic_access(priv);
2479
2480         /* fake read to flush all prev. writes */
2481         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2482         spin_unlock_irqrestore(&priv->lock, flags);
2483
2484         return 0;
2485 }
2486
2487 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2488 {
2489         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2490
2491         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2492 }
2493
2494 /**
2495  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2496  */
2497 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2498 {
2499         int rc, i, index, prev_index;
2500         struct iwl3945_rate_scaling_cmd rate_cmd = {
2501                 .reserved = {0, 0, 0},
2502         };
2503         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2504
2505         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2506                 index = iwl3945_rates[i].table_rs_index;
2507
2508                 table[index].rate_n_flags =
2509                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2510                 table[index].try_cnt = priv->retry_rate;
2511                 prev_index = iwl3945_get_prev_ieee_rate(i);
2512                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2513         }
2514
2515         switch (priv->band) {
2516         case IEEE80211_BAND_5GHZ:
2517                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2518                 /* If one of the following CCK rates is used,
2519                  * have it fall back to the 6M OFDM rate */
2520                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2521                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2522
2523                 /* Don't fall back to CCK rates */
2524                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2525
2526                 /* Don't drop out of OFDM rates */
2527                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2528                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2529                 break;
2530
2531         case IEEE80211_BAND_2GHZ:
2532                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2533                 /* If an OFDM rate is used, have it fall back to the
2534                  * 1M CCK rates */
2535                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2536                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2537
2538                 /* CCK shouldn't fall back to OFDM... */
2539                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2540                 break;
2541
2542         default:
2543                 WARN_ON(1);
2544                 break;
2545         }
2546
2547         /* Update the rate scaling for control frame Tx */
2548         rate_cmd.table_id = 0;
2549         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2550                               &rate_cmd);
2551         if (rc)
2552                 return rc;
2553
2554         /* Update the rate scaling for data frame Tx */
2555         rate_cmd.table_id = 1;
2556         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2557                                 &rate_cmd);
2558 }
2559
2560 /* Called when initializing driver */
2561 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2562 {
2563         memset((void *)&priv->hw_setting, 0,
2564                sizeof(struct iwl3945_driver_hw_info));
2565
2566         priv->hw_setting.shared_virt =
2567             pci_alloc_consistent(priv->pci_dev,
2568                                  sizeof(struct iwl3945_shared),
2569                                  &priv->hw_setting.shared_phys);
2570
2571         if (!priv->hw_setting.shared_virt) {
2572                 IWL_ERROR("failed to allocate pci memory\n");
2573                 mutex_unlock(&priv->mutex);
2574                 return -ENOMEM;
2575         }
2576
2577         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2578         priv->hw_setting.max_pkt_size = 2342;
2579         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2580         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2581         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2582         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2583         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2584
2585         priv->hw_setting.tx_ant_num = 2;
2586         return 0;
2587 }
2588
2589 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2590                           struct iwl3945_frame *frame, u8 rate)
2591 {
2592         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2593         unsigned int frame_size;
2594
2595         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2596         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2597
2598         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2599         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2600
2601         frame_size = iwl3945_fill_beacon_frame(priv,
2602                                 tx_beacon_cmd->frame,
2603                                 iwl3945_broadcast_addr,
2604                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2605
2606         BUG_ON(frame_size > MAX_MPDU_SIZE);
2607         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2608
2609         tx_beacon_cmd->tx.rate = rate;
2610         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2611                                       TX_CMD_FLG_TSF_MSK);
2612
2613         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2614         tx_beacon_cmd->tx.supp_rates[0] =
2615                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2616
2617         tx_beacon_cmd->tx.supp_rates[1] =
2618                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2619
2620         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2621 }
2622
2623 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2624 {
2625         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2626         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2627 }
2628
2629 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2630 {
2631         INIT_DELAYED_WORK(&priv->thermal_periodic,
2632                           iwl3945_bg_reg_txpower_periodic);
2633 }
2634
2635 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2636 {
2637         cancel_delayed_work(&priv->thermal_periodic);
2638 }
2639
2640 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2641         .name = "3945BG",
2642         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2643         .sku = IWL_SKU_G,
2644 };
2645
2646 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2647         .name = "3945ABG",
2648         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2649         .sku = IWL_SKU_A|IWL_SKU_G,
2650 };
2651
2652 struct pci_device_id iwl3945_hw_card_ids[] = {
2653         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2654         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2655         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2656         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2657         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2658         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2659         {0}
2660 };
2661
2662 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);