2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
7 #include <linux/sched.h>
8 #include <linux/highmem.h>
9 #include <linux/module.h>
10 #include <linux/slab.h>
11 #include <asm/uaccess.h>
12 #include <asm/processor.h>
13 #include <asm/tlbflush.h>
14 #include <asm/pgalloc.h>
15 #include <asm/sections.h>
17 static DEFINE_SPINLOCK(cpa_lock);
18 static struct list_head df_list = LIST_HEAD_INIT(df_list);
21 pte_t *lookup_address(unsigned long address)
23 pgd_t *pgd = pgd_offset_k(address);
28 pud = pud_offset(pgd, address);
31 pmd = pmd_offset(pud, address);
36 return pte_offset_kernel(pmd, address);
39 static struct page *split_large_page(unsigned long address, pgprot_t prot,
47 spin_unlock_irq(&cpa_lock);
48 base = alloc_pages(GFP_KERNEL, 0);
49 spin_lock_irq(&cpa_lock);
54 * page_private is used to track the number of entries in
55 * the page table page that have non standard attributes.
58 page_private(base) = 0;
60 address = __pa(address);
61 addr = address & LARGE_PAGE_MASK;
62 pbase = (pte_t *)page_address(base);
63 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
64 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE) {
65 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT,
66 addr == address ? prot : ref_prot));
71 static void cache_flush_page(struct page *p)
73 unsigned long adr = (unsigned long)page_address(p);
75 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
76 asm volatile("clflush (%0)" :: "r" (adr + i));
79 static void flush_kernel_map(void *arg)
81 struct list_head *lh = (struct list_head *)arg;
84 /* High level code is not ready for clflush yet */
85 if (0 && cpu_has_clflush) {
86 list_for_each_entry (p, lh, lru)
88 } else if (boot_cpu_data.x86_model >= 4)
91 /* Flush all to work around Errata in early athlons regarding
92 * large page flushing.
97 static void set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
102 set_pte_atomic(kpte, pte); /* change init_mm */
103 if (SHARED_KERNEL_PMD)
106 spin_lock_irqsave(&pgd_lock, flags);
107 for (page = pgd_list; page; page = (struct page *)page->index) {
111 pgd = (pgd_t *)page_address(page) + pgd_index(address);
112 pud = pud_offset(pgd, address);
113 pmd = pmd_offset(pud, address);
114 set_pte_atomic((pte_t *)pmd, pte);
116 spin_unlock_irqrestore(&pgd_lock, flags);
120 * No more special protections in this 2/4MB area - revert to a
123 static inline void revert_page(struct page *kpte_page, unsigned long address)
129 ((address & LARGE_PAGE_MASK) < (unsigned long)&_etext)
130 ? PAGE_KERNEL_LARGE_EXEC : PAGE_KERNEL_LARGE;
133 pmd_offset(pud_offset(pgd_offset_k(address), address), address);
134 set_pmd_pte(linear, address,
135 pfn_pte((__pa(address) & LARGE_PAGE_MASK) >> PAGE_SHIFT,
140 __change_page_attr(struct page *page, pgprot_t prot)
143 unsigned long address;
144 struct page *kpte_page;
146 BUG_ON(PageHighMem(page));
147 address = (unsigned long)page_address(page);
149 kpte = lookup_address(address);
152 kpte_page = virt_to_page(kpte);
153 if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL)) {
154 if (!pte_huge(*kpte)) {
155 set_pte_atomic(kpte, mk_pte(page, prot));
161 ((address & LARGE_PAGE_MASK) < (unsigned long)&_etext)
162 ? PAGE_KERNEL_EXEC : PAGE_KERNEL;
163 split = split_large_page(address, prot, ref_prot);
166 set_pmd_pte(kpte,address,mk_pte(split, ref_prot));
169 page_private(kpte_page)++;
170 } else if (!pte_huge(*kpte)) {
171 set_pte_atomic(kpte, mk_pte(page, PAGE_KERNEL));
172 BUG_ON(page_private(kpte_page) == 0);
173 page_private(kpte_page)--;
178 * If the pte was reserved, it means it was created at boot
179 * time (not via split_large_page) and in turn we must not
180 * replace it with a largepage.
182 if (!PageReserved(kpte_page)) {
183 if (cpu_has_pse && (page_private(kpte_page) == 0)) {
184 ClearPagePrivate(kpte_page);
185 paravirt_release_pt(page_to_pfn(kpte_page));
186 list_add(&kpte_page->lru, &df_list);
187 revert_page(kpte_page, address);
193 static inline void flush_map(struct list_head *l)
195 on_each_cpu(flush_kernel_map, l, 1, 1);
199 * Change the page attributes of an page in the linear mapping.
201 * This should be used when a page is mapped with a different caching policy
202 * than write-back somewhere - some CPUs do not like it when mappings with
203 * different caching policies exist. This changes the page attributes of the
204 * in kernel linear mapping too.
206 * The caller needs to ensure that there are no conflicting mappings elsewhere.
207 * This function only deals with the kernel linear map.
209 * Caller must call global_flush_tlb() after this.
211 int change_page_attr(struct page *page, int numpages, pgprot_t prot)
217 spin_lock_irqsave(&cpa_lock, flags);
218 for (i = 0; i < numpages; i++, page++) {
219 err = __change_page_attr(page, prot);
223 spin_unlock_irqrestore(&cpa_lock, flags);
227 void global_flush_tlb(void)
230 struct page *pg, *next;
232 BUG_ON(irqs_disabled());
234 spin_lock_irq(&cpa_lock);
235 list_replace_init(&df_list, &l);
236 spin_unlock_irq(&cpa_lock);
238 list_for_each_entry_safe(pg, next, &l, lru) {
243 #ifdef CONFIG_DEBUG_PAGEALLOC
244 void kernel_map_pages(struct page *page, int numpages, int enable)
246 if (PageHighMem(page))
249 debug_check_no_locks_freed(page_address(page),
250 numpages * PAGE_SIZE);
252 /* the return value is ignored - the calls cannot fail,
253 * large pages are disabled at boot time.
255 change_page_attr(page, numpages, enable ? PAGE_KERNEL : __pgprot(0));
256 /* we should perform an IPI and flush all tlbs,
257 * but that can deadlock->flush only current cpu.
263 EXPORT_SYMBOL(change_page_attr);
264 EXPORT_SYMBOL(global_flush_tlb);