2 * File: arch/blackfin/kernel/bfin_gpio.c
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
7 * Description: GPIO Abstraction Layer
10 * Copyright 2008 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
33 * GPIO_0 PF0 PF0 PF0 PA0...PJ13
43 * GPIO_10 PF10 PF10 PF10
44 * GPIO_11 PF11 PF11 PF11
45 * GPIO_12 PF12 PF12 PF12
46 * GPIO_13 PF13 PF13 PF13
47 * GPIO_14 PF14 PF14 PF14
48 * GPIO_15 PF15 PF15 PF15
83 #include <linux/delay.h>
84 #include <linux/module.h>
85 #include <linux/err.h>
86 #include <linux/proc_fs.h>
87 #include <asm/blackfin.h>
89 #include <asm/portmux.h>
90 #include <linux/irq.h>
92 #if ANOMALY_05000311 || ANOMALY_05000323
95 AWA_data_clear = SYSCR,
98 AWA_maska = BFIN_UART_SCR,
99 AWA_maska_clear = BFIN_UART_SCR,
100 AWA_maska_set = BFIN_UART_SCR,
101 AWA_maska_toggle = BFIN_UART_SCR,
102 AWA_maskb = BFIN_UART_GCTL,
103 AWA_maskb_clear = BFIN_UART_GCTL,
104 AWA_maskb_set = BFIN_UART_GCTL,
105 AWA_maskb_toggle = BFIN_UART_GCTL,
106 AWA_dir = SPORT1_STAT,
107 AWA_polar = SPORT1_STAT,
108 AWA_edge = SPORT1_STAT,
109 AWA_both = SPORT1_STAT,
111 AWA_inen = TIMER_ENABLE,
112 #elif ANOMALY_05000323
113 AWA_inen = DMA1_1_CONFIG,
116 /* Anomaly Workaround */
117 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
119 #define AWA_DUMMY_READ(...) do { } while (0)
122 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
123 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
124 (struct gpio_port_t *) FIO_FLAG_D,
128 #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
129 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
130 (struct gpio_port_t *) PORTFIO,
131 (struct gpio_port_t *) PORTGIO,
132 (struct gpio_port_t *) PORTHIO,
135 static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
136 (unsigned short *) PORTF_FER,
137 (unsigned short *) PORTG_FER,
138 (unsigned short *) PORTH_FER,
142 #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
143 static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
144 (unsigned short *) PORTF_MUX,
145 (unsigned short *) PORTG_MUX,
146 (unsigned short *) PORTH_MUX,
150 u8 pmux_offset[][16] =
151 {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
152 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
153 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
158 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
159 (struct gpio_port_t *) FIO0_FLAG_D,
160 (struct gpio_port_t *) FIO1_FLAG_D,
161 (struct gpio_port_t *) FIO2_FLAG_D,
166 static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
167 (struct gpio_port_t *)PORTA_FER,
168 (struct gpio_port_t *)PORTB_FER,
169 (struct gpio_port_t *)PORTC_FER,
170 (struct gpio_port_t *)PORTD_FER,
171 (struct gpio_port_t *)PORTE_FER,
172 (struct gpio_port_t *)PORTF_FER,
173 (struct gpio_port_t *)PORTG_FER,
174 (struct gpio_port_t *)PORTH_FER,
175 (struct gpio_port_t *)PORTI_FER,
176 (struct gpio_port_t *)PORTJ_FER,
180 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
181 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
183 #define RESOURCE_LABEL_SIZE 16
185 static struct str_ident {
186 char name[RESOURCE_LABEL_SIZE];
187 } str_ident[MAX_RESOURCES];
189 #if defined(CONFIG_PM)
190 #if defined(CONFIG_BF54x)
191 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
193 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
194 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
195 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
198 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
202 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
206 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB};
209 #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
210 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
214 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
217 #endif /* CONFIG_PM */
219 inline int check_gpio(unsigned gpio)
221 #if defined(BF548_FAMILY)
222 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
223 || gpio == GPIO_PH14 || gpio == GPIO_PH15
224 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
227 if (gpio >= MAX_BLACKFIN_GPIOS)
232 static void gpio_error(unsigned gpio)
234 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
237 static void set_label(unsigned short ident, const char *label)
240 strncpy(str_ident[ident].name, label,
241 RESOURCE_LABEL_SIZE);
242 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
246 static char *get_label(unsigned short ident)
248 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
251 static int cmp_label(unsigned short ident, const char *label)
255 printk(KERN_ERR "Please provide none-null label\n");
259 return strcmp(str_ident[ident].name, label);
264 static void port_setup(unsigned gpio, unsigned short usage)
266 if (check_gpio(gpio))
269 #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
270 if (usage == GPIO_USAGE)
271 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
273 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
275 #elif defined(BF548_FAMILY)
276 if (usage == GPIO_USAGE)
277 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
279 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
287 unsigned short offset;
289 {.res = P_PPI0_D13, .offset = 11},
290 {.res = P_PPI0_D14, .offset = 11},
291 {.res = P_PPI0_D15, .offset = 11},
292 {.res = P_SPORT1_TFS, .offset = 11},
293 {.res = P_SPORT1_TSCLK, .offset = 11},
294 {.res = P_SPORT1_DTPRI, .offset = 11},
295 {.res = P_PPI0_D10, .offset = 10},
296 {.res = P_PPI0_D11, .offset = 10},
297 {.res = P_PPI0_D12, .offset = 10},
298 {.res = P_SPORT1_RSCLK, .offset = 10},
299 {.res = P_SPORT1_RFS, .offset = 10},
300 {.res = P_SPORT1_DRPRI, .offset = 10},
301 {.res = P_PPI0_D8, .offset = 9},
302 {.res = P_PPI0_D9, .offset = 9},
303 {.res = P_SPORT1_DRSEC, .offset = 9},
304 {.res = P_SPORT1_DTSEC, .offset = 9},
305 {.res = P_TMR2, .offset = 8},
306 {.res = P_PPI0_FS3, .offset = 8},
307 {.res = P_TMR3, .offset = 7},
308 {.res = P_SPI0_SSEL4, .offset = 7},
309 {.res = P_TMR4, .offset = 6},
310 {.res = P_SPI0_SSEL5, .offset = 6},
311 {.res = P_TMR5, .offset = 5},
312 {.res = P_SPI0_SSEL6, .offset = 5},
313 {.res = P_UART1_RX, .offset = 4},
314 {.res = P_UART1_TX, .offset = 4},
315 {.res = P_TMR6, .offset = 4},
316 {.res = P_TMR7, .offset = 4},
317 {.res = P_UART0_RX, .offset = 3},
318 {.res = P_UART0_TX, .offset = 3},
319 {.res = P_DMAR0, .offset = 3},
320 {.res = P_DMAR1, .offset = 3},
321 {.res = P_SPORT0_DTSEC, .offset = 1},
322 {.res = P_SPORT0_DRSEC, .offset = 1},
323 {.res = P_CAN0_RX, .offset = 1},
324 {.res = P_CAN0_TX, .offset = 1},
325 {.res = P_SPI0_SSEL7, .offset = 1},
326 {.res = P_SPORT0_TFS, .offset = 0},
327 {.res = P_SPORT0_DTPRI, .offset = 0},
328 {.res = P_SPI0_SSEL2, .offset = 0},
329 {.res = P_SPI0_SSEL3, .offset = 0},
332 static void portmux_setup(unsigned short per, unsigned short function)
334 u16 y, offset, muxreg;
336 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
337 if (port_mux_lut[y].res == per) {
339 /* SET PORTMUX REG */
341 offset = port_mux_lut[y].offset;
342 muxreg = bfin_read_PORT_MUX();
345 muxreg &= ~(1 << offset);
349 muxreg |= (function << offset);
350 bfin_write_PORT_MUX(muxreg);
354 #elif defined(BF548_FAMILY)
355 inline void portmux_setup(unsigned short portno, unsigned short function)
359 pmux = gpio_array[gpio_bank(portno)]->port_mux;
361 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
362 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
364 gpio_array[gpio_bank(portno)]->port_mux = pmux;
367 inline u16 get_portmux(unsigned short portno)
371 pmux = gpio_array[gpio_bank(portno)]->port_mux;
373 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
375 #elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
376 inline void portmux_setup(unsigned short portno, unsigned short function)
378 u16 pmux, ident = P_IDENT(portno);
379 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
381 pmux = *port_mux[gpio_bank(ident)];
382 pmux &= ~(3 << offset);
383 pmux |= (function & 3) << offset;
384 *port_mux[gpio_bank(ident)] = pmux;
388 # define portmux_setup(...) do { } while (0)
391 static int __init bfin_gpio_init(void)
393 printk(KERN_INFO "Blackfin GPIO Controller\n");
397 arch_initcall(bfin_gpio_init);
401 /***********************************************************
403 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
406 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
409 * DESCRIPTION: These functions abstract direct register access
410 * to Blackfin processor General Purpose
413 * CAUTION: These functions do not belong to the GPIO Driver API
414 *************************************************************
415 * MODIFICATION HISTORY :
416 **************************************************************/
418 /* Set a specific bit */
420 #define SET_GPIO(name) \
421 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
423 unsigned long flags; \
424 local_irq_save(flags); \
426 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
428 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
429 AWA_DUMMY_READ(name); \
430 local_irq_restore(flags); \
432 EXPORT_SYMBOL(set_gpio_ ## name);
441 #if ANOMALY_05000311 || ANOMALY_05000323
442 #define SET_GPIO_SC(name) \
443 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
445 unsigned long flags; \
446 local_irq_save(flags); \
448 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
450 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
451 AWA_DUMMY_READ(name); \
452 local_irq_restore(flags); \
454 EXPORT_SYMBOL(set_gpio_ ## name);
456 #define SET_GPIO_SC(name) \
457 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
460 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
462 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
464 EXPORT_SYMBOL(set_gpio_ ## name);
471 #if ANOMALY_05000311 || ANOMALY_05000323
472 void set_gpio_toggle(unsigned gpio)
475 local_irq_save(flags);
476 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
477 AWA_DUMMY_READ(toggle);
478 local_irq_restore(flags);
481 void set_gpio_toggle(unsigned gpio)
483 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
486 EXPORT_SYMBOL(set_gpio_toggle);
489 /*Set current PORT date (16-bit word)*/
491 #if ANOMALY_05000311 || ANOMALY_05000323
492 #define SET_GPIO_P(name) \
493 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
495 unsigned long flags; \
496 local_irq_save(flags); \
497 gpio_bankb[gpio_bank(gpio)]->name = arg; \
498 AWA_DUMMY_READ(name); \
499 local_irq_restore(flags); \
501 EXPORT_SYMBOL(set_gpiop_ ## name);
503 #define SET_GPIO_P(name) \
504 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
506 gpio_bankb[gpio_bank(gpio)]->name = arg; \
508 EXPORT_SYMBOL(set_gpiop_ ## name);
520 /* Get a specific bit */
521 #if ANOMALY_05000311 || ANOMALY_05000323
522 #define GET_GPIO(name) \
523 unsigned short get_gpio_ ## name(unsigned gpio) \
525 unsigned long flags; \
526 unsigned short ret; \
527 local_irq_save(flags); \
528 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
529 AWA_DUMMY_READ(name); \
530 local_irq_restore(flags); \
533 EXPORT_SYMBOL(get_gpio_ ## name);
535 #define GET_GPIO(name) \
536 unsigned short get_gpio_ ## name(unsigned gpio) \
538 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
540 EXPORT_SYMBOL(get_gpio_ ## name);
552 /*Get current PORT date (16-bit word)*/
554 #if ANOMALY_05000311 || ANOMALY_05000323
555 #define GET_GPIO_P(name) \
556 unsigned short get_gpiop_ ## name(unsigned gpio) \
558 unsigned long flags; \
559 unsigned short ret; \
560 local_irq_save(flags); \
561 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
562 AWA_DUMMY_READ(name); \
563 local_irq_restore(flags); \
566 EXPORT_SYMBOL(get_gpiop_ ## name);
568 #define GET_GPIO_P(name) \
569 unsigned short get_gpiop_ ## name(unsigned gpio) \
571 return (gpio_bankb[gpio_bank(gpio)]->name);\
573 EXPORT_SYMBOL(get_gpiop_ ## name);
587 /***********************************************************
589 * FUNCTIONS: Blackfin PM Setup API
592 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
600 * DESCRIPTION: Blackfin PM Driver API
603 *************************************************************
604 * MODIFICATION HISTORY :
605 **************************************************************/
606 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
610 if ((check_gpio(gpio) < 0) || !type)
613 local_irq_save(flags);
614 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
615 wakeup_flags_map[gpio] = type;
616 local_irq_restore(flags);
620 EXPORT_SYMBOL(gpio_pm_wakeup_request);
622 void gpio_pm_wakeup_free(unsigned gpio)
626 if (check_gpio(gpio) < 0)
629 local_irq_save(flags);
631 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
633 local_irq_restore(flags);
635 EXPORT_SYMBOL(gpio_pm_wakeup_free);
637 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
639 port_setup(gpio, GPIO_USAGE);
640 set_gpio_dir(gpio, 0);
641 set_gpio_inen(gpio, 1);
643 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
644 set_gpio_edge(gpio, 1);
646 set_gpio_edge(gpio, 0);
648 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
649 set_gpio_both(gpio, 1);
651 set_gpio_both(gpio, 0);
653 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
654 set_gpio_polar(gpio, 1);
656 set_gpio_polar(gpio, 0);
663 u32 bfin_pm_standby_setup(void)
665 u16 bank, mask, i, gpio;
667 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
668 mask = wakeup_map[gpio_bank(i)];
671 gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
672 gpio_bankb[bank]->maskb = 0;
675 #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
676 gpio_bank_saved[bank].fer = *port_fer[bank];
678 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
679 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
680 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
681 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
682 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
683 gpio_bank_saved[bank].reserved =
684 reserved_gpio_map[bank];
689 if ((mask & 1) && (wakeup_flags_map[gpio] !=
691 reserved_gpio_map[gpio_bank(gpio)] |=
693 bfin_gpio_wakeup_type(gpio,
694 wakeup_flags_map[gpio]);
695 set_gpio_data(gpio, 0); /*Clear*/
701 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
702 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
706 AWA_DUMMY_READ(maskb_set);
711 void bfin_pm_standby_restore(void)
715 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
716 mask = wakeup_map[gpio_bank(i)];
720 #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
721 *port_fer[bank] = gpio_bank_saved[bank].fer;
723 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
724 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
725 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
726 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
727 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
729 reserved_gpio_map[bank] =
730 gpio_bank_saved[bank].reserved;
731 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
734 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
736 AWA_DUMMY_READ(maskb);
739 void bfin_gpio_pm_hibernate_suspend(void)
743 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
746 #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
747 gpio_bank_saved[bank].fer = *port_fer[bank];
748 #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
749 gpio_bank_saved[bank].mux = *port_mux[bank];
752 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
755 gpio_bank_saved[bank].data = gpio_bankb[bank]->data;
756 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
757 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
758 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
759 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
760 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
761 gpio_bank_saved[bank].maska = gpio_bankb[bank]->maska;
764 AWA_DUMMY_READ(maska);
767 void bfin_gpio_pm_hibernate_restore(void)
771 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
774 #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
775 #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
776 *port_mux[bank] = gpio_bank_saved[bank].mux;
779 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
781 *port_fer[bank] = gpio_bank_saved[bank].fer;
783 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
784 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
785 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
786 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
787 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
789 gpio_bankb[bank]->data_set = gpio_bank_saved[bank].data
790 | gpio_bank_saved[bank].dir;
792 gpio_bankb[bank]->maska = gpio_bank_saved[bank].maska;
794 AWA_DUMMY_READ(maska);
799 #else /* BF548_FAMILY */
802 u32 bfin_pm_standby_setup(void)
807 void bfin_pm_standby_restore(void)
812 void bfin_gpio_pm_hibernate_suspend(void)
816 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
819 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
820 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
821 gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
822 gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
823 gpio_bank_saved[bank].inen = gpio_array[bank]->port_inen;
824 gpio_bank_saved[bank].dir = gpio_array[bank]->port_dir_set;
828 void bfin_gpio_pm_hibernate_restore(void)
832 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
835 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
836 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
837 gpio_array[bank]->port_inen = gpio_bank_saved[bank].inen;
838 gpio_array[bank]->port_dir_set = gpio_bank_saved[bank].dir;
839 gpio_array[bank]->port_set = gpio_bank_saved[bank].data
840 | gpio_bank_saved[bank].dir;
845 unsigned short get_gpio_dir(unsigned gpio)
847 return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
849 EXPORT_SYMBOL(get_gpio_dir);
851 #endif /* BF548_FAMILY */
853 /***********************************************************
855 * FUNCTIONS: Blackfin Peripheral Resource Allocation
859 * per Peripheral Identifier
862 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
865 *************************************************************
866 * MODIFICATION HISTORY :
867 **************************************************************/
869 int peripheral_request(unsigned short per, const char *label)
872 unsigned short ident = P_IDENT(per);
875 * Don't cares are pins with only one dedicated function
878 if (per & P_DONTCARE)
881 if (!(per & P_DEFINED))
884 if (check_gpio(ident))
887 local_irq_save(flags);
889 /* Can't do GPIO and peripheral at the same time */
890 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
893 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
894 __func__, ident, get_label(ident));
895 local_irq_restore(flags);
899 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
902 * Pin functions like AMC address strobes my
903 * be requested and used by several drivers
907 u16 funct = get_portmux(ident);
909 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
911 if (!(per & P_MAYSHARE)) {
914 * Allow that the identical pin function can
915 * be requested from the same driver twice
918 if (cmp_label(ident, label) == 0)
923 "%s: Peripheral %d function %d is already reserved by %s !\n",
924 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
925 local_irq_restore(flags);
931 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
934 portmux_setup(ident, P_FUNCT2MUX(per));
936 portmux_setup(per, P_FUNCT2MUX(per));
938 port_setup(ident, PERIPHERAL_USAGE);
940 local_irq_restore(flags);
941 set_label(ident, label);
945 EXPORT_SYMBOL(peripheral_request);
947 int peripheral_request_list(const unsigned short per[], const char *label)
952 for (cnt = 0; per[cnt] != 0; cnt++) {
954 ret = peripheral_request(per[cnt], label);
957 for ( ; cnt > 0; cnt--)
958 peripheral_free(per[cnt - 1]);
966 EXPORT_SYMBOL(peripheral_request_list);
968 void peripheral_free(unsigned short per)
971 unsigned short ident = P_IDENT(per);
973 if (per & P_DONTCARE)
976 if (!(per & P_DEFINED))
979 if (check_gpio(ident) < 0)
982 local_irq_save(flags);
984 if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
985 local_irq_restore(flags);
989 if (!(per & P_MAYSHARE))
990 port_setup(ident, GPIO_USAGE);
992 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
994 set_label(ident, "free");
996 local_irq_restore(flags);
998 EXPORT_SYMBOL(peripheral_free);
1000 void peripheral_free_list(const unsigned short per[])
1003 for (cnt = 0; per[cnt] != 0; cnt++)
1004 peripheral_free(per[cnt]);
1006 EXPORT_SYMBOL(peripheral_free_list);
1008 /***********************************************************
1010 * FUNCTIONS: Blackfin GPIO Driver
1013 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
1016 * DESCRIPTION: Blackfin GPIO Driver API
1019 *************************************************************
1020 * MODIFICATION HISTORY :
1021 **************************************************************/
1023 int gpio_request(unsigned gpio, const char *label)
1025 unsigned long flags;
1027 if (check_gpio(gpio) < 0)
1030 local_irq_save(flags);
1033 * Allow that the identical GPIO can
1034 * be requested from the same driver twice
1035 * Do nothing and return -
1038 if (cmp_label(gpio, label) == 0) {
1039 local_irq_restore(flags);
1043 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1045 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1046 gpio, get_label(gpio));
1047 local_irq_restore(flags);
1050 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1053 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1054 gpio, get_label(gpio));
1055 local_irq_restore(flags);
1059 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1061 local_irq_restore(flags);
1063 port_setup(gpio, GPIO_USAGE);
1064 set_label(gpio, label);
1068 EXPORT_SYMBOL(gpio_request);
1070 void gpio_free(unsigned gpio)
1072 unsigned long flags;
1074 if (check_gpio(gpio) < 0)
1077 local_irq_save(flags);
1079 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1082 local_irq_restore(flags);
1086 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1088 set_label(gpio, "free");
1090 local_irq_restore(flags);
1092 EXPORT_SYMBOL(gpio_free);
1096 int gpio_direction_input(unsigned gpio)
1098 unsigned long flags;
1100 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1105 local_irq_save(flags);
1106 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1107 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1108 local_irq_restore(flags);
1112 EXPORT_SYMBOL(gpio_direction_input);
1114 int gpio_direction_output(unsigned gpio, int value)
1116 unsigned long flags;
1118 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1123 local_irq_save(flags);
1124 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1125 gpio_set_value(gpio, value);
1126 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1127 local_irq_restore(flags);
1131 EXPORT_SYMBOL(gpio_direction_output);
1133 void gpio_set_value(unsigned gpio, int arg)
1136 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1138 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1140 EXPORT_SYMBOL(gpio_set_value);
1142 int gpio_get_value(unsigned gpio)
1144 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1146 EXPORT_SYMBOL(gpio_get_value);
1148 void bfin_gpio_irq_prepare(unsigned gpio)
1150 unsigned long flags;
1152 port_setup(gpio, GPIO_USAGE);
1154 local_irq_save(flags);
1155 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1156 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1157 local_irq_restore(flags);
1162 int gpio_get_value(unsigned gpio)
1164 unsigned long flags;
1167 if (unlikely(get_gpio_edge(gpio))) {
1168 local_irq_save(flags);
1169 set_gpio_edge(gpio, 0);
1170 ret = get_gpio_data(gpio);
1171 set_gpio_edge(gpio, 1);
1172 local_irq_restore(flags);
1176 return get_gpio_data(gpio);
1178 EXPORT_SYMBOL(gpio_get_value);
1181 int gpio_direction_input(unsigned gpio)
1183 unsigned long flags;
1185 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1190 local_irq_save(flags);
1191 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1192 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1193 AWA_DUMMY_READ(inen);
1194 local_irq_restore(flags);
1198 EXPORT_SYMBOL(gpio_direction_input);
1200 int gpio_direction_output(unsigned gpio, int value)
1202 unsigned long flags;
1204 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1209 local_irq_save(flags);
1210 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1213 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1215 gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1217 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1218 AWA_DUMMY_READ(dir);
1219 local_irq_restore(flags);
1223 EXPORT_SYMBOL(gpio_direction_output);
1225 /* If we are booting from SPI and our board lacks a strong enough pull up,
1226 * the core can reset and execute the bootrom faster than the resistor can
1227 * pull the signal logically high. To work around this (common) error in
1228 * board design, we explicitly set the pin back to GPIO mode, force /CS
1229 * high, and wait for the electrons to do their thing.
1231 * This function only makes sense to be called from reset code, but it
1232 * lives here as we need to force all the GPIO states w/out going through
1233 * BUG() checks and such.
1235 void bfin_gpio_reset_spi0_ssel1(void)
1237 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1239 port_setup(gpio, GPIO_USAGE);
1240 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1241 AWA_DUMMY_READ(data_set);
1245 void bfin_gpio_irq_prepare(unsigned gpio)
1247 port_setup(gpio, GPIO_USAGE);
1250 #endif /*BF548_FAMILY */
1252 #if defined(CONFIG_PROC_FS)
1253 static int gpio_proc_read(char *buf, char **start, off_t offset,
1254 int len, int *unused_i, void *unused_v)
1258 for (c = 0; c < MAX_RESOURCES; c++) {
1259 if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
1260 len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
1261 get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1262 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1263 len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
1272 static __init int gpio_register_proc(void)
1274 struct proc_dir_entry *proc_gpio;
1276 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1278 proc_gpio->read_proc = gpio_proc_read;
1279 return proc_gpio != NULL;
1281 __initcall(gpio_register_proc);