2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
117 unsigned long segment_base(u16 selector)
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
130 if (selector & 4) { /* from ldt */
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
145 EXPORT_SYMBOL_GPL(segment_base);
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
152 return vcpu->arch.apic_base;
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
162 vcpu->arch.apic_base = data;
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
178 ++vcpu->stat.pf_guest;
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
198 vcpu->arch.nmi_pending = 1;
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
212 static void __queue_exception(struct kvm_vcpu *vcpu)
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
220 * Load the pae pdptrs. Return true is they are all valid.
222 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
224 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
225 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
228 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
230 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
231 offset * sizeof(u64), sizeof(pdpte));
236 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
237 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
249 EXPORT_SYMBOL_GPL(load_pdptrs);
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
315 kvm_inject_gp(vcpu, 0);
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
324 kvm_mmu_sync_global(vcpu);
325 kvm_mmu_reset_context(vcpu);
328 EXPORT_SYMBOL_GPL(kvm_set_cr0);
330 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
332 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
333 KVMTRACE_1D(LMSW, vcpu,
334 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
337 EXPORT_SYMBOL_GPL(kvm_lmsw);
339 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
341 unsigned long old_cr4 = vcpu->arch.cr4;
342 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
344 if (cr4 & CR4_RESERVED_BITS) {
345 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
346 kvm_inject_gp(vcpu, 0);
350 if (is_long_mode(vcpu)) {
351 if (!(cr4 & X86_CR4_PAE)) {
352 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
354 kvm_inject_gp(vcpu, 0);
357 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
358 && ((cr4 ^ old_cr4) & pdptr_bits)
359 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
360 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
361 kvm_inject_gp(vcpu, 0);
365 if (cr4 & X86_CR4_VMXE) {
366 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
367 kvm_inject_gp(vcpu, 0);
370 kvm_x86_ops->set_cr4(vcpu, cr4);
371 vcpu->arch.cr4 = cr4;
372 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
373 kvm_mmu_sync_global(vcpu);
374 kvm_mmu_reset_context(vcpu);
376 EXPORT_SYMBOL_GPL(kvm_set_cr4);
378 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
380 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
381 kvm_mmu_sync_roots(vcpu);
382 kvm_mmu_flush_tlb(vcpu);
386 if (is_long_mode(vcpu)) {
387 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
388 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
389 kvm_inject_gp(vcpu, 0);
394 if (cr3 & CR3_PAE_RESERVED_BITS) {
396 "set_cr3: #GP, reserved bits\n");
397 kvm_inject_gp(vcpu, 0);
400 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
401 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
403 kvm_inject_gp(vcpu, 0);
408 * We don't check reserved bits in nonpae mode, because
409 * this isn't enforced, and VMware depends on this.
414 * Does the new cr3 value map to physical memory? (Note, we
415 * catch an invalid cr3 even in real-mode, because it would
416 * cause trouble later on when we turn on paging anyway.)
418 * A real CPU would silently accept an invalid cr3 and would
419 * attempt to use it - with largely undefined (and often hard
420 * to debug) behavior on the guest side.
422 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
423 kvm_inject_gp(vcpu, 0);
425 vcpu->arch.cr3 = cr3;
426 vcpu->arch.mmu.new_cr3(vcpu);
429 EXPORT_SYMBOL_GPL(kvm_set_cr3);
431 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
433 if (cr8 & CR8_RESERVED_BITS) {
434 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
435 kvm_inject_gp(vcpu, 0);
438 if (irqchip_in_kernel(vcpu->kvm))
439 kvm_lapic_set_tpr(vcpu, cr8);
441 vcpu->arch.cr8 = cr8;
443 EXPORT_SYMBOL_GPL(kvm_set_cr8);
445 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
447 if (irqchip_in_kernel(vcpu->kvm))
448 return kvm_lapic_get_cr8(vcpu);
450 return vcpu->arch.cr8;
452 EXPORT_SYMBOL_GPL(kvm_get_cr8);
454 static inline u32 bit(int bitno)
456 return 1 << (bitno & 31);
460 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
461 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
463 * This list is modified at module load time to reflect the
464 * capabilities of the host cpu.
466 static u32 msrs_to_save[] = {
467 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
470 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
472 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
473 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
476 static unsigned num_msrs_to_save;
478 static u32 emulated_msrs[] = {
479 MSR_IA32_MISC_ENABLE,
482 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
484 if (efer & efer_reserved_bits) {
485 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
487 kvm_inject_gp(vcpu, 0);
492 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
493 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
494 kvm_inject_gp(vcpu, 0);
498 if (efer & EFER_FFXSR) {
499 struct kvm_cpuid_entry2 *feat;
501 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
502 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
503 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
504 kvm_inject_gp(vcpu, 0);
509 if (efer & EFER_SVME) {
510 struct kvm_cpuid_entry2 *feat;
512 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
513 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
514 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
515 kvm_inject_gp(vcpu, 0);
520 kvm_x86_ops->set_efer(vcpu, efer);
523 efer |= vcpu->arch.shadow_efer & EFER_LMA;
525 vcpu->arch.shadow_efer = efer;
528 void kvm_enable_efer_bits(u64 mask)
530 efer_reserved_bits &= ~mask;
532 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
536 * Writes msr value into into the appropriate "register".
537 * Returns 0 on success, non-0 otherwise.
538 * Assumes vcpu_load() was already called.
540 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
542 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
546 * Adapt set_msr() to msr_io()'s calling convention
548 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
550 return kvm_set_msr(vcpu, index, *data);
553 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
556 struct pvclock_wall_clock wc;
557 struct timespec now, sys, boot;
564 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
567 * The guest calculates current wall clock time by adding
568 * system time (updated by kvm_write_guest_time below) to the
569 * wall clock specified here. guest system time equals host
570 * system time for us, thus we must fill in host boot time here.
572 now = current_kernel_time();
574 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
576 wc.sec = boot.tv_sec;
577 wc.nsec = boot.tv_nsec;
578 wc.version = version;
580 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
583 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
586 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
588 uint32_t quotient, remainder;
590 /* Don't try to replace with do_div(), this one calculates
591 * "(dividend << 32) / divisor" */
593 : "=a" (quotient), "=d" (remainder)
594 : "0" (0), "1" (dividend), "r" (divisor) );
598 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
600 uint64_t nsecs = 1000000000LL;
605 tps64 = tsc_khz * 1000LL;
606 while (tps64 > nsecs*2) {
611 tps32 = (uint32_t)tps64;
612 while (tps32 <= (uint32_t)nsecs) {
617 hv_clock->tsc_shift = shift;
618 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
620 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
621 __func__, tsc_khz, hv_clock->tsc_shift,
622 hv_clock->tsc_to_system_mul);
625 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
627 static void kvm_write_guest_time(struct kvm_vcpu *v)
631 struct kvm_vcpu_arch *vcpu = &v->arch;
634 if ((!vcpu->time_page))
637 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
638 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
639 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
642 /* Keep irq disabled to prevent changes to the clock */
643 local_irq_save(flags);
644 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
645 &vcpu->hv_clock.tsc_timestamp);
647 local_irq_restore(flags);
649 /* With all the info we got, fill in the values */
651 vcpu->hv_clock.system_time = ts.tv_nsec +
652 (NSEC_PER_SEC * (u64)ts.tv_sec);
654 * The interface expects us to write an even number signaling that the
655 * update is finished. Since the guest won't see the intermediate
656 * state, we just increase by 2 at the end.
658 vcpu->hv_clock.version += 2;
660 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
662 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
663 sizeof(vcpu->hv_clock));
665 kunmap_atomic(shared_kaddr, KM_USER0);
667 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
670 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
672 struct kvm_vcpu_arch *vcpu = &v->arch;
674 if (!vcpu->time_page)
676 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
680 static bool msr_mtrr_valid(unsigned msr)
683 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
684 case MSR_MTRRfix64K_00000:
685 case MSR_MTRRfix16K_80000:
686 case MSR_MTRRfix16K_A0000:
687 case MSR_MTRRfix4K_C0000:
688 case MSR_MTRRfix4K_C8000:
689 case MSR_MTRRfix4K_D0000:
690 case MSR_MTRRfix4K_D8000:
691 case MSR_MTRRfix4K_E0000:
692 case MSR_MTRRfix4K_E8000:
693 case MSR_MTRRfix4K_F0000:
694 case MSR_MTRRfix4K_F8000:
695 case MSR_MTRRdefType:
696 case MSR_IA32_CR_PAT:
704 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
706 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
708 if (!msr_mtrr_valid(msr))
711 if (msr == MSR_MTRRdefType) {
712 vcpu->arch.mtrr_state.def_type = data;
713 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
714 } else if (msr == MSR_MTRRfix64K_00000)
716 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
717 p[1 + msr - MSR_MTRRfix16K_80000] = data;
718 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
719 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
720 else if (msr == MSR_IA32_CR_PAT)
721 vcpu->arch.pat = data;
722 else { /* Variable MTRRs */
723 int idx, is_mtrr_mask;
726 idx = (msr - 0x200) / 2;
727 is_mtrr_mask = msr - 0x200 - 2 * idx;
730 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
733 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
737 kvm_mmu_reset_context(vcpu);
741 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
745 set_efer(vcpu, data);
747 case MSR_IA32_MC0_STATUS:
748 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
751 case MSR_IA32_MCG_STATUS:
752 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
755 case MSR_IA32_MCG_CTL:
756 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
759 case MSR_IA32_DEBUGCTLMSR:
761 /* We support the non-activated case already */
763 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
764 /* Values other than LBR and BTF are vendor-specific,
765 thus reserved and should throw a #GP */
768 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
771 case MSR_IA32_UCODE_REV:
772 case MSR_IA32_UCODE_WRITE:
773 case MSR_VM_HSAVE_PA:
775 case 0x200 ... 0x2ff:
776 return set_msr_mtrr(vcpu, msr, data);
777 case MSR_IA32_APICBASE:
778 kvm_set_apic_base(vcpu, data);
780 case MSR_IA32_MISC_ENABLE:
781 vcpu->arch.ia32_misc_enable_msr = data;
783 case MSR_KVM_WALL_CLOCK:
784 vcpu->kvm->arch.wall_clock = data;
785 kvm_write_wall_clock(vcpu->kvm, data);
787 case MSR_KVM_SYSTEM_TIME: {
788 if (vcpu->arch.time_page) {
789 kvm_release_page_dirty(vcpu->arch.time_page);
790 vcpu->arch.time_page = NULL;
793 vcpu->arch.time = data;
795 /* we verify if the enable bit is set... */
799 /* ...but clean it before doing the actual write */
800 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
802 vcpu->arch.time_page =
803 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
805 if (is_error_page(vcpu->arch.time_page)) {
806 kvm_release_page_clean(vcpu->arch.time_page);
807 vcpu->arch.time_page = NULL;
810 kvm_request_guest_time_update(vcpu);
814 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
819 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
823 * Reads an msr value (of 'msr_index') into 'pdata'.
824 * Returns 0 on success, non-0 otherwise.
825 * Assumes vcpu_load() was already called.
827 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
829 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
832 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
834 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
836 if (!msr_mtrr_valid(msr))
839 if (msr == MSR_MTRRdefType)
840 *pdata = vcpu->arch.mtrr_state.def_type +
841 (vcpu->arch.mtrr_state.enabled << 10);
842 else if (msr == MSR_MTRRfix64K_00000)
844 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
845 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
846 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
847 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
848 else if (msr == MSR_IA32_CR_PAT)
849 *pdata = vcpu->arch.pat;
850 else { /* Variable MTRRs */
851 int idx, is_mtrr_mask;
854 idx = (msr - 0x200) / 2;
855 is_mtrr_mask = msr - 0x200 - 2 * idx;
858 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
861 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
868 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
873 case 0xc0010010: /* SYSCFG */
874 case 0xc0010015: /* HWCR */
875 case MSR_IA32_PLATFORM_ID:
876 case MSR_IA32_P5_MC_ADDR:
877 case MSR_IA32_P5_MC_TYPE:
878 case MSR_IA32_MC0_CTL:
879 case MSR_IA32_MCG_STATUS:
880 case MSR_IA32_MCG_CAP:
881 case MSR_IA32_MCG_CTL:
882 case MSR_IA32_MC0_MISC:
883 case MSR_IA32_MC0_MISC+4:
884 case MSR_IA32_MC0_MISC+8:
885 case MSR_IA32_MC0_MISC+12:
886 case MSR_IA32_MC0_MISC+16:
887 case MSR_IA32_MC0_MISC+20:
888 case MSR_IA32_UCODE_REV:
889 case MSR_IA32_EBL_CR_POWERON:
890 case MSR_IA32_DEBUGCTLMSR:
891 case MSR_IA32_LASTBRANCHFROMIP:
892 case MSR_IA32_LASTBRANCHTOIP:
893 case MSR_IA32_LASTINTFROMIP:
894 case MSR_IA32_LASTINTTOIP:
895 case MSR_VM_HSAVE_PA:
899 data = 0x500 | KVM_NR_VAR_MTRR;
901 case 0x200 ... 0x2ff:
902 return get_msr_mtrr(vcpu, msr, pdata);
903 case 0xcd: /* fsb frequency */
906 case MSR_IA32_APICBASE:
907 data = kvm_get_apic_base(vcpu);
909 case MSR_IA32_MISC_ENABLE:
910 data = vcpu->arch.ia32_misc_enable_msr;
912 case MSR_IA32_PERF_STATUS:
913 /* TSC increment by tick */
916 data |= (((uint64_t)4ULL) << 40);
919 data = vcpu->arch.shadow_efer;
921 case MSR_KVM_WALL_CLOCK:
922 data = vcpu->kvm->arch.wall_clock;
924 case MSR_KVM_SYSTEM_TIME:
925 data = vcpu->arch.time;
928 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
934 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
937 * Read or write a bunch of msrs. All parameters are kernel addresses.
939 * @return number of msrs set successfully.
941 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
942 struct kvm_msr_entry *entries,
943 int (*do_msr)(struct kvm_vcpu *vcpu,
944 unsigned index, u64 *data))
950 down_read(&vcpu->kvm->slots_lock);
951 for (i = 0; i < msrs->nmsrs; ++i)
952 if (do_msr(vcpu, entries[i].index, &entries[i].data))
954 up_read(&vcpu->kvm->slots_lock);
962 * Read or write a bunch of msrs. Parameters are user addresses.
964 * @return number of msrs set successfully.
966 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
967 int (*do_msr)(struct kvm_vcpu *vcpu,
968 unsigned index, u64 *data),
971 struct kvm_msrs msrs;
972 struct kvm_msr_entry *entries;
977 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
981 if (msrs.nmsrs >= MAX_IO_MSRS)
985 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
986 entries = vmalloc(size);
991 if (copy_from_user(entries, user_msrs->entries, size))
994 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
999 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1010 int kvm_dev_ioctl_check_extension(long ext)
1015 case KVM_CAP_IRQCHIP:
1017 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1018 case KVM_CAP_SET_TSS_ADDR:
1019 case KVM_CAP_EXT_CPUID:
1020 case KVM_CAP_CLOCKSOURCE:
1022 case KVM_CAP_NOP_IO_DELAY:
1023 case KVM_CAP_MP_STATE:
1024 case KVM_CAP_SYNC_MMU:
1025 case KVM_CAP_REINJECT_CONTROL:
1026 case KVM_CAP_IRQ_INJECT_STATUS:
1029 case KVM_CAP_COALESCED_MMIO:
1030 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1033 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1035 case KVM_CAP_NR_VCPUS:
1038 case KVM_CAP_NR_MEMSLOTS:
1039 r = KVM_MEMORY_SLOTS;
1041 case KVM_CAP_PV_MMU:
1055 long kvm_arch_dev_ioctl(struct file *filp,
1056 unsigned int ioctl, unsigned long arg)
1058 void __user *argp = (void __user *)arg;
1062 case KVM_GET_MSR_INDEX_LIST: {
1063 struct kvm_msr_list __user *user_msr_list = argp;
1064 struct kvm_msr_list msr_list;
1068 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1071 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1072 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1075 if (n < num_msrs_to_save)
1078 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1079 num_msrs_to_save * sizeof(u32)))
1081 if (copy_to_user(user_msr_list->indices
1082 + num_msrs_to_save * sizeof(u32),
1084 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1089 case KVM_GET_SUPPORTED_CPUID: {
1090 struct kvm_cpuid2 __user *cpuid_arg = argp;
1091 struct kvm_cpuid2 cpuid;
1094 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1096 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1097 cpuid_arg->entries);
1102 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1114 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1116 kvm_x86_ops->vcpu_load(vcpu, cpu);
1117 kvm_request_guest_time_update(vcpu);
1120 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1122 kvm_x86_ops->vcpu_put(vcpu);
1123 kvm_put_guest_fpu(vcpu);
1126 static int is_efer_nx(void)
1128 unsigned long long efer = 0;
1130 rdmsrl_safe(MSR_EFER, &efer);
1131 return efer & EFER_NX;
1134 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1137 struct kvm_cpuid_entry2 *e, *entry;
1140 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1141 e = &vcpu->arch.cpuid_entries[i];
1142 if (e->function == 0x80000001) {
1147 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1148 entry->edx &= ~(1 << 20);
1149 printk(KERN_INFO "kvm: guest NX capability removed\n");
1153 /* when an old userspace process fills a new kernel module */
1154 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1155 struct kvm_cpuid *cpuid,
1156 struct kvm_cpuid_entry __user *entries)
1159 struct kvm_cpuid_entry *cpuid_entries;
1162 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1165 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1169 if (copy_from_user(cpuid_entries, entries,
1170 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1172 for (i = 0; i < cpuid->nent; i++) {
1173 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1174 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1175 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1176 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1177 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1178 vcpu->arch.cpuid_entries[i].index = 0;
1179 vcpu->arch.cpuid_entries[i].flags = 0;
1180 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1181 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1182 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1184 vcpu->arch.cpuid_nent = cpuid->nent;
1185 cpuid_fix_nx_cap(vcpu);
1189 vfree(cpuid_entries);
1194 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1195 struct kvm_cpuid2 *cpuid,
1196 struct kvm_cpuid_entry2 __user *entries)
1201 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1204 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1205 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1207 vcpu->arch.cpuid_nent = cpuid->nent;
1214 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1215 struct kvm_cpuid2 *cpuid,
1216 struct kvm_cpuid_entry2 __user *entries)
1221 if (cpuid->nent < vcpu->arch.cpuid_nent)
1224 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1225 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1230 cpuid->nent = vcpu->arch.cpuid_nent;
1234 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1237 entry->function = function;
1238 entry->index = index;
1239 cpuid_count(entry->function, entry->index,
1240 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1244 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1245 u32 index, int *nent, int maxnent)
1247 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1248 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1249 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1250 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1251 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1252 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1253 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1254 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1255 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1256 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1257 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1258 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1259 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1260 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1261 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1262 bit(X86_FEATURE_PGE) |
1263 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1264 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1265 bit(X86_FEATURE_SYSCALL) |
1266 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1267 #ifdef CONFIG_X86_64
1268 bit(X86_FEATURE_LM) |
1270 bit(X86_FEATURE_FXSR_OPT) |
1271 bit(X86_FEATURE_MMXEXT) |
1272 bit(X86_FEATURE_3DNOWEXT) |
1273 bit(X86_FEATURE_3DNOW);
1274 const u32 kvm_supported_word3_x86_features =
1275 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1276 const u32 kvm_supported_word6_x86_features =
1277 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1278 bit(X86_FEATURE_SVM);
1280 /* all calls to cpuid_count() should be made on the same cpu */
1282 do_cpuid_1_ent(entry, function, index);
1287 entry->eax = min(entry->eax, (u32)0xb);
1290 entry->edx &= kvm_supported_word0_x86_features;
1291 entry->ecx &= kvm_supported_word3_x86_features;
1293 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1294 * may return different values. This forces us to get_cpu() before
1295 * issuing the first command, and also to emulate this annoying behavior
1296 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1298 int t, times = entry->eax & 0xff;
1300 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1301 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1302 for (t = 1; t < times && *nent < maxnent; ++t) {
1303 do_cpuid_1_ent(&entry[t], function, 0);
1304 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1309 /* function 4 and 0xb have additional index. */
1313 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1314 /* read more entries until cache_type is zero */
1315 for (i = 1; *nent < maxnent; ++i) {
1316 cache_type = entry[i - 1].eax & 0x1f;
1319 do_cpuid_1_ent(&entry[i], function, i);
1321 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1329 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1330 /* read more entries until level_type is zero */
1331 for (i = 1; *nent < maxnent; ++i) {
1332 level_type = entry[i - 1].ecx & 0xff00;
1335 do_cpuid_1_ent(&entry[i], function, i);
1337 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1343 entry->eax = min(entry->eax, 0x8000001a);
1346 entry->edx &= kvm_supported_word1_x86_features;
1347 entry->ecx &= kvm_supported_word6_x86_features;
1353 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1354 struct kvm_cpuid_entry2 __user *entries)
1356 struct kvm_cpuid_entry2 *cpuid_entries;
1357 int limit, nent = 0, r = -E2BIG;
1360 if (cpuid->nent < 1)
1363 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1367 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1368 limit = cpuid_entries[0].eax;
1369 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1370 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1371 &nent, cpuid->nent);
1373 if (nent >= cpuid->nent)
1376 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1377 limit = cpuid_entries[nent - 1].eax;
1378 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1379 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1380 &nent, cpuid->nent);
1382 if (copy_to_user(entries, cpuid_entries,
1383 nent * sizeof(struct kvm_cpuid_entry2)))
1389 vfree(cpuid_entries);
1394 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1395 struct kvm_lapic_state *s)
1398 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1404 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1405 struct kvm_lapic_state *s)
1408 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1409 kvm_apic_post_state_restore(vcpu);
1415 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1416 struct kvm_interrupt *irq)
1418 if (irq->irq < 0 || irq->irq >= 256)
1420 if (irqchip_in_kernel(vcpu->kvm))
1424 set_bit(irq->irq, vcpu->arch.irq_pending);
1425 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1432 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1435 kvm_inject_nmi(vcpu);
1441 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1442 struct kvm_tpr_access_ctl *tac)
1446 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1450 long kvm_arch_vcpu_ioctl(struct file *filp,
1451 unsigned int ioctl, unsigned long arg)
1453 struct kvm_vcpu *vcpu = filp->private_data;
1454 void __user *argp = (void __user *)arg;
1456 struct kvm_lapic_state *lapic = NULL;
1459 case KVM_GET_LAPIC: {
1460 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1465 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1469 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1474 case KVM_SET_LAPIC: {
1475 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1480 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1482 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1488 case KVM_INTERRUPT: {
1489 struct kvm_interrupt irq;
1492 if (copy_from_user(&irq, argp, sizeof irq))
1494 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1501 r = kvm_vcpu_ioctl_nmi(vcpu);
1507 case KVM_SET_CPUID: {
1508 struct kvm_cpuid __user *cpuid_arg = argp;
1509 struct kvm_cpuid cpuid;
1512 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1514 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1519 case KVM_SET_CPUID2: {
1520 struct kvm_cpuid2 __user *cpuid_arg = argp;
1521 struct kvm_cpuid2 cpuid;
1524 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1526 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1527 cpuid_arg->entries);
1532 case KVM_GET_CPUID2: {
1533 struct kvm_cpuid2 __user *cpuid_arg = argp;
1534 struct kvm_cpuid2 cpuid;
1537 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1539 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1540 cpuid_arg->entries);
1544 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1550 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1553 r = msr_io(vcpu, argp, do_set_msr, 0);
1555 case KVM_TPR_ACCESS_REPORTING: {
1556 struct kvm_tpr_access_ctl tac;
1559 if (copy_from_user(&tac, argp, sizeof tac))
1561 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1565 if (copy_to_user(argp, &tac, sizeof tac))
1570 case KVM_SET_VAPIC_ADDR: {
1571 struct kvm_vapic_addr va;
1574 if (!irqchip_in_kernel(vcpu->kvm))
1577 if (copy_from_user(&va, argp, sizeof va))
1580 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1592 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1596 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1598 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1602 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1603 u32 kvm_nr_mmu_pages)
1605 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1608 down_write(&kvm->slots_lock);
1610 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1611 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1613 up_write(&kvm->slots_lock);
1617 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1619 return kvm->arch.n_alloc_mmu_pages;
1622 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1625 struct kvm_mem_alias *alias;
1627 for (i = 0; i < kvm->arch.naliases; ++i) {
1628 alias = &kvm->arch.aliases[i];
1629 if (gfn >= alias->base_gfn
1630 && gfn < alias->base_gfn + alias->npages)
1631 return alias->target_gfn + gfn - alias->base_gfn;
1637 * Set a new alias region. Aliases map a portion of physical memory into
1638 * another portion. This is useful for memory windows, for example the PC
1641 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1642 struct kvm_memory_alias *alias)
1645 struct kvm_mem_alias *p;
1648 /* General sanity checks */
1649 if (alias->memory_size & (PAGE_SIZE - 1))
1651 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1653 if (alias->slot >= KVM_ALIAS_SLOTS)
1655 if (alias->guest_phys_addr + alias->memory_size
1656 < alias->guest_phys_addr)
1658 if (alias->target_phys_addr + alias->memory_size
1659 < alias->target_phys_addr)
1662 down_write(&kvm->slots_lock);
1663 spin_lock(&kvm->mmu_lock);
1665 p = &kvm->arch.aliases[alias->slot];
1666 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1667 p->npages = alias->memory_size >> PAGE_SHIFT;
1668 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1670 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1671 if (kvm->arch.aliases[n - 1].npages)
1673 kvm->arch.naliases = n;
1675 spin_unlock(&kvm->mmu_lock);
1676 kvm_mmu_zap_all(kvm);
1678 up_write(&kvm->slots_lock);
1686 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1691 switch (chip->chip_id) {
1692 case KVM_IRQCHIP_PIC_MASTER:
1693 memcpy(&chip->chip.pic,
1694 &pic_irqchip(kvm)->pics[0],
1695 sizeof(struct kvm_pic_state));
1697 case KVM_IRQCHIP_PIC_SLAVE:
1698 memcpy(&chip->chip.pic,
1699 &pic_irqchip(kvm)->pics[1],
1700 sizeof(struct kvm_pic_state));
1702 case KVM_IRQCHIP_IOAPIC:
1703 memcpy(&chip->chip.ioapic,
1704 ioapic_irqchip(kvm),
1705 sizeof(struct kvm_ioapic_state));
1714 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1719 switch (chip->chip_id) {
1720 case KVM_IRQCHIP_PIC_MASTER:
1721 memcpy(&pic_irqchip(kvm)->pics[0],
1723 sizeof(struct kvm_pic_state));
1725 case KVM_IRQCHIP_PIC_SLAVE:
1726 memcpy(&pic_irqchip(kvm)->pics[1],
1728 sizeof(struct kvm_pic_state));
1730 case KVM_IRQCHIP_IOAPIC:
1731 memcpy(ioapic_irqchip(kvm),
1733 sizeof(struct kvm_ioapic_state));
1739 kvm_pic_update_irq(pic_irqchip(kvm));
1743 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1747 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1751 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1755 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1756 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1760 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1761 struct kvm_reinject_control *control)
1763 if (!kvm->arch.vpit)
1765 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1770 * Get (and clear) the dirty memory log for a memory slot.
1772 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1773 struct kvm_dirty_log *log)
1777 struct kvm_memory_slot *memslot;
1780 down_write(&kvm->slots_lock);
1782 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1786 /* If nothing is dirty, don't bother messing with page tables. */
1788 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1789 kvm_flush_remote_tlbs(kvm);
1790 memslot = &kvm->memslots[log->slot];
1791 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1792 memset(memslot->dirty_bitmap, 0, n);
1796 up_write(&kvm->slots_lock);
1800 long kvm_arch_vm_ioctl(struct file *filp,
1801 unsigned int ioctl, unsigned long arg)
1803 struct kvm *kvm = filp->private_data;
1804 void __user *argp = (void __user *)arg;
1807 * This union makes it completely explicit to gcc-3.x
1808 * that these two variables' stack usage should be
1809 * combined, not added together.
1812 struct kvm_pit_state ps;
1813 struct kvm_memory_alias alias;
1817 case KVM_SET_TSS_ADDR:
1818 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1822 case KVM_SET_MEMORY_REGION: {
1823 struct kvm_memory_region kvm_mem;
1824 struct kvm_userspace_memory_region kvm_userspace_mem;
1827 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1829 kvm_userspace_mem.slot = kvm_mem.slot;
1830 kvm_userspace_mem.flags = kvm_mem.flags;
1831 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1832 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1833 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1838 case KVM_SET_NR_MMU_PAGES:
1839 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1843 case KVM_GET_NR_MMU_PAGES:
1844 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1846 case KVM_SET_MEMORY_ALIAS:
1848 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1850 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1854 case KVM_CREATE_IRQCHIP:
1856 kvm->arch.vpic = kvm_create_pic(kvm);
1857 if (kvm->arch.vpic) {
1858 r = kvm_ioapic_init(kvm);
1860 kfree(kvm->arch.vpic);
1861 kvm->arch.vpic = NULL;
1866 r = kvm_setup_default_irq_routing(kvm);
1868 kfree(kvm->arch.vpic);
1869 kfree(kvm->arch.vioapic);
1873 case KVM_CREATE_PIT:
1874 mutex_lock(&kvm->lock);
1877 goto create_pit_unlock;
1879 kvm->arch.vpit = kvm_create_pit(kvm);
1883 mutex_unlock(&kvm->lock);
1885 case KVM_IRQ_LINE_STATUS:
1886 case KVM_IRQ_LINE: {
1887 struct kvm_irq_level irq_event;
1890 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1892 if (irqchip_in_kernel(kvm)) {
1894 mutex_lock(&kvm->lock);
1895 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1896 irq_event.irq, irq_event.level);
1897 mutex_unlock(&kvm->lock);
1898 if (ioctl == KVM_IRQ_LINE_STATUS) {
1899 irq_event.status = status;
1900 if (copy_to_user(argp, &irq_event,
1908 case KVM_GET_IRQCHIP: {
1909 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1910 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1916 if (copy_from_user(chip, argp, sizeof *chip))
1917 goto get_irqchip_out;
1919 if (!irqchip_in_kernel(kvm))
1920 goto get_irqchip_out;
1921 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1923 goto get_irqchip_out;
1925 if (copy_to_user(argp, chip, sizeof *chip))
1926 goto get_irqchip_out;
1934 case KVM_SET_IRQCHIP: {
1935 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1936 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1942 if (copy_from_user(chip, argp, sizeof *chip))
1943 goto set_irqchip_out;
1945 if (!irqchip_in_kernel(kvm))
1946 goto set_irqchip_out;
1947 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1949 goto set_irqchip_out;
1959 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1962 if (!kvm->arch.vpit)
1964 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1968 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1975 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1978 if (!kvm->arch.vpit)
1980 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1986 case KVM_REINJECT_CONTROL: {
1987 struct kvm_reinject_control control;
1989 if (copy_from_user(&control, argp, sizeof(control)))
1991 r = kvm_vm_ioctl_reinject(kvm, &control);
2004 static void kvm_init_msr_list(void)
2009 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2010 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2013 msrs_to_save[j] = msrs_to_save[i];
2016 num_msrs_to_save = j;
2020 * Only apic need an MMIO device hook, so shortcut now..
2022 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2023 gpa_t addr, int len,
2026 struct kvm_io_device *dev;
2028 if (vcpu->arch.apic) {
2029 dev = &vcpu->arch.apic->dev;
2030 if (dev->in_range(dev, addr, len, is_write))
2037 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2038 gpa_t addr, int len,
2041 struct kvm_io_device *dev;
2043 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2045 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2050 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2051 struct kvm_vcpu *vcpu)
2054 int r = X86EMUL_CONTINUE;
2057 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2058 unsigned offset = addr & (PAGE_SIZE-1);
2059 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2062 if (gpa == UNMAPPED_GVA) {
2063 r = X86EMUL_PROPAGATE_FAULT;
2066 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2068 r = X86EMUL_UNHANDLEABLE;
2080 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2081 struct kvm_vcpu *vcpu)
2084 int r = X86EMUL_CONTINUE;
2087 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2088 unsigned offset = addr & (PAGE_SIZE-1);
2089 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2092 if (gpa == UNMAPPED_GVA) {
2093 r = X86EMUL_PROPAGATE_FAULT;
2096 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2098 r = X86EMUL_UNHANDLEABLE;
2111 static int emulator_read_emulated(unsigned long addr,
2114 struct kvm_vcpu *vcpu)
2116 struct kvm_io_device *mmio_dev;
2119 if (vcpu->mmio_read_completed) {
2120 memcpy(val, vcpu->mmio_data, bytes);
2121 vcpu->mmio_read_completed = 0;
2122 return X86EMUL_CONTINUE;
2125 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2127 /* For APIC access vmexit */
2128 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2131 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2132 == X86EMUL_CONTINUE)
2133 return X86EMUL_CONTINUE;
2134 if (gpa == UNMAPPED_GVA)
2135 return X86EMUL_PROPAGATE_FAULT;
2139 * Is this MMIO handled locally?
2141 mutex_lock(&vcpu->kvm->lock);
2142 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2144 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2145 mutex_unlock(&vcpu->kvm->lock);
2146 return X86EMUL_CONTINUE;
2148 mutex_unlock(&vcpu->kvm->lock);
2150 vcpu->mmio_needed = 1;
2151 vcpu->mmio_phys_addr = gpa;
2152 vcpu->mmio_size = bytes;
2153 vcpu->mmio_is_write = 0;
2155 return X86EMUL_UNHANDLEABLE;
2158 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2159 const void *val, int bytes)
2163 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2166 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2170 static int emulator_write_emulated_onepage(unsigned long addr,
2173 struct kvm_vcpu *vcpu)
2175 struct kvm_io_device *mmio_dev;
2178 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2180 if (gpa == UNMAPPED_GVA) {
2181 kvm_inject_page_fault(vcpu, addr, 2);
2182 return X86EMUL_PROPAGATE_FAULT;
2185 /* For APIC access vmexit */
2186 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2189 if (emulator_write_phys(vcpu, gpa, val, bytes))
2190 return X86EMUL_CONTINUE;
2194 * Is this MMIO handled locally?
2196 mutex_lock(&vcpu->kvm->lock);
2197 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2199 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2200 mutex_unlock(&vcpu->kvm->lock);
2201 return X86EMUL_CONTINUE;
2203 mutex_unlock(&vcpu->kvm->lock);
2205 vcpu->mmio_needed = 1;
2206 vcpu->mmio_phys_addr = gpa;
2207 vcpu->mmio_size = bytes;
2208 vcpu->mmio_is_write = 1;
2209 memcpy(vcpu->mmio_data, val, bytes);
2211 return X86EMUL_CONTINUE;
2214 int emulator_write_emulated(unsigned long addr,
2217 struct kvm_vcpu *vcpu)
2219 /* Crossing a page boundary? */
2220 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2223 now = -addr & ~PAGE_MASK;
2224 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2225 if (rc != X86EMUL_CONTINUE)
2231 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2233 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2235 static int emulator_cmpxchg_emulated(unsigned long addr,
2239 struct kvm_vcpu *vcpu)
2241 static int reported;
2245 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2247 #ifndef CONFIG_X86_64
2248 /* guests cmpxchg8b have to be emulated atomically */
2255 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2257 if (gpa == UNMAPPED_GVA ||
2258 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2261 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2266 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2268 kaddr = kmap_atomic(page, KM_USER0);
2269 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2270 kunmap_atomic(kaddr, KM_USER0);
2271 kvm_release_page_dirty(page);
2276 return emulator_write_emulated(addr, new, bytes, vcpu);
2279 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2281 return kvm_x86_ops->get_segment_base(vcpu, seg);
2284 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2286 kvm_mmu_invlpg(vcpu, address);
2287 return X86EMUL_CONTINUE;
2290 int emulate_clts(struct kvm_vcpu *vcpu)
2292 KVMTRACE_0D(CLTS, vcpu, handler);
2293 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2294 return X86EMUL_CONTINUE;
2297 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2299 struct kvm_vcpu *vcpu = ctxt->vcpu;
2303 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2304 return X86EMUL_CONTINUE;
2306 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2307 return X86EMUL_UNHANDLEABLE;
2311 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2313 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2316 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2318 /* FIXME: better handling */
2319 return X86EMUL_UNHANDLEABLE;
2321 return X86EMUL_CONTINUE;
2324 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2327 unsigned long rip = kvm_rip_read(vcpu);
2328 unsigned long rip_linear;
2330 if (!printk_ratelimit())
2333 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2335 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2337 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2338 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2340 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2342 static struct x86_emulate_ops emulate_ops = {
2343 .read_std = kvm_read_guest_virt,
2344 .read_emulated = emulator_read_emulated,
2345 .write_emulated = emulator_write_emulated,
2346 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2349 static void cache_all_regs(struct kvm_vcpu *vcpu)
2351 kvm_register_read(vcpu, VCPU_REGS_RAX);
2352 kvm_register_read(vcpu, VCPU_REGS_RSP);
2353 kvm_register_read(vcpu, VCPU_REGS_RIP);
2354 vcpu->arch.regs_dirty = ~0;
2357 int emulate_instruction(struct kvm_vcpu *vcpu,
2358 struct kvm_run *run,
2364 struct decode_cache *c;
2366 kvm_clear_exception_queue(vcpu);
2367 vcpu->arch.mmio_fault_cr2 = cr2;
2369 * TODO: fix x86_emulate.c to use guest_read/write_register
2370 * instead of direct ->regs accesses, can save hundred cycles
2371 * on Intel for instructions that don't read/change RSP, for
2374 cache_all_regs(vcpu);
2376 vcpu->mmio_is_write = 0;
2377 vcpu->arch.pio.string = 0;
2379 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2381 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2383 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2384 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2385 vcpu->arch.emulate_ctxt.mode =
2386 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2387 ? X86EMUL_MODE_REAL : cs_l
2388 ? X86EMUL_MODE_PROT64 : cs_db
2389 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2391 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2393 /* Reject the instructions other than VMCALL/VMMCALL when
2394 * try to emulate invalid opcode */
2395 c = &vcpu->arch.emulate_ctxt.decode;
2396 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2397 (!(c->twobyte && c->b == 0x01 &&
2398 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2399 c->modrm_mod == 3 && c->modrm_rm == 1)))
2400 return EMULATE_FAIL;
2402 ++vcpu->stat.insn_emulation;
2404 ++vcpu->stat.insn_emulation_fail;
2405 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2406 return EMULATE_DONE;
2407 return EMULATE_FAIL;
2411 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2413 if (vcpu->arch.pio.string)
2414 return EMULATE_DO_MMIO;
2416 if ((r || vcpu->mmio_is_write) && run) {
2417 run->exit_reason = KVM_EXIT_MMIO;
2418 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2419 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2420 run->mmio.len = vcpu->mmio_size;
2421 run->mmio.is_write = vcpu->mmio_is_write;
2425 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2426 return EMULATE_DONE;
2427 if (!vcpu->mmio_needed) {
2428 kvm_report_emulation_failure(vcpu, "mmio");
2429 return EMULATE_FAIL;
2431 return EMULATE_DO_MMIO;
2434 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2436 if (vcpu->mmio_is_write) {
2437 vcpu->mmio_needed = 0;
2438 return EMULATE_DO_MMIO;
2441 return EMULATE_DONE;
2443 EXPORT_SYMBOL_GPL(emulate_instruction);
2445 static int pio_copy_data(struct kvm_vcpu *vcpu)
2447 void *p = vcpu->arch.pio_data;
2448 gva_t q = vcpu->arch.pio.guest_gva;
2452 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2453 if (vcpu->arch.pio.in)
2454 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2456 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2460 int complete_pio(struct kvm_vcpu *vcpu)
2462 struct kvm_pio_request *io = &vcpu->arch.pio;
2469 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2470 memcpy(&val, vcpu->arch.pio_data, io->size);
2471 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2475 r = pio_copy_data(vcpu);
2482 delta *= io->cur_count;
2484 * The size of the register should really depend on
2485 * current address size.
2487 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2489 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2495 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2497 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2499 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2501 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2505 io->count -= io->cur_count;
2511 static void kernel_pio(struct kvm_io_device *pio_dev,
2512 struct kvm_vcpu *vcpu,
2515 /* TODO: String I/O for in kernel device */
2517 mutex_lock(&vcpu->kvm->lock);
2518 if (vcpu->arch.pio.in)
2519 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2520 vcpu->arch.pio.size,
2523 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2524 vcpu->arch.pio.size,
2526 mutex_unlock(&vcpu->kvm->lock);
2529 static void pio_string_write(struct kvm_io_device *pio_dev,
2530 struct kvm_vcpu *vcpu)
2532 struct kvm_pio_request *io = &vcpu->arch.pio;
2533 void *pd = vcpu->arch.pio_data;
2536 mutex_lock(&vcpu->kvm->lock);
2537 for (i = 0; i < io->cur_count; i++) {
2538 kvm_iodevice_write(pio_dev, io->port,
2543 mutex_unlock(&vcpu->kvm->lock);
2546 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2547 gpa_t addr, int len,
2550 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2553 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2554 int size, unsigned port)
2556 struct kvm_io_device *pio_dev;
2559 vcpu->run->exit_reason = KVM_EXIT_IO;
2560 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2561 vcpu->run->io.size = vcpu->arch.pio.size = size;
2562 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2563 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2564 vcpu->run->io.port = vcpu->arch.pio.port = port;
2565 vcpu->arch.pio.in = in;
2566 vcpu->arch.pio.string = 0;
2567 vcpu->arch.pio.down = 0;
2568 vcpu->arch.pio.rep = 0;
2570 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2571 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2574 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2577 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2578 memcpy(vcpu->arch.pio_data, &val, 4);
2580 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2582 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2588 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2590 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2591 int size, unsigned long count, int down,
2592 gva_t address, int rep, unsigned port)
2594 unsigned now, in_page;
2596 struct kvm_io_device *pio_dev;
2598 vcpu->run->exit_reason = KVM_EXIT_IO;
2599 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2600 vcpu->run->io.size = vcpu->arch.pio.size = size;
2601 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2602 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2603 vcpu->run->io.port = vcpu->arch.pio.port = port;
2604 vcpu->arch.pio.in = in;
2605 vcpu->arch.pio.string = 1;
2606 vcpu->arch.pio.down = down;
2607 vcpu->arch.pio.rep = rep;
2609 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2610 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2613 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2617 kvm_x86_ops->skip_emulated_instruction(vcpu);
2622 in_page = PAGE_SIZE - offset_in_page(address);
2624 in_page = offset_in_page(address) + size;
2625 now = min(count, (unsigned long)in_page / size);
2630 * String I/O in reverse. Yuck. Kill the guest, fix later.
2632 pr_unimpl(vcpu, "guest string pio down\n");
2633 kvm_inject_gp(vcpu, 0);
2636 vcpu->run->io.count = now;
2637 vcpu->arch.pio.cur_count = now;
2639 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2640 kvm_x86_ops->skip_emulated_instruction(vcpu);
2642 vcpu->arch.pio.guest_gva = address;
2644 pio_dev = vcpu_find_pio_dev(vcpu, port,
2645 vcpu->arch.pio.cur_count,
2646 !vcpu->arch.pio.in);
2647 if (!vcpu->arch.pio.in) {
2648 /* string PIO write */
2649 ret = pio_copy_data(vcpu);
2650 if (ret == X86EMUL_PROPAGATE_FAULT) {
2651 kvm_inject_gp(vcpu, 0);
2654 if (ret == 0 && pio_dev) {
2655 pio_string_write(pio_dev, vcpu);
2657 if (vcpu->arch.pio.count == 0)
2661 pr_unimpl(vcpu, "no string pio read support yet, "
2662 "port %x size %d count %ld\n",
2667 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2669 static void bounce_off(void *info)
2674 static unsigned int ref_freq;
2675 static unsigned long tsc_khz_ref;
2677 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2680 struct cpufreq_freqs *freq = data;
2682 struct kvm_vcpu *vcpu;
2683 int i, send_ipi = 0;
2686 ref_freq = freq->old;
2688 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2690 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2692 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2694 spin_lock(&kvm_lock);
2695 list_for_each_entry(kvm, &vm_list, vm_list) {
2696 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2697 vcpu = kvm->vcpus[i];
2700 if (vcpu->cpu != freq->cpu)
2702 if (!kvm_request_guest_time_update(vcpu))
2704 if (vcpu->cpu != smp_processor_id())
2708 spin_unlock(&kvm_lock);
2710 if (freq->old < freq->new && send_ipi) {
2712 * We upscale the frequency. Must make the guest
2713 * doesn't see old kvmclock values while running with
2714 * the new frequency, otherwise we risk the guest sees
2715 * time go backwards.
2717 * In case we update the frequency for another cpu
2718 * (which might be in guest context) send an interrupt
2719 * to kick the cpu out of guest context. Next time
2720 * guest context is entered kvmclock will be updated,
2721 * so the guest will not see stale values.
2723 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2728 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2729 .notifier_call = kvmclock_cpufreq_notifier
2732 int kvm_arch_init(void *opaque)
2735 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2738 printk(KERN_ERR "kvm: already loaded the other module\n");
2743 if (!ops->cpu_has_kvm_support()) {
2744 printk(KERN_ERR "kvm: no hardware support\n");
2748 if (ops->disabled_by_bios()) {
2749 printk(KERN_ERR "kvm: disabled by bios\n");
2754 r = kvm_mmu_module_init();
2758 kvm_init_msr_list();
2761 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2762 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2763 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2764 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2766 for_each_possible_cpu(cpu)
2767 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2768 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2769 tsc_khz_ref = tsc_khz;
2770 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2771 CPUFREQ_TRANSITION_NOTIFIER);
2780 void kvm_arch_exit(void)
2782 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2783 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2784 CPUFREQ_TRANSITION_NOTIFIER);
2786 kvm_mmu_module_exit();
2789 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2791 ++vcpu->stat.halt_exits;
2792 KVMTRACE_0D(HLT, vcpu, handler);
2793 if (irqchip_in_kernel(vcpu->kvm)) {
2794 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2797 vcpu->run->exit_reason = KVM_EXIT_HLT;
2801 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2803 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2806 if (is_long_mode(vcpu))
2809 return a0 | ((gpa_t)a1 << 32);
2812 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2814 unsigned long nr, a0, a1, a2, a3, ret;
2817 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2818 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2819 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2820 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2821 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2823 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2825 if (!is_long_mode(vcpu)) {
2834 case KVM_HC_VAPIC_POLL_IRQ:
2838 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2844 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2845 ++vcpu->stat.hypercalls;
2848 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2850 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2852 char instruction[3];
2854 unsigned long rip = kvm_rip_read(vcpu);
2858 * Blow out the MMU to ensure that no other VCPU has an active mapping
2859 * to ensure that the updated hypercall appears atomically across all
2862 kvm_mmu_zap_all(vcpu->kvm);
2864 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2865 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2866 != X86EMUL_CONTINUE)
2872 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2874 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2877 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2879 struct descriptor_table dt = { limit, base };
2881 kvm_x86_ops->set_gdt(vcpu, &dt);
2884 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2886 struct descriptor_table dt = { limit, base };
2888 kvm_x86_ops->set_idt(vcpu, &dt);
2891 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2892 unsigned long *rflags)
2894 kvm_lmsw(vcpu, msw);
2895 *rflags = kvm_x86_ops->get_rflags(vcpu);
2898 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2900 unsigned long value;
2902 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2905 value = vcpu->arch.cr0;
2908 value = vcpu->arch.cr2;
2911 value = vcpu->arch.cr3;
2914 value = vcpu->arch.cr4;
2917 value = kvm_get_cr8(vcpu);
2920 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2923 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2924 (u32)((u64)value >> 32), handler);
2929 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2930 unsigned long *rflags)
2932 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2933 (u32)((u64)val >> 32), handler);
2937 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2938 *rflags = kvm_x86_ops->get_rflags(vcpu);
2941 vcpu->arch.cr2 = val;
2944 kvm_set_cr3(vcpu, val);
2947 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2950 kvm_set_cr8(vcpu, val & 0xfUL);
2953 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2957 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2959 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2960 int j, nent = vcpu->arch.cpuid_nent;
2962 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2963 /* when no next entry is found, the current entry[i] is reselected */
2964 for (j = i + 1; ; j = (j + 1) % nent) {
2965 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2966 if (ej->function == e->function) {
2967 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2971 return 0; /* silence gcc, even though control never reaches here */
2974 /* find an entry with matching function, matching index (if needed), and that
2975 * should be read next (if it's stateful) */
2976 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2977 u32 function, u32 index)
2979 if (e->function != function)
2981 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2983 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2984 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2989 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
2990 u32 function, u32 index)
2993 struct kvm_cpuid_entry2 *best = NULL;
2995 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2996 struct kvm_cpuid_entry2 *e;
2998 e = &vcpu->arch.cpuid_entries[i];
2999 if (is_matching_cpuid_entry(e, function, index)) {
3000 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3001 move_to_next_stateful_cpuid_entry(vcpu, i);
3006 * Both basic or both extended?
3008 if (((e->function ^ function) & 0x80000000) == 0)
3009 if (!best || e->function > best->function)
3015 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3017 u32 function, index;
3018 struct kvm_cpuid_entry2 *best;
3020 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3021 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3022 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3023 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3024 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3025 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3026 best = kvm_find_cpuid_entry(vcpu, function, index);
3028 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3029 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3030 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3031 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3033 kvm_x86_ops->skip_emulated_instruction(vcpu);
3034 KVMTRACE_5D(CPUID, vcpu, function,
3035 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3036 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3037 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3038 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3040 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3043 * Check if userspace requested an interrupt window, and that the
3044 * interrupt window is open.
3046 * No need to exit to userspace if we already have an interrupt queued.
3048 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3049 struct kvm_run *kvm_run)
3051 return (!vcpu->arch.irq_summary &&
3052 kvm_run->request_interrupt_window &&
3053 vcpu->arch.interrupt_window_open &&
3054 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3057 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3058 struct kvm_run *kvm_run)
3060 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3061 kvm_run->cr8 = kvm_get_cr8(vcpu);
3062 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3063 if (irqchip_in_kernel(vcpu->kvm))
3064 kvm_run->ready_for_interrupt_injection = 1;
3066 kvm_run->ready_for_interrupt_injection =
3067 (vcpu->arch.interrupt_window_open &&
3068 vcpu->arch.irq_summary == 0);
3071 static void vapic_enter(struct kvm_vcpu *vcpu)
3073 struct kvm_lapic *apic = vcpu->arch.apic;
3076 if (!apic || !apic->vapic_addr)
3079 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3081 vcpu->arch.apic->vapic_page = page;
3084 static void vapic_exit(struct kvm_vcpu *vcpu)
3086 struct kvm_lapic *apic = vcpu->arch.apic;
3088 if (!apic || !apic->vapic_addr)
3091 down_read(&vcpu->kvm->slots_lock);
3092 kvm_release_page_dirty(apic->vapic_page);
3093 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3094 up_read(&vcpu->kvm->slots_lock);
3097 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3102 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3103 kvm_mmu_unload(vcpu);
3105 r = kvm_mmu_reload(vcpu);
3109 if (vcpu->requests) {
3110 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3111 __kvm_migrate_timers(vcpu);
3112 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3113 kvm_write_guest_time(vcpu);
3114 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3115 kvm_mmu_sync_roots(vcpu);
3116 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3117 kvm_x86_ops->tlb_flush(vcpu);
3118 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3120 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3124 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3125 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3131 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3132 kvm_inject_pending_timer_irqs(vcpu);
3136 kvm_x86_ops->prepare_guest_switch(vcpu);
3137 kvm_load_guest_fpu(vcpu);
3139 local_irq_disable();
3141 if (vcpu->requests || need_resched() || signal_pending(current)) {
3148 vcpu->guest_mode = 1;
3150 * Make sure that guest_mode assignment won't happen after
3151 * testing the pending IRQ vector bitmap.
3155 if (vcpu->arch.exception.pending)
3156 __queue_exception(vcpu);
3157 else if (irqchip_in_kernel(vcpu->kvm))
3158 kvm_x86_ops->inject_pending_irq(vcpu);
3160 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3162 kvm_lapic_sync_to_vapic(vcpu);
3164 up_read(&vcpu->kvm->slots_lock);
3168 get_debugreg(vcpu->arch.host_dr6, 6);
3169 get_debugreg(vcpu->arch.host_dr7, 7);
3170 if (unlikely(vcpu->arch.switch_db_regs)) {
3171 get_debugreg(vcpu->arch.host_db[0], 0);
3172 get_debugreg(vcpu->arch.host_db[1], 1);
3173 get_debugreg(vcpu->arch.host_db[2], 2);
3174 get_debugreg(vcpu->arch.host_db[3], 3);
3177 set_debugreg(vcpu->arch.eff_db[0], 0);
3178 set_debugreg(vcpu->arch.eff_db[1], 1);
3179 set_debugreg(vcpu->arch.eff_db[2], 2);
3180 set_debugreg(vcpu->arch.eff_db[3], 3);
3183 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3184 kvm_x86_ops->run(vcpu, kvm_run);
3186 if (unlikely(vcpu->arch.switch_db_regs)) {
3188 set_debugreg(vcpu->arch.host_db[0], 0);
3189 set_debugreg(vcpu->arch.host_db[1], 1);
3190 set_debugreg(vcpu->arch.host_db[2], 2);
3191 set_debugreg(vcpu->arch.host_db[3], 3);
3193 set_debugreg(vcpu->arch.host_dr6, 6);
3194 set_debugreg(vcpu->arch.host_dr7, 7);
3196 vcpu->guest_mode = 0;
3202 * We must have an instruction between local_irq_enable() and
3203 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3204 * the interrupt shadow. The stat.exits increment will do nicely.
3205 * But we need to prevent reordering, hence this barrier():
3213 down_read(&vcpu->kvm->slots_lock);
3216 * Profile KVM exit RIPs:
3218 if (unlikely(prof_on == KVM_PROFILING)) {
3219 unsigned long rip = kvm_rip_read(vcpu);
3220 profile_hit(KVM_PROFILING, (void *)rip);
3223 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3224 vcpu->arch.exception.pending = false;
3226 kvm_lapic_sync_from_vapic(vcpu);
3228 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3233 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3237 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3238 pr_debug("vcpu %d received sipi with vector # %x\n",
3239 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3240 kvm_lapic_reset(vcpu);
3241 r = kvm_arch_vcpu_reset(vcpu);
3244 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3247 down_read(&vcpu->kvm->slots_lock);
3252 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3253 r = vcpu_enter_guest(vcpu, kvm_run);
3255 up_read(&vcpu->kvm->slots_lock);
3256 kvm_vcpu_block(vcpu);
3257 down_read(&vcpu->kvm->slots_lock);
3258 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3259 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3260 vcpu->arch.mp_state =
3261 KVM_MP_STATE_RUNNABLE;
3262 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3267 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3269 kvm_run->exit_reason = KVM_EXIT_INTR;
3270 ++vcpu->stat.request_irq_exits;
3272 if (signal_pending(current)) {
3274 kvm_run->exit_reason = KVM_EXIT_INTR;
3275 ++vcpu->stat.signal_exits;
3277 if (need_resched()) {
3278 up_read(&vcpu->kvm->slots_lock);
3280 down_read(&vcpu->kvm->slots_lock);
3285 up_read(&vcpu->kvm->slots_lock);
3286 post_kvm_run_save(vcpu, kvm_run);
3293 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3300 if (vcpu->sigset_active)
3301 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3303 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3304 kvm_vcpu_block(vcpu);
3305 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3310 /* re-sync apic's tpr */
3311 if (!irqchip_in_kernel(vcpu->kvm))
3312 kvm_set_cr8(vcpu, kvm_run->cr8);
3314 if (vcpu->arch.pio.cur_count) {
3315 r = complete_pio(vcpu);
3319 #if CONFIG_HAS_IOMEM
3320 if (vcpu->mmio_needed) {
3321 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3322 vcpu->mmio_read_completed = 1;
3323 vcpu->mmio_needed = 0;
3325 down_read(&vcpu->kvm->slots_lock);
3326 r = emulate_instruction(vcpu, kvm_run,
3327 vcpu->arch.mmio_fault_cr2, 0,
3328 EMULTYPE_NO_DECODE);
3329 up_read(&vcpu->kvm->slots_lock);
3330 if (r == EMULATE_DO_MMIO) {
3332 * Read-modify-write. Back to userspace.
3339 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3340 kvm_register_write(vcpu, VCPU_REGS_RAX,
3341 kvm_run->hypercall.ret);
3343 r = __vcpu_run(vcpu, kvm_run);
3346 if (vcpu->sigset_active)
3347 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3353 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3357 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3358 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3359 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3360 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3361 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3362 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3363 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3364 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3365 #ifdef CONFIG_X86_64
3366 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3367 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3368 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3369 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3370 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3371 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3372 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3373 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3376 regs->rip = kvm_rip_read(vcpu);
3377 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3380 * Don't leak debug flags in case they were set for guest debugging
3382 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3383 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3390 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3394 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3395 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3396 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3397 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3398 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3399 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3400 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3401 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3402 #ifdef CONFIG_X86_64
3403 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3404 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3405 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3406 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3407 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3408 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3409 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3410 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3414 kvm_rip_write(vcpu, regs->rip);
3415 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3418 vcpu->arch.exception.pending = false;
3425 void kvm_get_segment(struct kvm_vcpu *vcpu,
3426 struct kvm_segment *var, int seg)
3428 kvm_x86_ops->get_segment(vcpu, var, seg);
3431 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3433 struct kvm_segment cs;
3435 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3439 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3441 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3442 struct kvm_sregs *sregs)
3444 struct descriptor_table dt;
3449 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3450 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3451 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3452 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3453 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3454 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3456 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3457 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3459 kvm_x86_ops->get_idt(vcpu, &dt);
3460 sregs->idt.limit = dt.limit;
3461 sregs->idt.base = dt.base;
3462 kvm_x86_ops->get_gdt(vcpu, &dt);
3463 sregs->gdt.limit = dt.limit;
3464 sregs->gdt.base = dt.base;
3466 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3467 sregs->cr0 = vcpu->arch.cr0;
3468 sregs->cr2 = vcpu->arch.cr2;
3469 sregs->cr3 = vcpu->arch.cr3;
3470 sregs->cr4 = vcpu->arch.cr4;
3471 sregs->cr8 = kvm_get_cr8(vcpu);
3472 sregs->efer = vcpu->arch.shadow_efer;
3473 sregs->apic_base = kvm_get_apic_base(vcpu);
3475 if (irqchip_in_kernel(vcpu->kvm)) {
3476 memset(sregs->interrupt_bitmap, 0,
3477 sizeof sregs->interrupt_bitmap);
3478 pending_vec = kvm_x86_ops->get_irq(vcpu);
3479 if (pending_vec >= 0)
3480 set_bit(pending_vec,
3481 (unsigned long *)sregs->interrupt_bitmap);
3483 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3484 sizeof sregs->interrupt_bitmap);
3491 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3492 struct kvm_mp_state *mp_state)
3495 mp_state->mp_state = vcpu->arch.mp_state;
3500 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3501 struct kvm_mp_state *mp_state)
3504 vcpu->arch.mp_state = mp_state->mp_state;
3509 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3510 struct kvm_segment *var, int seg)
3512 kvm_x86_ops->set_segment(vcpu, var, seg);
3515 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3516 struct kvm_segment *kvm_desct)
3518 kvm_desct->base = seg_desc->base0;
3519 kvm_desct->base |= seg_desc->base1 << 16;
3520 kvm_desct->base |= seg_desc->base2 << 24;
3521 kvm_desct->limit = seg_desc->limit0;
3522 kvm_desct->limit |= seg_desc->limit << 16;
3524 kvm_desct->limit <<= 12;
3525 kvm_desct->limit |= 0xfff;
3527 kvm_desct->selector = selector;
3528 kvm_desct->type = seg_desc->type;
3529 kvm_desct->present = seg_desc->p;
3530 kvm_desct->dpl = seg_desc->dpl;
3531 kvm_desct->db = seg_desc->d;
3532 kvm_desct->s = seg_desc->s;
3533 kvm_desct->l = seg_desc->l;
3534 kvm_desct->g = seg_desc->g;
3535 kvm_desct->avl = seg_desc->avl;
3537 kvm_desct->unusable = 1;
3539 kvm_desct->unusable = 0;
3540 kvm_desct->padding = 0;
3543 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3545 struct descriptor_table *dtable)
3547 if (selector & 1 << 2) {
3548 struct kvm_segment kvm_seg;
3550 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3552 if (kvm_seg.unusable)
3555 dtable->limit = kvm_seg.limit;
3556 dtable->base = kvm_seg.base;
3559 kvm_x86_ops->get_gdt(vcpu, dtable);
3562 /* allowed just for 8 bytes segments */
3563 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3564 struct desc_struct *seg_desc)
3567 struct descriptor_table dtable;
3568 u16 index = selector >> 3;
3570 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3572 if (dtable.limit < index * 8 + 7) {
3573 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3576 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3578 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3581 /* allowed just for 8 bytes segments */
3582 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3583 struct desc_struct *seg_desc)
3586 struct descriptor_table dtable;
3587 u16 index = selector >> 3;
3589 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3591 if (dtable.limit < index * 8 + 7)
3593 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3595 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3598 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3599 struct desc_struct *seg_desc)
3603 base_addr = seg_desc->base0;
3604 base_addr |= (seg_desc->base1 << 16);
3605 base_addr |= (seg_desc->base2 << 24);
3607 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3610 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3612 struct kvm_segment kvm_seg;
3614 kvm_get_segment(vcpu, &kvm_seg, seg);
3615 return kvm_seg.selector;
3618 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3620 struct kvm_segment *kvm_seg)
3622 struct desc_struct seg_desc;
3624 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3626 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3630 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3632 struct kvm_segment segvar = {
3633 .base = selector << 4,
3635 .selector = selector,
3646 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3650 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3651 int type_bits, int seg)
3653 struct kvm_segment kvm_seg;
3655 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3656 return kvm_load_realmode_segment(vcpu, selector, seg);
3657 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3659 kvm_seg.type |= type_bits;
3661 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3662 seg != VCPU_SREG_LDTR)
3664 kvm_seg.unusable = 1;
3666 kvm_set_segment(vcpu, &kvm_seg, seg);
3670 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3671 struct tss_segment_32 *tss)
3673 tss->cr3 = vcpu->arch.cr3;
3674 tss->eip = kvm_rip_read(vcpu);
3675 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3676 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3677 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3678 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3679 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3680 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3681 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3682 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3683 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3684 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3685 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3686 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3687 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3688 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3689 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3690 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3691 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3694 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3695 struct tss_segment_32 *tss)
3697 kvm_set_cr3(vcpu, tss->cr3);
3699 kvm_rip_write(vcpu, tss->eip);
3700 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3702 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3703 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3704 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3705 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3706 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3707 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3708 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3709 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3711 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3714 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3717 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3720 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3723 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3726 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3729 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3734 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3735 struct tss_segment_16 *tss)
3737 tss->ip = kvm_rip_read(vcpu);
3738 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3739 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3740 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3741 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3742 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3743 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3744 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3745 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3746 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3748 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3749 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3750 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3751 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3752 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3753 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3756 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3757 struct tss_segment_16 *tss)
3759 kvm_rip_write(vcpu, tss->ip);
3760 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3761 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3762 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3763 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3764 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3765 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3766 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3767 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3768 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3770 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3773 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3776 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3779 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3782 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3787 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3789 struct desc_struct *nseg_desc)
3791 struct tss_segment_16 tss_segment_16;
3794 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3795 sizeof tss_segment_16))
3798 save_state_to_tss16(vcpu, &tss_segment_16);
3800 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3801 sizeof tss_segment_16))
3804 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3805 &tss_segment_16, sizeof tss_segment_16))
3808 if (load_state_from_tss16(vcpu, &tss_segment_16))
3816 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3818 struct desc_struct *nseg_desc)
3820 struct tss_segment_32 tss_segment_32;
3823 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3824 sizeof tss_segment_32))
3827 save_state_to_tss32(vcpu, &tss_segment_32);
3829 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3830 sizeof tss_segment_32))
3833 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3834 &tss_segment_32, sizeof tss_segment_32))
3837 if (load_state_from_tss32(vcpu, &tss_segment_32))
3845 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3847 struct kvm_segment tr_seg;
3848 struct desc_struct cseg_desc;
3849 struct desc_struct nseg_desc;
3851 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3852 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3854 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3856 /* FIXME: Handle errors. Failure to read either TSS or their
3857 * descriptors should generate a pagefault.
3859 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3862 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3865 if (reason != TASK_SWITCH_IRET) {
3868 cpl = kvm_x86_ops->get_cpl(vcpu);
3869 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3870 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3875 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3876 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3880 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3881 cseg_desc.type &= ~(1 << 1); //clear the B flag
3882 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3885 if (reason == TASK_SWITCH_IRET) {
3886 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3887 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3890 kvm_x86_ops->skip_emulated_instruction(vcpu);
3892 if (nseg_desc.type & 8)
3893 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3896 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3899 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3900 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3901 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3904 if (reason != TASK_SWITCH_IRET) {
3905 nseg_desc.type |= (1 << 1);
3906 save_guest_segment_descriptor(vcpu, tss_selector,
3910 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3911 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3913 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3917 EXPORT_SYMBOL_GPL(kvm_task_switch);
3919 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3920 struct kvm_sregs *sregs)
3922 int mmu_reset_needed = 0;
3923 int i, pending_vec, max_bits;
3924 struct descriptor_table dt;
3928 dt.limit = sregs->idt.limit;
3929 dt.base = sregs->idt.base;
3930 kvm_x86_ops->set_idt(vcpu, &dt);
3931 dt.limit = sregs->gdt.limit;
3932 dt.base = sregs->gdt.base;
3933 kvm_x86_ops->set_gdt(vcpu, &dt);
3935 vcpu->arch.cr2 = sregs->cr2;
3936 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3937 vcpu->arch.cr3 = sregs->cr3;
3939 kvm_set_cr8(vcpu, sregs->cr8);
3941 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3942 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3943 kvm_set_apic_base(vcpu, sregs->apic_base);
3945 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3947 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3948 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3949 vcpu->arch.cr0 = sregs->cr0;
3951 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3952 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3953 if (!is_long_mode(vcpu) && is_pae(vcpu))
3954 load_pdptrs(vcpu, vcpu->arch.cr3);
3956 if (mmu_reset_needed)
3957 kvm_mmu_reset_context(vcpu);
3959 if (!irqchip_in_kernel(vcpu->kvm)) {
3960 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3961 sizeof vcpu->arch.irq_pending);
3962 vcpu->arch.irq_summary = 0;
3963 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3964 if (vcpu->arch.irq_pending[i])
3965 __set_bit(i, &vcpu->arch.irq_summary);
3967 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3968 pending_vec = find_first_bit(
3969 (const unsigned long *)sregs->interrupt_bitmap,
3971 /* Only pending external irq is handled here */
3972 if (pending_vec < max_bits) {
3973 kvm_x86_ops->set_irq(vcpu, pending_vec);
3974 pr_debug("Set back pending irq %d\n",
3977 kvm_pic_clear_isr_ack(vcpu->kvm);
3980 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3981 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3982 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3983 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3984 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3985 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3987 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3988 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3990 /* Older userspace won't unhalt the vcpu on reset. */
3991 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3992 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3993 !(vcpu->arch.cr0 & X86_CR0_PE))
3994 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4001 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4002 struct kvm_guest_debug *dbg)
4008 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4009 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4010 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4011 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4012 vcpu->arch.switch_db_regs =
4013 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4015 for (i = 0; i < KVM_NR_DB_REGS; i++)
4016 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4017 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4020 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4022 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4023 kvm_queue_exception(vcpu, DB_VECTOR);
4024 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4025 kvm_queue_exception(vcpu, BP_VECTOR);
4033 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4034 * we have asm/x86/processor.h
4045 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4046 #ifdef CONFIG_X86_64
4047 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4049 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4054 * Translate a guest virtual address to a guest physical address.
4056 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4057 struct kvm_translation *tr)
4059 unsigned long vaddr = tr->linear_address;
4063 down_read(&vcpu->kvm->slots_lock);
4064 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4065 up_read(&vcpu->kvm->slots_lock);
4066 tr->physical_address = gpa;
4067 tr->valid = gpa != UNMAPPED_GVA;
4075 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4077 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4081 memcpy(fpu->fpr, fxsave->st_space, 128);
4082 fpu->fcw = fxsave->cwd;
4083 fpu->fsw = fxsave->swd;
4084 fpu->ftwx = fxsave->twd;
4085 fpu->last_opcode = fxsave->fop;
4086 fpu->last_ip = fxsave->rip;
4087 fpu->last_dp = fxsave->rdp;
4088 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4095 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4097 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4101 memcpy(fxsave->st_space, fpu->fpr, 128);
4102 fxsave->cwd = fpu->fcw;
4103 fxsave->swd = fpu->fsw;
4104 fxsave->twd = fpu->ftwx;
4105 fxsave->fop = fpu->last_opcode;
4106 fxsave->rip = fpu->last_ip;
4107 fxsave->rdp = fpu->last_dp;
4108 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4115 void fx_init(struct kvm_vcpu *vcpu)
4117 unsigned after_mxcsr_mask;
4120 * Touch the fpu the first time in non atomic context as if
4121 * this is the first fpu instruction the exception handler
4122 * will fire before the instruction returns and it'll have to
4123 * allocate ram with GFP_KERNEL.
4126 kvm_fx_save(&vcpu->arch.host_fx_image);
4128 /* Initialize guest FPU by resetting ours and saving into guest's */
4130 kvm_fx_save(&vcpu->arch.host_fx_image);
4132 kvm_fx_save(&vcpu->arch.guest_fx_image);
4133 kvm_fx_restore(&vcpu->arch.host_fx_image);
4136 vcpu->arch.cr0 |= X86_CR0_ET;
4137 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4138 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4139 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4140 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4142 EXPORT_SYMBOL_GPL(fx_init);
4144 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4146 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4149 vcpu->guest_fpu_loaded = 1;
4150 kvm_fx_save(&vcpu->arch.host_fx_image);
4151 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4153 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4155 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4157 if (!vcpu->guest_fpu_loaded)
4160 vcpu->guest_fpu_loaded = 0;
4161 kvm_fx_save(&vcpu->arch.guest_fx_image);
4162 kvm_fx_restore(&vcpu->arch.host_fx_image);
4163 ++vcpu->stat.fpu_reload;
4165 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4167 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4169 if (vcpu->arch.time_page) {
4170 kvm_release_page_dirty(vcpu->arch.time_page);
4171 vcpu->arch.time_page = NULL;
4174 kvm_x86_ops->vcpu_free(vcpu);
4177 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4180 return kvm_x86_ops->vcpu_create(kvm, id);
4183 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4187 /* We do fxsave: this must be aligned. */
4188 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4190 vcpu->arch.mtrr_state.have_fixed = 1;
4192 r = kvm_arch_vcpu_reset(vcpu);
4194 r = kvm_mmu_setup(vcpu);
4201 kvm_x86_ops->vcpu_free(vcpu);
4205 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4208 kvm_mmu_unload(vcpu);
4211 kvm_x86_ops->vcpu_free(vcpu);
4214 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4216 vcpu->arch.nmi_pending = false;
4217 vcpu->arch.nmi_injected = false;
4219 vcpu->arch.switch_db_regs = 0;
4220 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4221 vcpu->arch.dr6 = DR6_FIXED_1;
4222 vcpu->arch.dr7 = DR7_FIXED_1;
4224 return kvm_x86_ops->vcpu_reset(vcpu);
4227 void kvm_arch_hardware_enable(void *garbage)
4229 kvm_x86_ops->hardware_enable(garbage);
4232 void kvm_arch_hardware_disable(void *garbage)
4234 kvm_x86_ops->hardware_disable(garbage);
4237 int kvm_arch_hardware_setup(void)
4239 return kvm_x86_ops->hardware_setup();
4242 void kvm_arch_hardware_unsetup(void)
4244 kvm_x86_ops->hardware_unsetup();
4247 void kvm_arch_check_processor_compat(void *rtn)
4249 kvm_x86_ops->check_processor_compatibility(rtn);
4252 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4258 BUG_ON(vcpu->kvm == NULL);
4261 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4262 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4263 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4265 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4267 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4272 vcpu->arch.pio_data = page_address(page);
4274 r = kvm_mmu_create(vcpu);
4276 goto fail_free_pio_data;
4278 if (irqchip_in_kernel(kvm)) {
4279 r = kvm_create_lapic(vcpu);
4281 goto fail_mmu_destroy;
4287 kvm_mmu_destroy(vcpu);
4289 free_page((unsigned long)vcpu->arch.pio_data);
4294 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4296 kvm_free_lapic(vcpu);
4297 down_read(&vcpu->kvm->slots_lock);
4298 kvm_mmu_destroy(vcpu);
4299 up_read(&vcpu->kvm->slots_lock);
4300 free_page((unsigned long)vcpu->arch.pio_data);
4303 struct kvm *kvm_arch_create_vm(void)
4305 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4308 return ERR_PTR(-ENOMEM);
4310 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4311 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4312 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4314 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4315 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4317 rdtscll(kvm->arch.vm_init_tsc);
4322 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4325 kvm_mmu_unload(vcpu);
4329 static void kvm_free_vcpus(struct kvm *kvm)
4334 * Unpin any mmu pages first.
4336 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4338 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4339 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4340 if (kvm->vcpus[i]) {
4341 kvm_arch_vcpu_free(kvm->vcpus[i]);
4342 kvm->vcpus[i] = NULL;
4348 void kvm_arch_sync_events(struct kvm *kvm)
4350 kvm_free_all_assigned_devices(kvm);
4353 void kvm_arch_destroy_vm(struct kvm *kvm)
4355 kvm_iommu_unmap_guest(kvm);
4357 kfree(kvm->arch.vpic);
4358 kfree(kvm->arch.vioapic);
4359 kvm_free_vcpus(kvm);
4360 kvm_free_physmem(kvm);
4361 if (kvm->arch.apic_access_page)
4362 put_page(kvm->arch.apic_access_page);
4363 if (kvm->arch.ept_identity_pagetable)
4364 put_page(kvm->arch.ept_identity_pagetable);
4368 int kvm_arch_set_memory_region(struct kvm *kvm,
4369 struct kvm_userspace_memory_region *mem,
4370 struct kvm_memory_slot old,
4373 int npages = mem->memory_size >> PAGE_SHIFT;
4374 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4376 /*To keep backward compatibility with older userspace,
4377 *x86 needs to hanlde !user_alloc case.
4380 if (npages && !old.rmap) {
4381 unsigned long userspace_addr;
4383 down_write(¤t->mm->mmap_sem);
4384 userspace_addr = do_mmap(NULL, 0,
4386 PROT_READ | PROT_WRITE,
4387 MAP_PRIVATE | MAP_ANONYMOUS,
4389 up_write(¤t->mm->mmap_sem);
4391 if (IS_ERR((void *)userspace_addr))
4392 return PTR_ERR((void *)userspace_addr);
4394 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4395 spin_lock(&kvm->mmu_lock);
4396 memslot->userspace_addr = userspace_addr;
4397 spin_unlock(&kvm->mmu_lock);
4399 if (!old.user_alloc && old.rmap) {
4402 down_write(¤t->mm->mmap_sem);
4403 ret = do_munmap(current->mm, old.userspace_addr,
4404 old.npages * PAGE_SIZE);
4405 up_write(¤t->mm->mmap_sem);
4408 "kvm_vm_ioctl_set_memory_region: "
4409 "failed to munmap memory\n");
4414 if (!kvm->arch.n_requested_mmu_pages) {
4415 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4416 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4419 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4420 kvm_flush_remote_tlbs(kvm);
4425 void kvm_arch_flush_shadow(struct kvm *kvm)
4427 kvm_mmu_zap_all(kvm);
4430 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4432 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4433 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4434 || vcpu->arch.nmi_pending;
4437 static void vcpu_kick_intr(void *info)
4440 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4441 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4445 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4447 int ipi_pcpu = vcpu->cpu;
4448 int cpu = get_cpu();
4450 if (waitqueue_active(&vcpu->wq)) {
4451 wake_up_interruptible(&vcpu->wq);
4452 ++vcpu->stat.halt_wakeup;
4455 * We may be called synchronously with irqs disabled in guest mode,
4456 * So need not to call smp_call_function_single() in that case.
4458 if (vcpu->guest_mode && vcpu->cpu != cpu)
4459 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);