dm snapshot: persistent fix dtr cleanup
[linux-2.6] / drivers / ide / icside.c
1 /*
2  * Copyright (c) 1996-2004 Russell King.
3  *
4  * Please note that this platform does not support 32-bit IDE IO.
5  */
6
7 #include <linux/string.h>
8 #include <linux/module.h>
9 #include <linux/ioport.h>
10 #include <linux/slab.h>
11 #include <linux/blkdev.h>
12 #include <linux/errno.h>
13 #include <linux/ide.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/scatterlist.h>
18 #include <linux/io.h>
19
20 #include <asm/dma.h>
21 #include <asm/ecard.h>
22
23 #define DRV_NAME "icside"
24
25 #define ICS_IDENT_OFFSET                0x2280
26
27 #define ICS_ARCIN_V5_INTRSTAT           0x0000
28 #define ICS_ARCIN_V5_INTROFFSET         0x0004
29 #define ICS_ARCIN_V5_IDEOFFSET          0x2800
30 #define ICS_ARCIN_V5_IDEALTOFFSET       0x2b80
31 #define ICS_ARCIN_V5_IDESTEPPING        6
32
33 #define ICS_ARCIN_V6_IDEOFFSET_1        0x2000
34 #define ICS_ARCIN_V6_INTROFFSET_1       0x2200
35 #define ICS_ARCIN_V6_INTRSTAT_1         0x2290
36 #define ICS_ARCIN_V6_IDEALTOFFSET_1     0x2380
37 #define ICS_ARCIN_V6_IDEOFFSET_2        0x3000
38 #define ICS_ARCIN_V6_INTROFFSET_2       0x3200
39 #define ICS_ARCIN_V6_INTRSTAT_2         0x3290
40 #define ICS_ARCIN_V6_IDEALTOFFSET_2     0x3380
41 #define ICS_ARCIN_V6_IDESTEPPING        6
42
43 struct cardinfo {
44         unsigned int dataoffset;
45         unsigned int ctrloffset;
46         unsigned int stepping;
47 };
48
49 static struct cardinfo icside_cardinfo_v5 = {
50         .dataoffset     = ICS_ARCIN_V5_IDEOFFSET,
51         .ctrloffset     = ICS_ARCIN_V5_IDEALTOFFSET,
52         .stepping       = ICS_ARCIN_V5_IDESTEPPING,
53 };
54
55 static struct cardinfo icside_cardinfo_v6_1 = {
56         .dataoffset     = ICS_ARCIN_V6_IDEOFFSET_1,
57         .ctrloffset     = ICS_ARCIN_V6_IDEALTOFFSET_1,
58         .stepping       = ICS_ARCIN_V6_IDESTEPPING,
59 };
60
61 static struct cardinfo icside_cardinfo_v6_2 = {
62         .dataoffset     = ICS_ARCIN_V6_IDEOFFSET_2,
63         .ctrloffset     = ICS_ARCIN_V6_IDEALTOFFSET_2,
64         .stepping       = ICS_ARCIN_V6_IDESTEPPING,
65 };
66
67 struct icside_state {
68         unsigned int channel;
69         unsigned int enabled;
70         void __iomem *irq_port;
71         void __iomem *ioc_base;
72         unsigned int sel;
73         unsigned int type;
74         struct ide_host *host;
75 };
76
77 #define ICS_TYPE_A3IN   0
78 #define ICS_TYPE_A3USER 1
79 #define ICS_TYPE_V6     3
80 #define ICS_TYPE_V5     15
81 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
82
83 /* ---------------- Version 5 PCB Support Functions --------------------- */
84 /* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
85  * Purpose  : enable interrupts from card
86  */
87 static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
88 {
89         struct icside_state *state = ec->irq_data;
90
91         writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
92 }
93
94 /* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
95  * Purpose  : disable interrupts from card
96  */
97 static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
98 {
99         struct icside_state *state = ec->irq_data;
100
101         readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
102 }
103
104 static const expansioncard_ops_t icside_ops_arcin_v5 = {
105         .irqenable      = icside_irqenable_arcin_v5,
106         .irqdisable     = icside_irqdisable_arcin_v5,
107 };
108
109
110 /* ---------------- Version 6 PCB Support Functions --------------------- */
111 /* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
112  * Purpose  : enable interrupts from card
113  */
114 static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
115 {
116         struct icside_state *state = ec->irq_data;
117         void __iomem *base = state->irq_port;
118
119         state->enabled = 1;
120
121         switch (state->channel) {
122         case 0:
123                 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
124                 readb(base + ICS_ARCIN_V6_INTROFFSET_2);
125                 break;
126         case 1:
127                 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
128                 readb(base + ICS_ARCIN_V6_INTROFFSET_1);
129                 break;
130         }
131 }
132
133 /* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
134  * Purpose  : disable interrupts from card
135  */
136 static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
137 {
138         struct icside_state *state = ec->irq_data;
139
140         state->enabled = 0;
141
142         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
143         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
144 }
145
146 /* Prototype: icside_irqprobe(struct expansion_card *ec)
147  * Purpose  : detect an active interrupt from card
148  */
149 static int icside_irqpending_arcin_v6(struct expansion_card *ec)
150 {
151         struct icside_state *state = ec->irq_data;
152
153         return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
154                readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
155 }
156
157 static const expansioncard_ops_t icside_ops_arcin_v6 = {
158         .irqenable      = icside_irqenable_arcin_v6,
159         .irqdisable     = icside_irqdisable_arcin_v6,
160         .irqpending     = icside_irqpending_arcin_v6,
161 };
162
163 /*
164  * Handle routing of interrupts.  This is called before
165  * we write the command to the drive.
166  */
167 static void icside_maskproc(ide_drive_t *drive, int mask)
168 {
169         ide_hwif_t *hwif = drive->hwif;
170         struct expansion_card *ec = ECARD_DEV(hwif->dev);
171         struct icside_state *state = ecard_get_drvdata(ec);
172         unsigned long flags;
173
174         local_irq_save(flags);
175
176         state->channel = hwif->channel;
177
178         if (state->enabled && !mask) {
179                 switch (hwif->channel) {
180                 case 0:
181                         writeb(0, state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
182                         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
183                         break;
184                 case 1:
185                         writeb(0, state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
186                         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
187                         break;
188                 }
189         } else {
190                 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
191                 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
192         }
193
194         local_irq_restore(flags);
195 }
196
197 static const struct ide_port_ops icside_v6_no_dma_port_ops = {
198         .maskproc               = icside_maskproc,
199 };
200
201 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
202 /*
203  * SG-DMA support.
204  *
205  * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
206  * There is only one DMA controller per card, which means that only
207  * one drive can be accessed at one time.  NOTE! We do not enforce that
208  * here, but we rely on the main IDE driver spotting that both
209  * interfaces use the same IRQ, which should guarantee this.
210  */
211
212 /*
213  * Configure the IOMD to give the appropriate timings for the transfer
214  * mode being requested.  We take the advice of the ATA standards, and
215  * calculate the cycle time based on the transfer mode, and the EIDE
216  * MW DMA specs that the drive provides in the IDENTIFY command.
217  *
218  * We have the following IOMD DMA modes to choose from:
219  *
220  *      Type    Active          Recovery        Cycle
221  *      A       250 (250)       312 (550)       562 (800)
222  *      B       187             250             437
223  *      C       125 (125)       125 (375)       250 (500)
224  *      D       62              125             187
225  *
226  * (figures in brackets are actual measured timings)
227  *
228  * However, we also need to take care of the read/write active and
229  * recovery timings:
230  *
231  *                      Read    Write
232  *      Mode    Active  -- Recovery --  Cycle   IOMD type
233  *      MW0     215     50      215     480     A
234  *      MW1     80      50      50      150     C
235  *      MW2     70      25      25      120     C
236  */
237 static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
238 {
239         int cycle_time, use_dma_info = 0;
240
241         switch (xfer_mode) {
242         case XFER_MW_DMA_2:
243                 cycle_time = 250;
244                 use_dma_info = 1;
245                 break;
246
247         case XFER_MW_DMA_1:
248                 cycle_time = 250;
249                 use_dma_info = 1;
250                 break;
251
252         case XFER_MW_DMA_0:
253                 cycle_time = 480;
254                 break;
255
256         case XFER_SW_DMA_2:
257         case XFER_SW_DMA_1:
258         case XFER_SW_DMA_0:
259                 cycle_time = 480;
260                 break;
261         }
262
263         /*
264          * If we're going to be doing MW_DMA_1 or MW_DMA_2, we should
265          * take care to note the values in the ID...
266          */
267         if (use_dma_info && drive->id[ATA_ID_EIDE_DMA_TIME] > cycle_time)
268                 cycle_time = drive->id[ATA_ID_EIDE_DMA_TIME];
269
270         drive->drive_data = cycle_time;
271
272         printk("%s: %s selected (peak %dMB/s)\n", drive->name,
273                 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
274 }
275
276 static const struct ide_port_ops icside_v6_port_ops = {
277         .set_dma_mode           = icside_set_dma_mode,
278         .maskproc               = icside_maskproc,
279 };
280
281 static void icside_dma_host_set(ide_drive_t *drive, int on)
282 {
283 }
284
285 static int icside_dma_end(ide_drive_t *drive)
286 {
287         ide_hwif_t *hwif = drive->hwif;
288         struct expansion_card *ec = ECARD_DEV(hwif->dev);
289
290         disable_dma(ec->dma);
291
292         return get_dma_residue(ec->dma) != 0;
293 }
294
295 static void icside_dma_start(ide_drive_t *drive)
296 {
297         ide_hwif_t *hwif = drive->hwif;
298         struct expansion_card *ec = ECARD_DEV(hwif->dev);
299
300         /* We can not enable DMA on both channels simultaneously. */
301         BUG_ON(dma_channel_active(ec->dma));
302         enable_dma(ec->dma);
303 }
304
305 static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
306 {
307         ide_hwif_t *hwif = drive->hwif;
308         struct expansion_card *ec = ECARD_DEV(hwif->dev);
309         struct icside_state *state = ecard_get_drvdata(ec);
310         unsigned int dma_mode;
311
312         if (cmd->tf_flags & IDE_TFLAG_WRITE)
313                 dma_mode = DMA_MODE_WRITE;
314         else
315                 dma_mode = DMA_MODE_READ;
316
317         /*
318          * We can not enable DMA on both channels.
319          */
320         BUG_ON(dma_channel_active(ec->dma));
321
322         /*
323          * Ensure that we have the right interrupt routed.
324          */
325         icside_maskproc(drive, 0);
326
327         /*
328          * Route the DMA signals to the correct interface.
329          */
330         writeb(state->sel | hwif->channel, state->ioc_base);
331
332         /*
333          * Select the correct timing for this drive.
334          */
335         set_dma_speed(ec->dma, drive->drive_data);
336
337         /*
338          * Tell the DMA engine about the SG table and
339          * data direction.
340          */
341         set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents);
342         set_dma_mode(ec->dma, dma_mode);
343
344         return 0;
345 }
346
347 static int icside_dma_test_irq(ide_drive_t *drive)
348 {
349         ide_hwif_t *hwif = drive->hwif;
350         struct expansion_card *ec = ECARD_DEV(hwif->dev);
351         struct icside_state *state = ecard_get_drvdata(ec);
352
353         return readb(state->irq_port +
354                      (hwif->channel ?
355                         ICS_ARCIN_V6_INTRSTAT_2 :
356                         ICS_ARCIN_V6_INTRSTAT_1)) & 1;
357 }
358
359 static int icside_dma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
360 {
361         hwif->dmatable_cpu      = NULL;
362         hwif->dmatable_dma      = 0;
363
364         return 0;
365 }
366
367 static const struct ide_dma_ops icside_v6_dma_ops = {
368         .dma_host_set           = icside_dma_host_set,
369         .dma_setup              = icside_dma_setup,
370         .dma_start              = icside_dma_start,
371         .dma_end                = icside_dma_end,
372         .dma_test_irq           = icside_dma_test_irq,
373         .dma_lost_irq           = ide_dma_lost_irq,
374 };
375 #else
376 #define icside_v6_dma_ops NULL
377 #endif
378
379 static int icside_dma_off_init(ide_hwif_t *hwif, const struct ide_port_info *d)
380 {
381         return -EOPNOTSUPP;
382 }
383
384 static void icside_setup_ports(hw_regs_t *hw, void __iomem *base,
385                                struct cardinfo *info, struct expansion_card *ec)
386 {
387         unsigned long port = (unsigned long)base + info->dataoffset;
388
389         hw->io_ports.data_addr   = port;
390         hw->io_ports.error_addr  = port + (1 << info->stepping);
391         hw->io_ports.nsect_addr  = port + (2 << info->stepping);
392         hw->io_ports.lbal_addr   = port + (3 << info->stepping);
393         hw->io_ports.lbam_addr   = port + (4 << info->stepping);
394         hw->io_ports.lbah_addr   = port + (5 << info->stepping);
395         hw->io_ports.device_addr = port + (6 << info->stepping);
396         hw->io_ports.status_addr = port + (7 << info->stepping);
397         hw->io_ports.ctl_addr    = (unsigned long)base + info->ctrloffset;
398
399         hw->irq = ec->irq;
400         hw->dev = &ec->dev;
401         hw->chipset = ide_acorn;
402 }
403
404 static const struct ide_port_info icside_v5_port_info = {
405         .host_flags             = IDE_HFLAG_NO_DMA,
406 };
407
408 static int __devinit
409 icside_register_v5(struct icside_state *state, struct expansion_card *ec)
410 {
411         void __iomem *base;
412         struct ide_host *host;
413         hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
414         int ret;
415
416         base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
417         if (!base)
418                 return -ENOMEM;
419
420         state->irq_port = base;
421
422         ec->irqaddr  = base + ICS_ARCIN_V5_INTRSTAT;
423         ec->irqmask  = 1;
424
425         ecard_setirq(ec, &icside_ops_arcin_v5, state);
426
427         /*
428          * Be on the safe side - disable interrupts
429          */
430         icside_irqdisable_arcin_v5(ec, 0);
431
432         icside_setup_ports(&hw, base, &icside_cardinfo_v5, ec);
433
434         host = ide_host_alloc(&icside_v5_port_info, hws);
435         if (host == NULL)
436                 return -ENODEV;
437
438         state->host = host;
439
440         ecard_set_drvdata(ec, state);
441
442         ret = ide_host_register(host, &icside_v5_port_info, hws);
443         if (ret)
444                 goto err_free;
445
446         return 0;
447 err_free:
448         ide_host_free(host);
449         ecard_set_drvdata(ec, NULL);
450         return ret;
451 }
452
453 static const struct ide_port_info icside_v6_port_info __initdata = {
454         .init_dma               = icside_dma_off_init,
455         .port_ops               = &icside_v6_no_dma_port_ops,
456         .dma_ops                = &icside_v6_dma_ops,
457         .host_flags             = IDE_HFLAG_SERIALIZE | IDE_HFLAG_MMIO,
458         .mwdma_mask             = ATA_MWDMA2,
459         .swdma_mask             = ATA_SWDMA2,
460 };
461
462 static int __devinit
463 icside_register_v6(struct icside_state *state, struct expansion_card *ec)
464 {
465         void __iomem *ioc_base, *easi_base;
466         struct ide_host *host;
467         unsigned int sel = 0;
468         int ret;
469         hw_regs_t hw[2], *hws[] = { &hw[0], NULL, NULL, NULL };
470         struct ide_port_info d = icside_v6_port_info;
471
472         ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
473         if (!ioc_base) {
474                 ret = -ENOMEM;
475                 goto out;
476         }
477
478         easi_base = ioc_base;
479
480         if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
481                 easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
482                 if (!easi_base) {
483                         ret = -ENOMEM;
484                         goto out;
485                 }
486
487                 /*
488                  * Enable access to the EASI region.
489                  */
490                 sel = 1 << 5;
491         }
492
493         writeb(sel, ioc_base);
494
495         ecard_setirq(ec, &icside_ops_arcin_v6, state);
496
497         state->irq_port   = easi_base;
498         state->ioc_base   = ioc_base;
499         state->sel        = sel;
500
501         /*
502          * Be on the safe side - disable interrupts
503          */
504         icside_irqdisable_arcin_v6(ec, 0);
505
506         icside_setup_ports(&hw[0], easi_base, &icside_cardinfo_v6_1, ec);
507         icside_setup_ports(&hw[1], easi_base, &icside_cardinfo_v6_2, ec);
508
509         host = ide_host_alloc(&d, hws);
510         if (host == NULL)
511                 return -ENODEV;
512
513         state->host = host;
514
515         ecard_set_drvdata(ec, state);
516
517         if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
518                 d.init_dma = icside_dma_init;
519                 d.port_ops = &icside_v6_port_ops;
520                 d.dma_ops = NULL;
521         }
522
523         ret = ide_host_register(host, &d, hws);
524         if (ret)
525                 goto err_free;
526
527         return 0;
528 err_free:
529         ide_host_free(host);
530         if (d.dma_ops)
531                 free_dma(ec->dma);
532         ecard_set_drvdata(ec, NULL);
533 out:
534         return ret;
535 }
536
537 static int __devinit
538 icside_probe(struct expansion_card *ec, const struct ecard_id *id)
539 {
540         struct icside_state *state;
541         void __iomem *idmem;
542         int ret;
543
544         ret = ecard_request_resources(ec);
545         if (ret)
546                 goto out;
547
548         state = kzalloc(sizeof(struct icside_state), GFP_KERNEL);
549         if (!state) {
550                 ret = -ENOMEM;
551                 goto release;
552         }
553
554         state->type     = ICS_TYPE_NOTYPE;
555
556         idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
557         if (idmem) {
558                 unsigned int type;
559
560                 type = readb(idmem + ICS_IDENT_OFFSET) & 1;
561                 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
562                 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
563                 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
564                 ecardm_iounmap(ec, idmem);
565
566                 state->type = type;
567         }
568
569         switch (state->type) {
570         case ICS_TYPE_A3IN:
571                 dev_warn(&ec->dev, "A3IN unsupported\n");
572                 ret = -ENODEV;
573                 break;
574
575         case ICS_TYPE_A3USER:
576                 dev_warn(&ec->dev, "A3USER unsupported\n");
577                 ret = -ENODEV;
578                 break;
579
580         case ICS_TYPE_V5:
581                 ret = icside_register_v5(state, ec);
582                 break;
583
584         case ICS_TYPE_V6:
585                 ret = icside_register_v6(state, ec);
586                 break;
587
588         default:
589                 dev_warn(&ec->dev, "unknown interface type\n");
590                 ret = -ENODEV;
591                 break;
592         }
593
594         if (ret == 0)
595                 goto out;
596
597         kfree(state);
598  release:
599         ecard_release_resources(ec);
600  out:
601         return ret;
602 }
603
604 static void __devexit icside_remove(struct expansion_card *ec)
605 {
606         struct icside_state *state = ecard_get_drvdata(ec);
607
608         switch (state->type) {
609         case ICS_TYPE_V5:
610                 /* FIXME: tell IDE to stop using the interface */
611
612                 /* Disable interrupts */
613                 icside_irqdisable_arcin_v5(ec, 0);
614                 break;
615
616         case ICS_TYPE_V6:
617                 /* FIXME: tell IDE to stop using the interface */
618                 if (ec->dma != NO_DMA)
619                         free_dma(ec->dma);
620
621                 /* Disable interrupts */
622                 icside_irqdisable_arcin_v6(ec, 0);
623
624                 /* Reset the ROM pointer/EASI selection */
625                 writeb(0, state->ioc_base);
626                 break;
627         }
628
629         ecard_set_drvdata(ec, NULL);
630
631         kfree(state);
632         ecard_release_resources(ec);
633 }
634
635 static void icside_shutdown(struct expansion_card *ec)
636 {
637         struct icside_state *state = ecard_get_drvdata(ec);
638         unsigned long flags;
639
640         /*
641          * Disable interrupts from this card.  We need to do
642          * this before disabling EASI since we may be accessing
643          * this register via that region.
644          */
645         local_irq_save(flags);
646         ec->ops->irqdisable(ec, 0);
647         local_irq_restore(flags);
648
649         /*
650          * Reset the ROM pointer so that we can read the ROM
651          * after a soft reboot.  This also disables access to
652          * the IDE taskfile via the EASI region.
653          */
654         if (state->ioc_base)
655                 writeb(0, state->ioc_base);
656 }
657
658 static const struct ecard_id icside_ids[] = {
659         { MANU_ICS,  PROD_ICS_IDE  },
660         { MANU_ICS2, PROD_ICS2_IDE },
661         { 0xffff, 0xffff }
662 };
663
664 static struct ecard_driver icside_driver = {
665         .probe          = icside_probe,
666         .remove         = __devexit_p(icside_remove),
667         .shutdown       = icside_shutdown,
668         .id_table       = icside_ids,
669         .drv = {
670                 .name   = "icside",
671         },
672 };
673
674 static int __init icside_init(void)
675 {
676         return ecard_register_driver(&icside_driver);
677 }
678
679 static void __exit icside_exit(void)
680 {
681         ecard_remove_driver(&icside_driver);
682 }
683
684 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
685 MODULE_LICENSE("GPL");
686 MODULE_DESCRIPTION("ICS IDE driver");
687
688 module_init(icside_init);
689 module_exit(icside_exit);