1 /* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $
3 * arch/sh/kernel/head.S
5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 * Head.S contains the SH exception handlers and startup code.
13 #include <linux/init.h>
14 #include <linux/linkage.h>
15 #include <asm/thread_info.h>
17 #ifdef CONFIG_CPU_SH4A
20 #define PREFI(label, reg) \
25 #define PREFI(label, reg)
28 .section .empty_zero_page, "aw"
29 ENTRY(empty_zero_page)
30 .long 1 /* MOUNT_ROOT_RDONLY */
31 .long 0 /* RAMDISK_FLAGS */
32 .long 0x0200 /* ORIG_ROOT_DEV */
33 .long 1 /* LOADER_TYPE */
34 .long 0x00000000 /* INITRD_START */
35 .long 0x00000000 /* INITRD_SIZE */
37 .long 0x53453f00 + 32 /* "SE?" = 32 bit */
39 .long 0x53453f00 + 29 /* "SE?" = 29 bit */
42 .skip PAGE_SIZE - empty_zero_page - 1b
47 * Condition at the entry of _stext:
49 * BSC has already been initialized.
50 * INTC may or may not be initialized.
51 * VBR may or may not be initialized.
52 * MMU may or may not be initialized.
53 * Cache may or may not be initialized.
54 * Hardware (including on-chip modules) may or may not be initialized.
58 ! Initialize Status Register
59 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
61 ! Initialize global interrupt mask
62 #ifdef CONFIG_CPU_HAS_SR_RB
68 * Prefetch if possible to reduce cache miss penalty.
70 * We do this early on for SH-4A as a micro-optimization,
71 * as later on we will have speculative execution enabled
72 * and this will become less of an issue.
79 mov r0, r15 ! Set initial r15 (stack pointer)
80 #ifdef CONFIG_CPU_HAS_SR_RB
82 ldc r0, r7_bank ! ... and initial thread_info
85 #ifndef CONFIG_SH_NO_BSS_INIT
87 * Don't clear BSS if running on slow platforms such as an RTL simulation,
88 * remote memory via SHdebug link, etc. For these the memory can be guaranteed
89 * to be all zero on boot anyway.
94 cmp/eq #0, r0 ! skip clear if set to zero
103 bf/s 9b ! while (r1 < r2)
109 ! Additional CPU initialization
114 SYNCO() ! Wait for pending instructions..
122 #if defined(CONFIG_CPU_SH2)
123 1: .long 0x000000F0 ! IMASK=0xF
125 1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
128 2: .long init_thread_union+THREAD_SIZE
131 5: .long start_kernel
133 7: .long init_thread_union