Merge branch 'linus' into perfcounters/core
[linux-2.6] / drivers / media / video / cx23885 / cx23885.h
1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  *
17  *  You should have received a copy of the GNU General Public License
18  *  along with this program; if not, write to the Free Software
19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26
27 #include <media/v4l2-device.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32
33 #include "btcx-risc.h"
34 #include "cx23885-reg.h"
35 #include "media/cx2341x.h"
36
37 #include <linux/version.h>
38 #include <linux/mutex.h>
39
40 #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2)
41
42 #define UNSET (-1U)
43
44 #define CX23885_MAXBOARDS 8
45
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY       1
50 #define RESOURCE_VIDEO         2
51 #define RESOURCE_VBI           4
52
53 #define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */
54
55 #define CX23885_BOARD_NOAUTO               UNSET
56 #define CX23885_BOARD_UNKNOWN                  0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800        2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250        3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500        6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200        7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700        8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400        9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
70 #define CX23885_BOARD_TBS_6920                 14
71 #define CX23885_BOARD_TEVII_S470               15
72 #define CX23885_BOARD_DVBWORLD_2005            16
73 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI      17
74 #define CX23885_BOARD_HAUPPAUGE_HVR1270        18
75 #define CX23885_BOARD_HAUPPAUGE_HVR1275        19
76 #define CX23885_BOARD_HAUPPAUGE_HVR1255        20
77 #define CX23885_BOARD_HAUPPAUGE_HVR1210        21
78 #define CX23885_BOARD_MYGICA_X8506             22
79
80 #define GPIO_0 0x00000001
81 #define GPIO_1 0x00000002
82 #define GPIO_2 0x00000004
83 #define GPIO_3 0x00000008
84 #define GPIO_4 0x00000010
85 #define GPIO_5 0x00000020
86 #define GPIO_6 0x00000040
87 #define GPIO_7 0x00000080
88 #define GPIO_8 0x00000100
89 #define GPIO_9 0x00000200
90
91 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
92 #define CX23885_NORMS (\
93         V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
94         V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
95         V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
96         V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
97
98 struct cx23885_fmt {
99         char  *name;
100         u32   fourcc;          /* v4l2 format id */
101         int   depth;
102         int   flags;
103         u32   cxformat;
104 };
105
106 struct cx23885_ctrl {
107         struct v4l2_queryctrl v;
108         u32                   off;
109         u32                   reg;
110         u32                   mask;
111         u32                   shift;
112 };
113
114 struct cx23885_tvnorm {
115         char            *name;
116         v4l2_std_id     id;
117         u32             cxiformat;
118         u32             cxoformat;
119 };
120
121 struct cx23885_fh {
122         struct cx23885_dev         *dev;
123         enum v4l2_buf_type         type;
124         int                        radio;
125         u32                        resources;
126
127         /* video overlay */
128         struct v4l2_window         win;
129         struct v4l2_clip           *clips;
130         unsigned int               nclips;
131
132         /* video capture */
133         struct cx23885_fmt         *fmt;
134         unsigned int               width, height;
135
136         /* vbi capture */
137         struct videobuf_queue      vidq;
138         struct videobuf_queue      vbiq;
139
140         /* MPEG Encoder specifics ONLY */
141         struct videobuf_queue      mpegq;
142         atomic_t                   v4l_reading;
143 };
144
145 enum cx23885_itype {
146         CX23885_VMUX_COMPOSITE1 = 1,
147         CX23885_VMUX_COMPOSITE2,
148         CX23885_VMUX_COMPOSITE3,
149         CX23885_VMUX_COMPOSITE4,
150         CX23885_VMUX_SVIDEO,
151         CX23885_VMUX_TELEVISION,
152         CX23885_VMUX_CABLE,
153         CX23885_VMUX_DVB,
154         CX23885_VMUX_DEBUG,
155         CX23885_RADIO,
156 };
157
158 enum cx23885_src_sel_type {
159         CX23885_SRC_SEL_EXT_656_VIDEO = 0,
160         CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
161 };
162
163 /* buffer for one video frame */
164 struct cx23885_buffer {
165         /* common v4l buffer stuff -- must be first */
166         struct videobuf_buffer vb;
167
168         /* cx23885 specific */
169         unsigned int           bpl;
170         struct btcx_riscmem    risc;
171         struct cx23885_fmt     *fmt;
172         u32                    count;
173 };
174
175 struct cx23885_input {
176         enum cx23885_itype type;
177         unsigned int    vmux;
178         u32             gpio0, gpio1, gpio2, gpio3;
179 };
180
181 typedef enum {
182         CX23885_MPEG_UNDEFINED = 0,
183         CX23885_MPEG_DVB,
184         CX23885_ANALOG_VIDEO,
185         CX23885_MPEG_ENCODER,
186 } port_t;
187
188 struct cx23885_board {
189         char                    *name;
190         port_t                  porta, portb, portc;
191         unsigned int            tuner_type;
192         unsigned int            radio_type;
193         unsigned char           tuner_addr;
194         unsigned char           radio_addr;
195
196         /* Vendors can and do run the PCIe bridge at different
197          * clock rates, driven physically by crystals on the PCBs.
198          * The core has to accomodate this. This allows the user
199          * to add new boards with new frequencys. The value is
200          * expressed in Hz.
201          *
202          * The core framework will default this value based on
203          * current designs, but it can vary.
204          */
205         u32                     clk_freq;
206         struct cx23885_input    input[MAX_CX23885_INPUT];
207         int                     cimax; /* for NetUP */
208 };
209
210 struct cx23885_subid {
211         u16     subvendor;
212         u16     subdevice;
213         u32     card;
214 };
215
216 struct cx23885_i2c {
217         struct cx23885_dev *dev;
218
219         int                        nr;
220
221         /* i2c i/o */
222         struct i2c_adapter         i2c_adap;
223         struct i2c_algo_bit_data   i2c_algo;
224         struct i2c_client          i2c_client;
225         u32                        i2c_rc;
226
227         /* 885 registers used for raw addess */
228         u32                        i2c_period;
229         u32                        reg_ctrl;
230         u32                        reg_stat;
231         u32                        reg_addr;
232         u32                        reg_rdata;
233         u32                        reg_wdata;
234 };
235
236 struct cx23885_dmaqueue {
237         struct list_head       active;
238         struct list_head       queued;
239         struct timer_list      timeout;
240         struct btcx_riscmem    stopper;
241         u32                    count;
242 };
243
244 struct cx23885_tsport {
245         struct cx23885_dev *dev;
246
247         int                        nr;
248         int                        sram_chno;
249
250         struct videobuf_dvb_frontends frontends;
251
252         /* dma queues */
253         struct cx23885_dmaqueue    mpegq;
254         u32                        ts_packet_size;
255         u32                        ts_packet_count;
256
257         int                        width;
258         int                        height;
259
260         spinlock_t                 slock;
261
262         /* registers */
263         u32                        reg_gpcnt;
264         u32                        reg_gpcnt_ctl;
265         u32                        reg_dma_ctl;
266         u32                        reg_lngth;
267         u32                        reg_hw_sop_ctrl;
268         u32                        reg_gen_ctrl;
269         u32                        reg_bd_pkt_status;
270         u32                        reg_sop_status;
271         u32                        reg_fifo_ovfl_stat;
272         u32                        reg_vld_misc;
273         u32                        reg_ts_clk_en;
274         u32                        reg_ts_int_msk;
275         u32                        reg_ts_int_stat;
276         u32                        reg_src_sel;
277
278         /* Default register vals */
279         int                        pci_irqmask;
280         u32                        dma_ctl_val;
281         u32                        ts_int_msk_val;
282         u32                        gen_ctrl_val;
283         u32                        ts_clk_en_val;
284         u32                        src_sel_val;
285         u32                        vld_misc_val;
286         u32                        hw_sop_ctrl_val;
287
288         /* Allow a single tsport to have multiple frontends */
289         u32                        num_frontends;
290         void                       *port_priv;
291 };
292
293 struct cx23885_dev {
294         struct list_head           devlist;
295         atomic_t                   refcount;
296         struct v4l2_device         v4l2_dev;
297
298         /* pci stuff */
299         struct pci_dev             *pci;
300         unsigned char              pci_rev, pci_lat;
301         int                        pci_bus, pci_slot;
302         u32                        __iomem *lmmio;
303         u8                         __iomem *bmmio;
304         int                        pci_irqmask;
305         int                        hwrevision;
306
307         /* This valud is board specific and is used to configure the
308          * AV core so we see nice clean and stable video and audio. */
309         u32                        clk_freq;
310
311         /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
312         struct cx23885_i2c         i2c_bus[3];
313
314         int                        nr;
315         struct mutex               lock;
316
317         /* board details */
318         unsigned int               board;
319         char                       name[32];
320
321         struct cx23885_tsport      ts1, ts2;
322
323         /* sram configuration */
324         struct sram_channel        *sram_channels;
325
326         enum {
327                 CX23885_BRIDGE_UNDEFINED = 0,
328                 CX23885_BRIDGE_885 = 885,
329                 CX23885_BRIDGE_887 = 887,
330         } bridge;
331
332         /* Analog video */
333         u32                        resources;
334         unsigned int               input;
335         u32                        tvaudio;
336         v4l2_std_id                tvnorm;
337         unsigned int               tuner_type;
338         unsigned char              tuner_addr;
339         unsigned int               radio_type;
340         unsigned char              radio_addr;
341         unsigned int               has_radio;
342         struct v4l2_subdev         *sd_cx25840;
343
344         /* V4l */
345         u32                        freq;
346         struct video_device        *video_dev;
347         struct video_device        *vbi_dev;
348         struct video_device        *radio_dev;
349
350         struct cx23885_dmaqueue    vidq;
351         struct cx23885_dmaqueue    vbiq;
352         spinlock_t                 slock;
353
354         /* MPEG Encoder ONLY settings */
355         u32                        cx23417_mailbox;
356         struct cx2341x_mpeg_params mpeg_params;
357         struct video_device        *v4l_device;
358         atomic_t                   v4l_reader_count;
359         struct cx23885_tvnorm      encodernorm;
360
361 };
362
363 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
364 {
365         return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
366 }
367
368 #define call_all(dev, o, f, args...) \
369         v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
370
371 extern struct list_head cx23885_devlist;
372
373 #define SRAM_CH01  0 /* Video A */
374 #define SRAM_CH02  1 /* VBI A */
375 #define SRAM_CH03  2 /* Video B */
376 #define SRAM_CH04  3 /* Transport via B */
377 #define SRAM_CH05  4 /* VBI B */
378 #define SRAM_CH06  5 /* Video C */
379 #define SRAM_CH07  6 /* Transport via C */
380 #define SRAM_CH08  7 /* Audio Internal A */
381 #define SRAM_CH09  8 /* Audio Internal B */
382 #define SRAM_CH10  9 /* Audio External */
383 #define SRAM_CH11 10 /* COMB_3D_N */
384 #define SRAM_CH12 11 /* Comb 3D N1 */
385 #define SRAM_CH13 12 /* Comb 3D N2 */
386 #define SRAM_CH14 13 /* MOE Vid */
387 #define SRAM_CH15 14 /* MOE RSLT */
388
389 struct sram_channel {
390         char *name;
391         u32  cmds_start;
392         u32  ctrl_start;
393         u32  cdt;
394         u32  fifo_start;;
395         u32  fifo_size;
396         u32  ptr1_reg;
397         u32  ptr2_reg;
398         u32  cnt1_reg;
399         u32  cnt2_reg;
400         u32  jumponly;
401 };
402
403 /* ----------------------------------------------------------- */
404
405 #define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
406 #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
407
408 #define cx_andor(reg, mask, value) \
409   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
410   ((value) & (mask)), dev->lmmio+((reg)>>2))
411
412 #define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
413 #define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
414
415 /* ----------------------------------------------------------- */
416 /* cx23885-core.c                                              */
417
418 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
419         struct sram_channel *ch,
420         unsigned int bpl, u32 risc);
421
422 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
423         struct sram_channel *ch);
424
425 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
426         u32 reg, u32 mask, u32 value);
427
428 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
429         struct scatterlist *sglist,
430         unsigned int top_offset, unsigned int bottom_offset,
431         unsigned int bpl, unsigned int padding, unsigned int lines);
432
433 void cx23885_cancel_buffers(struct cx23885_tsport *port);
434
435 extern int cx23885_restart_queue(struct cx23885_tsport *port,
436                                 struct cx23885_dmaqueue *q);
437
438 extern void cx23885_wakeup(struct cx23885_tsport *port,
439                            struct cx23885_dmaqueue *q, u32 count);
440
441 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
442 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
443 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
444         int asoutput);
445
446
447 /* ----------------------------------------------------------- */
448 /* cx23885-cards.c                                             */
449 extern struct cx23885_board cx23885_boards[];
450 extern const unsigned int cx23885_bcount;
451
452 extern struct cx23885_subid cx23885_subids[];
453 extern const unsigned int cx23885_idcount;
454
455 extern int cx23885_tuner_callback(void *priv, int component,
456         int command, int arg);
457 extern void cx23885_card_list(struct cx23885_dev *dev);
458 extern int  cx23885_ir_init(struct cx23885_dev *dev);
459 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
460 extern void cx23885_card_setup(struct cx23885_dev *dev);
461 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
462
463 extern int cx23885_dvb_register(struct cx23885_tsport *port);
464 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
465
466 extern int cx23885_buf_prepare(struct videobuf_queue *q,
467                                struct cx23885_tsport *port,
468                                struct cx23885_buffer *buf,
469                                enum v4l2_field field);
470 extern void cx23885_buf_queue(struct cx23885_tsport *port,
471                               struct cx23885_buffer *buf);
472 extern void cx23885_free_buffer(struct videobuf_queue *q,
473                                 struct cx23885_buffer *buf);
474
475 /* ----------------------------------------------------------- */
476 /* cx23885-video.c                                             */
477 /* Video */
478 extern int cx23885_video_register(struct cx23885_dev *dev);
479 extern void cx23885_video_unregister(struct cx23885_dev *dev);
480 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
481
482 /* ----------------------------------------------------------- */
483 /* cx23885-vbi.c                                               */
484 extern int cx23885_vbi_fmt(struct file *file, void *priv,
485         struct v4l2_format *f);
486 extern void cx23885_vbi_timeout(unsigned long data);
487 extern struct videobuf_queue_ops cx23885_vbi_qops;
488
489 /* cx23885-i2c.c                                                */
490 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
491 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
492 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
493
494 /* ----------------------------------------------------------- */
495 /* cx23885-417.c                                               */
496 extern int cx23885_417_register(struct cx23885_dev *dev);
497 extern void cx23885_417_unregister(struct cx23885_dev *dev);
498 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
499 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
500 extern void cx23885_mc417_init(struct cx23885_dev *dev);
501 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
502 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
503
504
505 /* ----------------------------------------------------------- */
506 /* tv norms                                                    */
507
508 static inline unsigned int norm_maxw(v4l2_std_id norm)
509 {
510         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
511 }
512
513 static inline unsigned int norm_maxh(v4l2_std_id norm)
514 {
515         return (norm & V4L2_STD_625_50) ? 576 : 480;
516 }
517
518 static inline unsigned int norm_swidth(v4l2_std_id norm)
519 {
520         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
521 }