2 * pxa2xx-i2s.c -- ALSA Soc Audio Layer
4 * Copyright 2005 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/delay.h>
18 #include <sound/core.h>
19 #include <sound/pcm.h>
20 #include <sound/initval.h>
21 #include <sound/soc.h>
23 #include <asm/hardware.h>
24 #include <asm/arch/pxa-regs.h>
25 #include <asm/arch/pxa2xx-gpio.h>
26 #include <asm/arch/audio.h>
28 #include "pxa2xx-pcm.h"
29 #include "pxa2xx-i2s.h"
39 static struct pxa_i2s_port pxa_i2s;
41 static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = {
42 .name = "I2S PCM Stereo out",
43 .dev_addr = __PREG(SADR),
44 .drcmr = &DRCMRTXSADR,
45 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
46 DCMD_BURST32 | DCMD_WIDTH4,
49 static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_in = {
50 .name = "I2S PCM Stereo in",
51 .dev_addr = __PREG(SADR),
52 .drcmr = &DRCMRRXSADR,
53 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
54 DCMD_BURST32 | DCMD_WIDTH4,
57 static struct pxa2xx_gpio gpio_bus[] = {
59 .rx = GPIO29_SDATA_IN_I2S_MD,
60 .tx = GPIO30_SDATA_OUT_I2S_MD,
61 .clk = GPIO28_BITCLK_IN_I2S_MD,
62 .frm = GPIO31_SYNC_I2S_MD,
64 { /* I2S SoC Master */
66 .sys = GPIO113_I2S_SYSCLK_MD,
68 .sys = GPIO32_SYSCLK_I2S_MD,
70 .rx = GPIO29_SDATA_IN_I2S_MD,
71 .tx = GPIO30_SDATA_OUT_I2S_MD,
72 .clk = GPIO28_BITCLK_OUT_I2S_MD,
73 .frm = GPIO31_SYNC_I2S_MD,
77 static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream)
79 struct snd_soc_pcm_runtime *rtd = substream->private_data;
80 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
82 if (!cpu_dai->active) {
90 /* wait for I2S controller to be ready */
91 static int pxa_i2s_wait(void)
95 /* flush the Rx FIFO */
96 for(i = 0; i < 16; i++)
101 static int pxa2xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
104 /* interface format */
105 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
106 case SND_SOC_DAIFMT_I2S:
109 case SND_SOC_DAIFMT_LEFT_J:
110 pxa_i2s.fmt = SACR1_AMSL;
114 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
115 case SND_SOC_DAIFMT_CBS_CFS:
118 case SND_SOC_DAIFMT_CBM_CFS:
127 static int pxa2xx_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
128 int clk_id, unsigned int freq, int dir)
130 if (clk_id != PXA2XX_I2S_SYSCLK)
133 if (pxa_i2s.master && dir == SND_SOC_CLOCK_OUT)
134 pxa_gpio_mode(gpio_bus[pxa_i2s.master].sys);
139 static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
140 struct snd_pcm_hw_params *params)
142 struct snd_soc_pcm_runtime *rtd = substream->private_data;
143 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
145 pxa_gpio_mode(gpio_bus[pxa_i2s.master].rx);
146 pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
147 pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
148 pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
149 pxa_set_cken(CKEN_I2S, 1);
152 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
153 cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_out;
155 cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_in;
157 /* is port used by another stream */
158 if (!(SACR0 & SACR0_ENB)) {
165 SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1);
166 SACR1 |= pxa_i2s.fmt;
168 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
173 switch (params_rate(params)) {
192 case 96000: /* not in manual and possibly slightly inaccurate */
200 static int pxa2xx_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
205 case SNDRV_PCM_TRIGGER_START:
208 case SNDRV_PCM_TRIGGER_RESUME:
209 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
210 case SNDRV_PCM_TRIGGER_STOP:
211 case SNDRV_PCM_TRIGGER_SUSPEND:
212 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
221 static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream)
223 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
231 if (SACR1 & (SACR1_DREC | SACR1_DRPL)) {
234 pxa_set_cken(CKEN_I2S, 0);
239 static int pxa2xx_i2s_suspend(struct platform_device *dev,
240 struct snd_soc_dai *dai)
245 /* store registers */
246 pxa_i2s.sacr0 = SACR0;
247 pxa_i2s.sacr1 = SACR1;
248 pxa_i2s.saimr = SAIMR;
249 pxa_i2s.sadiv = SADIV;
251 /* deactivate link */
257 static int pxa2xx_i2s_resume(struct platform_device *pdev,
258 struct snd_soc_dai *dai)
265 SACR0 = pxa_i2s.sacr0 &= ~SACR0_ENB;
266 SACR1 = pxa_i2s.sacr1;
267 SAIMR = pxa_i2s.saimr;
268 SADIV = pxa_i2s.sadiv;
275 #define pxa2xx_i2s_suspend NULL
276 #define pxa2xx_i2s_resume NULL
279 #define PXA2XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
280 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
281 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
283 struct snd_soc_dai pxa_i2s_dai = {
284 .name = "pxa2xx-i2s",
286 .type = SND_SOC_DAI_I2S,
287 .suspend = pxa2xx_i2s_suspend,
288 .resume = pxa2xx_i2s_resume,
292 .rates = PXA2XX_I2S_RATES,
293 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
297 .rates = PXA2XX_I2S_RATES,
298 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
300 .startup = pxa2xx_i2s_startup,
301 .shutdown = pxa2xx_i2s_shutdown,
302 .trigger = pxa2xx_i2s_trigger,
303 .hw_params = pxa2xx_i2s_hw_params,},
305 .set_fmt = pxa2xx_i2s_set_dai_fmt,
306 .set_sysclk = pxa2xx_i2s_set_dai_sysclk,
310 EXPORT_SYMBOL_GPL(pxa_i2s_dai);
312 /* Module information */
313 MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
314 MODULE_DESCRIPTION("pxa2xx I2S SoC Interface");
315 MODULE_LICENSE("GPL");