2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/initrd.h>
25 #include <linux/seq_file.h>
26 #include <linux/kdev_t.h>
27 #include <linux/major.h>
28 #include <linux/root_dev.h>
29 #include <linux/kernel.h>
31 #include <asm/processor.h>
32 #include <asm/machdep.h>
35 #include <asm/pgtable.h>
36 #include <asm/mmu_context.h>
37 #include <asm/cputable.h>
38 #include <asm/sections.h>
39 #include <asm/iommu.h>
40 #include <asm/firmware.h>
41 #include <asm/system.h>
44 #include <asm/cache.h>
45 #include <asm/sections.h>
46 #include <asm/abs_addr.h>
47 #include <asm/iseries/hv_lp_config.h>
48 #include <asm/iseries/hv_call_event.h>
49 #include <asm/iseries/hv_call_xm.h>
50 #include <asm/iseries/it_lp_queue.h>
51 #include <asm/iseries/mf.h>
52 #include <asm/iseries/hv_lp_event.h>
53 #include <asm/iseries/lpar_map.h>
60 #include "vpd_areas.h"
61 #include "processor_vpd.h"
62 #include "main_store.h"
67 #define DBG(fmt...) udbg_printf(fmt)
72 /* Function Prototypes */
73 static unsigned long build_iSeries_Memory_Map(void);
74 static void iseries_shared_idle(void);
75 static void iseries_dedicated_idle(void);
77 extern void iSeries_pci_final_fixup(void);
79 static void iSeries_pci_final_fixup(void) { }
82 extern int rd_size; /* Defined in drivers/block/rd.c */
84 extern unsigned long iSeries_recal_tb;
85 extern unsigned long iSeries_recal_titan;
88 unsigned long absStart;
90 unsigned long logicalStart;
91 unsigned long logicalEnd;
95 * Process the main store vpd to determine where the holes in memory are
96 * and return the number of physical blocks and fill in the array of
99 static unsigned long iSeries_process_Condor_mainstore_vpd(
100 struct MemoryBlock *mb_array, unsigned long max_entries)
102 unsigned long holeFirstChunk, holeSizeChunks;
103 unsigned long numMemoryBlocks = 1;
104 struct IoHriMainStoreSegment4 *msVpd =
105 (struct IoHriMainStoreSegment4 *)xMsVpd;
106 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
107 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
108 unsigned long holeSize = holeEnd - holeStart;
110 printk("Mainstore_VPD: Condor\n");
112 * Determine if absolute memory has any
113 * holes so that we can interpret the
114 * access map we get back from the hypervisor
117 mb_array[0].logicalStart = 0;
118 mb_array[0].logicalEnd = 0x100000000;
119 mb_array[0].absStart = 0;
120 mb_array[0].absEnd = 0x100000000;
124 holeStart = holeStart & 0x000fffffffffffff;
125 holeStart = addr_to_chunk(holeStart);
126 holeFirstChunk = holeStart;
127 holeSize = addr_to_chunk(holeSize);
128 holeSizeChunks = holeSize;
129 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
130 holeFirstChunk, holeSizeChunks );
131 mb_array[0].logicalEnd = holeFirstChunk;
132 mb_array[0].absEnd = holeFirstChunk;
133 mb_array[1].logicalStart = holeFirstChunk;
134 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
135 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
136 mb_array[1].absEnd = 0x100000000;
138 return numMemoryBlocks;
141 #define MaxSegmentAreas 32
142 #define MaxSegmentAdrRangeBlocks 128
143 #define MaxAreaRangeBlocks 4
145 static unsigned long iSeries_process_Regatta_mainstore_vpd(
146 struct MemoryBlock *mb_array, unsigned long max_entries)
148 struct IoHriMainStoreSegment5 *msVpdP =
149 (struct IoHriMainStoreSegment5 *)xMsVpd;
150 unsigned long numSegmentBlocks = 0;
151 u32 existsBits = msVpdP->msAreaExists;
152 unsigned long area_num;
154 printk("Mainstore_VPD: Regatta\n");
156 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
157 unsigned long numAreaBlocks;
158 struct IoHriMainStoreArea4 *currentArea;
160 if (existsBits & 0x80000000) {
161 unsigned long block_num;
163 currentArea = &msVpdP->msAreaArray[area_num];
164 numAreaBlocks = currentArea->numAdrRangeBlocks;
165 printk("ms_vpd: processing area %2ld blocks=%ld",
166 area_num, numAreaBlocks);
167 for (block_num = 0; block_num < numAreaBlocks;
169 /* Process an address range block */
170 struct MemoryBlock tempBlock;
174 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
176 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
177 tempBlock.logicalStart = 0;
178 tempBlock.logicalEnd = 0;
179 printk("\n block %ld absStart=%016lx absEnd=%016lx",
180 block_num, tempBlock.absStart,
183 for (i = 0; i < numSegmentBlocks; ++i) {
184 if (mb_array[i].absStart ==
188 if (i == numSegmentBlocks) {
189 if (numSegmentBlocks == max_entries)
190 panic("iSeries_process_mainstore_vpd: too many memory blocks");
191 mb_array[numSegmentBlocks] = tempBlock;
194 printk(" (duplicate)");
200 /* Now sort the blocks found into ascending sequence */
201 if (numSegmentBlocks > 1) {
204 for (m = 0; m < numSegmentBlocks - 1; ++m) {
205 for (n = numSegmentBlocks - 1; m < n; --n) {
206 if (mb_array[n].absStart <
207 mb_array[n-1].absStart) {
208 struct MemoryBlock tempBlock;
210 tempBlock = mb_array[n];
211 mb_array[n] = mb_array[n-1];
212 mb_array[n-1] = tempBlock;
218 * Assign "logical" addresses to each block. These
219 * addresses correspond to the hypervisor "bitmap" space.
220 * Convert all addresses into units of 256K chunks.
223 unsigned long i, nextBitmapAddress;
225 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
226 nextBitmapAddress = 0;
227 for (i = 0; i < numSegmentBlocks; ++i) {
228 unsigned long length = mb_array[i].absEnd -
229 mb_array[i].absStart;
231 mb_array[i].logicalStart = nextBitmapAddress;
232 mb_array[i].logicalEnd = nextBitmapAddress + length;
233 nextBitmapAddress += length;
234 printk(" Bitmap range: %016lx - %016lx\n"
235 " Absolute range: %016lx - %016lx\n",
236 mb_array[i].logicalStart,
237 mb_array[i].logicalEnd,
238 mb_array[i].absStart, mb_array[i].absEnd);
239 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
241 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
243 mb_array[i].logicalStart =
244 addr_to_chunk(mb_array[i].logicalStart);
245 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
249 return numSegmentBlocks;
252 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
253 unsigned long max_entries)
256 unsigned long mem_blocks = 0;
258 if (cpu_has_feature(CPU_FTR_SLB))
259 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
262 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
265 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
266 for (i = 0; i < mem_blocks; ++i) {
267 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
268 " abs chunks %016lx - %016lx\n",
269 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
270 mb_array[i].absStart, mb_array[i].absEnd);
275 static void __init iSeries_get_cmdline(void)
279 /* copy the command line parameter from the primary VSP */
280 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
281 HvLpDma_Direction_RemoteToLocal);
286 if (!*p || *p == '\n')
293 static void __init iSeries_init_early(void)
295 DBG(" -> iSeries_init_early()\n");
297 #if defined(CONFIG_BLK_DEV_INITRD)
299 * If the init RAM disk has been configured and there is
300 * a non-zero starting address for it, set it up
303 initrd_start = (unsigned long)__va(naca.xRamDisk);
304 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
305 initrd_below_start_ok = 1; // ramdisk in kernel space
306 ROOT_DEV = Root_RAM0;
307 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
308 rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
310 #endif /* CONFIG_BLK_DEV_INITRD */
312 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
315 iSeries_recal_tb = get_tb();
316 iSeries_recal_titan = HvCallXm_loadTod();
319 * Initialize the DMA/TCE management
321 iommu_init_early_iSeries();
323 /* Initialize machine-dependency vectors */
328 /* Associate Lp Event Queue 0 with processor 0 */
329 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
333 /* If we were passed an initrd, set the ROOT_DEV properly if the values
334 * look sensible. If not, clear initrd reference.
336 #ifdef CONFIG_BLK_DEV_INITRD
337 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
338 initrd_end > initrd_start)
339 ROOT_DEV = Root_RAM0;
341 initrd_start = initrd_end = 0;
342 #endif /* CONFIG_BLK_DEV_INITRD */
344 DBG(" <- iSeries_init_early()\n");
347 struct mschunks_map mschunks_map = {
348 /* XXX We don't use these, but Piranha might need them. */
349 .chunk_size = MSCHUNKS_CHUNK_SIZE,
350 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
351 .chunk_mask = MSCHUNKS_OFFSET_MASK,
353 EXPORT_SYMBOL(mschunks_map);
355 void mschunks_alloc(unsigned long num_chunks)
357 klimit = _ALIGN(klimit, sizeof(u32));
358 mschunks_map.mapping = (u32 *)klimit;
359 klimit += num_chunks * sizeof(u32);
360 mschunks_map.num_chunks = num_chunks;
364 * The iSeries may have very large memories ( > 128 GB ) and a partition
365 * may get memory in "chunks" that may be anywhere in the 2**52 real
366 * address space. The chunks are 256K in size. To map this to the
367 * memory model Linux expects, the AS/400 specific code builds a
368 * translation table to translate what Linux thinks are "physical"
369 * addresses to the actual real addresses. This allows us to make
370 * it appear to Linux that we have contiguous memory starting at
371 * physical address zero while in fact this could be far from the truth.
372 * To avoid confusion, I'll let the words physical and/or real address
373 * apply to the Linux addresses while I'll use "absolute address" to
374 * refer to the actual hardware real address.
376 * build_iSeries_Memory_Map gets information from the Hypervisor and
377 * looks at the Main Store VPD to determine the absolute addresses
378 * of the memory that has been assigned to our partition and builds
379 * a table used to translate Linux's physical addresses to these
380 * absolute addresses. Absolute addresses are needed when
381 * communicating with the hypervisor (e.g. to build HPT entries)
383 * Returns the physical memory size
386 static unsigned long __init build_iSeries_Memory_Map(void)
388 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
390 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
391 u32 totalChunks,moreChunks;
392 u32 currChunk, thisChunk, absChunk;
396 struct MemoryBlock mb[32];
397 unsigned long numMemoryBlocks, curBlock;
399 /* Chunk size on iSeries is 256K bytes */
400 totalChunks = (u32)HvLpConfig_getMsChunks();
401 mschunks_alloc(totalChunks);
404 * Get absolute address of our load area
405 * and map it to physical address 0
406 * This guarantees that the loadarea ends up at physical 0
407 * otherwise, it might not be returned by PLIC as the first
411 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
412 loadAreaSize = itLpNaca.xLoadAreaChunks;
415 * Only add the pages already mapped here.
416 * Otherwise we might add the hpt pages
417 * The rest of the pages of the load area
418 * aren't in the HPT yet and can still
419 * be assigned an arbitrary physical address
421 if ((loadAreaSize * 64) > HvPagesToMap)
422 loadAreaSize = HvPagesToMap / 64;
424 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
427 * TODO Do we need to do something if the HPT is in the 64MB load area?
428 * This would be required if the itLpNaca.xLoadAreaChunks includes
432 printk("Mapping load area - physical addr = 0000000000000000\n"
433 " absolute addr = %016lx\n",
434 chunk_to_addr(loadAreaFirstChunk));
435 printk("Load area size %dK\n", loadAreaSize * 256);
437 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
438 mschunks_map.mapping[nextPhysChunk] =
439 loadAreaFirstChunk + nextPhysChunk;
442 * Get absolute address of our HPT and remember it so
443 * we won't map it to any physical address
445 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
446 hptSizePages = (u32)HvCallHpt_getHptPages();
447 hptSizeChunks = hptSizePages >>
448 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
449 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
451 printk("HPT absolute addr = %016lx, size = %dK\n",
452 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
455 * Determine if absolute memory has any
456 * holes so that we can interpret the
457 * access map we get back from the hypervisor
460 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
463 * Process the main store access map from the hypervisor
464 * to build up our physical -> absolute translation table
469 moreChunks = totalChunks;
472 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
474 thisChunk = currChunk;
476 chunkBit = map >> 63;
480 while (thisChunk >= mb[curBlock].logicalEnd) {
482 if (curBlock >= numMemoryBlocks)
483 panic("out of memory blocks");
485 if (thisChunk < mb[curBlock].logicalStart)
486 panic("memory block error");
488 absChunk = mb[curBlock].absStart +
489 (thisChunk - mb[curBlock].logicalStart);
490 if (((absChunk < hptFirstChunk) ||
491 (absChunk > hptLastChunk)) &&
492 ((absChunk < loadAreaFirstChunk) ||
493 (absChunk > loadAreaLastChunk))) {
494 mschunks_map.mapping[nextPhysChunk] =
506 * main store size (in chunks) is
507 * totalChunks - hptSizeChunks
508 * which should be equal to
511 return chunk_to_addr(nextPhysChunk);
517 static void __init iSeries_setup_arch(void)
519 if (get_lppaca()->shared_proc) {
520 ppc_md.idle_loop = iseries_shared_idle;
521 printk(KERN_DEBUG "Using shared processor idle loop\n");
523 ppc_md.idle_loop = iseries_dedicated_idle;
524 printk(KERN_DEBUG "Using dedicated idle loop\n");
527 /* Setup the Lp Event Queue */
528 setup_hvlpevent_queue();
530 printk("Max logical processors = %d\n",
531 itVpdAreas.xSlicMaxLogicalProcs);
532 printk("Max physical processors = %d\n",
533 itVpdAreas.xSlicMaxPhysicalProcs);
536 static void iSeries_show_cpuinfo(struct seq_file *m)
538 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
541 static void __init iSeries_progress(char * st, unsigned short code)
543 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
544 mf_display_progress(code);
547 static void __init iSeries_fixup_klimit(void)
550 * Change klimit to take into account any ram disk
551 * that may be included
554 klimit = KERNELBASE + (u64)naca.xRamDisk +
555 (naca.xRamDiskSize * HW_PAGE_SIZE);
558 static int __init iSeries_src_init(void)
560 /* clear the progress line */
561 ppc_md.progress(" ", 0xffff);
565 late_initcall(iSeries_src_init);
567 static inline void process_iSeries_events(void)
569 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
572 static void yield_shared_processor(void)
576 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
582 /* Compute future tb value when yield should expire */
583 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
586 * The decrementer stops during the yield. Force a fake decrementer
587 * here and let the timer_interrupt code sort out the actual time.
589 get_lppaca()->int_dword.fields.decr_int = 1;
591 process_iSeries_events();
594 static void iseries_shared_idle(void)
597 while (!need_resched() && !hvlpevent_is_pending()) {
599 ppc64_runlatch_off();
601 /* Recheck with irqs off */
602 if (!need_resched() && !hvlpevent_is_pending())
603 yield_shared_processor();
611 if (hvlpevent_is_pending())
612 process_iSeries_events();
614 preempt_enable_no_resched();
620 static void iseries_dedicated_idle(void)
622 set_thread_flag(TIF_POLLING_NRFLAG);
625 if (!need_resched()) {
626 while (!need_resched()) {
627 ppc64_runlatch_off();
630 if (hvlpevent_is_pending()) {
633 process_iSeries_events();
641 preempt_enable_no_resched();
648 void __init iSeries_init_IRQ(void) { }
651 static int __init iseries_probe(void)
653 unsigned long root = of_get_flat_dt_root();
654 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
657 powerpc_firmware_features |= FW_FEATURE_ISERIES;
658 powerpc_firmware_features |= FW_FEATURE_LPAR;
665 define_machine(iseries) {
667 .setup_arch = iSeries_setup_arch,
668 .show_cpuinfo = iSeries_show_cpuinfo,
669 .init_IRQ = iSeries_init_IRQ,
670 .get_irq = iSeries_get_irq,
671 .init_early = iSeries_init_early,
672 .pcibios_fixup = iSeries_pci_final_fixup,
673 .restart = mf_reboot,
674 .power_off = mf_power_off,
675 .halt = mf_power_off,
676 .get_boot_time = iSeries_get_boot_time,
677 .set_rtc_time = iSeries_set_rtc_time,
678 .get_rtc_time = iSeries_get_rtc_time,
679 .calibrate_decr = generic_calibrate_decr,
680 .progress = iSeries_progress,
681 .probe = iseries_probe,
682 /* XXX Implement enable_pmcs for iSeries */
685 void * __init iSeries_early_setup(void)
687 unsigned long phys_mem_size;
689 iSeries_fixup_klimit();
692 * Initialize the table which translate Linux physical addresses to
693 * AS/400 absolute addresses
695 phys_mem_size = build_iSeries_Memory_Map();
697 iSeries_get_cmdline();
699 return (void *) __pa(build_flat_dt(phys_mem_size));
702 static void hvputc(char c)
707 HvCall_writeLogBuffer(&c, 1);
710 void __init udbg_init_iseries(void)