[PATCH] UML: TLS fixlets
[linux-2.6] / drivers / net / chelsio / cphy.h
1 /*****************************************************************************
2  *                                                                           *
3  * File: cphy.h                                                              *
4  * $Revision: 1.7 $                                                          *
5  * $Date: 2005/06/21 18:29:47 $                                              *
6  * Description:                                                              *
7  *  part of the Chelsio 10Gb Ethernet Driver.                                *
8  *                                                                           *
9  * This program is free software; you can redistribute it and/or modify      *
10  * it under the terms of the GNU General Public License, version 2, as       *
11  * published by the Free Software Foundation.                                *
12  *                                                                           *
13  * You should have received a copy of the GNU General Public License along   *
14  * with this program; if not, write to the Free Software Foundation, Inc.,   *
15  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.                 *
16  *                                                                           *
17  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED    *
18  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF      *
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.                     *
20  *                                                                           *
21  * http://www.chelsio.com                                                    *
22  *                                                                           *
23  * Copyright (c) 2003 - 2005 Chelsio Communications, Inc.                    *
24  * All rights reserved.                                                      *
25  *                                                                           *
26  * Maintainers: maintainers@chelsio.com                                      *
27  *                                                                           *
28  * Authors: Dimitrios Michailidis   <dm@chelsio.com>                         *
29  *          Tina Yang               <tainay@chelsio.com>                     *
30  *          Felix Marti             <felix@chelsio.com>                      *
31  *          Scott Bardone           <sbardone@chelsio.com>                   *
32  *          Kurt Ottaway            <kottaway@chelsio.com>                   *
33  *          Frank DiMambro          <frank@chelsio.com>                      *
34  *                                                                           *
35  * History:                                                                  *
36  *                                                                           *
37  ****************************************************************************/
38
39 #ifndef _CXGB_CPHY_H_
40 #define _CXGB_CPHY_H_
41
42 #include "common.h"
43
44 struct mdio_ops {
45         void (*init)(adapter_t *adapter, const struct board_info *bi);
46         int  (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
47                      int reg_addr, unsigned int *val);
48         int  (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
49                       int reg_addr, unsigned int val);
50 };
51
52 /* PHY interrupt types */
53 enum {
54         cphy_cause_link_change = 0x1,
55         cphy_cause_error = 0x2
56 };
57
58 struct cphy;
59
60 /* PHY operations */
61 struct cphy_ops {
62         void (*destroy)(struct cphy *);
63         int (*reset)(struct cphy *, int wait);
64
65         int (*interrupt_enable)(struct cphy *);
66         int (*interrupt_disable)(struct cphy *);
67         int (*interrupt_clear)(struct cphy *);
68         int (*interrupt_handler)(struct cphy *);
69
70         int (*autoneg_enable)(struct cphy *);
71         int (*autoneg_disable)(struct cphy *);
72         int (*autoneg_restart)(struct cphy *);
73
74         int (*advertise)(struct cphy *phy, unsigned int advertise_map);
75         int (*set_loopback)(struct cphy *, int on);
76         int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
77         int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
78                                int *duplex, int *fc);
79 };
80
81 /* A PHY instance */
82 struct cphy {
83         int addr;                            /* PHY address */
84         adapter_t *adapter;                  /* associated adapter */
85         struct cphy_ops *ops;                /* PHY operations */
86         int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
87                          int reg_addr, unsigned int *val);
88         int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
89                           int reg_addr, unsigned int val);
90         struct cphy_instance *instance;
91 };
92
93 /* Convenience MDIO read/write wrappers */
94 static inline int mdio_read(struct cphy *cphy, int mmd, int reg,
95                             unsigned int *valp)
96 {
97         return cphy->mdio_read(cphy->adapter, cphy->addr, mmd, reg, valp);
98 }
99
100 static inline int mdio_write(struct cphy *cphy, int mmd, int reg,
101                              unsigned int val)
102 {
103         return cphy->mdio_write(cphy->adapter, cphy->addr, mmd, reg, val);
104 }
105
106 static inline int simple_mdio_read(struct cphy *cphy, int reg,
107                                    unsigned int *valp)
108 {
109         return mdio_read(cphy, 0, reg, valp);
110 }
111
112 static inline int simple_mdio_write(struct cphy *cphy, int reg,
113                                     unsigned int val)
114 {
115         return mdio_write(cphy, 0, reg, val);
116 }
117
118 /* Convenience initializer */
119 static inline void cphy_init(struct cphy *phy, adapter_t *adapter,
120                              int phy_addr, struct cphy_ops *phy_ops,
121                              struct mdio_ops *mdio_ops)
122 {
123         phy->adapter = adapter;
124         phy->addr    = phy_addr;
125         phy->ops     = phy_ops;
126         if (mdio_ops) {
127                 phy->mdio_read  = mdio_ops->read;
128                 phy->mdio_write = mdio_ops->write;
129         }
130 }
131
132 /* Operations of the PHY-instance factory */
133 struct gphy {
134         /* Construct a PHY instance with the given PHY address */
135         struct cphy *(*create)(adapter_t *adapter, int phy_addr,
136                                struct mdio_ops *mdio_ops);
137
138         /*
139          * Reset the PHY chip.  This resets the whole PHY chip, not individual
140          * ports.
141          */
142         int (*reset)(adapter_t *adapter);
143 };
144
145 extern struct gphy t1_mv88x201x_ops;
146 extern struct gphy t1_dummy_phy_ops;
147
148 #endif /* _CXGB_CPHY_H_ */