git.oblomov.eu Git - linux-2.6/blob - drivers/media/dvb/frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com)
   5  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   6  *    and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com)
   7  *
   8  *    This program is free software; you can redistribute it and/or modify
   9  *    it under the terms of the GNU General Public License as published by
  10  *    the Free Software Foundation; either version 2 of the License, or
  11  *    (at your option) any later version.
  12  *
  13  *    This program is distributed in the hope that it will be useful,
  14  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *    GNU General Public License for more details.
  17  *
  18  *    You should have received a copy of the GNU General Public License
  19  *    along with this program; if not, write to the Free Software
  20  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22 */
  23
  24 /*
  25  *                      NOTES ABOUT THIS DRIVER
  26  *
  27  * This Linux driver supports:
  28  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
  29  *   AverTVHD MCE A180 (NXT2004)
  30  *   ATI HDTV Wonder (NXT2004)
  31  *
  32  * This driver needs external firmware. Please use the command
  33  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
  34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
  35  * download/extract the appropriate firmware, and then copy it to
  36  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  37  * (depending on configuration of firmware hotplug).
  38  */
  39 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
  40 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
  41 #define CRC_CCIT_MASK 0x1021
  42
  43 #include <linux/kernel.h>
  44 #include <linux/init.h>
  45 #include <linux/module.h>
  46 #include <linux/moduleparam.h>
  47
  48 #include "dvb_frontend.h"
  49 #include "dvb-pll.h"
  50 #include "nxt200x.h"
  51
  52 struct nxt200x_state {
  53
  54         struct i2c_adapter* i2c;
  55         struct dvb_frontend_ops ops;
  56         const struct nxt200x_config* config;
  57         struct dvb_frontend frontend;
  58
  59         /* demodulator private data */
  60         nxt_chip_type demod_chip;
  61         u8 initialised:1;
  62 };
  63
  64 static int debug;
  65 #define dprintk(args...) \
  66         do { \
  67                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
  68         } while (0)
  69
  70 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  71 {
  72         int err;
  73         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  74
  75         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  76                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  77                         __FUNCTION__, addr, err);
  78                 return -EREMOTEIO;
  79         }
  80         return 0;
  81 }
  82
  83 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
  84 {
  85         int err;
  86         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  87
  88         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  89                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
  90                         __FUNCTION__, addr, err);
  91                 return -EREMOTEIO;
  92         }
  93         return 0;
  94 }
  95
  96 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
  97 {
  98         u8 buf2 [len+1];
  99         int err;
 100         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
 101
 102         buf2[0] = reg;
 103         memcpy(&buf2[1], buf, len);
 104
 105         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 106                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
 107                         __FUNCTION__, state->config->demod_address, err);
 108                 return -EREMOTEIO;
 109         }
 110         return 0;
 111 }
 112
 113 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
 114 {
 115         u8 reg2 [] = { reg };
 116
 117         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 118                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 119
 120         int err;
 121
 122         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 123                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
 124                         __FUNCTION__, state->config->demod_address, err);
 125                 return -EREMOTEIO;
 126         }
 127         return 0;
 128 }
 129
 130 static u16 nxt200x_crc(u16 crc, u8 c)
 131 {
 132         u8 i;
 133         u16 input = (u16) c & 0xFF;
 134
 135         input<<=8;
 136         for(i=0; i<8; i++) {
 137                 if((crc^input) & 0x8000)
 138                         crc=(crc<<1)^CRC_CCIT_MASK;
 139                 else
 140                         crc<<=1;
 141                 input<<=1;
 142         }
 143         return crc;
 144 }
 145
 146 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 147 {
 148         u8 attr, len2, buf;
 149         dprintk("%s\n", __FUNCTION__);
 150
 151         /* set mutli register register */
 152         nxt200x_writebytes(state, 0x35, &reg, 1);
 153
 154         /* send the actual data */
 155         nxt200x_writebytes(state, 0x36, data, len);
 156
 157         switch (state->demod_chip) {
 158                 case NXT2002:
 159                         len2 = len;
 160                         buf = 0x02;
 161                         break;
 162                 case NXT2004:
 163                         /* probably not right, but gives correct values */
 164                         attr = 0x02;
 165                         if (reg & 0x80) {
 166                                 attr = attr << 1;
 167                                 if (reg & 0x04)
 168                                         attr = attr >> 1;
 169                         }
 170                         /* set write bit */
 171                         len2 = ((attr << 4) | 0x10) | len;
 172                         buf = 0x80;
 173                         break;
 174                 default:
 175                         return -EINVAL;
 176                         break;
 177         }
 178
 179         /* set multi register length */
 180         nxt200x_writebytes(state, 0x34, &len2, 1);
 181
 182         /* toggle the multireg write bit */
 183         nxt200x_writebytes(state, 0x21, &buf, 1);
 184
 185         nxt200x_readbytes(state, 0x21, &buf, 1);
 186
 187         switch (state->demod_chip) {
 188                 case NXT2002:
 189                         if ((buf & 0x02) == 0)
 190                                 return 0;
 191                         break;
 192                 case NXT2004:
 193                         if (buf == 0)
 194                                 return 0;
 195                         break;
 196                 default:
 197                         return -EINVAL;
 198                         break;
 199         }
 200
 201         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
 202
 203         return 0;
 204 }
 205
 206 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 207 {
 208         int i;
 209         u8 buf, len2, attr;
 210         dprintk("%s\n", __FUNCTION__);
 211
 212         /* set mutli register register */
 213         nxt200x_writebytes(state, 0x35, &reg, 1);
 214
 215         switch (state->demod_chip) {
 216                 case NXT2002:
 217                         /* set multi register length */
 218                         len2 = len & 0x80;
 219                         nxt200x_writebytes(state, 0x34, &len2, 1);
 220
 221                         /* read the actual data */
 222                         nxt200x_readbytes(state, reg, data, len);
 223                         return 0;
 224                         break;
 225                 case NXT2004:
 226                         /* probably not right, but gives correct values */
 227                         attr = 0x02;
 228                         if (reg & 0x80) {
 229                                 attr = attr << 1;
 230                                 if (reg & 0x04)
 231                                         attr = attr >> 1;
 232                         }
 233
 234                         /* set multi register length */
 235                         len2 = (attr << 4) | len;
 236                         nxt200x_writebytes(state, 0x34, &len2, 1);
 237
 238                         /* toggle the multireg bit*/
 239                         buf = 0x80;
 240                         nxt200x_writebytes(state, 0x21, &buf, 1);
 241
 242                         /* read the actual data */
 243                         for(i = 0; i < len; i++) {
 244                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 245                         }
 246                         return 0;
 247                         break;
 248                 default:
 249                         return -EINVAL;
 250                         break;
 251         }
 252 }
 253
 254 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 255 {
 256         u8 buf, stopval, counter = 0;
 257         dprintk("%s\n", __FUNCTION__);
 258
 259         /* set correct stop value */
 260         switch (state->demod_chip) {
 261                 case NXT2002:
 262                         stopval = 0x40;
 263                         break;
 264                 case NXT2004:
 265                         stopval = 0x10;
 266                         break;
 267                 default:
 268                         stopval = 0;
 269                         break;
 270         }
 271
 272         buf = 0x80;
 273         nxt200x_writebytes(state, 0x22, &buf, 1);
 274
 275         while (counter < 20) {
 276                 nxt200x_readbytes(state, 0x31, &buf, 1);
 277                 if (buf & stopval)
 278                         return;
 279                 msleep(10);
 280                 counter++;
 281         }
 282
 283         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 284         return;
 285 }
 286
 287 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 288 {
 289         u8 buf;
 290         dprintk("%s\n", __FUNCTION__);
 291
 292         buf = 0x00;
 293         nxt200x_writebytes(state, 0x22, &buf, 1);
 294 }
 295
 296 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 297 {
 298         u8 buf[9];
 299         u8 counter = 0;
 300         dprintk("%s\n", __FUNCTION__);
 301
 302         buf[0] = 0x00;
 303         nxt200x_writebytes(state, 0x2b, buf, 1);
 304         buf[0] = 0x70;
 305         nxt200x_writebytes(state, 0x34, buf, 1);
 306         buf[0] = 0x04;
 307         nxt200x_writebytes(state, 0x35, buf, 1);
 308         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 309         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 310         nxt200x_writebytes(state, 0x36, buf, 9);
 311         buf[0] = 0x80;
 312         nxt200x_writebytes(state, 0x21, buf, 1);
 313
 314         while (counter < 20) {
 315                 nxt200x_readbytes(state, 0x21, buf, 1);
 316                 if (buf[0] == 0)
 317                         return;
 318                 msleep(10);
 319                 counter++;
 320         }
 321
 322         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
 323
 324         return;
 325 }
 326
 327 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 328 {
 329         u8 buf, count = 0;
 330
 331         dprintk("%s\n", __FUNCTION__);
 332
 333         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[0], data[1], data[2], data[3]);
 334
 335         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 336          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 337         switch (state->demod_chip) {
 338                 case NXT2004:
 339                         if (i2c_writebytes(state, state->config->pll_address, data, 4))
 340                                 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
 341                         /* wait until we have a lock */
 342                         while (count < 20) {
 343                                 i2c_readbytes(state, state->config->pll_address, &buf, 1);
 344                                 if (buf & 0x40)
 345                                         return 0;
 346                                 msleep(100);
 347                                 count++;
 348                         }
 349                         printk("nxt2004: timeout waiting for tuner lock\n");
 350                         break;
 351                 case NXT2002:
 352                         /* set the i2c transfer speed to the tuner */
 353                         buf = 0x03;
 354                         nxt200x_writebytes(state, 0x20, &buf, 1);
 355
 356                         /* setup to transfer 4 bytes via i2c */
 357                         buf = 0x04;
 358                         nxt200x_writebytes(state, 0x34, &buf, 1);
 359
 360                         /* write actual tuner bytes */
 361                         nxt200x_writebytes(state, 0x36, data, 4);
 362
 363                         /* set tuner i2c address */
 364                         buf = state->config->pll_address;
 365                         nxt200x_writebytes(state, 0x35, &buf, 1);
 366
 367                         /* write UC Opmode to begin transfer */
 368                         buf = 0x80;
 369                         nxt200x_writebytes(state, 0x21, &buf, 1);
 370
 371                         while (count < 20) {
 372                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 373                                 if ((buf & 0x80)== 0x00)
 374                                         return 0;
 375                                 msleep(100);
 376                                 count++;
 377                         }
 378                         printk("nxt2002: timeout error writing tuner\n");
 379                         break;
 380                 default:
 381                         return -EINVAL;
 382                         break;
 383         }
 384         return 0;
 385 }
 386
 387 static void nxt200x_agc_reset(struct nxt200x_state* state)
 388 {
 389         u8 buf;
 390         dprintk("%s\n", __FUNCTION__);
 391
 392         switch (state->demod_chip) {
 393                 case NXT2002:
 394                         buf = 0x08;
 395                         nxt200x_writebytes(state, 0x08, &buf, 1);
 396                         buf = 0x00;
 397                         nxt200x_writebytes(state, 0x08, &buf, 1);
 398                         break;
 399                 case NXT2004:
 400                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 401                         buf = 0x08;
 402                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 403                         buf = 0x00;
 404                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 405                         break;
 406                 default:
 407                         break;
 408         }
 409         return;
 410 }
 411
 412 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 413 {
 414
 415         struct nxt200x_state* state = fe->demodulator_priv;
 416         u8 buf[3], written = 0, chunkpos = 0;
 417         u16 rambase, position, crc = 0;
 418
 419         dprintk("%s\n", __FUNCTION__);
 420         dprintk("Firmware is %zu bytes\n", fw->size);
 421
 422         /* Get the RAM base for this nxt2002 */
 423         nxt200x_readbytes(state, 0x10, buf, 1);
 424
 425         if (buf[0] & 0x10)
 426                 rambase = 0x1000;
 427         else
 428                 rambase = 0x0000;
 429
 430         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 431
 432         /* Hold the micro in reset while loading firmware */
 433         buf[0] = 0x80;
 434         nxt200x_writebytes(state, 0x2B, buf, 1);
 435
 436         for (position = 0; position < fw->size; position++) {
 437                 if (written == 0) {
 438                         crc = 0;
 439                         chunkpos = 0x28;
 440                         buf[0] = ((rambase + position) >> 8);
 441                         buf[1] = (rambase + position) & 0xFF;
 442                         buf[2] = 0x81;
 443                         /* write starting address */
 444                         nxt200x_writebytes(state, 0x29, buf, 3);
 445                 }
 446                 written++;
 447                 chunkpos++;
 448
 449                 if ((written % 4) == 0)
 450                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 451
 452                 crc = nxt200x_crc(crc, fw->data[position]);
 453
 454                 if ((written == 255) || (position+1 == fw->size)) {
 455                         /* write remaining bytes of firmware */
 456                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 457                                 &fw->data[position-(written %4) + 1],
 458                                 written %4);
 459                         buf[0] = crc << 8;
 460                         buf[1] = crc & 0xFF;
 461
 462                         /* write crc */
 463                         nxt200x_writebytes(state, 0x2C, buf, 2);
 464
 465                         /* do a read to stop things */
 466                         nxt200x_readbytes(state, 0x2A, buf, 1);
 467
 468                         /* set transfer mode to complete */
 469                         buf[0] = 0x80;
 470                         nxt200x_writebytes(state, 0x2B, buf, 1);
 471
 472                         written = 0;
 473                 }
 474         }
 475
 476         return 0;
 477 };
 478
 479 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 480 {
 481
 482         struct nxt200x_state* state = fe->demodulator_priv;
 483         u8 buf[3];
 484         u16 rambase, position, crc=0;
 485
 486         dprintk("%s\n", __FUNCTION__);
 487         dprintk("Firmware is %zu bytes\n", fw->size);
 488
 489         /* set rambase */
 490         rambase = 0x1000;
 491
 492         /* hold the micro in reset while loading firmware */
 493         buf[0] = 0x80;
 494         nxt200x_writebytes(state, 0x2B, buf,1);
 495
 496         /* calculate firmware CRC */
 497         for (position = 0; position < fw->size; position++) {
 498                 crc = nxt200x_crc(crc, fw->data[position]);
 499         }
 500
 501         buf[0] = rambase >> 8;
 502         buf[1] = rambase & 0xFF;
 503         buf[2] = 0x81;
 504         /* write starting address */
 505         nxt200x_writebytes(state,0x29,buf,3);
 506
 507         for (position = 0; position < fw->size;) {
 508                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 509                         fw->size-position > 255 ? 255 : fw->size-position);
 510                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 511         }
 512         buf[0] = crc >> 8;
 513         buf[1] = crc & 0xFF;
 514
 515         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 516
 517         /* write crc */
 518         nxt200x_writebytes(state, 0x2C, buf,2);
 519
 520         /* do a read to stop things */
 521         nxt200x_readbytes(state, 0x2C, buf, 1);
 522
 523         /* set transfer mode to complete */
 524         buf[0] = 0x80;
 525         nxt200x_writebytes(state, 0x2B, buf,1);
 526
 527         return 0;
 528 };
 529
 530 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
 531                                              struct dvb_frontend_parameters *p)
 532 {
 533         struct nxt200x_state* state = fe->demodulator_priv;
 534         u8 buf[4];
 535
 536         /* stop the micro first */
 537         nxt200x_microcontroller_stop(state);
 538
 539         if (state->demod_chip == NXT2004) {
 540                 /* make sure demod is set to digital */
 541                 buf[0] = 0x04;
 542                 nxt200x_writebytes(state, 0x14, buf, 1);
 543                 buf[0] = 0x00;
 544                 nxt200x_writebytes(state, 0x17, buf, 1);
 545         }
 546
 547         /* get tuning information */
 548         dvb_pll_configure(state->config->pll_desc, buf, p->frequency, 0);
 549
 550         /* set additional params */
 551         switch (p->u.vsb.modulation) {
 552                 case QAM_64:
 553                 case QAM_256:
 554                         /* Set punctured clock for QAM */
 555                         /* This is just a guess since I am unable to test it */
 556                         if (state->config->set_ts_params)
 557                                 state->config->set_ts_params(fe, 1);
 558
 559                         /* set input */
 560                         if (state->config->set_pll_input)
 561                                 state->config->set_pll_input(buf, 1);
 562                         break;
 563                 case VSB_8:
 564                         /* Set non-punctured clock for VSB */
 565                         if (state->config->set_ts_params)
 566                                 state->config->set_ts_params(fe, 0);
 567
 568                         /* set input */
 569                         if (state->config->set_pll_input)
 570                                 state->config->set_pll_input(buf, 0);
 571                         break;
 572                 default:
 573                         return -EINVAL;
 574                         break;
 575         }
 576
 577         /* write frequency information */
 578         nxt200x_writetuner(state, buf);
 579
 580         /* reset the agc now that tuning has been completed */
 581         nxt200x_agc_reset(state);
 582
 583         /* set target power level */
 584         switch (p->u.vsb.modulation) {
 585                 case QAM_64:
 586                 case QAM_256:
 587                         buf[0] = 0x74;
 588                         break;
 589                 case VSB_8:
 590                         buf[0] = 0x70;
 591                         break;
 592                 default:
 593                         return -EINVAL;
 594                         break;
 595         }
 596         nxt200x_writebytes(state, 0x42, buf, 1);
 597
 598         /* configure sdm */
 599         switch (state->demod_chip) {
 600                 case NXT2002:
 601                         buf[0] = 0x87;
 602                         break;
 603                 case NXT2004:
 604                         buf[0] = 0x07;
 605                         break;
 606                 default:
 607                         return -EINVAL;
 608                         break;
 609         }
 610         nxt200x_writebytes(state, 0x57, buf, 1);
 611
 612         /* write sdm1 input */
 613         buf[0] = 0x10;
 614         buf[1] = 0x00;
 615         nxt200x_writebytes(state, 0x58, buf, 2);
 616
 617         /* write sdmx input */
 618         switch (p->u.vsb.modulation) {
 619                 case QAM_64:
 620                                 buf[0] = 0x68;
 621                                 break;
 622                 case QAM_256:
 623                                 buf[0] = 0x64;
 624                                 break;
 625                 case VSB_8:
 626                                 buf[0] = 0x60;
 627                                 break;
 628                 default:
 629                                 return -EINVAL;
 630                                 break;
 631         }
 632         buf[1] = 0x00;
 633         nxt200x_writebytes(state, 0x5C, buf, 2);
 634
 635         /* write adc power lpf fc */
 636         buf[0] = 0x05;
 637         nxt200x_writebytes(state, 0x43, buf, 1);
 638
 639         if (state->demod_chip == NXT2004) {
 640                 /* write ??? */
 641                 buf[0] = 0x00;
 642                 buf[1] = 0x00;
 643                 nxt200x_writebytes(state, 0x46, buf, 2);
 644         }
 645
 646         /* write accumulator2 input */
 647         buf[0] = 0x80;
 648         buf[1] = 0x00;
 649         nxt200x_writebytes(state, 0x4B, buf, 2);
 650
 651         /* write kg1 */
 652         buf[0] = 0x00;
 653         nxt200x_writebytes(state, 0x4D, buf, 1);
 654
 655         /* write sdm12 lpf fc */
 656         buf[0] = 0x44;
 657         nxt200x_writebytes(state, 0x55, buf, 1);
 658
 659         /* write agc control reg */
 660         buf[0] = 0x04;
 661         nxt200x_writebytes(state, 0x41, buf, 1);
 662
 663         if (state->demod_chip == NXT2004) {
 664                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 665                 buf[0] = 0x24;
 666                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 667
 668                 /* soft reset? */
 669                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 670                 buf[0] = 0x10;
 671                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 672                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 673                 buf[0] = 0x00;
 674                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 675
 676                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 677                 buf[0] = 0x04;
 678                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 679                 buf[0] = 0x00;
 680                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 681                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 682                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 683                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 684                 buf[0] = 0x11;
 685                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 686                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 687                 buf[0] = 0x44;
 688                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 689         }
 690
 691         /* write agc ucgp0 */
 692         switch (p->u.vsb.modulation) {
 693                 case QAM_64:
 694                                 buf[0] = 0x02;
 695                                 break;
 696                 case QAM_256:
 697                                 buf[0] = 0x03;
 698                                 break;
 699                 case VSB_8:
 700                                 buf[0] = 0x00;
 701                                 break;
 702                 default:
 703                                 return -EINVAL;
 704                                 break;
 705         }
 706         nxt200x_writebytes(state, 0x30, buf, 1);
 707
 708         /* write agc control reg */
 709         buf[0] = 0x00;
 710         nxt200x_writebytes(state, 0x41, buf, 1);
 711
 712         /* write accumulator2 input */
 713         buf[0] = 0x80;
 714         buf[1] = 0x00;
 715         nxt200x_writebytes(state, 0x49, buf,2);
 716         nxt200x_writebytes(state, 0x4B, buf,2);
 717
 718         /* write agc control reg */
 719         buf[0] = 0x04;
 720         nxt200x_writebytes(state, 0x41, buf, 1);
 721
 722         nxt200x_microcontroller_start(state);
 723
 724         if (state->demod_chip == NXT2004) {
 725                 nxt2004_microcontroller_init(state);
 726
 727                 /* ???? */
 728                 buf[0] = 0xF0;
 729                 buf[1] = 0x00;
 730                 nxt200x_writebytes(state, 0x5C, buf, 2);
 731         }
 732
 733         /* adjacent channel detection should be done here, but I don't
 734         have any stations with this need so I cannot test it */
 735
 736         return 0;
 737 }
 738
 739 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 740 {
 741         struct nxt200x_state* state = fe->demodulator_priv;
 742         u8 lock;
 743         nxt200x_readbytes(state, 0x31, &lock, 1);
 744
 745         *status = 0;
 746         if (lock & 0x20) {
 747                 *status |= FE_HAS_SIGNAL;
 748                 *status |= FE_HAS_CARRIER;
 749                 *status |= FE_HAS_VITERBI;
 750                 *status |= FE_HAS_SYNC;
 751                 *status |= FE_HAS_LOCK;
 752         }
 753         return 0;
 754 }
 755
 756 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 757 {
 758         struct nxt200x_state* state = fe->demodulator_priv;
 759         u8 b[3];
 760
 761         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 762
 763         *ber = ((b[0] << 8) + b[1]) * 8;
 764
 765         return 0;
 766 }
 767
 768 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 769 {
 770         struct nxt200x_state* state = fe->demodulator_priv;
 771         u8 b[2];
 772         u16 temp = 0;
 773
 774         /* setup to read cluster variance */
 775         b[0] = 0x00;
 776         nxt200x_writebytes(state, 0xA1, b, 1);
 777
 778         /* get multreg val */
 779         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 780
 781         temp = (b[0] << 8) | b[1];
 782         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 783
 784         return 0;
 785 }
 786
 787 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 788 {
 789
 790         struct nxt200x_state* state = fe->demodulator_priv;
 791         u8 b[2];
 792         u16 temp = 0, temp2;
 793         u32 snrdb = 0;
 794
 795         /* setup to read cluster variance */
 796         b[0] = 0x00;
 797         nxt200x_writebytes(state, 0xA1, b, 1);
 798
 799         /* get multreg val from 0xA6 */
 800         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 801
 802         temp = (b[0] << 8) | b[1];
 803         temp2 = 0x7FFF - temp;
 804
 805         /* snr will be in db */
 806         if (temp2 > 0x7F00)
 807                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 808         else if (temp2 > 0x7EC0)
 809                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 810         else if (temp2 > 0x7C00)
 811                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 812         else
 813                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 814
 815         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 816         *snr = snrdb * (0xFFFF/32000);
 817
 818         return 0;
 819 }
 820
 821 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 822 {
 823         struct nxt200x_state* state = fe->demodulator_priv;
 824         u8 b[3];
 825
 826         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 827         *ucblocks = b[2];
 828
 829         return 0;
 830 }
 831
 832 static int nxt200x_sleep(struct dvb_frontend* fe)
 833 {
 834         return 0;
 835 }
 836
 837 static int nxt2002_init(struct dvb_frontend* fe)
 838 {
 839         struct nxt200x_state* state = fe->demodulator_priv;
 840         const struct firmware *fw;
 841         int ret;
 842         u8 buf[2];
 843
 844         /* request the firmware, this will block until someone uploads it */
 845         printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
 846         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
 847         printk("nxt2002: Waiting for firmware upload(2)...\n");
 848         if (ret) {
 849                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
 850                 return ret;
 851         }
 852
 853         ret = nxt2002_load_firmware(fe, fw);
 854         if (ret) {
 855                 printk("nxt2002: Writing firmware to device failed\n");
 856                 release_firmware(fw);
 857                 return ret;
 858         }
 859         printk("nxt2002: Firmware upload complete\n");
 860
 861         /* Put the micro into reset */
 862         nxt200x_microcontroller_stop(state);
 863
 864         /* ensure transfer is complete */
 865         buf[0]=0x00;
 866         nxt200x_writebytes(state, 0x2B, buf, 1);
 867
 868         /* Put the micro into reset for real this time */
 869         nxt200x_microcontroller_stop(state);
 870
 871         /* soft reset everything (agc,frontend,eq,fec)*/
 872         buf[0] = 0x0F;
 873         nxt200x_writebytes(state, 0x08, buf, 1);
 874         buf[0] = 0x00;
 875         nxt200x_writebytes(state, 0x08, buf, 1);
 876
 877         /* write agc sdm configure */
 878         buf[0] = 0xF1;
 879         nxt200x_writebytes(state, 0x57, buf, 1);
 880
 881         /* write mod output format */
 882         buf[0] = 0x20;
 883         nxt200x_writebytes(state, 0x09, buf, 1);
 884
 885         /* write fec mpeg mode */
 886         buf[0] = 0x7E;
 887         buf[1] = 0x00;
 888         nxt200x_writebytes(state, 0xE9, buf, 2);
 889
 890         /* write mux selection */
 891         buf[0] = 0x00;
 892         nxt200x_writebytes(state, 0xCC, buf, 1);
 893
 894         return 0;
 895 }
 896
 897 static int nxt2004_init(struct dvb_frontend* fe)
 898 {
 899         struct nxt200x_state* state = fe->demodulator_priv;
 900         const struct firmware *fw;
 901         int ret;
 902         u8 buf[3];
 903
 904         /* ??? */
 905         buf[0]=0x00;
 906         nxt200x_writebytes(state, 0x1E, buf, 1);
 907
 908         /* request the firmware, this will block until someone uploads it */
 909         printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
 910         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
 911         printk("nxt2004: Waiting for firmware upload(2)...\n");
 912         if (ret) {
 913                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
 914                 return ret;
 915         }
 916
 917         ret = nxt2004_load_firmware(fe, fw);
 918         if (ret) {
 919                 printk("nxt2004: Writing firmware to device failed\n");
 920                 release_firmware(fw);
 921                 return ret;
 922         }
 923         printk("nxt2004: Firmware upload complete\n");
 924
 925         /* ensure transfer is complete */
 926         buf[0] = 0x01;
 927         nxt200x_writebytes(state, 0x19, buf, 1);
 928
 929         nxt2004_microcontroller_init(state);
 930         nxt200x_microcontroller_stop(state);
 931         nxt200x_microcontroller_stop(state);
 932         nxt2004_microcontroller_init(state);
 933         nxt200x_microcontroller_stop(state);
 934
 935         /* soft reset everything (agc,frontend,eq,fec)*/
 936         buf[0] = 0xFF;
 937         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 938         buf[0] = 0x00;
 939         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 940
 941         /* write agc sdm configure */
 942         buf[0] = 0xD7;
 943         nxt200x_writebytes(state, 0x57, buf, 1);
 944
 945         /* ???*/
 946         buf[0] = 0x07;
 947         buf[1] = 0xfe;
 948         nxt200x_writebytes(state, 0x35, buf, 2);
 949         buf[0] = 0x12;
 950         nxt200x_writebytes(state, 0x34, buf, 1);
 951         buf[0] = 0x80;
 952         nxt200x_writebytes(state, 0x21, buf, 1);
 953
 954         /* ???*/
 955         buf[0] = 0x21;
 956         nxt200x_writebytes(state, 0x0A, buf, 1);
 957
 958         /* ???*/
 959         buf[0] = 0x01;
 960         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 961
 962         /* write fec mpeg mode */
 963         buf[0] = 0x7E;
 964         buf[1] = 0x00;
 965         nxt200x_writebytes(state, 0xE9, buf, 2);
 966
 967         /* write mux selection */
 968         buf[0] = 0x00;
 969         nxt200x_writebytes(state, 0xCC, buf, 1);
 970
 971         /* ???*/
 972         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 973         buf[0] = 0x00;
 974         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 975
 976         /* soft reset? */
 977         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 978         buf[0] = 0x10;
 979         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 980         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 981         buf[0] = 0x00;
 982         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 983
 984         /* ???*/
 985         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 986         buf[0] = 0x01;
 987         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 988         buf[0] = 0x70;
 989         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 990         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
 991         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 992
 993         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 994         buf[0] = 0x11;
 995         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 996         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 997         buf[0] = 0x40;
 998         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 999
1000         nxt200x_readbytes(state, 0x10, buf, 1);
1001         buf[0] = 0x10;
1002         nxt200x_writebytes(state, 0x10, buf, 1);
1003         nxt200x_readbytes(state, 0x0A, buf, 1);
1004         buf[0] = 0x21;
1005         nxt200x_writebytes(state, 0x0A, buf, 1);
1006
1007         nxt2004_microcontroller_init(state);
1008
1009         buf[0] = 0x21;
1010         nxt200x_writebytes(state, 0x0A, buf, 1);
1011         buf[0] = 0x7E;
1012         nxt200x_writebytes(state, 0xE9, buf, 1);
1013         buf[0] = 0x00;
1014         nxt200x_writebytes(state, 0xEA, buf, 1);
1015
1016         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1017         buf[0] = 0x00;
1018         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1019         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1020         buf[0] = 0x00;
1021         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1022
1023         /* soft reset? */
1024         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1025         buf[0] = 0x10;
1026         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1027         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1028         buf[0] = 0x00;
1029         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1030
1031         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1032         buf[0] = 0x04;
1033         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1034         buf[0] = 0x00;
1035         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1036         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1037         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1038
1039         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1040         buf[0] = 0x11;
1041         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1042
1043         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1044         buf[0] = 0x44;
1045         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1046
1047         /* initialize tuner */
1048         nxt200x_readbytes(state, 0x10, buf, 1);
1049         buf[0] = 0x12;
1050         nxt200x_writebytes(state, 0x10, buf, 1);
1051         buf[0] = 0x04;
1052         nxt200x_writebytes(state, 0x13, buf, 1);
1053         buf[0] = 0x00;
1054         nxt200x_writebytes(state, 0x16, buf, 1);
1055         buf[0] = 0x04;
1056         nxt200x_writebytes(state, 0x14, buf, 1);
1057         buf[0] = 0x00;
1058         nxt200x_writebytes(state, 0x14, buf, 1);
1059         nxt200x_writebytes(state, 0x17, buf, 1);
1060         nxt200x_writebytes(state, 0x14, buf, 1);
1061         nxt200x_writebytes(state, 0x17, buf, 1);
1062
1063         return 0;
1064 }
1065
1066 static int nxt200x_init(struct dvb_frontend* fe)
1067 {
1068         struct nxt200x_state* state = fe->demodulator_priv;
1069         int ret = 0;
1070
1071         if (!state->initialised) {
1072                 switch (state->demod_chip) {
1073                         case NXT2002:
1074                                 ret = nxt2002_init(fe);
1075                                 break;
1076                         case NXT2004:
1077                                 ret = nxt2004_init(fe);
1078                                 break;
1079                         default:
1080                                 return -EINVAL;
1081                                 break;
1082                 }
1083                 state->initialised = 1;
1084         }
1085         return ret;
1086 }
1087
1088 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1089 {
1090         fesettings->min_delay_ms = 500;
1091         fesettings->step_size = 0;
1092         fesettings->max_drift = 0;
1093         return 0;
1094 }
1095
1096 static void nxt200x_release(struct dvb_frontend* fe)
1097 {
1098         struct nxt200x_state* state = fe->demodulator_priv;
1099         kfree(state);
1100 }
1101
1102 static struct dvb_frontend_ops nxt200x_ops;
1103
1104 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1105                                    struct i2c_adapter* i2c)
1106 {
1107         struct nxt200x_state* state = NULL;
1108         u8 buf [] = {0,0,0,0,0};
1109
1110         /* allocate memory for the internal state */
1111         state = (struct nxt200x_state*) kmalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1112         if (state == NULL)
1113                 goto error;
1114         memset(state,0,sizeof(*state));
1115
1116         /* setup the state */
1117         state->config = config;
1118         state->i2c = i2c;
1119         memcpy(&state->ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1120         state->initialised = 0;
1121
1122         /* read card id */
1123         nxt200x_readbytes(state, 0x00, buf, 5);
1124         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1125                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1126
1127         /* set demod chip */
1128         switch (buf[0]) {
1129                 case 0x04:
1130                         state->demod_chip = NXT2002;
1131                         printk("nxt200x: NXT2002 Detected\n");
1132                         break;
1133                 case 0x05:
1134                         state->demod_chip = NXT2004;
1135                         printk("nxt200x: NXT2004 Detected\n");
1136                         break;
1137                 default:
1138                         goto error;
1139         }
1140
1141         /* make sure demod chip is supported */
1142         switch (state->demod_chip) {
1143                 case NXT2002:
1144                         if (buf[0] != 0x04) goto error;         /* device id */
1145                         if (buf[1] != 0x02) goto error;         /* fab id */
1146                         if (buf[2] != 0x11) goto error;         /* month */
1147                         if (buf[3] != 0x20) goto error;         /* year msb */
1148                         if (buf[4] != 0x00) goto error;         /* year lsb */
1149                         break;
1150                 case NXT2004:
1151                         if (buf[0] != 0x05) goto error;         /* device id */
1152                         break;
1153                 default:
1154                         goto error;
1155         }
1156
1157         /* create dvb_frontend */
1158         state->frontend.ops = &state->ops;
1159         state->frontend.demodulator_priv = state;
1160         return &state->frontend;
1161
1162 error:
1163         kfree(state);
1164         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1165                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1166         return NULL;
1167 }
1168
1169 static struct dvb_frontend_ops nxt200x_ops = {
1170
1171         .info = {
1172                 .name = "Nextwave NXT200X VSB/QAM frontend",
1173                 .type = FE_ATSC,
1174                 .frequency_min =  54000000,
1175                 .frequency_max = 860000000,
1176                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1177                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1178                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1179                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1180         },
1181
1182         .release = nxt200x_release,
1183
1184         .init = nxt200x_init,
1185         .sleep = nxt200x_sleep,
1186
1187         .set_frontend = nxt200x_setup_frontend_parameters,
1188         .get_tune_settings = nxt200x_get_tune_settings,
1189
1190         .read_status = nxt200x_read_status,
1191         .read_ber = nxt200x_read_ber,
1192         .read_signal_strength = nxt200x_read_signal_strength,
1193         .read_snr = nxt200x_read_snr,
1194         .read_ucblocks = nxt200x_read_ucblocks,
1195 };
1196
1197 module_param(debug, int, 0644);
1198 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1199
1200 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1201 MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob");
1202 MODULE_LICENSE("GPL");
1203
1204 EXPORT_SYMBOL(nxt200x_attach);
1205