git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31
  32 static struct device_node *allnodes;
  33
  34 /* use when traversing tree through the allnext, child, sibling,
  35  * or parent members of struct device_node.
  36  */
  37 static DEFINE_RWLOCK(devtree_lock);
  38
  39 int of_device_is_compatible(const struct device_node *device,
  40                             const char *compat)
  41 {
  42         const char* cp;
  43         int cplen, l;
  44
  45         cp = of_get_property(device, "compatible", &cplen);
  46         if (cp == NULL)
  47                 return 0;
  48         while (cplen > 0) {
  49                 if (strncmp(cp, compat, strlen(compat)) == 0)
  50                         return 1;
  51                 l = strlen(cp) + 1;
  52                 cp += l;
  53                 cplen -= l;
  54         }
  55
  56         return 0;
  57 }
  58 EXPORT_SYMBOL(of_device_is_compatible);
  59
  60 struct device_node *of_get_parent(const struct device_node *node)
  61 {
  62         struct device_node *np;
  63
  64         if (!node)
  65                 return NULL;
  66
  67         np = node->parent;
  68
  69         return np;
  70 }
  71 EXPORT_SYMBOL(of_get_parent);
  72
  73 struct device_node *of_get_next_child(const struct device_node *node,
  74         struct device_node *prev)
  75 {
  76         struct device_node *next;
  77
  78         next = prev ? prev->sibling : node->child;
  79         for (; next != 0; next = next->sibling) {
  80                 break;
  81         }
  82
  83         return next;
  84 }
  85 EXPORT_SYMBOL(of_get_next_child);
  86
  87 struct device_node *of_find_node_by_path(const char *path)
  88 {
  89         struct device_node *np = allnodes;
  90
  91         for (; np != 0; np = np->allnext) {
  92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  93                         break;
  94         }
  95
  96         return np;
  97 }
  98 EXPORT_SYMBOL(of_find_node_by_path);
  99
 100 struct device_node *of_find_node_by_phandle(phandle handle)
 101 {
 102         struct device_node *np;
 103
 104         for (np = allnodes; np != 0; np = np->allnext)
 105                 if (np->node == handle)
 106                         break;
 107
 108         return np;
 109 }
 110 EXPORT_SYMBOL(of_find_node_by_phandle);
 111
 112 struct device_node *of_find_node_by_name(struct device_node *from,
 113         const char *name)
 114 {
 115         struct device_node *np;
 116
 117         np = from ? from->allnext : allnodes;
 118         for (; np != NULL; np = np->allnext)
 119                 if (np->name != NULL && strcmp(np->name, name) == 0)
 120                         break;
 121
 122         return np;
 123 }
 124 EXPORT_SYMBOL(of_find_node_by_name);
 125
 126 struct device_node *of_find_node_by_type(struct device_node *from,
 127         const char *type)
 128 {
 129         struct device_node *np;
 130
 131         np = from ? from->allnext : allnodes;
 132         for (; np != 0; np = np->allnext)
 133                 if (np->type != 0 && strcmp(np->type, type) == 0)
 134                         break;
 135
 136         return np;
 137 }
 138 EXPORT_SYMBOL(of_find_node_by_type);
 139
 140 struct device_node *of_find_compatible_node(struct device_node *from,
 141         const char *type, const char *compatible)
 142 {
 143         struct device_node *np;
 144
 145         np = from ? from->allnext : allnodes;
 146         for (; np != 0; np = np->allnext) {
 147                 if (type != NULL
 148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 149                         continue;
 150                 if (of_device_is_compatible(np, compatible))
 151                         break;
 152         }
 153
 154         return np;
 155 }
 156 EXPORT_SYMBOL(of_find_compatible_node);
 157
 158 struct property *of_find_property(const struct device_node *np,
 159                                   const char *name,
 160                                   int *lenp)
 161 {
 162         struct property *pp;
 163
 164         for (pp = np->properties; pp != 0; pp = pp->next) {
 165                 if (strcasecmp(pp->name, name) == 0) {
 166                         if (lenp != 0)
 167                                 *lenp = pp->length;
 168                         break;
 169                 }
 170         }
 171         return pp;
 172 }
 173 EXPORT_SYMBOL(of_find_property);
 174
 175 /*
 176  * Find a property with a given name for a given node
 177  * and return the value.
 178  */
 179 const void *of_get_property(const struct device_node *np, const char *name,
 180                       int *lenp)
 181 {
 182         struct property *pp = of_find_property(np,name,lenp);
 183         return pp ? pp->value : NULL;
 184 }
 185 EXPORT_SYMBOL(of_get_property);
 186
 187 int of_getintprop_default(struct device_node *np, const char *name, int def)
 188 {
 189         struct property *prop;
 190         int len;
 191
 192         prop = of_find_property(np, name, &len);
 193         if (!prop || len != 4)
 194                 return def;
 195
 196         return *(int *) prop->value;
 197 }
 198 EXPORT_SYMBOL(of_getintprop_default);
 199
 200 int of_n_addr_cells(struct device_node *np)
 201 {
 202         const int* ip;
 203         do {
 204                 if (np->parent)
 205                         np = np->parent;
 206                 ip = of_get_property(np, "#address-cells", NULL);
 207                 if (ip != NULL)
 208                         return *ip;
 209         } while (np->parent);
 210         /* No #address-cells property for the root node, default to 2 */
 211         return 2;
 212 }
 213 EXPORT_SYMBOL(of_n_addr_cells);
 214
 215 int of_n_size_cells(struct device_node *np)
 216 {
 217         const int* ip;
 218         do {
 219                 if (np->parent)
 220                         np = np->parent;
 221                 ip = of_get_property(np, "#size-cells", NULL);
 222                 if (ip != NULL)
 223                         return *ip;
 224         } while (np->parent);
 225         /* No #size-cells property for the root node, default to 1 */
 226         return 1;
 227 }
 228 EXPORT_SYMBOL(of_n_size_cells);
 229
 230 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 231 {
 232         struct property **prevp;
 233         void *new_val;
 234         int err;
 235
 236         new_val = kmalloc(len, GFP_KERNEL);
 237         if (!new_val)
 238                 return -ENOMEM;
 239
 240         memcpy(new_val, val, len);
 241
 242         err = -ENODEV;
 243
 244         write_lock(&devtree_lock);
 245         prevp = &dp->properties;
 246         while (*prevp) {
 247                 struct property *prop = *prevp;
 248
 249                 if (!strcasecmp(prop->name, name)) {
 250                         void *old_val = prop->value;
 251                         int ret;
 252
 253                         ret = prom_setprop(dp->node, name, val, len);
 254                         err = -EINVAL;
 255                         if (ret >= 0) {
 256                                 prop->value = new_val;
 257                                 prop->length = len;
 258
 259                                 if (OF_IS_DYNAMIC(prop))
 260                                         kfree(old_val);
 261
 262                                 OF_MARK_DYNAMIC(prop);
 263
 264                                 err = 0;
 265                         }
 266                         break;
 267                 }
 268                 prevp = &(*prevp)->next;
 269         }
 270         write_unlock(&devtree_lock);
 271
 272         /* XXX Upate procfs if necessary... */
 273
 274         return err;
 275 }
 276 EXPORT_SYMBOL(of_set_property);
 277
 278 static unsigned int prom_early_allocated;
 279
 280 static void * __init prom_early_alloc(unsigned long size)
 281 {
 282         void *ret;
 283
 284         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 285         if (ret != NULL)
 286                 memset(ret, 0, size);
 287
 288         prom_early_allocated += size;
 289
 290         return ret;
 291 }
 292
 293 #ifdef CONFIG_PCI
 294 /* PSYCHO interrupt mapping support. */
 295 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 296 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 297 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 298 {
 299         unsigned int bus =  (ino & 0x10) >> 4;
 300         unsigned int slot = (ino & 0x0c) >> 2;
 301
 302         if (bus == 0)
 303                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 304         else
 305                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 306 }
 307
 308 #define PSYCHO_IMAP_SCSI        0x1000UL
 309 #define PSYCHO_IMAP_ETH         0x1008UL
 310 #define PSYCHO_IMAP_BPP         0x1010UL
 311 #define PSYCHO_IMAP_AU_REC      0x1018UL
 312 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 313 #define PSYCHO_IMAP_PFAIL       0x1028UL
 314 #define PSYCHO_IMAP_KMS         0x1030UL
 315 #define PSYCHO_IMAP_FLPY        0x1038UL
 316 #define PSYCHO_IMAP_SHW         0x1040UL
 317 #define PSYCHO_IMAP_KBD         0x1048UL
 318 #define PSYCHO_IMAP_MS          0x1050UL
 319 #define PSYCHO_IMAP_SER         0x1058UL
 320 #define PSYCHO_IMAP_TIM0        0x1060UL
 321 #define PSYCHO_IMAP_TIM1        0x1068UL
 322 #define PSYCHO_IMAP_UE          0x1070UL
 323 #define PSYCHO_IMAP_CE          0x1078UL
 324 #define PSYCHO_IMAP_A_ERR       0x1080UL
 325 #define PSYCHO_IMAP_B_ERR       0x1088UL
 326 #define PSYCHO_IMAP_PMGMT       0x1090UL
 327 #define PSYCHO_IMAP_GFX         0x1098UL
 328 #define PSYCHO_IMAP_EUPA        0x10a0UL
 329
 330 static unsigned long __psycho_onboard_imap_off[] = {
 331 /*0x20*/        PSYCHO_IMAP_SCSI,
 332 /*0x21*/        PSYCHO_IMAP_ETH,
 333 /*0x22*/        PSYCHO_IMAP_BPP,
 334 /*0x23*/        PSYCHO_IMAP_AU_REC,
 335 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 336 /*0x25*/        PSYCHO_IMAP_PFAIL,
 337 /*0x26*/        PSYCHO_IMAP_KMS,
 338 /*0x27*/        PSYCHO_IMAP_FLPY,
 339 /*0x28*/        PSYCHO_IMAP_SHW,
 340 /*0x29*/        PSYCHO_IMAP_KBD,
 341 /*0x2a*/        PSYCHO_IMAP_MS,
 342 /*0x2b*/        PSYCHO_IMAP_SER,
 343 /*0x2c*/        PSYCHO_IMAP_TIM0,
 344 /*0x2d*/        PSYCHO_IMAP_TIM1,
 345 /*0x2e*/        PSYCHO_IMAP_UE,
 346 /*0x2f*/        PSYCHO_IMAP_CE,
 347 /*0x30*/        PSYCHO_IMAP_A_ERR,
 348 /*0x31*/        PSYCHO_IMAP_B_ERR,
 349 /*0x32*/        PSYCHO_IMAP_PMGMT,
 350 /*0x33*/        PSYCHO_IMAP_GFX,
 351 /*0x34*/        PSYCHO_IMAP_EUPA,
 352 };
 353 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 354 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 355 #define psycho_onboard_imap_offset(__ino) \
 356         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 357
 358 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 359 #define PSYCHO_ICLR_SCSI        0x1800UL
 360
 361 #define psycho_iclr_offset(ino)                                       \
 362         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 363                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 364
 365 static unsigned int psycho_irq_build(struct device_node *dp,
 366                                      unsigned int ino,
 367                                      void *_data)
 368 {
 369         unsigned long controller_regs = (unsigned long) _data;
 370         unsigned long imap, iclr;
 371         unsigned long imap_off, iclr_off;
 372         int inofixup = 0;
 373
 374         ino &= 0x3f;
 375         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 376                 /* PCI slot */
 377                 imap_off = psycho_pcislot_imap_offset(ino);
 378         } else {
 379                 /* Onboard device */
 380                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 381                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 382                         prom_halt();
 383                 }
 384                 imap_off = psycho_onboard_imap_offset(ino);
 385         }
 386
 387         /* Now build the IRQ bucket. */
 388         imap = controller_regs + imap_off;
 389
 390         iclr_off = psycho_iclr_offset(ino);
 391         iclr = controller_regs + iclr_off;
 392
 393         if ((ino & 0x20) == 0)
 394                 inofixup = ino & 0x03;
 395
 396         return build_irq(inofixup, iclr, imap);
 397 }
 398
 399 static void psycho_irq_trans_init(struct device_node *dp)
 400 {
 401         const struct linux_prom64_registers *regs;
 402
 403         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 404         dp->irq_trans->irq_build = psycho_irq_build;
 405
 406         regs = of_get_property(dp, "reg", NULL);
 407         dp->irq_trans->data = (void *) regs[2].phys_addr;
 408 }
 409
 410 #define sabre_read(__reg) \
 411 ({      u64 __ret; \
 412         __asm__ __volatile__("ldxa [%1] %2, %0" \
 413                              : "=r" (__ret) \
 414                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 415                              : "memory"); \
 416         __ret; \
 417 })
 418
 419 struct sabre_irq_data {
 420         unsigned long controller_regs;
 421         unsigned int pci_first_busno;
 422 };
 423 #define SABRE_CONFIGSPACE       0x001000000UL
 424 #define SABRE_WRSYNC            0x1c20UL
 425
 426 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 427         (CONFIG_SPACE | (1UL << 24))
 428 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 429         (((unsigned long)(BUS)   << 16) |       \
 430          ((unsigned long)(DEVFN) << 8)  |       \
 431          ((unsigned long)(REG)))
 432
 433 /* When a device lives behind a bridge deeper in the PCI bus topology
 434  * than APB, a special sequence must run to make sure all pending DMA
 435  * transfers at the time of IRQ delivery are visible in the coherency
 436  * domain by the cpu.  This sequence is to perform a read on the far
 437  * side of the non-APB bridge, then perform a read of Sabre's DMA
 438  * write-sync register.
 439  */
 440 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 441 {
 442         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 443         struct sabre_irq_data *irq_data = _arg2;
 444         unsigned long controller_regs = irq_data->controller_regs;
 445         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 446         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 447         unsigned int bus, devfn;
 448         u16 _unused;
 449
 450         config_space = SABRE_CONFIG_BASE(config_space);
 451
 452         bus = (phys_hi >> 16) & 0xff;
 453         devfn = (phys_hi >> 8) & 0xff;
 454
 455         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 456
 457         __asm__ __volatile__("membar #Sync\n\t"
 458                              "lduha [%1] %2, %0\n\t"
 459                              "membar #Sync"
 460                              : "=r" (_unused)
 461                              : "r" ((u16 *) config_space),
 462                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 463                              : "memory");
 464
 465         sabre_read(sync_reg);
 466 }
 467
 468 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 469 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 470 #define SABRE_IMAP_SCSI         0x1000UL
 471 #define SABRE_IMAP_ETH          0x1008UL
 472 #define SABRE_IMAP_BPP          0x1010UL
 473 #define SABRE_IMAP_AU_REC       0x1018UL
 474 #define SABRE_IMAP_AU_PLAY      0x1020UL
 475 #define SABRE_IMAP_PFAIL        0x1028UL
 476 #define SABRE_IMAP_KMS          0x1030UL
 477 #define SABRE_IMAP_FLPY         0x1038UL
 478 #define SABRE_IMAP_SHW          0x1040UL
 479 #define SABRE_IMAP_KBD          0x1048UL
 480 #define SABRE_IMAP_MS           0x1050UL
 481 #define SABRE_IMAP_SER          0x1058UL
 482 #define SABRE_IMAP_UE           0x1070UL
 483 #define SABRE_IMAP_CE           0x1078UL
 484 #define SABRE_IMAP_PCIERR       0x1080UL
 485 #define SABRE_IMAP_GFX          0x1098UL
 486 #define SABRE_IMAP_EUPA         0x10a0UL
 487 #define SABRE_ICLR_A_SLOT0      0x1400UL
 488 #define SABRE_ICLR_B_SLOT0      0x1480UL
 489 #define SABRE_ICLR_SCSI         0x1800UL
 490 #define SABRE_ICLR_ETH          0x1808UL
 491 #define SABRE_ICLR_BPP          0x1810UL
 492 #define SABRE_ICLR_AU_REC       0x1818UL
 493 #define SABRE_ICLR_AU_PLAY      0x1820UL
 494 #define SABRE_ICLR_PFAIL        0x1828UL
 495 #define SABRE_ICLR_KMS          0x1830UL
 496 #define SABRE_ICLR_FLPY         0x1838UL
 497 #define SABRE_ICLR_SHW          0x1840UL
 498 #define SABRE_ICLR_KBD          0x1848UL
 499 #define SABRE_ICLR_MS           0x1850UL
 500 #define SABRE_ICLR_SER          0x1858UL
 501 #define SABRE_ICLR_UE           0x1870UL
 502 #define SABRE_ICLR_CE           0x1878UL
 503 #define SABRE_ICLR_PCIERR       0x1880UL
 504
 505 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 506 {
 507         unsigned int bus =  (ino & 0x10) >> 4;
 508         unsigned int slot = (ino & 0x0c) >> 2;
 509
 510         if (bus == 0)
 511                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 512         else
 513                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 514 }
 515
 516 static unsigned long __sabre_onboard_imap_off[] = {
 517 /*0x20*/        SABRE_IMAP_SCSI,
 518 /*0x21*/        SABRE_IMAP_ETH,
 519 /*0x22*/        SABRE_IMAP_BPP,
 520 /*0x23*/        SABRE_IMAP_AU_REC,
 521 /*0x24*/        SABRE_IMAP_AU_PLAY,
 522 /*0x25*/        SABRE_IMAP_PFAIL,
 523 /*0x26*/        SABRE_IMAP_KMS,
 524 /*0x27*/        SABRE_IMAP_FLPY,
 525 /*0x28*/        SABRE_IMAP_SHW,
 526 /*0x29*/        SABRE_IMAP_KBD,
 527 /*0x2a*/        SABRE_IMAP_MS,
 528 /*0x2b*/        SABRE_IMAP_SER,
 529 /*0x2c*/        0 /* reserved */,
 530 /*0x2d*/        0 /* reserved */,
 531 /*0x2e*/        SABRE_IMAP_UE,
 532 /*0x2f*/        SABRE_IMAP_CE,
 533 /*0x30*/        SABRE_IMAP_PCIERR,
 534 /*0x31*/        0 /* reserved */,
 535 /*0x32*/        0 /* reserved */,
 536 /*0x33*/        SABRE_IMAP_GFX,
 537 /*0x34*/        SABRE_IMAP_EUPA,
 538 };
 539 #define SABRE_ONBOARD_IRQ_BASE          0x20
 540 #define SABRE_ONBOARD_IRQ_LAST          0x30
 541 #define sabre_onboard_imap_offset(__ino) \
 542         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 543
 544 #define sabre_iclr_offset(ino)                                        \
 545         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 546                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 547
 548 static int sabre_device_needs_wsync(struct device_node *dp)
 549 {
 550         struct device_node *parent = dp->parent;
 551         const char *parent_model, *parent_compat;
 552
 553         /* This traversal up towards the root is meant to
 554          * handle two cases:
 555          *
 556          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 557          * 2) the PCI controller interrupts themselves, which
 558          *    will use the sabre_irq_build but do not need
 559          *    the DMA synchronization handling
 560          */
 561         while (parent) {
 562                 if (!strcmp(parent->type, "pci"))
 563                         break;
 564                 parent = parent->parent;
 565         }
 566
 567         if (!parent)
 568                 return 0;
 569
 570         parent_model = of_get_property(parent,
 571                                        "model", NULL);
 572         if (parent_model &&
 573             (!strcmp(parent_model, "SUNW,sabre") ||
 574              !strcmp(parent_model, "SUNW,simba")))
 575                 return 0;
 576
 577         parent_compat = of_get_property(parent,
 578                                         "compatible", NULL);
 579         if (parent_compat &&
 580             (!strcmp(parent_compat, "pci108e,a000") ||
 581              !strcmp(parent_compat, "pci108e,a001")))
 582                 return 0;
 583
 584         return 1;
 585 }
 586
 587 static unsigned int sabre_irq_build(struct device_node *dp,
 588                                     unsigned int ino,
 589                                     void *_data)
 590 {
 591         struct sabre_irq_data *irq_data = _data;
 592         unsigned long controller_regs = irq_data->controller_regs;
 593         const struct linux_prom_pci_registers *regs;
 594         unsigned long imap, iclr;
 595         unsigned long imap_off, iclr_off;
 596         int inofixup = 0;
 597         int virt_irq;
 598
 599         ino &= 0x3f;
 600         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 601                 /* PCI slot */
 602                 imap_off = sabre_pcislot_imap_offset(ino);
 603         } else {
 604                 /* onboard device */
 605                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 606                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 607                         prom_halt();
 608                 }
 609                 imap_off = sabre_onboard_imap_offset(ino);
 610         }
 611
 612         /* Now build the IRQ bucket. */
 613         imap = controller_regs + imap_off;
 614
 615         iclr_off = sabre_iclr_offset(ino);
 616         iclr = controller_regs + iclr_off;
 617
 618         if ((ino & 0x20) == 0)
 619                 inofixup = ino & 0x03;
 620
 621         virt_irq = build_irq(inofixup, iclr, imap);
 622
 623         /* If the parent device is a PCI<->PCI bridge other than
 624          * APB, we have to install a pre-handler to ensure that
 625          * all pending DMA is drained before the interrupt handler
 626          * is run.
 627          */
 628         regs = of_get_property(dp, "reg", NULL);
 629         if (regs && sabre_device_needs_wsync(dp)) {
 630                 irq_install_pre_handler(virt_irq,
 631                                         sabre_wsync_handler,
 632                                         (void *) (long) regs->phys_hi,
 633                                         (void *) irq_data);
 634         }
 635
 636         return virt_irq;
 637 }
 638
 639 static void sabre_irq_trans_init(struct device_node *dp)
 640 {
 641         const struct linux_prom64_registers *regs;
 642         struct sabre_irq_data *irq_data;
 643         const u32 *busrange;
 644
 645         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 646         dp->irq_trans->irq_build = sabre_irq_build;
 647
 648         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 649
 650         regs = of_get_property(dp, "reg", NULL);
 651         irq_data->controller_regs = regs[0].phys_addr;
 652
 653         busrange = of_get_property(dp, "bus-range", NULL);
 654         irq_data->pci_first_busno = busrange[0];
 655
 656         dp->irq_trans->data = irq_data;
 657 }
 658
 659 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 660  * imap/iclr registers are per-PBM.
 661  */
 662 #define SCHIZO_IMAP_BASE        0x1000UL
 663 #define SCHIZO_ICLR_BASE        0x1400UL
 664
 665 static unsigned long schizo_imap_offset(unsigned long ino)
 666 {
 667         return SCHIZO_IMAP_BASE + (ino * 8UL);
 668 }
 669
 670 static unsigned long schizo_iclr_offset(unsigned long ino)
 671 {
 672         return SCHIZO_ICLR_BASE + (ino * 8UL);
 673 }
 674
 675 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 676                                         unsigned int ino)
 677 {
 678
 679         return pbm_regs + schizo_iclr_offset(ino);
 680 }
 681
 682 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 683                                         unsigned int ino)
 684 {
 685         return pbm_regs + schizo_imap_offset(ino);
 686 }
 687
 688 #define schizo_read(__reg) \
 689 ({      u64 __ret; \
 690         __asm__ __volatile__("ldxa [%1] %2, %0" \
 691                              : "=r" (__ret) \
 692                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 693                              : "memory"); \
 694         __ret; \
 695 })
 696 #define schizo_write(__reg, __val) \
 697         __asm__ __volatile__("stxa %0, [%1] %2" \
 698                              : /* no outputs */ \
 699                              : "r" (__val), "r" (__reg), \
 700                                "i" (ASI_PHYS_BYPASS_EC_E) \
 701                              : "memory")
 702
 703 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 704 {
 705         unsigned long sync_reg = (unsigned long) _arg2;
 706         u64 mask = 1UL << (ino & IMAP_INO);
 707         u64 val;
 708         int limit;
 709
 710         schizo_write(sync_reg, mask);
 711
 712         limit = 100000;
 713         val = 0;
 714         while (--limit) {
 715                 val = schizo_read(sync_reg);
 716                 if (!(val & mask))
 717                         break;
 718         }
 719         if (limit <= 0) {
 720                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 721                        val, mask);
 722         }
 723
 724         if (_arg1) {
 725                 static unsigned char cacheline[64]
 726                         __attribute__ ((aligned (64)));
 727
 728                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 729                                      "or %0, %4, %1\n\t"
 730                                      "wr %1, 0x0, %%fprs\n\t"
 731                                      "stda %%f0, [%5] %6\n\t"
 732                                      "wr %0, 0x0, %%fprs\n\t"
 733                                      "membar #Sync"
 734                                      : "=&r" (mask), "=&r" (val)
 735                                      : "0" (mask), "1" (val),
 736                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 737                                      "i" (ASI_BLK_COMMIT_P));
 738         }
 739 }
 740
 741 struct schizo_irq_data {
 742         unsigned long pbm_regs;
 743         unsigned long sync_reg;
 744         u32 portid;
 745         int chip_version;
 746 };
 747
 748 static unsigned int schizo_irq_build(struct device_node *dp,
 749                                      unsigned int ino,
 750                                      void *_data)
 751 {
 752         struct schizo_irq_data *irq_data = _data;
 753         unsigned long pbm_regs = irq_data->pbm_regs;
 754         unsigned long imap, iclr;
 755         int ign_fixup;
 756         int virt_irq;
 757         int is_tomatillo;
 758
 759         ino &= 0x3f;
 760
 761         /* Now build the IRQ bucket. */
 762         imap = schizo_ino_to_imap(pbm_regs, ino);
 763         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 764
 765         /* On Schizo, no inofixup occurs.  This is because each
 766          * INO has it's own IMAP register.  On Psycho and Sabre
 767          * there is only one IMAP register for each PCI slot even
 768          * though four different INOs can be generated by each
 769          * PCI slot.
 770          *
 771          * But, for JBUS variants (essentially, Tomatillo), we have
 772          * to fixup the lowest bit of the interrupt group number.
 773          */
 774         ign_fixup = 0;
 775
 776         is_tomatillo = (irq_data->sync_reg != 0UL);
 777
 778         if (is_tomatillo) {
 779                 if (irq_data->portid & 1)
 780                         ign_fixup = (1 << 6);
 781         }
 782
 783         virt_irq = build_irq(ign_fixup, iclr, imap);
 784
 785         if (is_tomatillo) {
 786                 irq_install_pre_handler(virt_irq,
 787                                         tomatillo_wsync_handler,
 788                                         ((irq_data->chip_version <= 4) ?
 789                                          (void *) 1 : (void *) 0),
 790                                         (void *) irq_data->sync_reg);
 791         }
 792
 793         return virt_irq;
 794 }
 795
 796 static void __schizo_irq_trans_init(struct device_node *dp, int is_tomatillo)
 797 {
 798         const struct linux_prom64_registers *regs;
 799         struct schizo_irq_data *irq_data;
 800
 801         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 802         dp->irq_trans->irq_build = schizo_irq_build;
 803
 804         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 805
 806         regs = of_get_property(dp, "reg", NULL);
 807         dp->irq_trans->data = irq_data;
 808
 809         irq_data->pbm_regs = regs[0].phys_addr;
 810         if (is_tomatillo)
 811                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 812         else
 813                 irq_data->sync_reg = 0UL;
 814         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 815         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 816 }
 817
 818 static void schizo_irq_trans_init(struct device_node *dp)
 819 {
 820         __schizo_irq_trans_init(dp, 0);
 821 }
 822
 823 static void tomatillo_irq_trans_init(struct device_node *dp)
 824 {
 825         __schizo_irq_trans_init(dp, 1);
 826 }
 827
 828 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 829                                         unsigned int devino,
 830                                         void *_data)
 831 {
 832         u32 devhandle = (u32) (unsigned long) _data;
 833
 834         return sun4v_build_irq(devhandle, devino);
 835 }
 836
 837 static void pci_sun4v_irq_trans_init(struct device_node *dp)
 838 {
 839         const struct linux_prom64_registers *regs;
 840
 841         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 842         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 843
 844         regs = of_get_property(dp, "reg", NULL);
 845         dp->irq_trans->data = (void *) (unsigned long)
 846                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 847 }
 848
 849 struct fire_irq_data {
 850         unsigned long pbm_regs;
 851         u32 portid;
 852 };
 853
 854 #define FIRE_IMAP_BASE  0x001000
 855 #define FIRE_ICLR_BASE  0x001400
 856
 857 static unsigned long fire_imap_offset(unsigned long ino)
 858 {
 859         return FIRE_IMAP_BASE + (ino * 8UL);
 860 }
 861
 862 static unsigned long fire_iclr_offset(unsigned long ino)
 863 {
 864         return FIRE_ICLR_BASE + (ino * 8UL);
 865 }
 866
 867 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 868                                             unsigned int ino)
 869 {
 870         return pbm_regs + fire_iclr_offset(ino);
 871 }
 872
 873 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 874                                             unsigned int ino)
 875 {
 876         return pbm_regs + fire_imap_offset(ino);
 877 }
 878
 879 static unsigned int fire_irq_build(struct device_node *dp,
 880                                          unsigned int ino,
 881                                          void *_data)
 882 {
 883         struct fire_irq_data *irq_data = _data;
 884         unsigned long pbm_regs = irq_data->pbm_regs;
 885         unsigned long imap, iclr;
 886         unsigned long int_ctrlr;
 887
 888         ino &= 0x3f;
 889
 890         /* Now build the IRQ bucket. */
 891         imap = fire_ino_to_imap(pbm_regs, ino);
 892         iclr = fire_ino_to_iclr(pbm_regs, ino);
 893
 894         /* Set the interrupt controller number.  */
 895         int_ctrlr = 1 << 6;
 896         upa_writeq(int_ctrlr, imap);
 897
 898         /* The interrupt map registers do not have an INO field
 899          * like other chips do.  They return zero in the INO
 900          * field, and the interrupt controller number is controlled
 901          * in bits 6 thru 9.  So in order for build_irq() to get
 902          * the INO right we pass it in as part of the fixup
 903          * which will get added to the map register zero value
 904          * read by build_irq().
 905          */
 906         ino |= (irq_data->portid << 6);
 907         ino -= int_ctrlr;
 908         return build_irq(ino, iclr, imap);
 909 }
 910
 911 static void fire_irq_trans_init(struct device_node *dp)
 912 {
 913         const struct linux_prom64_registers *regs;
 914         struct fire_irq_data *irq_data;
 915
 916         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 917         dp->irq_trans->irq_build = fire_irq_build;
 918
 919         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 920
 921         regs = of_get_property(dp, "reg", NULL);
 922         dp->irq_trans->data = irq_data;
 923
 924         irq_data->pbm_regs = regs[0].phys_addr;
 925         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 926 }
 927 #endif /* CONFIG_PCI */
 928
 929 #ifdef CONFIG_SBUS
 930 /* INO number to IMAP register offset for SYSIO external IRQ's.
 931  * This should conform to both Sunfire/Wildfire server and Fusion
 932  * desktop designs.
 933  */
 934 #define SYSIO_IMAP_SLOT0        0x2c04UL
 935 #define SYSIO_IMAP_SLOT1        0x2c0cUL
 936 #define SYSIO_IMAP_SLOT2        0x2c14UL
 937 #define SYSIO_IMAP_SLOT3        0x2c1cUL
 938 #define SYSIO_IMAP_SCSI         0x3004UL
 939 #define SYSIO_IMAP_ETH          0x300cUL
 940 #define SYSIO_IMAP_BPP          0x3014UL
 941 #define SYSIO_IMAP_AUDIO        0x301cUL
 942 #define SYSIO_IMAP_PFAIL        0x3024UL
 943 #define SYSIO_IMAP_KMS          0x302cUL
 944 #define SYSIO_IMAP_FLPY         0x3034UL
 945 #define SYSIO_IMAP_SHW          0x303cUL
 946 #define SYSIO_IMAP_KBD          0x3044UL
 947 #define SYSIO_IMAP_MS           0x304cUL
 948 #define SYSIO_IMAP_SER          0x3054UL
 949 #define SYSIO_IMAP_TIM0         0x3064UL
 950 #define SYSIO_IMAP_TIM1         0x306cUL
 951 #define SYSIO_IMAP_UE           0x3074UL
 952 #define SYSIO_IMAP_CE           0x307cUL
 953 #define SYSIO_IMAP_SBERR        0x3084UL
 954 #define SYSIO_IMAP_PMGMT        0x308cUL
 955 #define SYSIO_IMAP_GFX          0x3094UL
 956 #define SYSIO_IMAP_EUPA         0x309cUL
 957
 958 #define bogon     ((unsigned long) -1)
 959 static unsigned long sysio_irq_offsets[] = {
 960         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 961         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 962         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 963         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 964         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 965         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 966         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 967         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 968         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 969
 970         /* Onboard devices (not relevant/used on SunFire). */
 971         SYSIO_IMAP_SCSI,
 972         SYSIO_IMAP_ETH,
 973         SYSIO_IMAP_BPP,
 974         bogon,
 975         SYSIO_IMAP_AUDIO,
 976         SYSIO_IMAP_PFAIL,
 977         bogon,
 978         bogon,
 979         SYSIO_IMAP_KMS,
 980         SYSIO_IMAP_FLPY,
 981         SYSIO_IMAP_SHW,
 982         SYSIO_IMAP_KBD,
 983         SYSIO_IMAP_MS,
 984         SYSIO_IMAP_SER,
 985         bogon,
 986         bogon,
 987         SYSIO_IMAP_TIM0,
 988         SYSIO_IMAP_TIM1,
 989         bogon,
 990         bogon,
 991         SYSIO_IMAP_UE,
 992         SYSIO_IMAP_CE,
 993         SYSIO_IMAP_SBERR,
 994         SYSIO_IMAP_PMGMT,
 995         SYSIO_IMAP_GFX,
 996         SYSIO_IMAP_EUPA,
 997 };
 998
 999 #undef bogon
1000
1001 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
1002
1003 /* Convert Interrupt Mapping register pointer to associated
1004  * Interrupt Clear register pointer, SYSIO specific version.
1005  */
1006 #define SYSIO_ICLR_UNUSED0      0x3400UL
1007 #define SYSIO_ICLR_SLOT0        0x340cUL
1008 #define SYSIO_ICLR_SLOT1        0x344cUL
1009 #define SYSIO_ICLR_SLOT2        0x348cUL
1010 #define SYSIO_ICLR_SLOT3        0x34ccUL
1011 static unsigned long sysio_imap_to_iclr(unsigned long imap)
1012 {
1013         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
1014         return imap + diff;
1015 }
1016
1017 static unsigned int sbus_of_build_irq(struct device_node *dp,
1018                                       unsigned int ino,
1019                                       void *_data)
1020 {
1021         unsigned long reg_base = (unsigned long) _data;
1022         const struct linux_prom_registers *regs;
1023         unsigned long imap, iclr;
1024         int sbus_slot = 0;
1025         int sbus_level = 0;
1026
1027         ino &= 0x3f;
1028
1029         regs = of_get_property(dp, "reg", NULL);
1030         if (regs)
1031                 sbus_slot = regs->which_io;
1032
1033         if (ino < 0x20)
1034                 ino += (sbus_slot * 8);
1035
1036         imap = sysio_irq_offsets[ino];
1037         if (imap == ((unsigned long)-1)) {
1038                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
1039                             ino);
1040                 prom_halt();
1041         }
1042         imap += reg_base;
1043
1044         /* SYSIO inconsistency.  For external SLOTS, we have to select
1045          * the right ICLR register based upon the lower SBUS irq level
1046          * bits.
1047          */
1048         if (ino >= 0x20) {
1049                 iclr = sysio_imap_to_iclr(imap);
1050         } else {
1051                 sbus_level = ino & 0x7;
1052
1053                 switch(sbus_slot) {
1054                 case 0:
1055                         iclr = reg_base + SYSIO_ICLR_SLOT0;
1056                         break;
1057                 case 1:
1058                         iclr = reg_base + SYSIO_ICLR_SLOT1;
1059                         break;
1060                 case 2:
1061                         iclr = reg_base + SYSIO_ICLR_SLOT2;
1062                         break;
1063                 default:
1064                 case 3:
1065                         iclr = reg_base + SYSIO_ICLR_SLOT3;
1066                         break;
1067                 };
1068
1069                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
1070         }
1071         return build_irq(sbus_level, iclr, imap);
1072 }
1073
1074 static void sbus_irq_trans_init(struct device_node *dp)
1075 {
1076         const struct linux_prom64_registers *regs;
1077
1078         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1079         dp->irq_trans->irq_build = sbus_of_build_irq;
1080
1081         regs = of_get_property(dp, "reg", NULL);
1082         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1083 }
1084 #endif /* CONFIG_SBUS */
1085
1086
1087 static unsigned int central_build_irq(struct device_node *dp,
1088                                       unsigned int ino,
1089                                       void *_data)
1090 {
1091         struct device_node *central_dp = _data;
1092         struct of_device *central_op = of_find_device_by_node(central_dp);
1093         struct resource *res;
1094         unsigned long imap, iclr;
1095         u32 tmp;
1096
1097         if (!strcmp(dp->name, "eeprom")) {
1098                 res = &central_op->resource[5];
1099         } else if (!strcmp(dp->name, "zs")) {
1100                 res = &central_op->resource[4];
1101         } else if (!strcmp(dp->name, "clock-board")) {
1102                 res = &central_op->resource[3];
1103         } else {
1104                 return ino;
1105         }
1106
1107         imap = res->start + 0x00UL;
1108         iclr = res->start + 0x10UL;
1109
1110         /* Set the INO state to idle, and disable.  */
1111         upa_writel(0, iclr);
1112         upa_readl(iclr);
1113
1114         tmp = upa_readl(imap);
1115         tmp &= ~0x80000000;
1116         upa_writel(tmp, imap);
1117
1118         return build_irq(0, iclr, imap);
1119 }
1120
1121 static void central_irq_trans_init(struct device_node *dp)
1122 {
1123         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1124         dp->irq_trans->irq_build = central_build_irq;
1125
1126         dp->irq_trans->data = dp;
1127 }
1128
1129 struct irq_trans {
1130         const char *name;
1131         void (*init)(struct device_node *);
1132 };
1133
1134 #ifdef CONFIG_PCI
1135 static struct irq_trans pci_irq_trans_table[] = {
1136         { "SUNW,sabre", sabre_irq_trans_init },
1137         { "pci108e,a000", sabre_irq_trans_init },
1138         { "pci108e,a001", sabre_irq_trans_init },
1139         { "SUNW,psycho", psycho_irq_trans_init },
1140         { "pci108e,8000", psycho_irq_trans_init },
1141         { "SUNW,schizo", schizo_irq_trans_init },
1142         { "pci108e,8001", schizo_irq_trans_init },
1143         { "SUNW,schizo+", schizo_irq_trans_init },
1144         { "pci108e,8002", schizo_irq_trans_init },
1145         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1146         { "pci108e,a801", tomatillo_irq_trans_init },
1147         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1148         { "pciex108e,80f0", fire_irq_trans_init },
1149 };
1150 #endif
1151
1152 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1153                                          unsigned int devino,
1154                                          void *_data)
1155 {
1156         u32 devhandle = (u32) (unsigned long) _data;
1157
1158         return sun4v_build_irq(devhandle, devino);
1159 }
1160
1161 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1162 {
1163         const struct linux_prom64_registers *regs;
1164
1165         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1166         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1167
1168         regs = of_get_property(dp, "reg", NULL);
1169         dp->irq_trans->data = (void *) (unsigned long)
1170                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1171 }
1172
1173 static void irq_trans_init(struct device_node *dp)
1174 {
1175 #ifdef CONFIG_PCI
1176         const char *model;
1177         int i;
1178 #endif
1179
1180 #ifdef CONFIG_PCI
1181         model = of_get_property(dp, "model", NULL);
1182         if (!model)
1183                 model = of_get_property(dp, "compatible", NULL);
1184         if (model) {
1185                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1186                         struct irq_trans *t = &pci_irq_trans_table[i];
1187
1188                         if (!strcmp(model, t->name))
1189                                 return t->init(dp);
1190                 }
1191         }
1192 #endif
1193 #ifdef CONFIG_SBUS
1194         if (!strcmp(dp->name, "sbus") ||
1195             !strcmp(dp->name, "sbi"))
1196                 return sbus_irq_trans_init(dp);
1197 #endif
1198         if (!strcmp(dp->name, "fhc") &&
1199             !strcmp(dp->parent->name, "central"))
1200                 return central_irq_trans_init(dp);
1201         if (!strcmp(dp->name, "virtual-devices"))
1202                 return sun4v_vdev_irq_trans_init(dp);
1203 }
1204
1205 static int is_root_node(const struct device_node *dp)
1206 {
1207         if (!dp)
1208                 return 0;
1209
1210         return (dp->parent == NULL);
1211 }
1212
1213 /* The following routines deal with the black magic of fully naming a
1214  * node.
1215  *
1216  * Certain well known named nodes are just the simple name string.
1217  *
1218  * Actual devices have an address specifier appended to the base name
1219  * string, like this "foo@addr".  The "addr" can be in any number of
1220  * formats, and the platform plus the type of the node determine the
1221  * format and how it is constructed.
1222  *
1223  * For children of the ROOT node, the naming convention is fixed and
1224  * determined by whether this is a sun4u or sun4v system.
1225  *
1226  * For children of other nodes, it is bus type specific.  So
1227  * we walk up the tree until we discover a "device_type" property
1228  * we recognize and we go from there.
1229  *
1230  * As an example, the boot device on my workstation has a full path:
1231  *
1232  *      /pci@1e,600000/ide@d/disk@0,0:c
1233  */
1234 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1235 {
1236         struct linux_prom64_registers *regs;
1237         struct property *rprop;
1238         u32 high_bits, low_bits, type;
1239
1240         rprop = of_find_property(dp, "reg", NULL);
1241         if (!rprop)
1242                 return;
1243
1244         regs = rprop->value;
1245         if (!is_root_node(dp->parent)) {
1246                 sprintf(tmp_buf, "%s@%x,%x",
1247                         dp->name,
1248                         (unsigned int) (regs->phys_addr >> 32UL),
1249                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1250                 return;
1251         }
1252
1253         type = regs->phys_addr >> 60UL;
1254         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1255         low_bits = (regs->phys_addr & 0xffffffffUL);
1256
1257         if (type == 0 || type == 8) {
1258                 const char *prefix = (type == 0) ? "m" : "i";
1259
1260                 if (low_bits)
1261                         sprintf(tmp_buf, "%s@%s%x,%x",
1262                                 dp->name, prefix,
1263                                 high_bits, low_bits);
1264                 else
1265                         sprintf(tmp_buf, "%s@%s%x",
1266                                 dp->name,
1267                                 prefix,
1268                                 high_bits);
1269         } else if (type == 12) {
1270                 sprintf(tmp_buf, "%s@%x",
1271                         dp->name, high_bits);
1272         }
1273 }
1274
1275 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1276 {
1277         struct linux_prom64_registers *regs;
1278         struct property *prop;
1279
1280         prop = of_find_property(dp, "reg", NULL);
1281         if (!prop)
1282                 return;
1283
1284         regs = prop->value;
1285         if (!is_root_node(dp->parent)) {
1286                 sprintf(tmp_buf, "%s@%x,%x",
1287                         dp->name,
1288                         (unsigned int) (regs->phys_addr >> 32UL),
1289                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1290                 return;
1291         }
1292
1293         prop = of_find_property(dp, "upa-portid", NULL);
1294         if (!prop)
1295                 prop = of_find_property(dp, "portid", NULL);
1296         if (prop) {
1297                 unsigned long mask = 0xffffffffUL;
1298
1299                 if (tlb_type >= cheetah)
1300                         mask = 0x7fffff;
1301
1302                 sprintf(tmp_buf, "%s@%x,%x",
1303                         dp->name,
1304                         *(u32 *)prop->value,
1305                         (unsigned int) (regs->phys_addr & mask));
1306         }
1307 }
1308
1309 /* "name@slot,offset"  */
1310 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1311 {
1312         struct linux_prom_registers *regs;
1313         struct property *prop;
1314
1315         prop = of_find_property(dp, "reg", NULL);
1316         if (!prop)
1317                 return;
1318
1319         regs = prop->value;
1320         sprintf(tmp_buf, "%s@%x,%x",
1321                 dp->name,
1322                 regs->which_io,
1323                 regs->phys_addr);
1324 }
1325
1326 /* "name@devnum[,func]" */
1327 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1328 {
1329         struct linux_prom_pci_registers *regs;
1330         struct property *prop;
1331         unsigned int devfn;
1332
1333         prop = of_find_property(dp, "reg", NULL);
1334         if (!prop)
1335                 return;
1336
1337         regs = prop->value;
1338         devfn = (regs->phys_hi >> 8) & 0xff;
1339         if (devfn & 0x07) {
1340                 sprintf(tmp_buf, "%s@%x,%x",
1341                         dp->name,
1342                         devfn >> 3,
1343                         devfn & 0x07);
1344         } else {
1345                 sprintf(tmp_buf, "%s@%x",
1346                         dp->name,
1347                         devfn >> 3);
1348         }
1349 }
1350
1351 /* "name@UPA_PORTID,offset" */
1352 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1353 {
1354         struct linux_prom64_registers *regs;
1355         struct property *prop;
1356
1357         prop = of_find_property(dp, "reg", NULL);
1358         if (!prop)
1359                 return;
1360
1361         regs = prop->value;
1362
1363         prop = of_find_property(dp, "upa-portid", NULL);
1364         if (!prop)
1365                 return;
1366
1367         sprintf(tmp_buf, "%s@%x,%x",
1368                 dp->name,
1369                 *(u32 *) prop->value,
1370                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1371 }
1372
1373 /* "name@reg" */
1374 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1375 {
1376         struct property *prop;
1377         u32 *regs;
1378
1379         prop = of_find_property(dp, "reg", NULL);
1380         if (!prop)
1381                 return;
1382
1383         regs = prop->value;
1384
1385         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1386 }
1387
1388 /* "name@addrhi,addrlo" */
1389 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1390 {
1391         struct linux_prom64_registers *regs;
1392         struct property *prop;
1393
1394         prop = of_find_property(dp, "reg", NULL);
1395         if (!prop)
1396                 return;
1397
1398         regs = prop->value;
1399
1400         sprintf(tmp_buf, "%s@%x,%x",
1401                 dp->name,
1402                 (unsigned int) (regs->phys_addr >> 32UL),
1403                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1404 }
1405
1406 /* "name@bus,addr" */
1407 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1408 {
1409         struct property *prop;
1410         u32 *regs;
1411
1412         prop = of_find_property(dp, "reg", NULL);
1413         if (!prop)
1414                 return;
1415
1416         regs = prop->value;
1417
1418         /* This actually isn't right... should look at the #address-cells
1419          * property of the i2c bus node etc. etc.
1420          */
1421         sprintf(tmp_buf, "%s@%x,%x",
1422                 dp->name, regs[0], regs[1]);
1423 }
1424
1425 /* "name@reg0[,reg1]" */
1426 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1427 {
1428         struct property *prop;
1429         u32 *regs;
1430
1431         prop = of_find_property(dp, "reg", NULL);
1432         if (!prop)
1433                 return;
1434
1435         regs = prop->value;
1436
1437         if (prop->length == sizeof(u32) || regs[1] == 1) {
1438                 sprintf(tmp_buf, "%s@%x",
1439                         dp->name, regs[0]);
1440         } else {
1441                 sprintf(tmp_buf, "%s@%x,%x",
1442                         dp->name, regs[0], regs[1]);
1443         }
1444 }
1445
1446 /* "name@reg0reg1[,reg2reg3]" */
1447 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1448 {
1449         struct property *prop;
1450         u32 *regs;
1451
1452         prop = of_find_property(dp, "reg", NULL);
1453         if (!prop)
1454                 return;
1455
1456         regs = prop->value;
1457
1458         if (regs[2] || regs[3]) {
1459                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1460                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1461         } else {
1462                 sprintf(tmp_buf, "%s@%08x%08x",
1463                         dp->name, regs[0], regs[1]);
1464         }
1465 }
1466
1467 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1468 {
1469         struct device_node *parent = dp->parent;
1470
1471         if (parent != NULL) {
1472                 if (!strcmp(parent->type, "pci") ||
1473                     !strcmp(parent->type, "pciex"))
1474                         return pci_path_component(dp, tmp_buf);
1475                 if (!strcmp(parent->type, "sbus"))
1476                         return sbus_path_component(dp, tmp_buf);
1477                 if (!strcmp(parent->type, "upa"))
1478                         return upa_path_component(dp, tmp_buf);
1479                 if (!strcmp(parent->type, "ebus"))
1480                         return ebus_path_component(dp, tmp_buf);
1481                 if (!strcmp(parent->name, "usb") ||
1482                     !strcmp(parent->name, "hub"))
1483                         return usb_path_component(dp, tmp_buf);
1484                 if (!strcmp(parent->type, "i2c"))
1485                         return i2c_path_component(dp, tmp_buf);
1486                 if (!strcmp(parent->type, "firewire"))
1487                         return ieee1394_path_component(dp, tmp_buf);
1488                 if (!strcmp(parent->type, "virtual-devices"))
1489                         return vdev_path_component(dp, tmp_buf);
1490
1491                 /* "isa" is handled with platform naming */
1492         }
1493
1494         /* Use platform naming convention.  */
1495         if (tlb_type == hypervisor)
1496                 return sun4v_path_component(dp, tmp_buf);
1497         else
1498                 return sun4u_path_component(dp, tmp_buf);
1499 }
1500
1501 static char * __init build_path_component(struct device_node *dp)
1502 {
1503         char tmp_buf[64], *n;
1504
1505         tmp_buf[0] = '\0';
1506         __build_path_component(dp, tmp_buf);
1507         if (tmp_buf[0] == '\0')
1508                 strcpy(tmp_buf, dp->name);
1509
1510         n = prom_early_alloc(strlen(tmp_buf) + 1);
1511         strcpy(n, tmp_buf);
1512
1513         return n;
1514 }
1515
1516 static char * __init build_full_name(struct device_node *dp)
1517 {
1518         int len, ourlen, plen;
1519         char *n;
1520
1521         plen = strlen(dp->parent->full_name);
1522         ourlen = strlen(dp->path_component_name);
1523         len = ourlen + plen + 2;
1524
1525         n = prom_early_alloc(len);
1526         strcpy(n, dp->parent->full_name);
1527         if (!is_root_node(dp->parent)) {
1528                 strcpy(n + plen, "/");
1529                 plen++;
1530         }
1531         strcpy(n + plen, dp->path_component_name);
1532
1533         return n;
1534 }
1535
1536 static unsigned int unique_id;
1537
1538 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1539 {
1540         static struct property *tmp = NULL;
1541         struct property *p;
1542
1543         if (tmp) {
1544                 p = tmp;
1545                 memset(p, 0, sizeof(*p) + 32);
1546                 tmp = NULL;
1547         } else {
1548                 p = prom_early_alloc(sizeof(struct property) + 32);
1549                 p->unique_id = unique_id++;
1550         }
1551
1552         p->name = (char *) (p + 1);
1553         if (special_name) {
1554                 strcpy(p->name, special_name);
1555                 p->length = special_len;
1556                 p->value = prom_early_alloc(special_len);
1557                 memcpy(p->value, special_val, special_len);
1558         } else {
1559                 if (prev == NULL) {
1560                         prom_firstprop(node, p->name);
1561                 } else {
1562                         prom_nextprop(node, prev, p->name);
1563                 }
1564                 if (strlen(p->name) == 0) {
1565                         tmp = p;
1566                         return NULL;
1567                 }
1568                 p->length = prom_getproplen(node, p->name);
1569                 if (p->length <= 0) {
1570                         p->length = 0;
1571                 } else {
1572                         p->value = prom_early_alloc(p->length + 1);
1573                         prom_getproperty(node, p->name, p->value, p->length);
1574                         ((unsigned char *)p->value)[p->length] = '\0';
1575                 }
1576         }
1577         return p;
1578 }
1579
1580 static struct property * __init build_prop_list(phandle node)
1581 {
1582         struct property *head, *tail;
1583
1584         head = tail = build_one_prop(node, NULL,
1585                                      ".node", &node, sizeof(node));
1586
1587         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1588         tail = tail->next;
1589         while(tail) {
1590                 tail->next = build_one_prop(node, tail->name,
1591                                             NULL, NULL, 0);
1592                 tail = tail->next;
1593         }
1594
1595         return head;
1596 }
1597
1598 static char * __init get_one_property(phandle node, const char *name)
1599 {
1600         char *buf = "<NULL>";
1601         int len;
1602
1603         len = prom_getproplen(node, name);
1604         if (len > 0) {
1605                 buf = prom_early_alloc(len);
1606                 prom_getproperty(node, name, buf, len);
1607         }
1608
1609         return buf;
1610 }
1611
1612 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1613 {
1614         struct device_node *dp;
1615
1616         if (!node)
1617                 return NULL;
1618
1619         dp = prom_early_alloc(sizeof(*dp));
1620         dp->unique_id = unique_id++;
1621         dp->parent = parent;
1622
1623         kref_init(&dp->kref);
1624
1625         dp->name = get_one_property(node, "name");
1626         dp->type = get_one_property(node, "device_type");
1627         dp->node = node;
1628
1629         dp->properties = build_prop_list(node);
1630
1631         irq_trans_init(dp);
1632
1633         return dp;
1634 }
1635
1636 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1637 {
1638         struct device_node *dp;
1639
1640         dp = create_node(node, parent);
1641         if (dp) {
1642                 *(*nextp) = dp;
1643                 *nextp = &dp->allnext;
1644
1645                 dp->path_component_name = build_path_component(dp);
1646                 dp->full_name = build_full_name(dp);
1647
1648                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1649
1650                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1651         }
1652
1653         return dp;
1654 }
1655
1656 void __init prom_build_devicetree(void)
1657 {
1658         struct device_node **nextp;
1659
1660         allnodes = create_node(prom_root_node, NULL);
1661         allnodes->path_component_name = "";
1662         allnodes->full_name = "/";
1663
1664         nextp = &allnodes->allnext;
1665         allnodes->child = build_tree(allnodes,
1666                                      prom_getchild(allnodes->node),
1667                                      &nextp);
1668         printk("PROM: Built device tree with %u bytes of memory.\n",
1669                prom_early_allocated);
1670 }