Merge branch 'for-2.6.30' of git://linux-nfs.org/~bfields/linux
[linux-2.6] / sound / soc / codecs / wm8990.h
1 /*
2  * wm8990.h  --  audio driver for WM8990
3  *
4  * Copyright 2007 Wolfson Microelectronics PLC.
5  * Author: Graeme Gregory
6  *         graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14
15 #ifndef __WM8990REGISTERDEFS_H__
16 #define __WM8990REGISTERDEFS_H__
17
18 /*
19  * Register values.
20  */
21 #define WM8990_RESET                            0x00
22 #define WM8990_POWER_MANAGEMENT_1               0x01
23 #define WM8990_POWER_MANAGEMENT_2               0x02
24 #define WM8990_POWER_MANAGEMENT_3               0x03
25 #define WM8990_AUDIO_INTERFACE_1                0x04
26 #define WM8990_AUDIO_INTERFACE_2                0x05
27 #define WM8990_CLOCKING_1                       0x06
28 #define WM8990_CLOCKING_2                       0x07
29 #define WM8990_AUDIO_INTERFACE_3                0x08
30 #define WM8990_AUDIO_INTERFACE_4                0x09
31 #define WM8990_DAC_CTRL                         0x0A
32 #define WM8990_LEFT_DAC_DIGITAL_VOLUME          0x0B
33 #define WM8990_RIGHT_DAC_DIGITAL_VOLUME         0x0C
34 #define WM8990_DIGITAL_SIDE_TONE                0x0D
35 #define WM8990_ADC_CTRL                         0x0E
36 #define WM8990_LEFT_ADC_DIGITAL_VOLUME          0x0F
37 #define WM8990_RIGHT_ADC_DIGITAL_VOLUME         0x10
38 #define WM8990_GPIO_CTRL_1                      0x12
39 #define WM8990_GPIO1_GPIO2                      0x13
40 #define WM8990_GPIO3_GPIO4                      0x14
41 #define WM8990_GPIO5_GPIO6                      0x15
42 #define WM8990_GPIOCTRL_2                       0x16
43 #define WM8990_GPIO_POL                         0x17
44 #define WM8990_LEFT_LINE_INPUT_1_2_VOLUME       0x18
45 #define WM8990_LEFT_LINE_INPUT_3_4_VOLUME       0x19
46 #define WM8990_RIGHT_LINE_INPUT_1_2_VOLUME      0x1A
47 #define WM8990_RIGHT_LINE_INPUT_3_4_VOLUME      0x1B
48 #define WM8990_LEFT_OUTPUT_VOLUME               0x1C
49 #define WM8990_RIGHT_OUTPUT_VOLUME              0x1D
50 #define WM8990_LINE_OUTPUTS_VOLUME              0x1E
51 #define WM8990_OUT3_4_VOLUME                    0x1F
52 #define WM8990_LEFT_OPGA_VOLUME                 0x20
53 #define WM8990_RIGHT_OPGA_VOLUME                0x21
54 #define WM8990_SPEAKER_VOLUME                   0x22
55 #define WM8990_CLASSD1                          0x23
56 #define WM8990_CLASSD3                          0x25
57 #define WM8990_CLASSD4                          0x26
58 #define WM8990_INPUT_MIXER1                     0x27
59 #define WM8990_INPUT_MIXER2                     0x28
60 #define WM8990_INPUT_MIXER3                     0x29
61 #define WM8990_INPUT_MIXER4                     0x2A
62 #define WM8990_INPUT_MIXER5                     0x2B
63 #define WM8990_INPUT_MIXER6                     0x2C
64 #define WM8990_OUTPUT_MIXER1                    0x2D
65 #define WM8990_OUTPUT_MIXER2                    0x2E
66 #define WM8990_OUTPUT_MIXER3                    0x2F
67 #define WM8990_OUTPUT_MIXER4                    0x30
68 #define WM8990_OUTPUT_MIXER5                    0x31
69 #define WM8990_OUTPUT_MIXER6                    0x32
70 #define WM8990_OUT3_4_MIXER                     0x33
71 #define WM8990_LINE_MIXER1                      0x34
72 #define WM8990_LINE_MIXER2                      0x35
73 #define WM8990_SPEAKER_MIXER                    0x36
74 #define WM8990_ADDITIONAL_CONTROL               0x37
75 #define WM8990_ANTIPOP1                         0x38
76 #define WM8990_ANTIPOP2                         0x39
77 #define WM8990_MICBIAS                          0x3A
78 #define WM8990_PLL1                             0x3C
79 #define WM8990_PLL2                             0x3D
80 #define WM8990_PLL3                             0x3E
81 #define WM8990_INTDRIVBITS                      0x3F
82
83 #define WM8990_EXT_ACCESS_ENA                   0x75
84 #define WM8990_EXT_CTL1                         0x7a
85
86 /*
87  * Field Definitions.
88  */
89
90 /*
91  * R0 (0x00) - Reset
92  */
93 #define WM8990_SW_RESET_CHIP_ID_MASK            0xFFFF  /* SW_RESET_CHIP_ID */
94
95 /*
96  * R1 (0x01) - Power Management (1)
97  */
98 #define WM8990_SPK_ENA                          0x1000  /* SPK_ENA */
99 #define WM8990_SPK_ENA_BIT                      12
100 #define WM8990_OUT3_ENA                         0x0800  /* OUT3_ENA */
101 #define WM8990_OUT3_ENA_BIT                     11
102 #define WM8990_OUT4_ENA                         0x0400  /* OUT4_ENA */
103 #define WM8990_OUT4_ENA_BIT                     10
104 #define WM8990_LOUT_ENA                         0x0200  /* LOUT_ENA */
105 #define WM8990_LOUT_ENA_BIT                     9
106 #define WM8990_ROUT_ENA                         0x0100  /* ROUT_ENA */
107 #define WM8990_ROUT_ENA_BIT                     8
108 #define WM8990_MICBIAS_ENA                      0x0010  /* MICBIAS_ENA */
109 #define WM8990_MICBIAS_ENA_BIT                  4
110 #define WM8990_VMID_MODE_MASK                   0x0006  /* VMID_MODE - [2:1] */
111 #define WM8990_VREF_ENA                         0x0001  /* VREF_ENA */
112 #define WM8990_VREF_ENA_BIT                     0
113
114 /*
115  * R2 (0x02) - Power Management (2)
116  */
117 #define WM8990_PLL_ENA                          0x8000  /* PLL_ENA */
118 #define WM8990_PLL_ENA_BIT                      15
119 #define WM8990_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
120 #define WM8990_TSHUT_ENA_BIT                    14
121 #define WM8990_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
122 #define WM8990_TSHUT_OPDIS_BIT                  13
123 #define WM8990_OPCLK_ENA                        0x0800  /* OPCLK_ENA */
124 #define WM8990_OPCLK_ENA_BIT                    11
125 #define WM8990_AINL_ENA                         0x0200  /* AINL_ENA */
126 #define WM8990_AINL_ENA_BIT                     9
127 #define WM8990_AINR_ENA                         0x0100  /* AINR_ENA */
128 #define WM8990_AINR_ENA_BIT                     8
129 #define WM8990_LIN34_ENA                        0x0080  /* LIN34_ENA */
130 #define WM8990_LIN34_ENA_BIT                    7
131 #define WM8990_LIN12_ENA                        0x0040  /* LIN12_ENA */
132 #define WM8990_LIN12_ENA_BIT                    6
133 #define WM8990_RIN34_ENA                        0x0020  /* RIN34_ENA */
134 #define WM8990_RIN34_ENA_BIT                    5
135 #define WM8990_RIN12_ENA                        0x0010  /* RIN12_ENA */
136 #define WM8990_RIN12_ENA_BIT                    4
137 #define WM8990_ADCL_ENA                         0x0002  /* ADCL_ENA */
138 #define WM8990_ADCL_ENA_BIT                     1
139 #define WM8990_ADCR_ENA                         0x0001  /* ADCR_ENA */
140 #define WM8990_ADCR_ENA_BIT                     0
141
142 /*
143  * R3 (0x03) - Power Management (3)
144  */
145 #define WM8990_LON_ENA                          0x2000  /* LON_ENA */
146 #define WM8990_LON_ENA_BIT                      13
147 #define WM8990_LOP_ENA                          0x1000  /* LOP_ENA */
148 #define WM8990_LOP_ENA_BIT                      12
149 #define WM8990_RON_ENA                          0x0800  /* RON_ENA */
150 #define WM8990_RON_ENA_BIT                      11
151 #define WM8990_ROP_ENA                          0x0400  /* ROP_ENA */
152 #define WM8990_ROP_ENA_BIT                      10
153 #define WM8990_LOPGA_ENA                        0x0080  /* LOPGA_ENA */
154 #define WM8990_LOPGA_ENA_BIT                    7
155 #define WM8990_ROPGA_ENA                        0x0040  /* ROPGA_ENA */
156 #define WM8990_ROPGA_ENA_BIT                    6
157 #define WM8990_LOMIX_ENA                        0x0020  /* LOMIX_ENA */
158 #define WM8990_LOMIX_ENA_BIT                    5
159 #define WM8990_ROMIX_ENA                        0x0010  /* ROMIX_ENA */
160 #define WM8990_ROMIX_ENA_BIT                    4
161 #define WM8990_DACL_ENA                         0x0002  /* DACL_ENA */
162 #define WM8990_DACL_ENA_BIT                     1
163 #define WM8990_DACR_ENA                         0x0001  /* DACR_ENA */
164 #define WM8990_DACR_ENA_BIT                     0
165
166 /*
167  * R4 (0x04) - Audio Interface (1)
168  */
169 #define WM8990_AIFADCL_SRC                      0x8000  /* AIFADCL_SRC */
170 #define WM8990_AIFADCR_SRC                      0x4000  /* AIFADCR_SRC */
171 #define WM8990_AIFADC_TDM                       0x2000  /* AIFADC_TDM */
172 #define WM8990_AIFADC_TDM_CHAN                  0x1000  /* AIFADC_TDM_CHAN */
173 #define WM8990_AIF_BCLK_INV                     0x0100  /* AIF_BCLK_INV */
174 #define WM8990_AIF_LRCLK_INV                    0x0080  /* AIF_LRCLK_INV */
175 #define WM8990_AIF_WL_MASK                      0x0060  /* AIF_WL - [6:5] */
176 #define WM8990_AIF_WL_16BITS                    (0 << 5)
177 #define WM8990_AIF_WL_20BITS                    (1 << 5)
178 #define WM8990_AIF_WL_24BITS                    (2 << 5)
179 #define WM8990_AIF_WL_32BITS                    (3 << 5)
180 #define WM8990_AIF_FMT_MASK                     0x0018  /* AIF_FMT - [4:3] */
181 #define WM8990_AIF_TMF_RIGHTJ                   (0 << 3)
182 #define WM8990_AIF_TMF_LEFTJ                    (1 << 3)
183 #define WM8990_AIF_TMF_I2S                      (2 << 3)
184 #define WM8990_AIF_TMF_DSP                      (3 << 3)
185
186 /*
187  * R5 (0x05) - Audio Interface (2)
188  */
189 #define WM8990_DACL_SRC                         0x8000  /* DACL_SRC */
190 #define WM8990_DACR_SRC                         0x4000  /* DACR_SRC */
191 #define WM8990_AIFDAC_TDM                       0x2000  /* AIFDAC_TDM */
192 #define WM8990_AIFDAC_TDM_CHAN                  0x1000  /* AIFDAC_TDM_CHAN */
193 #define WM8990_DAC_BOOST_MASK                   0x0C00  /* DAC_BOOST */
194 #define WM8990_DAC_COMP                         0x0010  /* DAC_COMP */
195 #define WM8990_DAC_COMPMODE                     0x0008  /* DAC_COMPMODE */
196 #define WM8990_ADC_COMP                         0x0004  /* ADC_COMP */
197 #define WM8990_ADC_COMPMODE                     0x0002  /* ADC_COMPMODE */
198 #define WM8990_LOOPBACK                         0x0001  /* LOOPBACK */
199
200 /*
201  * R6 (0x06) - Clocking (1)
202  */
203 #define WM8990_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
204 #define WM8990_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
205 #define WM8990_OPCLKDIV_MASK                    0x1E00  /* OPCLKDIV - [12:9] */
206 #define WM8990_DCLKDIV_MASK                     0x01C0  /* DCLKDIV - [8:6] */
207 #define WM8990_BCLK_DIV_MASK                    0x001E  /* BCLK_DIV - [4:1] */
208 #define WM8990_BCLK_DIV_1                       (0x0 << 1)
209 #define WM8990_BCLK_DIV_1_5                     (0x1 << 1)
210 #define WM8990_BCLK_DIV_2                       (0x2 << 1)
211 #define WM8990_BCLK_DIV_3                       (0x3 << 1)
212 #define WM8990_BCLK_DIV_4                       (0x4 << 1)
213 #define WM8990_BCLK_DIV_5_5                     (0x5 << 1)
214 #define WM8990_BCLK_DIV_6                       (0x6 << 1)
215 #define WM8990_BCLK_DIV_8                       (0x7 << 1)
216 #define WM8990_BCLK_DIV_11                      (0x8 << 1)
217 #define WM8990_BCLK_DIV_12                      (0x9 << 1)
218 #define WM8990_BCLK_DIV_16                      (0xA << 1)
219 #define WM8990_BCLK_DIV_22                      (0xB << 1)
220 #define WM8990_BCLK_DIV_24                      (0xC << 1)
221 #define WM8990_BCLK_DIV_32                      (0xD << 1)
222 #define WM8990_BCLK_DIV_44                      (0xE << 1)
223 #define WM8990_BCLK_DIV_48                      (0xF << 1)
224
225 /*
226  * R7 (0x07) - Clocking (2)
227  */
228 #define WM8990_MCLK_SRC                         0x8000  /* MCLK_SRC */
229 #define WM8990_SYSCLK_SRC                       0x4000  /* SYSCLK_SRC */
230 #define WM8990_CLK_FORCE                        0x2000  /* CLK_FORCE */
231 #define WM8990_MCLK_DIV_MASK                    0x1800  /* MCLK_DIV - [12:11] */
232 #define WM8990_MCLK_DIV_1                       (0 << 11)
233 #define WM8990_MCLK_DIV_2                       (2 << 11)
234 #define WM8990_MCLK_INV                         0x0400  /* MCLK_INV */
235 #define WM8990_ADC_CLKDIV_MASK                  0x00E0  /* ADC_CLKDIV */
236 #define WM8990_ADC_CLKDIV_1                     (0 << 5)
237 #define WM8990_ADC_CLKDIV_1_5                   (1 << 5)
238 #define WM8990_ADC_CLKDIV_2                     (2 << 5)
239 #define WM8990_ADC_CLKDIV_3                     (3 << 5)
240 #define WM8990_ADC_CLKDIV_4                     (4 << 5)
241 #define WM8990_ADC_CLKDIV_5_5                   (5 << 5)
242 #define WM8990_ADC_CLKDIV_6                     (6 << 5)
243 #define WM8990_DAC_CLKDIV_MASK                  0x001C  /* DAC_CLKDIV - [4:2] */
244 #define WM8990_DAC_CLKDIV_1                     (0 << 2)
245 #define WM8990_DAC_CLKDIV_1_5                   (1 << 2)
246 #define WM8990_DAC_CLKDIV_2                     (2 << 2)
247 #define WM8990_DAC_CLKDIV_3                     (3 << 2)
248 #define WM8990_DAC_CLKDIV_4                     (4 << 2)
249 #define WM8990_DAC_CLKDIV_5_5                   (5 << 2)
250 #define WM8990_DAC_CLKDIV_6                     (6 << 2)
251
252 /*
253  * R8 (0x08) - Audio Interface (3)
254  */
255 #define WM8990_AIF_MSTR1                        0x8000  /* AIF_MSTR1 */
256 #define WM8990_AIF_MSTR2                        0x4000  /* AIF_MSTR2 */
257 #define WM8990_AIF_SEL                          0x2000  /* AIF_SEL */
258 #define WM8990_ADCLRC_DIR                       0x0800  /* ADCLRC_DIR */
259 #define WM8990_ADCLRC_RATE_MASK                 0x07FF  /* ADCLRC_RATE */
260
261 /*
262  * R9 (0x09) - Audio Interface (4)
263  */
264 #define WM8990_ALRCGPIO1                        0x8000  /* ALRCGPIO1 */
265 #define WM8990_ALRCBGPIO6                       0x4000  /* ALRCBGPIO6 */
266 #define WM8990_AIF_TRIS                         0x2000  /* AIF_TRIS */
267 #define WM8990_DACLRC_DIR                       0x0800  /* DACLRC_DIR */
268 #define WM8990_DACLRC_RATE_MASK                 0x07FF  /* DACLRC_RATE */
269
270 /*
271  * R10 (0x0A) - DAC CTRL
272  */
273 #define WM8990_AIF_LRCLKRATE                    0x0400  /* AIF_LRCLKRATE */
274 #define WM8990_DAC_MONO                         0x0200  /* DAC_MONO */
275 #define WM8990_DAC_SB_FILT                      0x0100  /* DAC_SB_FILT */
276 #define WM8990_DAC_MUTERATE                     0x0080  /* DAC_MUTERATE */
277 #define WM8990_DAC_MUTEMODE                     0x0040  /* DAC_MUTEMODE */
278 #define WM8990_DEEMP_MASK                       0x0030  /* DEEMP - [5:4] */
279 #define WM8990_DAC_MUTE                         0x0004  /* DAC_MUTE */
280 #define WM8990_DACL_DATINV                      0x0002  /* DACL_DATINV */
281 #define WM8990_DACR_DATINV                      0x0001  /* DACR_DATINV */
282
283 /*
284  * R11 (0x0B) - Left DAC Digital Volume
285  */
286 #define WM8990_DAC_VU                           0x0100  /* DAC_VU */
287 #define WM8990_DACL_VOL_MASK                    0x00FF  /* DACL_VOL - [7:0] */
288 #define WM8990_DACL_VOL_SHIFT                   0
289 /*
290  * R12 (0x0C) - Right DAC Digital Volume
291  */
292 #define WM8990_DAC_VU                           0x0100  /* DAC_VU */
293 #define WM8990_DACR_VOL_MASK                    0x00FF  /* DACR_VOL - [7:0] */
294 #define WM8990_DACR_VOL_SHIFT                   0
295 /*
296  * R13 (0x0D) - Digital Side Tone
297  */
298 #define WM8990_ADCL_DAC_SVOL_MASK               0x0F  /* ADCL_DAC_SVOL */
299 #define WM8990_ADCL_DAC_SVOL_SHIFT              9
300 #define WM8990_ADCR_DAC_SVOL_MASK               0x0F  /* ADCR_DAC_SVOL */
301 #define WM8990_ADCR_DAC_SVOL_SHIFT              5
302 #define WM8990_ADC_TO_DACL_MASK                 0x03  /* ADC_TO_DACL - [3:2] */
303 #define WM8990_ADC_TO_DACL_SHIFT                2
304 #define WM8990_ADC_TO_DACR_MASK                 0x03  /* ADC_TO_DACR - [1:0] */
305 #define WM8990_ADC_TO_DACR_SHIFT                0
306
307 /*
308  * R14 (0x0E) - ADC CTRL
309  */
310 #define WM8990_ADC_HPF_ENA                      0x0100  /* ADC_HPF_ENA */
311 #define WM8990_ADC_HPF_ENA_BIT                  8
312 #define WM8990_ADC_HPF_CUT_MASK                 0x03  /* ADC_HPF_CUT - [6:5] */
313 #define WM8990_ADC_HPF_CUT_SHIFT                5
314 #define WM8990_ADCL_DATINV                      0x0002  /* ADCL_DATINV */
315 #define WM8990_ADCL_DATINV_BIT                  1
316 #define WM8990_ADCR_DATINV                      0x0001  /* ADCR_DATINV */
317 #define WM8990_ADCR_DATINV_BIT                  0
318
319 /*
320  * R15 (0x0F) - Left ADC Digital Volume
321  */
322 #define WM8990_ADC_VU                           0x0100  /* ADC_VU */
323 #define WM8990_ADCL_VOL_MASK                    0x00FF  /* ADCL_VOL - [7:0] */
324 #define WM8990_ADCL_VOL_SHIFT                   0
325
326 /*
327  * R16 (0x10) - Right ADC Digital Volume
328  */
329 #define WM8990_ADC_VU                           0x0100  /* ADC_VU */
330 #define WM8990_ADCR_VOL_MASK                    0x00FF  /* ADCR_VOL - [7:0] */
331 #define WM8990_ADCR_VOL_SHIFT                   0
332
333 /*
334  * R18 (0x12) - GPIO CTRL 1
335  */
336 #define WM8990_IRQ                              0x1000  /* IRQ */
337 #define WM8990_TEMPOK                           0x0800  /* TEMPOK */
338 #define WM8990_MICSHRT                          0x0400  /* MICSHRT */
339 #define WM8990_MICDET                           0x0200  /* MICDET */
340 #define WM8990_PLL_LCK                          0x0100  /* PLL_LCK */
341 #define WM8990_GPI8_STATUS                      0x0080  /* GPI8_STATUS */
342 #define WM8990_GPI7_STATUS                      0x0040  /* GPI7_STATUS */
343 #define WM8990_GPIO6_STATUS                     0x0020  /* GPIO6_STATUS */
344 #define WM8990_GPIO5_STATUS                     0x0010  /* GPIO5_STATUS */
345 #define WM8990_GPIO4_STATUS                     0x0008  /* GPIO4_STATUS */
346 #define WM8990_GPIO3_STATUS                     0x0004  /* GPIO3_STATUS */
347 #define WM8990_GPIO2_STATUS                     0x0002  /* GPIO2_STATUS */
348 #define WM8990_GPIO1_STATUS                     0x0001  /* GPIO1_STATUS */
349
350 /*
351  * R19 (0x13) - GPIO1 & GPIO2
352  */
353 #define WM8990_GPIO2_DEB_ENA                    0x8000  /* GPIO2_DEB_ENA */
354 #define WM8990_GPIO2_IRQ_ENA                    0x4000  /* GPIO2_IRQ_ENA */
355 #define WM8990_GPIO2_PU                         0x2000  /* GPIO2_PU */
356 #define WM8990_GPIO2_PD                         0x1000  /* GPIO2_PD */
357 #define WM8990_GPIO2_SEL_MASK                   0x0F00  /* GPIO2_SEL - [11:8] */
358 #define WM8990_GPIO1_DEB_ENA                    0x0080  /* GPIO1_DEB_ENA */
359 #define WM8990_GPIO1_IRQ_ENA                    0x0040  /* GPIO1_IRQ_ENA */
360 #define WM8990_GPIO1_PU                         0x0020  /* GPIO1_PU */
361 #define WM8990_GPIO1_PD                         0x0010  /* GPIO1_PD */
362 #define WM8990_GPIO1_SEL_MASK                   0x000F  /* GPIO1_SEL - [3:0] */
363
364 /*
365  * R20 (0x14) - GPIO3 & GPIO4
366  */
367 #define WM8990_GPIO4_DEB_ENA                    0x8000  /* GPIO4_DEB_ENA */
368 #define WM8990_GPIO4_IRQ_ENA                    0x4000  /* GPIO4_IRQ_ENA */
369 #define WM8990_GPIO4_PU                         0x2000  /* GPIO4_PU */
370 #define WM8990_GPIO4_PD                         0x1000  /* GPIO4_PD */
371 #define WM8990_GPIO4_SEL_MASK                   0x0F00  /* GPIO4_SEL - [11:8] */
372 #define WM8990_GPIO3_DEB_ENA                    0x0080  /* GPIO3_DEB_ENA */
373 #define WM8990_GPIO3_IRQ_ENA                    0x0040  /* GPIO3_IRQ_ENA */
374 #define WM8990_GPIO3_PU                         0x0020  /* GPIO3_PU */
375 #define WM8990_GPIO3_PD                         0x0010  /* GPIO3_PD */
376 #define WM8990_GPIO3_SEL_MASK                   0x000F  /* GPIO3_SEL - [3:0] */
377
378 /*
379  * R21 (0x15) - GPIO5 & GPIO6
380  */
381 #define WM8990_GPIO6_DEB_ENA                    0x8000  /* GPIO6_DEB_ENA */
382 #define WM8990_GPIO6_IRQ_ENA                    0x4000  /* GPIO6_IRQ_ENA */
383 #define WM8990_GPIO6_PU                         0x2000  /* GPIO6_PU */
384 #define WM8990_GPIO6_PD                         0x1000  /* GPIO6_PD */
385 #define WM8990_GPIO6_SEL_MASK                   0x0F00  /* GPIO6_SEL - [11:8] */
386 #define WM8990_GPIO5_DEB_ENA                    0x0080  /* GPIO5_DEB_ENA */
387 #define WM8990_GPIO5_IRQ_ENA                    0x0040  /* GPIO5_IRQ_ENA */
388 #define WM8990_GPIO5_PU                         0x0020  /* GPIO5_PU */
389 #define WM8990_GPIO5_PD                         0x0010  /* GPIO5_PD */
390 #define WM8990_GPIO5_SEL_MASK                   0x000F  /* GPIO5_SEL - [3:0] */
391
392 /*
393  * R22 (0x16) - GPIOCTRL 2
394  */
395 #define WM8990_RD_3W_ENA                        0x8000  /* RD_3W_ENA */
396 #define WM8990_MODE_3W4W                        0x4000  /* MODE_3W4W */
397 #define WM8990_TEMPOK_IRQ_ENA                   0x0800  /* TEMPOK_IRQ_ENA */
398 #define WM8990_MICSHRT_IRQ_ENA                  0x0400  /* MICSHRT_IRQ_ENA */
399 #define WM8990_MICDET_IRQ_ENA                   0x0200  /* MICDET_IRQ_ENA */
400 #define WM8990_PLL_LCK_IRQ_ENA                  0x0100  /* PLL_LCK_IRQ_ENA */
401 #define WM8990_GPI8_DEB_ENA                     0x0080  /* GPI8_DEB_ENA */
402 #define WM8990_GPI8_IRQ_ENA                     0x0040  /* GPI8_IRQ_ENA */
403 #define WM8990_GPI8_ENA                         0x0010  /* GPI8_ENA */
404 #define WM8990_GPI7_DEB_ENA                     0x0008  /* GPI7_DEB_ENA */
405 #define WM8990_GPI7_IRQ_ENA                     0x0004  /* GPI7_IRQ_ENA */
406 #define WM8990_GPI7_ENA                         0x0001  /* GPI7_ENA */
407
408 /*
409  * R23 (0x17) - GPIO_POL
410  */
411 #define WM8990_IRQ_INV                          0x1000  /* IRQ_INV */
412 #define WM8990_TEMPOK_POL                       0x0800  /* TEMPOK_POL */
413 #define WM8990_MICSHRT_POL                      0x0400  /* MICSHRT_POL */
414 #define WM8990_MICDET_POL                       0x0200  /* MICDET_POL */
415 #define WM8990_PLL_LCK_POL                      0x0100  /* PLL_LCK_POL */
416 #define WM8990_GPI8_POL                         0x0080  /* GPI8_POL */
417 #define WM8990_GPI7_POL                         0x0040  /* GPI7_POL */
418 #define WM8990_GPIO6_POL                        0x0020  /* GPIO6_POL */
419 #define WM8990_GPIO5_POL                        0x0010  /* GPIO5_POL */
420 #define WM8990_GPIO4_POL                        0x0008  /* GPIO4_POL */
421 #define WM8990_GPIO3_POL                        0x0004  /* GPIO3_POL */
422 #define WM8990_GPIO2_POL                        0x0002  /* GPIO2_POL */
423 #define WM8990_GPIO1_POL                        0x0001  /* GPIO1_POL */
424
425 /*
426  * R24 (0x18) - Left Line Input 1&2 Volume
427  */
428 #define WM8990_IPVU                             0x0100  /* IPVU */
429 #define WM8990_LI12MUTE                         0x0080  /* LI12MUTE */
430 #define WM8990_LI12MUTE_BIT                     7
431 #define WM8990_LI12ZC                           0x0040  /* LI12ZC */
432 #define WM8990_LI12ZC_BIT                       6
433 #define WM8990_LIN12VOL_MASK                    0x001F  /* LIN12VOL - [4:0] */
434 #define WM8990_LIN12VOL_SHIFT                   0
435 /*
436  * R25 (0x19) - Left Line Input 3&4 Volume
437  */
438 #define WM8990_IPVU                             0x0100  /* IPVU */
439 #define WM8990_LI34MUTE                         0x0080  /* LI34MUTE */
440 #define WM8990_LI34MUTE_BIT                     7
441 #define WM8990_LI34ZC                           0x0040  /* LI34ZC */
442 #define WM8990_LI34ZC_BIT                       6
443 #define WM8990_LIN34VOL_MASK                    0x001F  /* LIN34VOL - [4:0] */
444 #define WM8990_LIN34VOL_SHIFT                   0
445
446 /*
447  * R26 (0x1A) - Right Line Input 1&2 Volume
448  */
449 #define WM8990_IPVU                             0x0100  /* IPVU */
450 #define WM8990_RI12MUTE                         0x0080  /* RI12MUTE */
451 #define WM8990_RI12MUTE_BIT                     7
452 #define WM8990_RI12ZC                           0x0040  /* RI12ZC */
453 #define WM8990_RI12ZC_BIT                       6
454 #define WM8990_RIN12VOL_MASK                    0x001F  /* RIN12VOL - [4:0] */
455 #define WM8990_RIN12VOL_SHIFT                   0
456
457 /*
458  * R27 (0x1B) - Right Line Input 3&4 Volume
459  */
460 #define WM8990_IPVU                             0x0100  /* IPVU */
461 #define WM8990_RI34MUTE                         0x0080  /* RI34MUTE */
462 #define WM8990_RI34MUTE_BIT                     7
463 #define WM8990_RI34ZC                           0x0040  /* RI34ZC */
464 #define WM8990_RI34ZC_BIT                       6
465 #define WM8990_RIN34VOL_MASK                    0x001F  /* RIN34VOL - [4:0] */
466 #define WM8990_RIN34VOL_SHIFT                   0
467
468 /*
469  * R28 (0x1C) - Left Output Volume
470  */
471 #define WM8990_OPVU                             0x0100  /* OPVU */
472 #define WM8990_LOZC                             0x0080  /* LOZC */
473 #define WM8990_LOZC_BIT                         7
474 #define WM8990_LOUTVOL_MASK                     0x007F  /* LOUTVOL - [6:0] */
475 #define WM8990_LOUTVOL_SHIFT                    0
476 /*
477  * R29 (0x1D) - Right Output Volume
478  */
479 #define WM8990_OPVU                             0x0100  /* OPVU */
480 #define WM8990_ROZC                             0x0080  /* ROZC */
481 #define WM8990_ROZC_BIT                         7
482 #define WM8990_ROUTVOL_MASK                     0x007F  /* ROUTVOL - [6:0] */
483 #define WM8990_ROUTVOL_SHIFT                    0
484 /*
485  * R30 (0x1E) - Line Outputs Volume
486  */
487 #define WM8990_LONMUTE                          0x0040  /* LONMUTE */
488 #define WM8990_LONMUTE_BIT                      6
489 #define WM8990_LOPMUTE                          0x0020  /* LOPMUTE */
490 #define WM8990_LOPMUTE_BIT                      5
491 #define WM8990_LOATTN                           0x0010  /* LOATTN */
492 #define WM8990_LOATTN_BIT                       4
493 #define WM8990_RONMUTE                          0x0004  /* RONMUTE */
494 #define WM8990_RONMUTE_BIT                      2
495 #define WM8990_ROPMUTE                          0x0002  /* ROPMUTE */
496 #define WM8990_ROPMUTE_BIT                      1
497 #define WM8990_ROATTN                           0x0001  /* ROATTN */
498 #define WM8990_ROATTN_BIT                       0
499
500 /*
501  * R31 (0x1F) - Out3/4 Volume
502  */
503 #define WM8990_OUT3MUTE                         0x0020  /* OUT3MUTE */
504 #define WM8990_OUT3MUTE_BIT                     5
505 #define WM8990_OUT3ATTN                         0x0010  /* OUT3ATTN */
506 #define WM8990_OUT3ATTN_BIT                     4
507 #define WM8990_OUT4MUTE                         0x0002  /* OUT4MUTE */
508 #define WM8990_OUT4MUTE_BIT                     1
509 #define WM8990_OUT4ATTN                         0x0001  /* OUT4ATTN */
510 #define WM8990_OUT4ATTN_BIT                     0
511
512 /*
513  * R32 (0x20) - Left OPGA Volume
514  */
515 #define WM8990_OPVU                             0x0100  /* OPVU */
516 #define WM8990_LOPGAZC                          0x0080  /* LOPGAZC */
517 #define WM8990_LOPGAZC_BIT                      7
518 #define WM8990_LOPGAVOL_MASK                    0x007F  /* LOPGAVOL - [6:0] */
519 #define WM8990_LOPGAVOL_SHIFT                   0
520
521 /*
522  * R33 (0x21) - Right OPGA Volume
523  */
524 #define WM8990_OPVU                             0x0100  /* OPVU */
525 #define WM8990_ROPGAZC                          0x0080  /* ROPGAZC */
526 #define WM8990_ROPGAZC_BIT                      7
527 #define WM8990_ROPGAVOL_MASK                    0x007F  /* ROPGAVOL - [6:0] */
528 #define WM8990_ROPGAVOL_SHIFT                   0
529 /*
530  * R34 (0x22) - Speaker Volume
531  */
532 #define WM8990_SPKATTN_MASK                      0x0003  /* SPKATTN - [1:0] */
533 #define WM8990_SPKATTN_SHIFT                     0
534
535 /*
536  * R35 (0x23) - ClassD1
537  */
538 #define WM8990_CDMODE                           0x0100  /* CDMODE */
539 #define WM8990_CDMODE_BIT                       8
540
541 /*
542  * R37 (0x25) - ClassD3
543  */
544 #define WM8990_DCGAIN_MASK                      0x0007  /* DCGAIN - [5:3] */
545 #define WM8990_DCGAIN_SHIFT                     3
546 #define WM8990_ACGAIN_MASK                      0x0007  /* ACGAIN - [2:0] */
547 #define WM8990_ACGAIN_SHIFT                     0
548
549 /*
550  * R38 (0x26) - ClassD4
551  */
552 #define WM8990_SPKZC_MASK                       0x0001  /* SPKZC */
553 #define WM8990_SPKZC_SHIFT                           7  /* SPKZC */
554 #define WM8990_SPKVOL_MASK                      0x007F  /* SPKVOL - [6:0] */
555 #define WM8990_SPKVOL_SHIFT                          0  /* SPKVOL - [6:0] */
556
557 /*
558  * R39 (0x27) - Input Mixer1
559  */
560 #define WM8990_AINLMODE_MASK                    0x000C  /* AINLMODE - [3:2] */
561 #define WM8990_AINLMODE_SHIFT                   2
562 #define WM8990_AINRMODE_MASK                    0x0003  /* AINRMODE - [1:0] */
563 #define WM8990_AINRMODE_SHIFT                   0
564
565 /*
566  * R40 (0x28) - Input Mixer2
567  */
568 #define WM8990_LMP4                             0x0080  /* LMP4 */
569 #define WM8990_LMP4_BIT                         7       /* LMP4 */
570 #define WM8990_LMN3                             0x0040  /* LMN3 */
571 #define WM8990_LMN3_BIT                         6       /* LMN3 */
572 #define WM8990_LMP2                             0x0020  /* LMP2 */
573 #define WM8990_LMP2_BIT                         5       /* LMP2 */
574 #define WM8990_LMN1                             0x0010  /* LMN1 */
575 #define WM8990_LMN1_BIT                         4       /* LMN1 */
576 #define WM8990_RMP4                             0x0008  /* RMP4 */
577 #define WM8990_RMP4_BIT                         3       /* RMP4 */
578 #define WM8990_RMN3                             0x0004  /* RMN3 */
579 #define WM8990_RMN3_BIT                         2       /* RMN3 */
580 #define WM8990_RMP2                             0x0002  /* RMP2 */
581 #define WM8990_RMP2_BIT                         1       /* RMP2 */
582 #define WM8990_RMN1                             0x0001  /* RMN1 */
583 #define WM8990_RMN1_BIT                         0       /* RMN1 */
584
585 /*
586  * R41 (0x29) - Input Mixer3
587  */
588 #define WM8990_L34MNB                           0x0100  /* L34MNB */
589 #define WM8990_L34MNB_BIT                       8
590 #define WM8990_L34MNBST                         0x0080  /* L34MNBST */
591 #define WM8990_L34MNBST_BIT                     7
592 #define WM8990_L12MNB                           0x0020  /* L12MNB */
593 #define WM8990_L12MNB_BIT                       5
594 #define WM8990_L12MNBST                         0x0010  /* L12MNBST */
595 #define WM8990_L12MNBST_BIT                     4
596 #define WM8990_LDBVOL_MASK                      0x0007  /* LDBVOL - [2:0] */
597 #define WM8990_LDBVOL_SHIFT                     0
598
599 /*
600  * R42 (0x2A) - Input Mixer4
601  */
602 #define WM8990_R34MNB                           0x0100  /* R34MNB */
603 #define WM8990_R34MNB_BIT                       8
604 #define WM8990_R34MNBST                         0x0080  /* R34MNBST */
605 #define WM8990_R34MNBST_BIT                     7
606 #define WM8990_R12MNB                           0x0020  /* R12MNB */
607 #define WM8990_R12MNB_BIT                       5
608 #define WM8990_R12MNBST                         0x0010  /* R12MNBST */
609 #define WM8990_R12MNBST_BIT                     4
610 #define WM8990_RDBVOL_MASK                      0x0007  /* RDBVOL - [2:0] */
611 #define WM8990_RDBVOL_SHIFT                     0
612
613 /*
614  * R43 (0x2B) - Input Mixer5
615  */
616 #define WM8990_LI2BVOL_MASK                     0x07  /* LI2BVOL - [8:6] */
617 #define WM8990_LI2BVOL_SHIFT                    6
618 #define WM8990_LR4BVOL_MASK                     0x07  /* LR4BVOL - [5:3] */
619 #define WM8990_LR4BVOL_SHIFT                    3
620 #define WM8990_LL4BVOL_MASK                     0x07  /* LL4BVOL - [2:0] */
621 #define WM8990_LL4BVOL_SHIFT                    0
622
623 /*
624  * R44 (0x2C) - Input Mixer6
625  */
626 #define WM8990_RI2BVOL_MASK                     0x07  /* RI2BVOL - [8:6] */
627 #define WM8990_RI2BVOL_SHIFT                    6
628 #define WM8990_RL4BVOL_MASK                     0x07  /* RL4BVOL - [5:3] */
629 #define WM8990_RL4BVOL_SHIFT                    3
630 #define WM8990_RR4BVOL_MASK                     0x07  /* RR4BVOL - [2:0] */
631 #define WM8990_RR4BVOL_SHIFT                    0
632
633 /*
634  * R45 (0x2D) - Output Mixer1
635  */
636 #define WM8990_LRBLO                            0x0080  /* LRBLO */
637 #define WM8990_LRBLO_BIT                        7
638 #define WM8990_LLBLO                            0x0040  /* LLBLO */
639 #define WM8990_LLBLO_BIT                        6
640 #define WM8990_LRI3LO                           0x0020  /* LRI3LO */
641 #define WM8990_LRI3LO_BIT                       5
642 #define WM8990_LLI3LO                           0x0010  /* LLI3LO */
643 #define WM8990_LLI3LO_BIT                       4
644 #define WM8990_LR12LO                           0x0008  /* LR12LO */
645 #define WM8990_LR12LO_BIT                       3
646 #define WM8990_LL12LO                           0x0004  /* LL12LO */
647 #define WM8990_LL12LO_BIT                       2
648 #define WM8990_LDLO                             0x0001  /* LDLO */
649 #define WM8990_LDLO_BIT                         0
650
651 /*
652  * R46 (0x2E) - Output Mixer2
653  */
654 #define WM8990_RLBRO                            0x0080  /* RLBRO */
655 #define WM8990_RLBRO_BIT                        7
656 #define WM8990_RRBRO                            0x0040  /* RRBRO */
657 #define WM8990_RRBRO_BIT                        6
658 #define WM8990_RLI3RO                           0x0020  /* RLI3RO */
659 #define WM8990_RLI3RO_BIT                       5
660 #define WM8990_RRI3RO                           0x0010  /* RRI3RO */
661 #define WM8990_RRI3RO_BIT                       4
662 #define WM8990_RL12RO                           0x0008  /* RL12RO */
663 #define WM8990_RL12RO_BIT                       3
664 #define WM8990_RR12RO                           0x0004  /* RR12RO */
665 #define WM8990_RR12RO_BIT                       2
666 #define WM8990_RDRO                             0x0001  /* RDRO */
667 #define WM8990_RDRO_BIT                         0
668
669 /*
670  * R47 (0x2F) - Output Mixer3
671  */
672 #define WM8990_LLI3LOVOL_MASK                   0x07  /* LLI3LOVOL - [8:6] */
673 #define WM8990_LLI3LOVOL_SHIFT                  6
674 #define WM8990_LR12LOVOL_MASK                   0x07  /* LR12LOVOL - [5:3] */
675 #define WM8990_LR12LOVOL_SHIFT                  3
676 #define WM8990_LL12LOVOL_MASK                   0x07  /* LL12LOVOL - [2:0] */
677 #define WM8990_LL12LOVOL_SHIFT                  0
678
679 /*
680  * R48 (0x30) - Output Mixer4
681  */
682 #define WM8990_RRI3ROVOL_MASK                   0x07  /* RRI3ROVOL - [8:6] */
683 #define WM8990_RRI3ROVOL_SHIFT                  6
684 #define WM8990_RL12ROVOL_MASK                   0x07  /* RL12ROVOL - [5:3] */
685 #define WM8990_RL12ROVOL_SHIFT                  3
686 #define WM8990_RR12ROVOL_MASK                   0x07  /* RR12ROVOL - [2:0] */
687 #define WM8990_RR12ROVOL_SHIFT                  0
688
689 /*
690  * R49 (0x31) - Output Mixer5
691  */
692 #define WM8990_LRI3LOVOL_MASK                   0x07  /* LRI3LOVOL - [8:6] */
693 #define WM8990_LRI3LOVOL_SHIFT                  6
694 #define WM8990_LRBLOVOL_MASK                    0x07  /* LRBLOVOL - [5:3] */
695 #define WM8990_LRBLOVOL_SHIFT                   3
696 #define WM8990_LLBLOVOL_MASK                    0x07  /* LLBLOVOL - [2:0] */
697 #define WM8990_LLBLOVOL_SHIFT                   0
698
699 /*
700  * R50 (0x32) - Output Mixer6
701  */
702 #define WM8990_RLI3ROVOL_MASK                   0x07  /* RLI3ROVOL - [8:6] */
703 #define WM8990_RLI3ROVOL_SHIFT                  6
704 #define WM8990_RLBROVOL_MASK                    0x07  /* RLBROVOL - [5:3] */
705 #define WM8990_RLBROVOL_SHIFT                   3
706 #define WM8990_RRBROVOL_MASK                    0x07  /* RRBROVOL - [2:0] */
707 #define WM8990_RRBROVOL_SHIFT                   0
708
709 /*
710  * R51 (0x33) - Out3/4 Mixer
711  */
712 #define WM8990_VSEL_MASK                        0x0180  /* VSEL - [8:7] */
713 #define WM8990_LI4O3                            0x0020  /* LI4O3 */
714 #define WM8990_LI4O3_BIT                        5
715 #define WM8990_LPGAO3                           0x0010  /* LPGAO3 */
716 #define WM8990_LPGAO3_BIT                       4
717 #define WM8990_RI4O4                            0x0002  /* RI4O4 */
718 #define WM8990_RI4O4_BIT                        1
719 #define WM8990_RPGAO4                           0x0001  /* RPGAO4 */
720 #define WM8990_RPGAO4_BIT                       0
721 /*
722  * R52 (0x34) - Line Mixer1
723  */
724 #define WM8990_LLOPGALON                        0x0040  /* LLOPGALON */
725 #define WM8990_LLOPGALON_BIT                    6
726 #define WM8990_LROPGALON                        0x0020  /* LROPGALON */
727 #define WM8990_LROPGALON_BIT                    5
728 #define WM8990_LOPLON                           0x0010  /* LOPLON */
729 #define WM8990_LOPLON_BIT                       4
730 #define WM8990_LR12LOP                          0x0004  /* LR12LOP */
731 #define WM8990_LR12LOP_BIT                      2
732 #define WM8990_LL12LOP                          0x0002  /* LL12LOP */
733 #define WM8990_LL12LOP_BIT                      1
734 #define WM8990_LLOPGALOP                        0x0001  /* LLOPGALOP */
735 #define WM8990_LLOPGALOP_BIT                    0
736 /*
737  * R53 (0x35) - Line Mixer2
738  */
739 #define WM8990_RROPGARON                        0x0040  /* RROPGARON */
740 #define WM8990_RROPGARON_BIT                    6
741 #define WM8990_RLOPGARON                        0x0020  /* RLOPGARON */
742 #define WM8990_RLOPGARON_BIT                    5
743 #define WM8990_ROPRON                           0x0010  /* ROPRON */
744 #define WM8990_ROPRON_BIT                       4
745 #define WM8990_RL12ROP                          0x0004  /* RL12ROP */
746 #define WM8990_RL12ROP_BIT                      2
747 #define WM8990_RR12ROP                          0x0002  /* RR12ROP */
748 #define WM8990_RR12ROP_BIT                      1
749 #define WM8990_RROPGAROP                        0x0001  /* RROPGAROP */
750 #define WM8990_RROPGAROP_BIT                    0
751
752 /*
753  * R54 (0x36) - Speaker Mixer
754  */
755 #define WM8990_LB2SPK                           0x0080  /* LB2SPK */
756 #define WM8990_LB2SPK_BIT                       7
757 #define WM8990_RB2SPK                           0x0040  /* RB2SPK */
758 #define WM8990_RB2SPK_BIT                       6
759 #define WM8990_LI2SPK                           0x0020  /* LI2SPK */
760 #define WM8990_LI2SPK_BIT                       5
761 #define WM8990_RI2SPK                           0x0010  /* RI2SPK */
762 #define WM8990_RI2SPK_BIT                       4
763 #define WM8990_LOPGASPK                         0x0008  /* LOPGASPK */
764 #define WM8990_LOPGASPK_BIT                     3
765 #define WM8990_ROPGASPK                         0x0004  /* ROPGASPK */
766 #define WM8990_ROPGASPK_BIT                     2
767 #define WM8990_LDSPK                            0x0002  /* LDSPK */
768 #define WM8990_LDSPK_BIT                        1
769 #define WM8990_RDSPK                            0x0001  /* RDSPK */
770 #define WM8990_RDSPK_BIT                        0
771
772 /*
773  * R55 (0x37) - Additional Control
774  */
775 #define WM8990_VROI                             0x0001  /* VROI */
776
777 /*
778  * R56 (0x38) - AntiPOP1
779  */
780 #define WM8990_DIS_LLINE                        0x0020  /* DIS_LLINE */
781 #define WM8990_DIS_RLINE                        0x0010  /* DIS_RLINE */
782 #define WM8990_DIS_OUT3                         0x0008  /* DIS_OUT3 */
783 #define WM8990_DIS_OUT4                         0x0004  /* DIS_OUT4 */
784 #define WM8990_DIS_LOUT                         0x0002  /* DIS_LOUT */
785 #define WM8990_DIS_ROUT                         0x0001  /* DIS_ROUT */
786
787 /*
788  * R57 (0x39) - AntiPOP2
789  */
790 #define WM8990_SOFTST                           0x0040  /* SOFTST */
791 #define WM8990_BUFIOEN                          0x0008  /* BUFIOEN */
792 #define WM8990_BUFDCOPEN                        0x0004  /* BUFDCOPEN */
793 #define WM8990_POBCTRL                          0x0002  /* POBCTRL */
794 #define WM8990_VMIDTOG                          0x0001  /* VMIDTOG */
795
796 /*
797  * R58 (0x3A) - MICBIAS
798  */
799 #define WM8990_MCDSCTH_MASK                     0x00C0  /* MCDSCTH - [7:6] */
800 #define WM8990_MCDTHR_MASK                      0x0038  /* MCDTHR - [5:3] */
801 #define WM8990_MCD                              0x0004  /* MCD */
802 #define WM8990_MBSEL                            0x0001  /* MBSEL */
803
804 /*
805  * R60 (0x3C) - PLL1
806  */
807 #define WM8990_SDM                              0x0080  /* SDM */
808 #define WM8990_PRESCALE                         0x0040  /* PRESCALE */
809 #define WM8990_PLLN_MASK                        0x000F  /* PLLN - [3:0] */
810
811 /*
812  * R61 (0x3D) - PLL2
813  */
814 #define WM8990_PLLK1_MASK                       0x00FF  /* PLLK1 - [7:0] */
815
816 /*
817  * R62 (0x3E) - PLL3
818  */
819 #define WM8990_PLLK2_MASK                       0x00FF  /* PLLK2 - [7:0] */
820
821 /*
822  * R63 (0x3F) - Internal Driver Bits
823  */
824 #define WM8990_INMIXL_PWR_BIT                   0
825 #define WM8990_AINLMUX_PWR_BIT                  1
826 #define WM8990_INMIXR_PWR_BIT                   2
827 #define WM8990_AINRMUX_PWR_BIT                  3
828
829 struct wm8990_setup_data {
830         unsigned i2c_bus;
831         unsigned short i2c_address;
832 };
833
834 #define WM8990_MCLK_DIV 0
835 #define WM8990_DACCLK_DIV 1
836 #define WM8990_ADCCLK_DIV 2
837 #define WM8990_BCLK_DIV 3
838
839 extern struct snd_soc_dai wm8990_dai;
840 extern struct snd_soc_codec_device soc_codec_dev_wm8990;
841
842 #endif  /* __WM8990REGISTERDEFS_H__ */
843 /*------------------------------ END OF FILE ---------------------------------*/